valgrind memory leak fixes
[o-du/l2.git] / src / 5gnrmac / lwr_mac_fsm.c
1  /*******************************************************************************
2  ################################################################################
3  #   Copyright (c) [2017-2019] [Radisys]                                        #
4  #                                                                              #
5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
6  #   you may not use this file except in compliance with the License.           #
7  #   You may obtain a copy of the License at                                    #
8  #                                                                              #
9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
10  #                                                                              #
11  #   Unless required by applicable law or agreed to in writing, software        #
12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
14  #   See the License for the specific language governing permissions and        #
15  #   limitations under the License.                                             #
16  ################################################################################
17  *******************************************************************************/
18
19
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
22 #include "lrg.h"
23 #include "lrg.x"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
27 #include "mac.h"
28 #include "lwr_mac_phy.h"
29 #include "lwr_mac.h"
30 #ifdef INTEL_FAPI
31 #include "fapi.h"
32 #include "fapi_vendor_extension.h"
33 #endif
34 #ifdef INTEL_WLS_MEM
35 #include "wls_lib.h"
36 #endif
37 #include "lwr_mac_fsm.h"
38 #include "mac_utils.h"
39
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
47 #define PDU_PRESENT 1
48 #define SET_MSG_LEN(x, size) x += size
49
50 void fapiMacConfigRsp(uint16_t cellId);
51 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
52
53 /* Global variables */
54 uint8_t slotIndIdx;
55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
56
57 void lwrMacLayerInit()
58 {
59 #ifdef INTEL_WLS_MEM
60    uint8_t  idx;
61
62    /* Initializing WLS free mem list */
63    slotIndIdx = 1;
64    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
65    {
66       cmLListInit(&wlsBlockToFreeList[idx]);
67    }
68 #endif
69 }
70
71 /*******************************************************************
72  *
73  * @brief Handles Invalid Request Event
74  *
75  * @details
76  *
77  *    Function : lwr_mac_procInvalidEvt
78  *
79  *    Functionality:
80  *         - Displays the PHY state when the invalid event occurs
81  *
82  * @params[in]
83  * @return ROK     - success
84  *         RFAILED - failure
85  *
86  * ****************************************************************/
87 uint8_t lwr_mac_procInvalidEvt(void *msg)
88 {
89    printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
90    return ROK;
91 }
92
93 #ifdef INTEL_FAPI
94 /*******************************************************************
95  *
96  * @brief Fills FAPI message header
97  *
98  * @details
99  *
100  *    Function : fillMsgHeader
101  *
102  *    Functionality:
103  *         -Fills FAPI message header
104  *
105  * @params[in] Pointer to header
106  *             Number of messages
107  *             Messae Type
108  *             Length of message
109  * @return void
110  *
111  * ****************************************************************/
112 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
113 {
114    memset(hdr, 0, sizeof(fapi_msg_t));
115    hdr->msg_id = msgType;
116    hdr->length = msgLen;
117 }
118
119 /*******************************************************************
120  *
121  * @brief Fills FAPI Config Request message header
122  *
123  * @details
124  *
125  *    Function : fillTlvs
126  *
127  *    Functionality:
128  *         -Fills FAPI Config Request message header
129  *
130  * @params[in] Pointer to TLV
131  *             Tag
132  *             Length
133  *             Value
134  *             MsgLen
135  * @return void
136  *
137  * ****************************************************************/
138 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
139       uint32_t value, uint32_t *msgLen)
140 {
141    tlv->tl.tag    = tag;
142    tlv->tl.length = length;
143    tlv->value     = value;
144    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
145 }
146 /*******************************************************************
147  *
148  * @brief fills the cyclic prefix by comparing the bitmask
149  *
150  * @details
151  *
152  *    Function : fillCyclicPrefix
153  *
154  *    Functionality:
155  *         -checks the value with the bitmask and
156  *          fills the cellPtr's cyclic prefix.
157  *
158  * @params[in] Pointer to ClCellParam
159  *             Value to be compared
160  * @return void
161  *
162  ********************************************************************/
163 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
164 {
165    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
166    {
167       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
168    }
169    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
170    {
171       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
172    }
173    else
174    {
175       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
176    }
177 }
178
179 /*******************************************************************
180  *
181  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
182  *
183  * @details
184  *
185  *    Function : fillSubcarrierSpaceDl
186  *
187  *    Functionality:
188  *         -checks the value with the bitmask and
189  *          fills the cellPtr's subcarrier spacing in DL
190  *
191  * @params[in] Pointer to ClCellParam
192  *             Value to be compared
193  * @return void
194  *
195  * ****************************************************************/
196
197 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
198 {
199    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
200    {
201       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
202    }
203    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
204    {
205       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
206    }
207    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
208    {
209       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
210    }
211    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
212    {
213       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
214    }
215    else
216    {
217       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
218    }
219 }
220
221 /*******************************************************************
222  *
223  * @brief fills the downlink bandwidth by comparing the bitmask
224  *
225  * @details
226  *
227  *    Function : fillBandwidthDl
228  *
229  *    Functionality:
230  *         -checks the value with the bitmask and
231  *         -fills the cellPtr's DL Bandwidth
232  *
233  * @params[in] Pointer to ClCellParam
234  *             Value to be compared
235  * @return void
236  *
237  * ****************************************************************/
238
239 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
240 {
241    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
242    {
243       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
244    }
245    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
246    {
247       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
248    }
249    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
250    {
251       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
252    }
253    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
254    {
255       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
256    }
257    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
258    {
259       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
260    }
261    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
262    {
263       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
264    }
265    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
266    {
267       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
268    }
269    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
270    {
271       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
272    }
273    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
274    {
275       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
276    }
277    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
278    {
279       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
280    }
281    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
282    {
283       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
284    }
285    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
286    {
287       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
288    }
289    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
290    {
291       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
292    }
293    else
294    {
295       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
296    }
297 }
298
299 /*******************************************************************
300  *
301  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
302  *
303  * @details
304  *
305  *    Function : fillSubcarrierSpaceUl
306  *
307  *    Functionality:
308  *         -checks the value with the bitmask and
309  *         -fills cellPtr's subcarrier spacing in UL
310  *
311  * @params[in] Pointer to ClCellParam
312  *             Value to be compared
313  * @return void
314  *
315  * ****************************************************************/
316
317 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
318 {
319    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
320    {
321       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
322    }
323    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
324    {
325       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
326    }
327    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
328    {
329       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
330    }
331    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
332    {
333       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
334    }
335    else
336    {
337       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
338    }
339 }
340
341 /*******************************************************************
342  *
343  * @brief fills the uplink bandwidth by comparing the bitmask
344  *
345  * @details
346  *
347  *    Function : fillBandwidthUl
348  *
349  *    Functionality:
350  *         -checks the value with the bitmask and
351  *          fills the cellPtr's UL Bandwidth
352  *
353  *
354  *
355  * @params[in] Pointer to ClCellParam
356  *             Value to be compared
357  * @return void
358  *
359  *
360  * ****************************************************************/
361
362 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
363 {
364    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
365    {
366       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
367    }
368    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
369    {
370       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
371    }
372    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
373    {
374       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
375    }
376    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
377    {
378       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
379    }
380    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
381    {
382       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
383    }
384    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
385    {
386       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
387    }
388    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
389    {
390       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
391    }
392    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
393    {
394       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
395    }
396    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
397    {
398       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
399    }
400    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
401    {
402       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
403    }
404    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
405    {
406       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
407    }
408    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
409    {
410       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
411    }
412    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
413    {
414       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
415    }
416    else
417    {
418       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
419    }
420 }
421 /*******************************************************************
422  *
423  * @brief fills the CCE maping by comparing the bitmask
424  *
425  * @details
426  *
427  *    Function : fillCCEmaping
428  *
429  *    Functionality:
430  *         -checks the value with the bitmask and
431  *          fills the cellPtr's CCE Mapping Type
432  *
433  *
434  * @params[in] Pointer to ClCellParam
435  *             Value to be compared
436  * @return void
437  *
438  * ****************************************************************/
439
440 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
441 {
442    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
443    {
444       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
445    }
446    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
447    {
448       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
449    }
450    else
451    {
452       (*cellPtr)->cceMappingType = INVALID_VALUE;
453    }
454 }
455
456 /*******************************************************************
457  *
458  * @brief fills the PUCCH format by comparing the bitmask
459  *
460  * @details
461  *
462  *    Function : fillPucchFormat
463  *
464  *    Functionality:
465  *         -checks the value with the bitmask and
466  *          fills the cellPtr's pucch format
467  *
468  *
469  * @params[in] Pointer to ClCellParam
470  *             Value to be compared
471  * @return void
472  *
473  * ****************************************************************/
474
475 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
476 {
477    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
478    {
479       (*cellPtr)->pucchFormats    = FORMAT_0;
480    }
481    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
482    {
483       (*cellPtr)->pucchFormats    = FORMAT_1;
484    }
485    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
486    {
487       (*cellPtr)->pucchFormats    = FORMAT_2;
488    }
489    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
490    {
491       (*cellPtr)->pucchFormats    = FORMAT_3;
492    }
493    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
494    {
495       (*cellPtr)->pucchFormats    = FORMAT_4;
496    }
497    else
498    {
499       (*cellPtr)->pucchFormats    = INVALID_VALUE;
500    }
501 }
502
503 /*******************************************************************
504  *
505  * @brief fills the PDSCH Mapping Type by comparing the bitmask
506  *
507  * @details
508  *
509  *    Function : fillPdschMappingType
510  *
511  *    Functionality:
512  *         -checks the value with the bitmask and
513  *          fills the cellPtr's PDSCH MappingType
514  *
515  * @params[in] Pointer to ClCellParam
516  *             Value to be compared
517  * @return void
518  *
519  * ****************************************************************/
520
521 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
522 {
523    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
524    {
525       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
526    }
527    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
528    {
529       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
530    }
531    else
532    {
533       (*cellPtr)->pdschMappingType = INVALID_VALUE;
534    }
535 }
536
537 /*******************************************************************
538  *
539  * @brief fills the PDSCH Allocation Type by comparing the bitmask
540  *
541  * @details
542  *
543  *    Function : fillPdschAllocationType
544  *
545  *    Functionality:
546  *         -checks the value with the bitmask and
547  *          fills the cellPtr's PDSCH AllocationType
548  *
549  * @params[in] Pointer to ClCellParam
550  *             Value to be compared
551  * @return void
552  *
553  * ****************************************************************/
554
555 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
556 {
557    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
558    {
559       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
560    }
561    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
562    {
563       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
564    }
565    else
566    {
567       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
568    }
569 }
570
571 /*******************************************************************
572  *
573  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
574  *
575  * @details
576  *
577  *    Function : fillPrbMappingType
578  *
579  *    Functionality:
580  *         -checks the value with the bitmask and
581  *          fills the cellPtr's PRB Mapping Type
582  *
583  * @params[in] Pointer to ClCellParam
584  *             Value to be compared
585  * @return void
586  *
587  ******************************************************************/
588 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
589 {
590    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
591    {
592       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
593    }
594    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
595    {
596       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
597    }
598    else
599    {
600       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
601    }
602 }
603
604 /*******************************************************************
605  *
606  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
607  *
608  * @details
609  *
610  *    Function : fillPdschDmrsConfigType
611  *
612  *    Functionality:
613  *         -checks the value with the bitmask and
614  *          fills the cellPtr's DmrsConfig Type
615  *
616  * @params[in] Pointer to ClCellParam
617  *             Value to be compared
618  * @return void
619  *
620  ******************************************************************/
621
622 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
623 {
624    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
625    {
626       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
627    }
628    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
629    {
630       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
631    }
632    else
633    {
634       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
635    }
636 }
637
638 /*******************************************************************
639  *
640  * @brief fills the PDSCH DmrsLength by comparing the bitmask
641  *
642  * @details
643  *
644  *    Function : fillPdschDmrsLength
645  *
646  *    Functionality:
647  *         -checks the value with the bitmask and
648  *          fills the cellPtr's PdschDmrsLength
649  *
650  * @params[in] Pointer to ClCellParam
651  *             Value to be compared
652  * @return void
653  *
654  ******************************************************************/
655 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
656 {
657    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
658    {
659       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
660    }
661    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
662    {
663       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
664    }
665    else
666    {
667       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
668    }
669 }
670
671 /*******************************************************************
672  *
673  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
674  *
675  * @details
676  *
677  *    Function : fillPdschDmrsAddPos
678  *
679  *    Functionality:
680  *         -checks the value with the bitmask and
681  *          fills the cellPtr's Pdsch DmrsAddPos
682  *
683  * @params[in] Pointer to ClCellParam
684  *             Value to be compared
685  * @return void
686  *
687  ******************************************************************/
688
689 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
690 {
691    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
692    {
693       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
694    }
695    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
696    {
697       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
698    }
699    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
700    {
701       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
702    }
703    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
704    {
705       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
706    }
707    else
708    {
709       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
710    }
711 }
712
713 /*******************************************************************
714  *
715  * @brief fills the Modulation Order in DL by comparing the bitmask
716  *
717  * @details
718  *
719  *    Function : fillModulationOrderDl
720  *
721  *    Functionality:
722  *         -checks the value with the bitmask and
723  *          fills the cellPtr's ModulationOrder in DL.
724  *
725  * @params[in] Pointer to ClCellParam
726  *             Value to be compared
727  * @return void
728  *
729  ******************************************************************/
730 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
731 {
732    if(value == 0 )
733    {
734       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
735    }
736    else if(value == 1)
737    {
738       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
739    }
740    else if(value == 2)
741    {
742       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
743    }
744    else if(value == 3)
745    {
746       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
747    }
748    else
749    {
750       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
751    }
752 }
753
754 /*******************************************************************
755  *
756  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
757  *
758  * @details
759  *
760  *    Function : fillPuschDmrsConfigType
761  *
762  *    Functionality:
763  *         -checks the value with the bitmask and
764  *          fills the cellPtr's PUSCH DmrsConfigType
765  *
766  * @params[in] Pointer to ClCellParam
767  *             Value to be compared
768  * @return void
769  *
770  ******************************************************************/
771
772 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
773 {
774    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
775    {
776       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
777    }
778    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
779    {
780       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
781    }
782    else
783    {
784       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
785    }
786 }
787
788 /*******************************************************************
789  *
790  * @brief fills the PUSCH DmrsLength by comparing the bitmask
791  *
792  * @details
793  *
794  *    Function : fillPuschDmrsLength
795  *
796  *    Functionality:
797  *         -checks the value with the bitmask and
798  *          fills the cellPtr's PUSCH DmrsLength
799  *
800  * @params[in] Pointer to ClCellParam
801  *             Value to be compared
802  * @return void
803  *
804  ******************************************************************/
805
806 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
807 {
808    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
809    {
810       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
811    }
812    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
813    {
814       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
815    }
816    else
817    {
818       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
819    }
820 }
821
822 /*******************************************************************
823  *
824  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
825  *
826  * @details
827  *
828  *    Function : fillPuschDmrsAddPos
829  *
830  *    Functionality:
831  *         -checks the value with the bitmask and
832  *          fills the cellPtr's PUSCH DmrsAddPos
833  *
834  * @params[in] Pointer to ClCellParam
835  *             Value to be compared
836  * @return void
837  *
838  ******************************************************************/
839
840 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
841 {
842    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
843    {
844       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
845    }
846    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
847    {
848       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
849    }
850    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
851    {
852       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
853    }
854    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
855    {
856       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
857    }
858    else
859    {
860       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
861    }
862 }
863
864 /*******************************************************************
865  *
866  * @brief fills the PUSCH Mapping Type by comparing the bitmask
867  *
868  * @details
869  *
870  *    Function : fillPuschMappingType
871  *
872  *    Functionality:
873  *         -checks the value with the bitmask and
874  *          fills the cellPtr's PUSCH MappingType
875  *
876  * @params[in] Pointer to ClCellParam
877  *             Value to be compared
878  * @return void
879  *
880  ******************************************************************/
881
882 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
883 {
884    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
885    {
886       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
887    }
888    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
889    {
890       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
891    }
892    else
893    {
894       (*cellPtr)->puschMappingType = INVALID_VALUE;
895    }
896 }
897
898 /*******************************************************************
899  *
900  * @brief fills the PUSCH Allocation Type by comparing the bitmask
901  *
902  * @details
903  *
904  *    Function : fillPuschAllocationType
905  *
906  *    Functionality:
907  *         -checks the value with the bitmask and
908  *          fills the cellPtr's PUSCH AllocationType
909  *
910  * @params[in] Pointer to ClCellParam
911  *             Value to be compared
912  * @return void
913  *
914  ******************************************************************/
915
916 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
917 {
918    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
919    {
920       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
921    }
922    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
923    {
924       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
925    }
926    else
927    {
928       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
929    }
930 }
931
932 /*******************************************************************
933  *
934  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
935  *
936  * @details
937  *
938  *    Function : fillPuschPrbMappingType
939  *
940  *    Functionality:
941  *         -checks the value with the bitmask and
942  *          fills the cellPtr's PUSCH PRB MApping Type
943  *
944  * @params[in] Pointer to ClCellParam
945  *             Value to be compared
946  * @return void
947  *
948  ******************************************************************/
949
950 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
951 {
952    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
953    {
954       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
955    }
956    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
957    {
958       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
959    }
960    else
961    {
962       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
963    }
964 }
965
966 /*******************************************************************
967  *
968  * @brief fills the Modulation Order in Ul by comparing the bitmask
969  *
970  * @details
971  *
972  *    Function : fillModulationOrderUl
973  *
974  *    Functionality:
975  *         -checks the value with the bitmask and
976  *          fills the cellPtr's Modualtsion Order in UL.
977  *
978  * @params[in] Pointer to ClCellParam
979  *             Value to be compared
980  * @return void
981  *
982  ******************************************************************/
983
984 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
985 {
986    if(value == 0)
987    {
988       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
989    }
990    else if(value == 1)
991    {
992       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
993    }
994    else if(value == 2)
995    {
996       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
997    }
998    else if(value == 3)
999    {
1000       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1001    }
1002    else
1003    {
1004       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1005    }
1006 }
1007
1008 /*******************************************************************
1009  *
1010  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1011  *
1012  * @details
1013  *
1014  *    Function : fillPuschAggregationFactor
1015  *
1016  *    Functionality:
1017  *         -checks the value with the bitmask and
1018  *          fills the cellPtr's PUSCH Aggregation Factor
1019  *
1020  * @params[in] Pointer to ClCellParam
1021  *             Value to be compared
1022  * @return void
1023  *
1024  ******************************************************************/
1025
1026 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1027 {
1028    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1029    {
1030       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1031    }
1032    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1033    {
1034       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1035    }
1036    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1037    {
1038       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1039    }
1040    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1041    {
1042       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1043    }
1044    else
1045    {
1046       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1047    }
1048 }
1049
1050 /*******************************************************************
1051  *
1052  * @brief fills the PRACH Long Format by comparing the bitmask
1053  *
1054  * @details
1055  *
1056  *    Function : fillPrachLongFormat
1057  *
1058  *    Functionality:
1059  *         -checks the value with the bitmask and
1060  *          fills the cellPtr's PRACH Long Format
1061  *
1062  * @params[in] Pointer to ClCellParam
1063  *             Value to be compared
1064  * @return void
1065  *
1066  ******************************************************************/
1067
1068 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1069 {
1070    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1071    {
1072       (*cellPtr)->prachLongFormats    = FORMAT_0;
1073    }
1074    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1075    {
1076       (*cellPtr)->prachLongFormats    = FORMAT_1;
1077    }
1078    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1079    {
1080       (*cellPtr)->prachLongFormats    = FORMAT_2;
1081    }
1082    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1083    {
1084       (*cellPtr)->prachLongFormats    = FORMAT_3;
1085    }
1086    else
1087    {
1088       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1089    }
1090 }
1091
1092 /*******************************************************************
1093  *
1094  * @brief fills the PRACH Short Format by comparing the bitmask
1095  *
1096  * @details
1097  *
1098  *    Function : fillPrachShortFormat
1099  *
1100  *    Functionality:
1101  *         -checks the value with the bitmask and
1102  *          fills the cellPtr's PRACH ShortFormat
1103  *
1104  * @params[in] Pointer to ClCellParam
1105  *             Value to be compared
1106  * @return void
1107  *
1108  ******************************************************************/
1109
1110 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1111 {
1112    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1113    {
1114       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1115    }
1116    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1117    {
1118       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1119    }
1120    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1121    {
1122       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1123    }
1124    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1125    {
1126       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1127    }
1128    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1129    {
1130       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1131    }
1132    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1133    {
1134       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1135    }
1136    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1137    {
1138       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1139    }
1140    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1141    {
1142       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1143    }
1144    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1145    {
1146       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1147    }
1148    else
1149    {
1150       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1151    }
1152 }
1153
1154 /*******************************************************************
1155  *
1156  * @brief fills the Fd Occasions Type by comparing the bitmask
1157  *
1158  * @details
1159  *
1160  *    Function : fillFdOccasions
1161  *
1162  *    Functionality:
1163  *         -checks the value with the bitmask and
1164  *          fills the cellPtr's Fd Occasions
1165  *
1166  * @params[in] Pointer to ClCellParam
1167  *             Value to be compared
1168  * @return void
1169  *
1170  ******************************************************************/
1171
1172 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1173 {
1174    if(value == 0)
1175    {
1176       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1177    }
1178    else if(value == 1)
1179    {
1180       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1181    }
1182    else if(value == 3)
1183    {
1184       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1185    }
1186    else if(value == 4)
1187    {
1188       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1189    }
1190    else
1191    {
1192       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1193    }
1194 }
1195
1196 /*******************************************************************
1197  *
1198  * @brief fills the RSSI Measurement by comparing the bitmask
1199  *
1200  * @details
1201  *
1202  *    Function : fillRssiMeas
1203  *
1204  *    Functionality:
1205  *         -checks the value with the bitmask and
1206  *          fills the cellPtr's RSSI Measurement report
1207  *
1208  * @params[in] Pointer to ClCellParam
1209  *             Value to be compared
1210  * @return void
1211  *
1212  ******************************************************************/
1213
1214 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1215 {
1216    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1217    {
1218       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1219    }
1220    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1221    {
1222       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1223    }
1224    else
1225    {
1226       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1227    }
1228 }
1229
1230 /*******************************************************************
1231  *
1232  * @brief Returns the TLVs value
1233  *
1234  * @details
1235  *
1236  *    Function : getParamValue
1237  *
1238  *    Functionality:
1239  *         -return TLVs value
1240  *
1241  * @params[in]
1242  * @return ROK     - temp
1243  *         RFAILED - failure
1244  *
1245  * ****************************************************************/
1246
1247 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1248 {
1249    void *posPtr;
1250    posPtr   = &tlv->tl.tag;
1251    posPtr   += sizeof(tlv->tl.tag);
1252    posPtr   += sizeof(tlv->tl.length);
1253    /*TO DO: malloc to SSI memory */
1254    if(type == FAPI_UINT_8)
1255    {
1256       return(*(uint8_t *)posPtr);
1257    }
1258    else if(type == FAPI_UINT_16)
1259    {
1260       return(*(uint16_t *)posPtr);
1261    }
1262    else if(type == FAPI_UINT_32)
1263    {
1264       return(*(uint32_t *)posPtr);
1265    }
1266    else
1267    {
1268       DU_LOG("\nLWR_MAC: Value Extraction failed" );
1269       return RFAILED;
1270    }
1271 }
1272 #endif /* FAPI */
1273
1274 /*******************************************************************
1275  *
1276  * @brief Modifes the received mibPdu to uint32 bit
1277  *        and stores it in MacCellCfg
1278  *
1279  * @details
1280  *
1281  *    Function : setMibPdu
1282  *
1283  *    Functionality:
1284  *         -Sets the MibPdu
1285  *
1286  * @params[in] Pointer to mibPdu
1287  *             pointer to modified value
1288  ******************************************************************/
1289 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1290 {
1291    *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
1292    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1293    DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
1294 }
1295
1296 /*******************************************************************
1297  *
1298  * @brief Sends FAPI Param req to PHY
1299  *
1300  * @details
1301  *
1302  *    Function : lwr_mac_procParamReqEvt
1303  *
1304  *    Functionality:
1305  *         -Sends FAPI Param req to PHY
1306  *
1307  * @params[in]
1308  * @return ROK     - success
1309  *         RFAILED - failure
1310  *
1311  * ****************************************************************/
1312
1313 uint8_t lwr_mac_procParamReqEvt(void *msg)
1314 {
1315 #ifdef INTEL_FAPI
1316    /* startGuardTimer(); */
1317    fapi_param_req_t         *paramReq = NULL;
1318    fapi_msg_header_t        *msgHeader;
1319    p_fapi_api_queue_elem_t  paramReqElem;
1320    p_fapi_api_queue_elem_t  headerElem;
1321
1322    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1323    if(paramReq != NULL)
1324    {
1325       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1326          sizeof(fapi_tx_data_req_t));
1327       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1328       memset(paramReq, 0, sizeof(fapi_param_req_t));
1329       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1330
1331       /* Fill message header */
1332       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1333       if(!headerElem)
1334       {
1335          DU_LOG("\nLWR_MAC: Memory allocation failed for param req header");
1336          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1337          return RFAILED;
1338       }
1339       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1340          sizeof(fapi_msg_header_t));
1341       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1342       msgHeader->num_msg = 1;
1343       msgHeader->handle = 0;
1344
1345       DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
1346       LwrMacSendToL1(headerElem);
1347    }
1348    else
1349    {
1350       DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
1351       return RFAILED;
1352    }
1353 #endif
1354    return ROK;
1355 }
1356
1357 /*******************************************************************
1358  *
1359  * @brief Sends FAPI Param Response to MAC via PHY
1360  *
1361  * @details
1362  *
1363  *    Function : lwr_mac_procParamRspEvt
1364  *
1365  *    Functionality:
1366  *         -Sends FAPI Param rsp to MAC via PHY
1367  *
1368  * @params[in]
1369  * @return ROK     - success
1370  *         RFAILED - failure
1371  *
1372  * ****************************************************************/
1373
1374 uint8_t lwr_mac_procParamRspEvt(void *msg)
1375 {
1376 #ifdef INTEL_FAPI
1377    /* stopGuardTimer(); */
1378    uint8_t index;
1379    uint32_t encodedVal;
1380    fapi_param_resp_t *paramRsp;
1381    ClCellParam *cellParam = NULLP;
1382
1383    paramRsp = (fapi_param_resp_t *)msg;
1384    DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1385
1386    if(paramRsp != NULLP)
1387    {
1388       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1389       if(cellParam != NULLP)
1390       {
1391          DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
1392          if(paramRsp->error_code == MSG_OK)
1393          {
1394             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1395             {
1396                switch(paramRsp->tlvs[index].tl.tag)
1397                {
1398                   case FAPI_RELEASE_CAPABILITY_TAG:
1399                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1400                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1401                      {
1402                         cellParam->releaseCapability = RELEASE_15;
1403                      }
1404                      break;
1405
1406                   case FAPI_PHY_STATE_TAG:
1407                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1408                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1409                      {
1410                         printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1411                         return RFAILED;
1412                      }
1413                      break;
1414
1415                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1416                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1417                      if(encodedVal != RFAILED && encodedVal != 0)
1418                      {
1419                         cellParam->skipBlankDlConfig = SUPPORTED;
1420                      }
1421                      else
1422                      {
1423                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1424                      }
1425                      break;
1426
1427                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1428                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1429                      if(encodedVal != RFAILED && encodedVal != 0)
1430                      {
1431                         cellParam->skipBlankUlConfig = SUPPORTED;
1432                      }
1433                      else
1434                      {
1435                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1436                      }
1437                      break;
1438
1439                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1440                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1441                      break;
1442
1443                   case FAPI_CYCLIC_PREFIX_TAG:
1444                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1445                      if(encodedVal != RFAILED)
1446                      {
1447                         fillCyclicPrefix(encodedVal, &cellParam);
1448                      }
1449                      break;
1450
1451                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1452                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1453                      if(encodedVal != RFAILED)
1454                      {
1455                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1456                      }
1457                      break;
1458
1459                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1460                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1461                      if(encodedVal != RFAILED)
1462                      {
1463                         fillBandwidthDl(encodedVal, &cellParam);
1464                      }
1465                      break;
1466
1467                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1468                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1469                      if(encodedVal != RFAILED)
1470                      {
1471                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1472                      }
1473                      break;
1474
1475                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1476                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1477                      if(encodedVal != RFAILED)
1478                      {
1479                         fillBandwidthUl(encodedVal, &cellParam);
1480                      }
1481                      break;
1482
1483                   case FAPI_CCE_MAPPING_TYPE_TAG:
1484                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1485                      if(encodedVal != RFAILED)
1486                      {
1487                         fillCCEmaping(encodedVal, &cellParam);
1488                      }
1489                      break;
1490
1491                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1492                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1493                      if(encodedVal != RFAILED && encodedVal != 0)
1494                      {
1495                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1496                      }
1497                      else
1498                      {
1499                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1500                      }
1501                      break;
1502
1503                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1504                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1505                      if(encodedVal != RFAILED && encodedVal != 0)
1506                      {
1507                         cellParam->precoderGranularityCoreset = SUPPORTED;
1508                      }
1509                      else
1510                      {
1511                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1512                      }
1513                      break;
1514
1515                   case FAPI_PDCCH_MU_MIMO_TAG:
1516                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1517                      if(encodedVal != RFAILED && encodedVal != 0)
1518                      {
1519                         cellParam->pdcchMuMimo = SUPPORTED;
1520                      }
1521                      else
1522                      {
1523                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1524                      }
1525                      break;
1526
1527                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1528                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1529                      if(encodedVal != RFAILED && encodedVal != 0)
1530                      {
1531                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1532                      }
1533                      else
1534                      {
1535                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1536                      }
1537                      break;
1538
1539                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1540                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1541                      break;
1542
1543                   case FAPI_PUCCH_FORMATS_TAG:
1544                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1545                      if(encodedVal != RFAILED)
1546                      {
1547                         fillPucchFormat(encodedVal, &cellParam);
1548                      }
1549                      break;
1550
1551                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1552                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1553                      break;
1554
1555                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1556                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1557                      if(encodedVal != RFAILED)
1558                      {
1559                         fillPdschMappingType(encodedVal, &cellParam);
1560                      }
1561                      break;
1562
1563                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1564                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1565                      if(encodedVal != RFAILED)
1566                      {
1567                         fillPdschAllocationType(encodedVal, &cellParam);
1568                      }
1569                      break;
1570
1571                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1572                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1573                      if(encodedVal != RFAILED)
1574                      {
1575                         fillPrbMappingType(encodedVal, &cellParam);
1576                      }
1577                      break;
1578
1579                   case FAPI_PDSCH_CBG_TAG:
1580                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1581                      if(encodedVal != RFAILED && encodedVal != 0)
1582                      {
1583                         cellParam->pdschCbg = SUPPORTED;
1584                      }
1585                      else
1586                      {
1587                         cellParam->pdschCbg = NOT_SUPPORTED;
1588                      }
1589                      break;
1590
1591                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1592                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1593                      if(encodedVal != RFAILED)
1594                      {
1595                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1596                      }
1597                      break;
1598
1599                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1600                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1601                      if(encodedVal != RFAILED)
1602                      {
1603                         fillPdschDmrsLength(encodedVal, &cellParam);
1604                      }
1605                      break;
1606
1607                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1608                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1609                      if(encodedVal != RFAILED)
1610                      {
1611                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1612                      }
1613                      break;
1614
1615                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1616                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1617                      break;
1618
1619                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1620                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1621                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1622                      {
1623                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1624                      }
1625                      break;
1626
1627                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1628                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1629                      if(encodedVal != RFAILED)
1630                      {
1631                         fillModulationOrderDl(encodedVal, &cellParam);
1632                      }
1633                      break;
1634
1635                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1636                      cellParam->maxMuMimoUsersDl         = \
1637                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1638                      break;
1639
1640                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1641                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1642                      if(encodedVal != RFAILED && encodedVal != 0)
1643                      {
1644                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1645                      }
1646                      else
1647                      {
1648                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1649                      }
1650                      break;
1651
1652                   case FAPI_PREMPTIONSUPPORT_TAG:
1653                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1654                      if(encodedVal != RFAILED && encodedVal != 0)
1655                      {
1656                         cellParam->premptionSupport = SUPPORTED;
1657                      }
1658                      else
1659                      {
1660                         cellParam->premptionSupport = NOT_SUPPORTED;
1661                      }
1662                      break;
1663
1664                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1665                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1666                      if(encodedVal != RFAILED && encodedVal != 0)
1667                      {
1668                         cellParam->pdschNonSlotSupport = SUPPORTED;
1669                      }
1670                      else
1671                      {
1672                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1673                      }
1674                      break;
1675
1676                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1677                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1678                      if(encodedVal != RFAILED && encodedVal != 0)
1679                      {
1680                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1681                      }
1682                      else
1683                      {
1684                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1685                      }
1686                      break;
1687
1688                   case FAPI_UCI_ONLY_PUSCH_TAG:
1689                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1690                      if(encodedVal != RFAILED && encodedVal != 0)
1691                      {
1692                         cellParam->uciOnlyPusch = SUPPORTED;
1693                      }
1694                      else
1695                      {
1696                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1697                      }
1698                      break;
1699
1700                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1701                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1702                      if(encodedVal != RFAILED && encodedVal != 0)
1703                      {
1704                         cellParam->puschFrequencyHopping = SUPPORTED;
1705                      }
1706                      else
1707                      {
1708                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1709                      }
1710                      break;
1711
1712                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1713                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1714                      if(encodedVal != RFAILED)
1715                      {
1716                         fillPuschDmrsConfig(encodedVal, &cellParam);
1717                      }
1718                      break;
1719
1720                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1721                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1722                      if(encodedVal != RFAILED)
1723                      {
1724                         fillPuschDmrsLength(encodedVal, &cellParam);
1725                      }
1726                      break;
1727
1728                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1729                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1730                      if(encodedVal != RFAILED)
1731                      {
1732                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1733                      }
1734                      break;
1735
1736                   case FAPI_PUSCH_CBG_TAG:
1737                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1738                      if(encodedVal != RFAILED && encodedVal != 0)
1739                      {
1740                         cellParam->puschCbg = SUPPORTED;
1741                      }
1742                      else
1743                      {
1744                         cellParam->puschCbg = NOT_SUPPORTED;
1745                      }
1746                      break;
1747
1748                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1749                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1750                      if(encodedVal != RFAILED)
1751                      {
1752                         fillPuschMappingType(encodedVal, &cellParam);
1753                      }
1754                      break;
1755
1756                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1757                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1758                      if(encodedVal != RFAILED)
1759                      {
1760                         fillPuschAllocationType(encodedVal, &cellParam);
1761                      }
1762                      break;
1763
1764                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1765                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1766                      if(encodedVal != RFAILED)
1767                      {
1768                         fillPuschPrbMappingType(encodedVal, &cellParam);
1769                      }
1770                      break;
1771
1772                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1773                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1774                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1775                      {
1776                         cellParam->puschMaxPtrsPorts = encodedVal;
1777                      }
1778                      break;
1779
1780                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1781                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1782                      break;
1783
1784                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1785                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1786                      break;
1787
1788                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1789                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1790                      if(encodedVal != RFAILED)
1791                      {
1792                         fillModulationOrderUl(encodedVal, &cellParam);
1793                      }
1794                      break;
1795
1796                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1797                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1798                      break;
1799
1800                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1801                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1802                      if(encodedVal != RFAILED && encodedVal != 0)
1803                      {
1804                         cellParam->dftsOfdmSupport = SUPPORTED;
1805                      }
1806                      else
1807                      {
1808                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1809                      }
1810                      break;
1811
1812                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1813                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1814                      if(encodedVal != RFAILED)
1815                      {
1816                         fillPuschAggregationFactor(encodedVal, &cellParam);
1817                      }
1818                      break;
1819
1820                   case FAPI_PRACH_LONG_FORMATS_TAG:
1821                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1822                      if(encodedVal != RFAILED)
1823                      {
1824                         fillPrachLongFormat(encodedVal, &cellParam);
1825                      }
1826                      break;
1827
1828                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1829                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1830                      if(encodedVal != RFAILED)
1831                      {
1832                         fillPrachShortFormat(encodedVal, &cellParam);
1833                      }
1834                      break;
1835
1836                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1837                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1838                      if(encodedVal != RFAILED && encodedVal != 0)
1839                      {
1840                         cellParam->prachRestrictedSets = SUPPORTED;
1841                      }
1842                      else
1843                      {
1844                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1845                      }
1846                      break;
1847
1848                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1849                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1850                      if(encodedVal != RFAILED)
1851                      {
1852                         fillFdOccasions(encodedVal, &cellParam);
1853                      }
1854                      break;
1855
1856                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1857                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1858                      if(encodedVal != RFAILED)
1859                      {
1860                         fillRssiMeas(encodedVal, &cellParam);
1861                      }
1862                      break;
1863                   default:
1864                      //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1865                      break;
1866                }
1867             }
1868             MAC_FREE(cellParam, sizeof(ClCellParam));
1869             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1870             return ROK;
1871          }
1872          else
1873          {
1874             DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
1875             return RFAILED;
1876          }
1877       }
1878       else
1879       {
1880          DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
1881          return RFAILED;
1882       }
1883    }
1884    else
1885    {
1886       DU_LOG("\nLWR_MAC:  Param Response received from PHY is NULL");
1887       return RFAILED;
1888    }
1889 #else
1890    return ROK;
1891 #endif
1892 }
1893
1894 #ifdef INTEL_TIMER_MODE
1895 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1896 {
1897    void * wlsHdlr = NULLP;
1898    fapi_msg_header_t *msgHeader;
1899    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1900    p_fapi_api_queue_elem_t  headerElem;
1901    p_fapi_api_queue_elem_t  iqSampleElem;
1902    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin"; 
1903
1904    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1905
1906    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1907
1908    /* Fill IQ sample req */
1909    mtGetWlsHdl(&wlsHdlr);
1910    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1911       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t))); 
1912    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1913    if(!iqSampleElem)
1914    {
1915       DU_LOG("\nLWR_MAC: Memory allocation failed for IQ sample req");
1916       return RFAILED;
1917    }
1918    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1919       sizeof(fapi_vendor_ext_iq_samples_req_t));
1920
1921    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1922    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1923    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1924       sizeof(fapi_vendor_ext_iq_samples_req_t));
1925
1926    iqSampleReq->iq_samples_info.carrNum = 0;
1927    iqSampleReq->iq_samples_info.numSubframes = 40;
1928    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1929    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1930    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1931    iqSampleReq->iq_samples_info.startFrameNum = 0;
1932    iqSampleReq->iq_samples_info.startSlotNum = 0;
1933    iqSampleReq->iq_samples_info.startSymNum = 0;
1934    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1935    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1936
1937    /* TODO : Fill remaining parameters */
1938
1939    /* Fill message header */
1940    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1941    if(!headerElem)
1942    {
1943       DU_LOG("\nLWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1944       return RFAILED;
1945    }
1946    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1947      sizeof(fapi_msg_header_t));
1948    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1949    msgHeader->num_msg = 1; 
1950    msgHeader->handle = 0;
1951
1952    DU_LOG("\nLWR_MAC: Sending IQ Sample request to Phy");
1953    LwrMacSendToL1(headerElem);
1954    return ROK;
1955 }
1956 #endif
1957
1958 /*******************************************************************
1959  *
1960  * @brief Sends FAPI Config req to PHY
1961  *
1962  * @details
1963  *
1964  *    Function : lwr_mac_procConfigReqEvt
1965  *
1966  *    Functionality:
1967  *         -Sends FAPI Config Req to PHY
1968  *
1969  * @params[in]
1970  * @return ROK     - success
1971  *         RFAILED - failure
1972  *
1973  * ****************************************************************/
1974
1975 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1976 {
1977 #ifdef INTEL_FAPI
1978    //uint8_t idx = 0;
1979    uint8_t index = 0;
1980    uint16_t *cellId;
1981    uint16_t cellIdx;
1982    uint32_t msgLen = 0;
1983    uint32_t mib = 0;
1984    MacCellCfg macCfgParams;
1985    fapi_vendor_msg_t *vendorMsg;
1986    fapi_config_req_t *configReq;
1987    fapi_msg_header_t *msgHeader;
1988    p_fapi_api_queue_elem_t  headerElem;
1989    p_fapi_api_queue_elem_t  vendorMsgQElem;
1990    p_fapi_api_queue_elem_t  cfgReqQElem;
1991
1992    DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1993          lwrMacCb.phyState);
1994
1995    cellId = (uint16_t *)msg;
1996    GET_CELL_IDX(*cellId, cellIdx);
1997    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
1998
1999    /* Fill Cell Configuration in lwrMacCb */
2000    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2001    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2002    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId; 
2003    lwrMacCb.numCell++;
2004
2005    /* Allocte And fill Vendor msg */
2006    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));  
2007    if(!vendorMsgQElem)
2008    {
2009       DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2010       return RFAILED;
2011    }
2012    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t)); 
2013    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2014    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2015    vendorMsg->config_req_vendor.hopping_id = 0;
2016    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2017    vendorMsg->config_req_vendor.group_hop_flag = 0;
2018    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2019
2020    /* Fill FAPI config req */
2021    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2022    if(!cfgReqQElem)
2023    {
2024       DU_LOG("\nLWR_MAC: Memory allocation failed for config req");
2025       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2026       return RFAILED;
2027    }
2028    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2029       sizeof(fapi_config_req_t));
2030
2031    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2032    memset(configReq, 0, sizeof(fapi_config_req_t));
2033    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2034    configReq->number_of_tlvs = 25;
2035    msgLen = sizeof(configReq->number_of_tlvs);
2036
2037    if(macCfgParams.dlCarrCfg.pres)
2038    {
2039       fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2040          sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2041       fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2042          sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2043       /* Due to bug in Intel FT code, commenting TLVs that are are not 
2044        * needed to avoid error. Must be uncommented when FT bug is fixed */
2045       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2046          sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2047       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2048          sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2049       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2050          sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2051    }
2052    if(macCfgParams.ulCarrCfg.pres)
2053    {
2054       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2055             sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2056       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2057             sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2058       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2059       sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2060       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2061       sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2062       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2063             sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2064    }
2065    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2066    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2067
2068    /* fill cell config */
2069    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2070          sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2071    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2072          sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2073
2074    /* fill SSB configuration */
2075    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2076          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2077    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2078    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2079    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2080          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2081
2082    /* fill PRACH configuration */
2083    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2084    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2085    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2086          sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2087    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2088          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2089    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2090          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2091    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2092          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2093    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2094          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2095    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2096    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2097    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2098          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2099    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2100          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2101    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2102    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2103    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2104       {
2105       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2106       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2107       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2108       &msgLen);
2109       }
2110       else
2111       {
2112       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2113       }*/
2114
2115    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2116          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2117    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2118    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2119
2120    /* fill SSB table */
2121    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2122          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2123    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2124    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2125    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2126          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2127    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2128          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2129
2130    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2131    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2132          sizeof(uint32_t), mib, &msgLen);
2133
2134    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2135          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2136    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2137          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2138    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2139    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2140    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2141    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2142
2143    /* fill TDD table */
2144    //fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2145    sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2146    //fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2147    sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
2148
2149    /* fill measurement config */
2150    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2151    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2152
2153    /* fill DMRS Type A Pos */
2154    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2155          sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2156
2157    /* Fill message header */
2158    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2159    if(!headerElem)
2160    {
2161       DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2162       LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2163       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2164       return RFAILED;
2165    }
2166    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2167          sizeof(fapi_msg_header_t));
2168    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2169    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2170    msgHeader->handle = 0;
2171
2172    DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
2173    LwrMacSendToL1(headerElem);
2174 #endif
2175
2176    return ROK;
2177 } /* lwr_mac_handleConfigReqEvt */
2178
2179 /*******************************************************************
2180  *
2181  * @brief Processes config response from phy
2182  *
2183  * @details
2184  *
2185  *    Function : lwr_mac_procConfigRspEvt
2186  *
2187  *    Functionality:
2188  *          Processes config response from phy
2189  *
2190  * @params[in] FAPI message pointer 
2191  * @return ROK     - success
2192  *         RFAILED - failure
2193  *
2194  * ****************************************************************/
2195
2196 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2197 {
2198 #ifdef INTEL_FAPI
2199    fapi_config_resp_t *configRsp;
2200    configRsp = (fapi_config_resp_t *)msg;
2201
2202    DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2203          lwrMacCb.phyState);
2204
2205    if(configRsp != NULL)
2206    {
2207       if(configRsp->error_code == MSG_OK)
2208       {
2209          DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
2210          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2211          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2212          /* TODO : 
2213           * Store config response into an intermediate struture and send to MAC
2214           * Support LC and LWLC for sending config rsp to MAC 
2215           */
2216          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2217       }
2218       else
2219       {
2220          DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
2221          return RFAILED;
2222       }
2223    }
2224    else
2225    {
2226       DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
2227       return RFAILED;
2228    }
2229 #endif
2230
2231    return ROK;
2232 } /* lwr_mac_procConfigRspEvt */
2233
2234 /*******************************************************************
2235  *
2236  * @brief Build and send start request to phy
2237  *
2238  * @details
2239  *
2240  *    Function : lwr_mac_procStartReqEvt
2241  *
2242  *    Functionality:
2243  *       Build and send start request to phy
2244  *
2245  * @params[in] FAPI message pointer
2246  * @return ROK     - success
2247  *         RFAILED - failure
2248  *
2249  * ****************************************************************/
2250 uint8_t lwr_mac_procStartReqEvt(void *msg)
2251 {
2252 #ifdef INTEL_FAPI
2253    fapi_msg_header_t *msgHeader;
2254    fapi_start_req_t *startReq;
2255    fapi_vendor_msg_t *vendorMsg;
2256    p_fapi_api_queue_elem_t  headerElem;
2257    p_fapi_api_queue_elem_t  startReqElem;
2258    p_fapi_api_queue_elem_t  vendorMsgElem;
2259
2260    /* Allocte And fill Vendor msg */
2261    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2262    if(!vendorMsgElem)
2263    {
2264       DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in start req");
2265       return RFAILED;
2266    }
2267    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2268    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2269    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2270    vendorMsg->start_req_vendor.sfn = 0;
2271    vendorMsg->start_req_vendor.slot = 0;
2272    vendorMsg->start_req_vendor.mode = 1; /* for FDD */
2273 #ifdef DEBUG_MODE
2274    vendorMsg->start_req_vendor.count = 0;
2275    vendorMsg->start_req_vendor.period = 1;
2276 #endif
2277
2278    /* Fill FAPI config req */
2279    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2280    if(!startReqElem)
2281    {
2282       DU_LOG("\nLWR_MAC: Memory allocation failed for start req");
2283       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2284       return RFAILED;
2285    }
2286    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2287       sizeof(fapi_start_req_t));
2288
2289    startReq = (fapi_start_req_t *)(startReqElem + 1);
2290    memset(startReq, 0, sizeof(fapi_start_req_t));
2291    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2292
2293    /* Fill message header */
2294    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2295    if(!headerElem)
2296    {
2297       DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2298       LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2299       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2300       return RFAILED;
2301    }
2302    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2303       sizeof(fapi_msg_header_t));
2304    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2305    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2306    msgHeader->handle = 0;
2307
2308    /* Send to PHY */
2309    DU_LOG("\nLWR_MAC: Sending Start Request to Phy");
2310    LwrMacSendToL1(headerElem);
2311 #endif
2312    return ROK;
2313 } /* lwr_mac_procStartReqEvt */
2314
2315 /*******************************************************************
2316  *
2317  * @brief Sends FAPI Stop Req to PHY
2318  *
2319  * @details
2320  *
2321  *    Function : lwr_mac_procStopReqEvt
2322  *
2323  *    Functionality:
2324  *         -Sends FAPI Stop Req to PHY
2325  *
2326  * @params[in]
2327  * @return ROK     - success
2328  *         RFAILED - failure
2329  *
2330  ********************************************************************/
2331
2332 uint8_t lwr_mac_procStopReqEvt(void *msg)
2333 {
2334 #ifdef INTEL_FAPI
2335    SlotIndInfo       *slotInfo;
2336    fapi_msg_header_t *msgHeader;
2337    fapi_stop_req_t   *stopReq;
2338    fapi_vendor_msg_t *vendorMsg;
2339    p_fapi_api_queue_elem_t  headerElem;
2340    p_fapi_api_queue_elem_t  stopReqElem;
2341    p_fapi_api_queue_elem_t  vendorMsgElem;
2342
2343    slotInfo = (SlotIndInfo *)msg;
2344
2345    /* Allocte And fill Vendor msg */
2346    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2347    if(!vendorMsgElem)
2348    {
2349       DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in stop req");
2350       return RFAILED;
2351    }
2352    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2353    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2354    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2355    vendorMsg->stop_req_vendor.sfn = slotInfo->sfn;
2356    vendorMsg->stop_req_vendor.slot = slotInfo->slot;
2357
2358    /* Fill FAPI stop req */
2359    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2360    if(!stopReqElem)
2361    {
2362       DU_LOG("\nLWR_MAC: Memory allocation failed for stop req");
2363       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2364       return RFAILED;
2365    }
2366    FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2367       sizeof(fapi_stop_req_t));
2368    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2369    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2370    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2371
2372    /* Fill message header */
2373    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2374    if(!headerElem)
2375    {
2376       DU_LOG("\nLWR_MAC: Memory allocation failed for header in stop req");
2377       LWR_MAC_FREE(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2378       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2379       return RFAILED;
2380    }
2381    FILL_FAPI_LIST_ELEM(headerElem, stopReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2382       sizeof(fapi_msg_header_t));
2383    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2384    msgHeader->num_msg = 2; /* Stop req msg and vendor specific msg */
2385    msgHeader->handle = 0;
2386
2387    /* Send to PHY */
2388    DU_LOG("\nLWR_MAC: Sending Stop Request to Phy");
2389    LwrMacSendToL1(headerElem);
2390
2391 #endif
2392    return ROK;
2393 }
2394
2395 #ifdef INTEL_FAPI
2396 /*******************************************************************
2397  *
2398  * @brief fills SSB PDU required for DL TTI info in MAC
2399  *
2400  * @details
2401  *
2402  *    Function : fillSsbPdu
2403  *
2404  *    Functionality:
2405  *         -Fills the SSB PDU info
2406  *          stored in MAC
2407  *
2408  * @params[in] Pointer to FAPI DL TTI Req
2409  *             Pointer to RgCellCb
2410  *             Pointer to msgLen of DL TTI Info
2411  * @return ROK
2412  *
2413  ******************************************************************/
2414
2415 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2416       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2417 {
2418    uint32_t mibPayload = 0;
2419    if(dlTtiReqPdu != NULL)
2420    {
2421       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2422       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2423       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2424       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2425       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2426       /* ssbOfPdufstA to be filled in ssbCfg */
2427       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2428       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2429       /* Bit manipulation for SFN */
2430       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2431       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2432       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2433       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2434       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2435       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2436       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2437          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2438       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2439
2440       return ROK;
2441    }
2442    return RFAILED;
2443 }
2444
2445 /*******************************************************************
2446  *
2447  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2448  *
2449  * @details
2450  *
2451  *    Function : fillSib1DlDciPdu
2452  *
2453  *    Functionality:
2454  *         -Fills the Dl DCI PDU
2455  *
2456  * @params[in] Pointer to fapi_dl_dci_t
2457  *             Pointer to PdcchCfg
2458  * @return ROK
2459  *
2460  ******************************************************************/
2461
2462 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2463 {
2464    if(dlDciPtr != NULLP)
2465    {
2466       uint8_t numBytes=0;
2467       uint8_t bytePos=0;
2468       uint8_t bitPos=0;
2469
2470       uint16_t coreset0Size=0;
2471       uint16_t rbStart=0;
2472       uint16_t rbLen=0;
2473       uint32_t freqDomResAssign=0;
2474       uint32_t timeDomResAssign=0;
2475       uint8_t  VRB2PRBMap=0;
2476       uint32_t modNCodScheme=0;
2477       uint8_t  redundancyVer=0;
2478       uint32_t sysInfoInd=0;
2479       uint32_t reserved=0;
2480
2481       /* Size(in bits) of each field in DCI format 0_1 
2482        * as mentioned in spec 38.214 */
2483       uint8_t freqDomResAssignSize = 0;
2484       uint8_t timeDomResAssignSize = 4;
2485       uint8_t VRB2PRBMapSize       = 1;
2486       uint8_t modNCodSchemeSize    = 5;
2487       uint8_t redundancyVerSize    = 2;
2488       uint8_t sysInfoIndSize       = 1;
2489       uint8_t reservedSize         = 15;
2490
2491       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2492       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;    
2493       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2494       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2495       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2496       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2497       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2498       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2499       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2500       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2501       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;           
2502       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2503
2504       /* Calculating freq domain resource allocation field value and size
2505        * coreset0Size = Size of coreset 0
2506        * RBStart = Starting Virtual Rsource block
2507        * RBLen = length of contiguously allocted RBs
2508        * Spec 38.214 Sec 5.1.2.2.2
2509        */
2510       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2511       rbStart = 0;              /* For SIB1 */
2512       //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2513       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2514
2515       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2516       {
2517          if((rbLen - 1) <= floor(coreset0Size / 2))
2518             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2519          else
2520             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2521                                + (coreset0Size - 1 - rbStart);
2522
2523          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2524       }
2525
2526       /* Fetching DCI field values */
2527       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2528          rowIndex -1;
2529       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2530                          vrbPrbMapping;
2531       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2532       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2533       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2534       reserved         = 0;
2535
2536       /* Reversing bits in each DCI field */
2537       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2538       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2539       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2540       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2541       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2542       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2543
2544       /* Calulating total number of bytes in buffer */
2545       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2546                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2547                                   + sysInfoIndSize + reservedSize;
2548
2549       numBytes = dlDciPtr->payloadSizeBits / 8;
2550       if(dlDciPtr->payloadSizeBits % 8)
2551          numBytes += 1;
2552
2553       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2554       {
2555          DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2556          return;
2557       }
2558
2559       /* Initialize buffer */
2560       for(bytePos = 0; bytePos < numBytes; bytePos++)
2561          dlDciPtr->payload[bytePos] = 0;
2562
2563       bytePos = numBytes - 1;
2564       bitPos = 0;
2565
2566       /* Packing DCI format fields */
2567       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2568             freqDomResAssign, freqDomResAssignSize);
2569       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2570             timeDomResAssign, timeDomResAssignSize);
2571       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2572             VRB2PRBMap, VRB2PRBMapSize);
2573       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2574             modNCodScheme, modNCodSchemeSize);
2575       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2576             redundancyVer, redundancyVerSize);
2577       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2578             sysInfoInd, sysInfoIndSize);
2579       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2580             reserved, reservedSize);
2581
2582    }
2583 } /* fillSib1DlDciPdu */
2584
2585 /*******************************************************************
2586  *
2587  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2588  *
2589  * @details
2590  *
2591  *    Function : fillRarDlDciPdu
2592  *
2593  *    Functionality:
2594  *         -Fills the Dl DCI PDU
2595  *
2596  * @params[in] Pointer to fapi_dl_dci_t
2597  *             Pointer to PdcchCfg
2598  * @return ROK
2599  *
2600  ******************************************************************/
2601
2602 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2603 {
2604    if(dlDciPtr != NULLP)
2605    {
2606       uint8_t numBytes =0;
2607       uint8_t bytePos =0;
2608       uint8_t bitPos =0;
2609
2610       uint16_t coreset0Size =0;
2611       uint16_t rbStart =0;
2612       uint16_t rbLen =0;
2613       uint32_t freqDomResAssign =0;
2614       uint8_t timeDomResAssign =0;
2615       uint8_t  VRB2PRBMap =0;
2616       uint8_t modNCodScheme =0;
2617       uint8_t tbScaling =0;
2618       uint32_t reserved =0;
2619
2620       /* Size(in bits) of each field in DCI format 1_0 */
2621       uint8_t freqDomResAssignSize = 0;
2622       uint8_t timeDomResAssignSize = 4;
2623       uint8_t VRB2PRBMapSize       = 1;
2624       uint8_t modNCodSchemeSize    = 5;
2625       uint8_t tbScalingSize        = 2;
2626       uint8_t reservedSize         = 16;
2627
2628       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2629       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;    
2630       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2631       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2632       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2633       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2634       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2635       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2636       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2637       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2638       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;           
2639       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2640
2641       /* Calculating freq domain resource allocation field value and size
2642        * coreset0Size = Size of coreset 0
2643        * RBStart = Starting Virtual Rsource block
2644        * RBLen = length of contiguously allocted RBs
2645        * Spec 38.214 Sec 5.1.2.2.2
2646        */
2647
2648       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2649       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2650       rbStart = 0;              /* For SIB1 */
2651       //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2652       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2653
2654       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2655       {
2656          if((rbLen - 1) <= floor(coreset0Size / 2))
2657             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2658          else
2659             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2660                                + (coreset0Size - 1 - rbStart);
2661
2662          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2663       }
2664
2665       /* Fetching DCI field values */
2666       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2667       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2668       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2669       tbScaling        = 0; /* configured to 0 scaling */
2670       reserved         = 0;
2671
2672       /* Reversing bits in each DCI field */
2673       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2674       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2675       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2676       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2677       tbScaling        = reverseBits(tbScaling, tbScalingSize); 
2678
2679       /* Calulating total number of bytes in buffer */
2680       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2681                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2682
2683       numBytes = dlDciPtr->payloadSizeBits / 8;
2684       if(dlDciPtr->payloadSizeBits % 8)
2685          numBytes += 1;
2686
2687       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2688       {
2689          DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2690          return;
2691       }
2692
2693       /* Initialize buffer */
2694       for(bytePos = 0; bytePos < numBytes; bytePos++)
2695          dlDciPtr->payload[bytePos] = 0;
2696
2697       bytePos = numBytes - 1;
2698       bitPos = 0;
2699
2700       /* Packing DCI format fields */
2701       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2702             freqDomResAssign, freqDomResAssignSize);
2703       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2704             timeDomResAssign, timeDomResAssignSize);
2705       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2706             VRB2PRBMap, VRB2PRBMapSize);
2707       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2708             modNCodScheme, modNCodSchemeSize);
2709       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2710             tbScaling, tbScalingSize);
2711       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2712             reserved, reservedSize);
2713    }
2714 } /* fillRarDlDciPdu */
2715
2716 /*******************************************************************
2717  *
2718  * @brief fills DL DCI PDU required for DL TTI info in MAC
2719  *
2720  * @details
2721  *
2722  *    Function : fillDlMsgDlDciPdu
2723  *
2724  *    Functionality:
2725  *         -Fills the Dl DCI PDU  
2726  *
2727  * @params[in] Pointer to fapi_dl_dci_t
2728  *             Pointer to PdcchCfg
2729  * @return ROK
2730  *
2731  ******************************************************************/
2732 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2733       DlMsgInfo *dlMsgInfo)
2734 {
2735    if(dlDciPtr != NULLP)
2736    {
2737       uint8_t numBytes;
2738       uint8_t bytePos;
2739       uint8_t bitPos;
2740
2741       uint16_t coresetSize = 0;
2742       uint16_t rbStart = 0;
2743       uint16_t rbLen = 0;
2744       uint8_t  dciFormatId;
2745       uint32_t freqDomResAssign;
2746       uint8_t  timeDomResAssign;
2747       uint8_t  VRB2PRBMap;
2748       uint8_t  modNCodScheme;
2749       uint8_t  ndi = 0;
2750       uint8_t  redundancyVer = 0;
2751       uint8_t  harqProcessNum = 0;
2752       uint8_t  dlAssignmentIdx = 0;
2753       uint8_t  pucchTpc = 0;
2754       uint8_t  pucchResoInd = 0;
2755       uint8_t  harqFeedbackInd = 0;
2756
2757       /* Size(in bits) of each field in DCI format 1_0 */
2758       uint8_t dciFormatIdSize    = 1;
2759       uint8_t freqDomResAssignSize = 0;
2760       uint8_t timeDomResAssignSize = 4;
2761       uint8_t VRB2PRBMapSize       = 1;
2762       uint8_t modNCodSchemeSize    = 5;
2763       uint8_t ndiSize              = 1;
2764       uint8_t redundancyVerSize    = 2;
2765       uint8_t harqProcessNumSize   = 4;
2766       uint8_t dlAssignmentIdxSize  = 2;
2767       uint8_t pucchTpcSize         = 2;
2768       uint8_t pucchResoIndSize     = 3;
2769       uint8_t harqFeedbackIndSize  = 3;
2770
2771       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2772       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2773       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2774       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2775       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2776       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2777       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2778       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2779       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2780       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2781       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2782       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2783
2784       /* Calculating freq domain resource allocation field value and size
2785        * coreset0Size = Size of coreset 0
2786        * RBStart = Starting Virtual Rsource block
2787        * RBLen = length of contiguously allocted RBs
2788        * Spec 38.214 Sec 5.1.2.2.2
2789        */
2790       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2791       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2792       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2793
2794       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2795       {
2796          if((rbLen - 1) <= floor(coresetSize / 2))
2797             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2798          else
2799             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2800                                + (coresetSize - 1 - rbStart);
2801
2802          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2803       }
2804
2805       /* Fetching DCI field values */
2806       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
2807       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2808       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2809       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2810       ndi              = dlMsgInfo->ndi;
2811       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2812       harqProcessNum   = dlMsgInfo->harqProcNum;
2813       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
2814       pucchTpc         = dlMsgInfo->pucchTpc;
2815       pucchResoInd     = dlMsgInfo->pucchResInd;
2816       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
2817
2818       /* Reversing bits in each DCI field */
2819       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
2820       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2821       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2822       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2823       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2824       ndi              = reverseBits(ndi, ndiSize);
2825       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2826       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
2827       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2828       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
2829       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
2830       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2831
2832
2833       /* Calulating total number of bytes in buffer */
2834       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2835             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2836             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2837             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2838
2839       numBytes = dlDciPtr->payloadSizeBits / 8;
2840       if(dlDciPtr->payloadSizeBits % 8)
2841          numBytes += 1;
2842
2843       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2844       {
2845          DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2846          return;
2847       }
2848
2849       /* Initialize buffer */
2850       for(bytePos = 0; bytePos < numBytes; bytePos++)
2851          dlDciPtr->payload[bytePos] = 0;
2852
2853       bytePos = numBytes - 1;
2854       bitPos = 0;
2855
2856       /* Packing DCI format fields */
2857       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2858             dciFormatId, dciFormatIdSize);
2859       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2860             freqDomResAssign, freqDomResAssignSize);
2861       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2862             timeDomResAssign, timeDomResAssignSize);
2863       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2864             VRB2PRBMap, VRB2PRBMapSize);
2865       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2866             modNCodScheme, modNCodSchemeSize);
2867       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2868             ndi, ndiSize);
2869       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2870             redundancyVer, redundancyVerSize);
2871       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2872             redundancyVer, redundancyVerSize);
2873       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2874             harqProcessNum, harqProcessNumSize);
2875       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2876             dlAssignmentIdx, dlAssignmentIdxSize);
2877       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2878             pucchTpc, pucchTpcSize);
2879       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2880             pucchResoInd, pucchResoIndSize);
2881       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2882             harqFeedbackInd, harqFeedbackIndSize);
2883    }
2884 }
2885
2886 /*******************************************************************
2887  *
2888  * @brief fills PDCCH PDU required for DL TTI info in MAC
2889  *
2890  * @details
2891  *
2892  *    Function : fillPdcchPdu
2893  *
2894  *    Functionality:
2895  *         -Fills the Pdcch PDU info
2896  *          stored in MAC
2897  *
2898  * @params[in] Pointer to FAPI DL TTI Req
2899  *             Pointer to PdcchCfg
2900  * @return ROK
2901  *
2902  ******************************************************************/
2903 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2904       RntiType rntiType, uint8_t coreSetType)
2905 {
2906    if(dlTtiReqPdu != NULLP)
2907    {
2908       PdcchCfg *pdcchInfo = NULLP;
2909       BwpCfg *bwp = NULLP;
2910
2911       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2912       if(rntiType == SI_RNTI_TYPE)
2913       {
2914          pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2915          bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2916          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2917       }
2918       else if(rntiType == RA_RNTI_TYPE)
2919       {
2920          pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2921          bwp = &dlInfo->rarAlloc->bwp;
2922          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2923       }
2924       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2925       {
2926          pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2927          bwp = &dlInfo->dlMsgAlloc->bwp;
2928          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2929             &dlInfo->dlMsgAlloc->dlMsgInfo);
2930       }
2931       else
2932       {
2933          DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
2934          return RFAILED;
2935       }
2936       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2937       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2938       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2939       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing; 
2940       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix; 
2941       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2942       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2943       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2944       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2945       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2946       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2947       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
2948       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2949       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2950       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2951
2952       /* Calculating PDU length. Considering only one dl dci pdu for now */
2953       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2954    }
2955
2956    return ROK;
2957 }
2958
2959 /*******************************************************************
2960  *
2961  * @brief fills PDSCH PDU required for DL TTI info in MAC
2962  *
2963  * @details
2964  *
2965  *    Function : fillPdschPdu
2966  *
2967  *    Functionality:
2968  *         -Fills the Pdsch PDU info
2969  *          stored in MAC
2970  *
2971  * @params[in] Pointer to FAPI DL TTI Req
2972  *             Pointer to PdschCfg
2973  *             Pointer to msgLen of DL TTI Info
2974  * @return ROK
2975  *
2976  ******************************************************************/
2977
2978 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2979       BwpCfg bwp, uint16_t pduIndex)
2980 {
2981    uint8_t idx;
2982
2983    if(dlTtiReqPdu != NULLP)
2984    {
2985       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2986       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2987       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2988       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;         
2989       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2990       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;       
2991       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
2992       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
2993       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
2994       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
2995       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
2996       { 
2997          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
2998          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
2999          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3000          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3001          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3002          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3003       }
3004       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;       
3005       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3006       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3007       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3008       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3009       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3010       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3011       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3012       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3013       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3014       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3015       /* since we are using type-1, hence rbBitmap excluded */
3016       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3017       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3018       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3019       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3020       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3021       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3022       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3023       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3024       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3025          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3026       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3027          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3028       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;  
3029       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3030       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3031       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3032       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3033
3034       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3035    }
3036 }
3037
3038 /***********************************************************************
3039  *
3040  * @brief calculates the total size to be allocated for DL TTI Req
3041  *
3042  * @details
3043  *
3044  *    Function : calcDlTtiReqPduCount
3045  *
3046  *    Functionality:
3047  *         -calculates the total pdu count to be allocated for DL TTI Req
3048  *
3049  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3050  * @return count
3051  *
3052  * ********************************************************************/
3053 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3054 {
3055    uint8_t count = 0;
3056    uint8_t idx = 0;
3057
3058    if(dlInfo->isBroadcastPres)
3059    {
3060       if(dlInfo->brdcstAlloc.ssbTrans)
3061       {
3062          for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3063          {
3064             /* SSB PDU is filled */
3065             count++;
3066          }
3067       }
3068       if(dlInfo->brdcstAlloc.sib1Trans)
3069       {
3070          /* PDCCH and PDSCH PDU is filled */
3071          count += 2;
3072       }
3073    }
3074    if(dlInfo->rarAlloc != NULLP)
3075    {
3076       /* PDCCH and PDSCH PDU is filled */
3077       count += 2;
3078    }
3079    if(dlInfo->dlMsgAlloc != NULLP)
3080    {
3081       /* PDCCH and PDSCH PDU is filled */
3082       count += 2;
3083    }
3084    return count;
3085 }
3086
3087 /***********************************************************************
3088  *
3089  * @brief calculates the total size to be allocated for DL TTI Req
3090  *
3091  * @details
3092  *
3093  *    Function : calcTxDataReqPduCount
3094  *
3095  *    Functionality:
3096  *         -calculates the total pdu count to be allocated for DL TTI Req
3097  *
3098  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3099  * @return count
3100  *
3101  * ********************************************************************/
3102 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3103 {
3104    uint8_t count = 0;
3105
3106    if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3107    {
3108       count++;
3109    }
3110    if(dlInfo->rarAlloc != NULLP)
3111    {
3112       count++;
3113    }
3114    if(dlInfo->dlMsgAlloc != NULLP)
3115    {
3116       count++;
3117    }
3118    return count;
3119 }
3120 /***********************************************************************
3121  *
3122  * @brief fills the SIB1 TX-DATA request message
3123  *
3124  * @details
3125  *
3126  *    Function : fillSib1TxDataReq
3127  *
3128  *    Functionality:
3129  *         - fills the SIB1 TX-DATA request message
3130  *
3131  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3132  * @params[in]    macCellCfg consist of SIB1 pdu
3133  * @params[in]    uint32_t *msgLen
3134  * @params[in]    uint16_t pduIndex
3135  * @return ROK
3136  *
3137  * ********************************************************************/
3138 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
3139       uint16_t pduIndex)
3140 {
3141    uint32_t pduLen = 0;
3142    uint8_t *sib1TxdataValue = NULLP;
3143
3144    pduDesc[pduIndex].pdu_index = pduIndex;
3145    pduDesc[pduIndex].num_tlvs = 1;
3146
3147    /* fill the TLV */
3148    /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3149    pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3150    pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
3151    LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3152    if(sib1TxdataValue == NULLP)
3153    {
3154       return RFAILED;
3155    }
3156    memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
3157          macCellCfg->sib1Cfg.sib1PduLen);
3158    pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
3159
3160    /* The total length of the PDU description and   PDU data */
3161    pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3162    pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3163    pduDesc[pduIndex].pdu_length = pduLen; 
3164
3165 #ifdef INTEL_WLS_MEM   
3166    addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (slotIndIdx-1));
3167 #else
3168    LWR_MAC_FREE(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen);
3169 #endif
3170
3171    return ROK;
3172 }
3173
3174 /***********************************************************************
3175  *
3176  * @brief fills the RAR TX-DATA request message
3177  *
3178  * @details
3179  *
3180  *    Function : fillRarTxDataReq
3181  *
3182  *    Functionality:
3183  *         - fills the RAR TX-DATA request message
3184  *
3185  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3186  * @params[in]    RarInfo *rarInfo
3187  * @params[in]    uint32_t *msgLen
3188  * @params[in]    uint16_t pduIndex
3189  * @return ROK
3190  *
3191  * ********************************************************************/
3192 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
3193       uint16_t pduIndex)
3194 {
3195    uint32_t pduLen = 0;
3196    uint8_t *rarTxdataValue = NULLP;
3197
3198    pduDesc[pduIndex].pdu_index = pduIndex;
3199    pduDesc[pduIndex].num_tlvs = 1;
3200
3201    /* fill the TLV */
3202    /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3203    pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3204    pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3205    LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3206    if(rarTxdataValue == NULLP)
3207    {
3208       return RFAILED;
3209    }
3210    memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3211    pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3212
3213    /* The total length of the PDU description and   PDU data */
3214    pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3215    pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3216    pduDesc[pduIndex].pdu_length = pduLen; 
3217
3218    /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3219     * But since we did not implement WLS, this has to be done here
3220     */
3221 #ifdef INTEL_WLS_MEM   
3222    addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (slotIndIdx-1));
3223 #else
3224    LWR_MAC_FREE(rarTxdataValue, rarInfo->rarPduLen);
3225 #endif
3226
3227    return ROK;
3228 }
3229
3230 /***********************************************************************
3231  *
3232  * @brief fills the DL dedicated Msg TX-DATA request message
3233  *
3234  * @details
3235  *
3236  *    Function : fillDlMsgTxDataReq
3237  *
3238  *    Functionality:
3239  *         - fills the Dl Dedicated Msg TX-DATA request message
3240  *
3241  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3242  * @params[in]    DlMsgInfo *dlMsgInfo
3243  * @params[in]    uint32_t *msgLen
3244  * @params[in]    uint16_t pduIndex
3245  * @return ROK
3246  *
3247  * ********************************************************************/
3248 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3249       uint16_t pduIndex)
3250 {
3251    uint32_t pduLen = 0;
3252    uint8_t *dedMsgTxDataValue = NULLP;
3253
3254    pduDesc[pduIndex].pdu_index = pduIndex;
3255    pduDesc[pduIndex].num_tlvs = 1;
3256
3257    /* fill the TLV */
3258    /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3259    pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3260    pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3261    LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3262    if(dedMsgTxDataValue == NULLP)
3263    {
3264       return RFAILED;
3265    }
3266    memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3267    pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3268
3269    /* The total length of the PDU description and PDU data */
3270    pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3271    pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3272    pduDesc[pduIndex].pdu_length = pduLen;
3273
3274    /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3275     * But since we did not implement WLS, this has to be done here
3276     */
3277 #ifdef INTEL_WLS_MEM   
3278    addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (slotIndIdx-1));
3279 #else
3280    LWR_MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3281 #endif
3282
3283    return ROK;
3284 }
3285
3286
3287 #endif /* FAPI */
3288 /*******************************************************************
3289  *
3290  * @brief Sends DL TTI Request to PHY
3291  *
3292  * @details
3293  *
3294  *    Function : fillDlTtiReq
3295  *
3296  *    Functionality:
3297  *         -Sends FAPI DL TTI req to PHY
3298  *
3299  * @params[in]    timing info
3300  * @return ROK     - success
3301  *         RFAILED - failure
3302  *
3303  * ****************************************************************/
3304 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3305 {
3306 #ifdef INTEL_FAPI
3307    uint8_t idx =0;
3308    uint8_t nPdu = 0;
3309    uint8_t numPduEncoded = 0;
3310    uint16_t cellIdx =0;
3311    uint16_t pduIndex = 0;
3312
3313    SlotIndInfo dlTtiReqTimingInfo;
3314    MacDlSlot *currDlSlot = NULLP;
3315    MacCellCfg macCellCfg;
3316    RntiType rntiType;
3317    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3318    fapi_msg_header_t *msgHeader = NULLP;
3319    p_fapi_api_queue_elem_t dlTtiElem;
3320    p_fapi_api_queue_elem_t headerElem;
3321
3322    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3323    {
3324       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3325       /* consider phy delay */
3326       ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3327
3328       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3329
3330       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot]; 
3331       nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
3332
3333       LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3334       if(dlTtiElem)
3335       {
3336          FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3337             sizeof(fapi_dl_tti_req_t));
3338
3339          /* Fill message header */
3340          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3341          if(!headerElem)
3342          {
3343             DU_LOG("\nLWR_MAC: Memory allocation failed for header in DL TTI req");
3344             LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3345             return RFAILED;
3346          }
3347          FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3348                sizeof(fapi_msg_header_t));
3349          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3350          msgHeader->num_msg = 1;
3351          msgHeader->handle = 0;
3352
3353          /* Fill Dl TTI Request */
3354          dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3355          memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3356          fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3357
3358          dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3359          dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3360          dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo);  /* get total Pdus */
3361          nPdu = dlTtiReq->nPdus;
3362          dlTtiReq->nGroup = 0;
3363
3364          if(dlTtiReq->nPdus > 0)
3365          {
3366             if(currDlSlot->dlInfo.isBroadcastPres)
3367             {
3368                if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3369                {
3370                   if(dlTtiReq->pdus != NULLP)
3371                   {
3372                      for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3373                      {
3374                         fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3375                               currDlSlot, idx, dlTtiReq->sfn);
3376                         numPduEncoded++;
3377                      }
3378                   }
3379                   printf("\033[1;31m");
3380                   DU_LOG("\nLWR_MAC: MIB sent..");
3381                   printf("\033[0m");
3382                }
3383                if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3384                {
3385                   /* Filling SIB1 param */
3386                   if(numPduEncoded != nPdu)
3387                   {
3388                      rntiType = SI_RNTI_TYPE;
3389                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3390                            rntiType, CORESET_TYPE0);
3391                      numPduEncoded++;
3392                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3393                            &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3394                            currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3395                            pduIndex);
3396                      pduIndex++;
3397                      numPduEncoded++;
3398                   }
3399                   printf("\033[1;34m");
3400                   DU_LOG("\nLWR_MAC: SIB1 sent...");
3401                   printf("\033[0m");
3402                }
3403             }
3404             if(currDlSlot->dlInfo.rarAlloc != NULLP)
3405             {
3406                /* Filling RAR param */
3407                rntiType = RA_RNTI_TYPE;
3408                fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3409                      &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3410                numPduEncoded++;
3411                fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3412                      &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3413                      currDlSlot->dlInfo.rarAlloc->bwp,
3414                      pduIndex);
3415                numPduEncoded++;
3416                pduIndex++;
3417
3418                printf("\033[1;32m");
3419                DU_LOG("\nLWR_MAC: RAR sent...");
3420                printf("\033[0m");
3421             }
3422             if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3423             {
3424                if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3425                {
3426                   /* Filling Msg4 param */
3427                   printf("\033[1;32m");
3428                   if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3429                   {
3430                      rntiType = TC_RNTI_TYPE;
3431                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3432                            &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3433                      DU_LOG("\nLWR_MAC: MSG4 sent...");
3434                   }
3435                   else
3436                   { 
3437                      /* Filling other DL msg params */
3438                      rntiType = C_RNTI_TYPE;
3439                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3440                            &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3441                      DU_LOG("\nLWR_MAC: DL MSG sent...");
3442                   }
3443                   printf("\033[0m");
3444
3445                   numPduEncoded++;
3446                   fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3447                         &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3448                         currDlSlot->dlInfo.dlMsgAlloc->bwp,
3449                         pduIndex);
3450                   numPduEncoded++;
3451                   pduIndex++;
3452                }
3453                else
3454                {
3455                   MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3456                   currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3457                }
3458             }
3459
3460 #ifdef ODU_SLOT_IND_DEBUG_LOG       
3461             DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3462 #endif      
3463             LwrMacSendToL1(headerElem);
3464
3465             /* send Tx-DATA req message */
3466             sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3467          }
3468          else
3469          {
3470 #ifdef ODU_SLOT_IND_DEBUG_LOG       
3471             DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3472 #endif      
3473             LwrMacSendToL1(headerElem);
3474          }
3475          memset(currDlSlot, 0, sizeof(MacDlSlot));
3476          return ROK;
3477       }
3478       else
3479       {
3480          DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
3481          memset(currDlSlot, 0, sizeof(MacDlSlot));
3482          return RFAILED;
3483       }
3484    }
3485    else
3486    {
3487       lwr_mac_procInvalidEvt(&currTimingInfo);
3488       return RFAILED;
3489    }
3490 #endif
3491    return ROK;
3492 }
3493
3494 /*******************************************************************
3495  *
3496  * @brief Sends TX data Request to PHY
3497  *
3498  * @details
3499  *
3500  *    Function : sendTxDataReq
3501  *
3502  *    Functionality:
3503  *         -Sends FAPI TX data req to PHY
3504  *
3505  * @params[in]    timing info
3506  * @return ROK     - success
3507  *         RFAILED - failure
3508  *
3509  * ****************************************************************/
3510 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3511 {
3512 #ifdef INTEL_FAPI
3513    uint8_t nPdu = 0;
3514    uint16_t cellIdx;
3515    uint16_t pduIndex = 0;
3516    fapi_tx_data_req_t       *txDataReq =NULLP;
3517    fapi_msg_header_t        *msgHeader =NULLP;
3518    p_fapi_api_queue_elem_t  txDataElem = 0;
3519    p_fapi_api_queue_elem_t  headerElem =0;
3520
3521    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3522
3523    /* send TX_Data request message */
3524    nPdu = calcTxDataReqPduCount(dlInfo);
3525    if(nPdu > 0)
3526    {
3527       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3528       if(txDataElem == NULLP)
3529       {
3530          DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
3531          return RFAILED;
3532       }
3533
3534       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3535           sizeof(fapi_tx_data_req_t));
3536       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3537       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3538       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3539
3540       txDataReq->sfn  = currTimingInfo.sfn;
3541       txDataReq->slot = currTimingInfo.slot;
3542       if(dlInfo->brdcstAlloc.sib1Trans)
3543       {
3544          fillSib1TxDataReq(txDataReq->pdu_desc,
3545                &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3546          pduIndex++;
3547          txDataReq->num_pdus++;
3548       }
3549       if(dlInfo->rarAlloc != NULLP)
3550       {
3551          fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3552          pduIndex++;
3553          txDataReq->num_pdus++;
3554
3555          MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3556          dlInfo->rarAlloc = NULLP;
3557       }
3558       if(dlInfo->dlMsgAlloc != NULLP)
3559       {
3560          fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3561             &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3562          pduIndex++;
3563          txDataReq->num_pdus++;
3564
3565          MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3566             dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3567          dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3568          MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3569          dlInfo->dlMsgAlloc = NULLP;
3570       }
3571
3572       /* Fill message header */
3573       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3574       if(!headerElem)
3575       {
3576          DU_LOG("\nLWR_MAC: Memory allocation failed for TxDataReq header");
3577          LWR_MAC_FREE(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3578          return RFAILED;
3579       }
3580       FILL_FAPI_LIST_ELEM(headerElem, txDataElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3581             sizeof(fapi_msg_header_t));
3582       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3583       msgHeader->num_msg = 1;
3584       msgHeader->handle = 0;
3585
3586       DU_LOG("\nLWR_MAC: Sending TX DATA Request");
3587       LwrMacSendToL1(headerElem);
3588    }
3589 #endif
3590    return ROK;
3591 }
3592
3593 /***********************************************************************
3594  *
3595  * @brief calculates the total size to be allocated for UL TTI Req
3596  *
3597  * @details
3598  *
3599  *    Function : getnPdus
3600  *
3601  *    Functionality:
3602  *         -calculates the total pdu count to be allocated for UL TTI Req
3603  *
3604  * @params[in] Pointer to fapi Ul TTI Req
3605  *             Pointer to CurrUlSlot
3606  * @return count
3607  * ********************************************************************/
3608 #ifdef INTEL_FAPI
3609 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3610 {
3611    uint8_t pduCount = 0;
3612
3613    if(ulTtiReq && currUlSlot)
3614    {
3615       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3616       {
3617          pduCount++;
3618          ulTtiReq->rachPresent++;
3619       }
3620       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3621       {
3622          pduCount++;
3623          ulTtiReq->nUlsch++;
3624       }
3625       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3626       {
3627          pduCount++;
3628          ulTtiReq->nUlsch++;
3629       }
3630       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3631       {
3632          pduCount++;
3633          ulTtiReq->nUlcch++;
3634       }
3635       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3636       {
3637          pduCount++;
3638       }
3639    }
3640    return pduCount;
3641 }
3642 #endif
3643
3644 /***********************************************************************
3645  *
3646  * @brief Set the value of zero correlation config in PRACH PDU
3647  *
3648  * @details
3649  *
3650  *    Function : setNumCs
3651  *
3652  *    Functionality:
3653  *         -Set the value of zero correlation config in PRACH PDU
3654  *
3655  * @params[in] Pointer to zero correlation config
3656  *             Pointer to MacCellCfg
3657  * ********************************************************************/
3658
3659 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3660 {
3661 #ifdef INTEL_FAPI
3662    uint8_t idx;
3663    if(macCellCfg != NULLP)
3664    {
3665       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg; 
3666       *numCs = UnrestrictedSetNcsTable[idx];
3667    }
3668 #endif
3669 }
3670
3671 /***********************************************************************
3672  *
3673  * @brief Fills the PRACH PDU in UL TTI Request
3674  *
3675  * @details
3676  *
3677  *    Function : fillPrachPdu
3678  *
3679  *    Functionality:
3680  *         -Fills the PRACH PDU in UL TTI Request
3681  *
3682  * @params[in] Pointer to Prach Pdu
3683  *             Pointer to CurrUlSlot
3684  *             Pointer to macCellCfg
3685  *             Pointer to msgLen
3686  * ********************************************************************/
3687
3688 #ifdef INTEL_FAPI
3689 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3690 {
3691    if(ulTtiReqPdu != NULLP)
3692    {
3693       ulTtiReqPdu->pduType = PRACH_PDU_TYPE; 
3694       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3695       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3696          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3697       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3698          currUlSlot->ulInfo.prachSchInfo.prachFormat;
3699       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3700       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3701          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3702       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3703       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3704       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3705       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3706       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3707       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t); 
3708    }
3709 }
3710
3711 /*******************************************************************
3712  *
3713  * @brief Filling PUSCH PDU in UL TTI Request
3714  *
3715  * @details
3716  *
3717  *    Function : fillPuschPdu
3718  *
3719  *    Functionality: Filling PUSCH PDU in UL TTI Request
3720  *
3721  * @params[in] 
3722  * @return ROK     - success
3723  *         RFAILED - failure
3724  *
3725  * ****************************************************************/
3726 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3727 {
3728    if(ulTtiReqPdu != NULLP)
3729    {
3730       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3731       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3732       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3733       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3734       /* TODO : Fill handle in raCb when scheduling pusch and access here */
3735       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3736       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3737       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3738       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3739          macCellCfg->initialUlBwp.bwp.scs;
3740       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3741          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3742       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3743       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3744       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3745       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3746       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3747       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3748       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3749       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3750       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3751       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3752       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3753       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3754       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3755       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3756          currUlSlot->ulInfo.schPuschInfo.resAllocType;
3757       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3758          currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3759       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3760          currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3761       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3762       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3763       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3764       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3765       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3766          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3767       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3768          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3769       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3770          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3771       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3772          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3773       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3774          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3775       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3776          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3777       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3778          currUlSlot->ulInfo.schPuschInfo.harqProcId;
3779       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3780          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3781       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3782          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3783       /* numCb is 0 for new transmission */
3784       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3785
3786       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3787    }
3788 }
3789
3790 /*******************************************************************
3791  *
3792  * @brief Fill PUCCH PDU in Ul TTI Request
3793  *
3794  * @details
3795  *
3796  *    Function : fillPucchPdu
3797  *
3798  *    Functionality: Fill PUCCH PDU in Ul TTI Request
3799  *
3800  * @params[in] 
3801  * @return ROK     - success
3802  *         RFAILED - failure
3803  *
3804  * ****************************************************************/
3805 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3806       MacUlSlot *currUlSlot)
3807 {
3808    if(ulTtiReqPdu != NULLP)
3809    {
3810       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
3811       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3812       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.schPucchInfo.rnti;
3813       /* TODO : Fill handle in raCb when scheduling pucch and access here */
3814       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
3815       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
3816       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
3817       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3818       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3819       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3820       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3821       
3822       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3823       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3824       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3825       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3826       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
3827       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
3828       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;     
3829       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3830       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
3831
3832       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
3833
3834       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3835       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC; 
3836       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
3837       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
3838       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
3839       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
3840       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3841       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
3842       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
3843       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3844       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
3845       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
3846       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3847       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3848       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3849       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3850
3851       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3852    }
3853 }
3854
3855 #endif
3856
3857 /*******************************************************************
3858  *
3859  * @brief Sends UL TTI Request to PHY
3860  *
3861  * @details
3862  *
3863  *    Function : fillUlTtiReq
3864  *
3865  *    Functionality:
3866  *         -Sends FAPI Param req to PHY
3867  *
3868  * @params[in]  Pointer to CmLteTimingInfo
3869  * @return ROK     - success
3870  *         RFAILED - failure
3871  *
3872  ******************************************************************/
3873 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3874 {
3875 #ifdef INTEL_FAPI
3876    uint16_t   cellIdx =0;
3877    uint8_t    pduIdx = -1;
3878    SlotIndInfo ulTtiReqTimingInfo;
3879    MacUlSlot *currUlSlot = NULLP;
3880    MacCellCfg macCellCfg;
3881    fapi_ul_tti_req_t *ulTtiReq = NULLP;
3882    fapi_msg_header_t *msgHeader = NULLP;
3883    p_fapi_api_queue_elem_t ulTtiElem;
3884    p_fapi_api_queue_elem_t headerElem;
3885
3886    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3887    {
3888       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3889       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3890
3891       /* add PHY delta */
3892       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3893       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3894
3895       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3896       if(ulTtiElem)
3897       {
3898          FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3899             sizeof(fapi_ul_tti_req_t));
3900          ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3901          memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3902          fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3903          ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
3904          ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3905          ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3906          ulTtiReq->nGroup = 0;
3907          if(ulTtiReq->nPdus > 0)
3908          {
3909             /* Fill Prach Pdu */
3910             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3911             {
3912                pduIdx++;
3913                fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3914             }
3915
3916             /* Fill PUSCH PDU */
3917             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3918             {
3919                pduIdx++;
3920                fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3921             }
3922             /* Fill PUCCH PDU */
3923             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3924             {
3925                pduIdx++;
3926                fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3927             }
3928          } 
3929
3930          /* Fill message header */
3931          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3932          if(!headerElem)
3933          {
3934             DU_LOG("\nLWR_MAC: Memory allocation failed for UL TTI req header");
3935             LWR_MAC_FREE(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3936             return RFAILED;
3937          }
3938          FILL_FAPI_LIST_ELEM(headerElem, ulTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3939                sizeof(fapi_msg_header_t));
3940          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3941          msgHeader->num_msg = 1;
3942          msgHeader->handle = 0;
3943 #ifdef ODU_SLOT_IND_DEBUG_LOG
3944          DU_LOG("\nLWR_MAC: Sending UL TTI Request");
3945 #endif
3946          LwrMacSendToL1(headerElem);
3947
3948          memset(currUlSlot, 0, sizeof(MacUlSlot));
3949          return ROK;
3950       }
3951       else
3952       {
3953          DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
3954          memset(currUlSlot, 0, sizeof(MacUlSlot));
3955          return RFAILED;
3956       }
3957    }
3958    else
3959    {
3960       lwr_mac_procInvalidEvt(&currTimingInfo);
3961    }
3962 #endif
3963    return ROK;
3964 }
3965
3966 #ifdef INTEL_FAPI
3967 /*******************************************************************
3968  *
3969  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3970  *
3971  * @details
3972  *
3973  *    Function : fillUlDciPdu
3974  *
3975  *    Functionality:
3976  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3977  *
3978  * @params[in] Pointer to fapi_dl_dci_t
3979  *             Pointer to DciInfo
3980  * @return ROK
3981  *
3982  ******************************************************************/
3983 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3984 {
3985    if(ulDciPtr != NULLP)
3986    {
3987       uint8_t numBytes =0;
3988       uint8_t bytePos =0;
3989       uint8_t bitPos =0;
3990
3991       uint8_t  coreset1Size = 0;
3992       uint16_t rbStart = 0;
3993       uint16_t rbLen = 0;
3994       uint8_t  dciFormatId = 0;
3995       uint32_t freqDomResAssign =0;
3996       uint8_t  timeDomResAssign =0;
3997       uint8_t  freqHopFlag =0;
3998       uint8_t  modNCodScheme =0;
3999       uint8_t  ndi =0;
4000       uint8_t  redundancyVer = 0;
4001       uint8_t  harqProcessNum = 0;
4002       uint8_t  puschTpc = 0;
4003       uint8_t  ul_SlInd = 0;
4004
4005       /* Size(in bits) of each field in DCI format 0_0 */
4006       uint8_t dciFormatIdSize      = 1;
4007       uint8_t freqDomResAssignSize = 0;
4008       uint8_t timeDomResAssignSize = 4;
4009       uint8_t freqHopFlagSize      = 1;
4010       uint8_t modNCodSchemeSize    = 5;
4011       uint8_t ndiSize              = 1;
4012       uint8_t redundancyVerSize    = 2;
4013       uint8_t harqProcessNumSize   = 4;
4014       uint8_t puschTpcSize         = 2;
4015       uint8_t ul_SlIndSize         = 1;
4016
4017       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4018       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;    
4019       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4020       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4021       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4022       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4023       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4024       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4025       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4026       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4027       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.powerValue;           
4028       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4029
4030       /* Calculating freq domain resource allocation field value and size
4031        * coreset1Size = Size of coreset 1
4032        * RBStart = Starting Virtual Rsource block
4033        * RBLen = length of contiguously allocted RBs
4034        * Spec 38.214 Sec 5.1.2.2.2
4035        */
4036       if(schDciInfo->formatType == FORMAT0_0)
4037       {
4038          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4039          rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4040          rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4041
4042          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4043          {
4044             if((rbLen - 1) <= floor(coreset1Size / 2))
4045                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4046             else
4047                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4048                                   + (coreset1Size - 1 - rbStart);
4049
4050             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4051          }
4052          /* Fetching DCI field values */
4053          dciFormatId      = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4054          timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4055          freqHopFlag      = schDciInfo->format.format0_0.freqHopFlag; 
4056          modNCodScheme    = schDciInfo->format.format0_0.mcs;
4057          ndi              = schDciInfo->format.format0_0.ndi; 
4058          redundancyVer    = schDciInfo->format.format0_0.rv;
4059          harqProcessNum   = schDciInfo->format.format0_0.harqProcId; 
4060          puschTpc         = schDciInfo->format.format0_0.tpcCmd;
4061          ul_SlInd         = schDciInfo->format.format0_0.sUlCfgd;
4062      
4063          /* Reversing bits in each DCI field */
4064          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4065          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4066          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4067          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4068          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4069          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4070          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4071          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4072       }
4073       /* Calulating total number of bytes in buffer */
4074       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4075       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4076       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4077
4078       numBytes = ulDciPtr->payloadSizeBits / 8;
4079       if(ulDciPtr->payloadSizeBits % 8)
4080          numBytes += 1;
4081
4082       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4083       {
4084          DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
4085          return;
4086       }
4087
4088       /* Initialize buffer */
4089       for(bytePos = 0; bytePos < numBytes; bytePos++)
4090          ulDciPtr->payload[bytePos] = 0;
4091
4092       bytePos = numBytes - 1;
4093       bitPos = 0;
4094
4095       /* Packing DCI format fields */
4096       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4097             dciFormatId, dciFormatIdSize);
4098       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4099             freqDomResAssign, freqDomResAssignSize);
4100       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4101             timeDomResAssign, timeDomResAssignSize);
4102       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4103             freqHopFlag, freqHopFlagSize);
4104       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4105             modNCodScheme, modNCodSchemeSize);
4106       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4107             ndi, ndiSize);
4108       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4109             redundancyVer, redundancyVerSize);
4110       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4111             harqProcessNum, harqProcessNumSize);
4112       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4113             puschTpc, puschTpcSize);
4114       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4115             ul_SlInd, ul_SlIndSize);
4116    }
4117 } /* fillUlDciPdu */
4118
4119 /*******************************************************************
4120  *
4121  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4122  *
4123  * @details
4124  *
4125  *    Function : fillUlDciPdcchPdu
4126  *
4127  *    Functionality:
4128  *         -Fills the Pdcch PDU info
4129  *
4130  * @params[in] Pointer to FAPI DL TTI Req
4131  *             Pointer to PdcchCfg
4132  * @return ROK
4133  *
4134  ******************************************************************/
4135 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4136 {
4137    if(ulDciReqPdu != NULLP)
4138    {
4139       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4140       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4141       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4142       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4143       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4144       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing; 
4145       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix; 
4146       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4147       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4148       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4149       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4150       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4151       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4152       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4153       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4154       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4155       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4156
4157       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4158       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4159    }
4160    return ROK;
4161 }
4162 #endif
4163 /*******************************************************************
4164  *
4165  * @brief Sends UL DCI Request to PHY
4166  *
4167  * @details
4168  *
4169  *    Function : fillUlDciReq
4170  *
4171  *    Functionality:
4172  *         -Sends FAPI Ul Dci req to PHY
4173  *
4174  * @params[in]  Pointer to CmLteTimingInfo
4175  * @return ROK     - success
4176  *         RFAILED - failure
4177  *
4178  ******************************************************************/
4179 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
4180 {
4181 #ifdef INTEL_FAPI
4182    uint8_t      cellIdx =0;
4183    uint8_t      numPduEncoded = 0;
4184    SlotIndInfo  ulDciReqTimingInfo ={0};
4185    MacDlSlot    *currDlSlot = NULLP;
4186    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4187    fapi_msg_header_t        *msgHeader =NULLP;
4188    p_fapi_api_queue_elem_t  ulDciElem;
4189    p_fapi_api_queue_elem_t  headerElem;
4190
4191    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4192    {
4193       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4194       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4195       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
4196
4197       if(currDlSlot->dlInfo.ulGrant != NULLP)
4198       {
4199          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4200          if(ulDciElem)
4201          {
4202             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4203                sizeof(fapi_ul_dci_req_t));
4204             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4205             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4206             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4207
4208             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4209             ulDciReq->slot = ulDciReqTimingInfo.slot;
4210             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4211             if(ulDciReq->numPdus > 0)
4212             {
4213                /* Fill PDCCH configuration Pdu */
4214                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4215                numPduEncoded++;
4216                /* free UL GRANT at SCH */
4217                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4218                currDlSlot->dlInfo.ulGrant = NULLP;
4219
4220                /* Fill message header */
4221                LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
4222                if(!headerElem)
4223                {
4224                   DU_LOG("\nLWR_MAC: Memory allocation failed for UL DCI req header");
4225                   LWR_MAC_FREE(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4226                   return RFAILED;
4227                }
4228                FILL_FAPI_LIST_ELEM(headerElem, ulDciElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
4229                   sizeof(fapi_msg_header_t));
4230                msgHeader = (fapi_msg_header_t *)(headerElem + 1);
4231                msgHeader->num_msg = 1;
4232                msgHeader->handle = 0;
4233 #ifdef ODU_SLOT_IND_DEBUG_LOG
4234                DU_LOG("\nLWR_MAC: Sending UL DCI Request");
4235 #endif
4236                LwrMacSendToL1(headerElem);
4237             }
4238          }
4239          else
4240          {
4241             DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
4242             memset(currDlSlot, 0, sizeof(MacDlSlot));
4243             return RFAILED;
4244          }
4245       }
4246    }
4247    else
4248    {
4249        lwr_mac_procInvalidEvt(&currTimingInfo);
4250    }
4251 #endif
4252    return ROK;
4253 }
4254
4255 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4256 {
4257    {
4258       /* PHY_STATE_IDLE */
4259 #ifdef INTEL_TIMER_MODE 
4260       lwr_mac_procIqSamplesReqEvt,
4261 #endif
4262       lwr_mac_procParamReqEvt,
4263       lwr_mac_procParamRspEvt,
4264       lwr_mac_procConfigReqEvt,
4265       lwr_mac_procConfigRspEvt,
4266       lwr_mac_procInvalidEvt,
4267       lwr_mac_procInvalidEvt,
4268    },
4269    {
4270       /* PHY_STATE_CONFIGURED */
4271 #ifdef INTEL_TIMER_MODE
4272       lwr_mac_procInvalidEvt,
4273 #endif
4274       lwr_mac_procParamReqEvt,
4275       lwr_mac_procParamRspEvt,
4276       lwr_mac_procConfigReqEvt,
4277       lwr_mac_procConfigRspEvt,
4278       lwr_mac_procStartReqEvt,
4279       lwr_mac_procInvalidEvt,
4280    },
4281    {
4282       /* PHY_STATE_RUNNING */
4283 #ifdef INTEL_TIMER_MODE
4284       lwr_mac_procInvalidEvt,
4285 #endif
4286       lwr_mac_procInvalidEvt,
4287       lwr_mac_procInvalidEvt,
4288       lwr_mac_procConfigReqEvt,
4289       lwr_mac_procConfigRspEvt,
4290       lwr_mac_procInvalidEvt,
4291       lwr_mac_procStopReqEvt,
4292    }
4293 };
4294
4295 /*******************************************************************
4296  *
4297  * @brief Sends message to LWR_MAC Fsm Event Handler
4298  *
4299  * @details
4300  *
4301  *    Function : sendToLowerMac
4302  *
4303  *    Functionality:
4304  *         -Sends message to LowerMac
4305  *
4306  * @params[in] Message Type
4307  *             Message Length
4308  *             Messaga Pointer
4309  *
4310  * @return void
4311  *
4312  ******************************************************************/
4313 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4314 {
4315    lwrMacCb.event = msgType;
4316    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4317 }
4318 /**********************************************************************
4319   End of file
4320  **********************************************************************/