1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
31 #include "fapi_vendor_extension.h"
36 #include "lwr_mac_fsm.h"
37 #include "lwr_mac_phy.h"
38 #include "mac_utils.h"
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
48 #define SET_MSG_LEN(x, size) x += size
50 /* Global variables */
53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
54 void fapiMacConfigRsp(uint16_t cellId);
55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem);
56 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
57 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
58 uint8_t lwr_mac_procStopReqEvt(SlotIndInfo slotInfo, p_fapi_api_queue_elem_t prevElem);
60 void lwrMacLayerInit(Region region, Pool pool)
66 memset(&lwrMacCb, 0, sizeof(LwrMacCb));
67 lwrMacCb.region = region;
69 lwrMacCb.clCfgDone = TRUE;
71 lwrMacCb.phyState = PHY_STATE_IDLE;
74 /* Initializing WLS free mem list */
75 lwrMacCb.phySlotIndCntr = 1;
76 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
78 cmLListInit(&wlsBlockToFreeList[idx]);
83 /*******************************************************************
85 * @brief Handles Invalid Request Event
89 * Function : lwr_mac_procInvalidEvt
92 * - Displays the PHY state when the invalid event occurs
95 * @return ROK - success
98 * ****************************************************************/
99 uint8_t lwr_mac_procInvalidEvt(void *msg)
101 DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
106 /*******************************************************************
108 * @brief Fills FAPI message header
112 * Function : fillMsgHeader
115 * -Fills FAPI message header
117 * @params[in] Pointer to header
123 * ****************************************************************/
124 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
126 memset(hdr, 0, sizeof(fapi_msg_t));
127 hdr->msg_id = msgType;
128 hdr->length = msgLen;
131 /*******************************************************************
133 * @brief Fills FAPI Config Request message header
137 * Function : fillTlvs
140 * -Fills FAPI Config Request message header
142 * @params[in] Pointer to TLV
149 * ****************************************************************/
150 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
151 uint32_t value, uint32_t *msgLen)
154 tlv->tl.length = length;
156 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
158 /*******************************************************************
160 * @brief fills the cyclic prefix by comparing the bitmask
164 * Function : fillCyclicPrefix
167 * -checks the value with the bitmask and
168 * fills the cellPtr's cyclic prefix.
170 * @params[in] Pointer to ClCellParam
171 * Value to be compared
174 ********************************************************************/
175 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
177 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
179 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
181 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
183 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
187 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
191 /*******************************************************************
193 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
197 * Function : fillSubcarrierSpaceDl
200 * -checks the value with the bitmask and
201 * fills the cellPtr's subcarrier spacing in DL
203 * @params[in] Pointer to ClCellParam
204 * Value to be compared
207 * ****************************************************************/
209 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
211 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
213 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
215 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
217 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
219 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
221 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
223 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
225 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
229 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
233 /*******************************************************************
235 * @brief fills the downlink bandwidth by comparing the bitmask
239 * Function : fillBandwidthDl
242 * -checks the value with the bitmask and
243 * -fills the cellPtr's DL Bandwidth
245 * @params[in] Pointer to ClCellParam
246 * Value to be compared
249 * ****************************************************************/
251 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
253 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
255 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
257 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
261 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
265 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
269 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
273 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
277 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
281 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
285 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
289 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
291 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
293 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
295 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
297 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
299 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
301 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
303 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
307 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
311 /*******************************************************************
313 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
317 * Function : fillSubcarrierSpaceUl
320 * -checks the value with the bitmask and
321 * -fills cellPtr's subcarrier spacing in UL
323 * @params[in] Pointer to ClCellParam
324 * Value to be compared
327 * ****************************************************************/
329 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
331 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
333 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
335 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
337 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
339 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
341 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
343 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
345 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
349 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
353 /*******************************************************************
355 * @brief fills the uplink bandwidth by comparing the bitmask
359 * Function : fillBandwidthUl
362 * -checks the value with the bitmask and
363 * fills the cellPtr's UL Bandwidth
367 * @params[in] Pointer to ClCellParam
368 * Value to be compared
372 * ****************************************************************/
374 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
376 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
378 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
380 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
384 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
388 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
392 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
396 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
400 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
404 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
408 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
412 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
414 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
416 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
418 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
420 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
422 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
424 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
426 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
430 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
433 /*******************************************************************
435 * @brief fills the CCE maping by comparing the bitmask
439 * Function : fillCCEmaping
442 * -checks the value with the bitmask and
443 * fills the cellPtr's CCE Mapping Type
446 * @params[in] Pointer to ClCellParam
447 * Value to be compared
450 * ****************************************************************/
452 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
454 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
456 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
458 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
460 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
464 (*cellPtr)->cceMappingType = INVALID_VALUE;
468 /*******************************************************************
470 * @brief fills the PUCCH format by comparing the bitmask
474 * Function : fillPucchFormat
477 * -checks the value with the bitmask and
478 * fills the cellPtr's pucch format
481 * @params[in] Pointer to ClCellParam
482 * Value to be compared
485 * ****************************************************************/
487 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
489 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
491 (*cellPtr)->pucchFormats = FORMAT_0;
493 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
495 (*cellPtr)->pucchFormats = FORMAT_1;
497 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
499 (*cellPtr)->pucchFormats = FORMAT_2;
501 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
503 (*cellPtr)->pucchFormats = FORMAT_3;
505 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
507 (*cellPtr)->pucchFormats = FORMAT_4;
511 (*cellPtr)->pucchFormats = INVALID_VALUE;
515 /*******************************************************************
517 * @brief fills the PDSCH Mapping Type by comparing the bitmask
521 * Function : fillPdschMappingType
524 * -checks the value with the bitmask and
525 * fills the cellPtr's PDSCH MappingType
527 * @params[in] Pointer to ClCellParam
528 * Value to be compared
531 * ****************************************************************/
533 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
535 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
537 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
539 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
541 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
545 (*cellPtr)->pdschMappingType = INVALID_VALUE;
549 /*******************************************************************
551 * @brief fills the PDSCH Allocation Type by comparing the bitmask
555 * Function : fillPdschAllocationType
558 * -checks the value with the bitmask and
559 * fills the cellPtr's PDSCH AllocationType
561 * @params[in] Pointer to ClCellParam
562 * Value to be compared
565 * ****************************************************************/
567 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
569 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
571 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
573 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
575 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
579 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
583 /*******************************************************************
585 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
589 * Function : fillPrbMappingType
592 * -checks the value with the bitmask and
593 * fills the cellPtr's PRB Mapping Type
595 * @params[in] Pointer to ClCellParam
596 * Value to be compared
599 ******************************************************************/
600 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
602 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
604 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
606 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
608 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
612 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
616 /*******************************************************************
618 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
622 * Function : fillPdschDmrsConfigType
625 * -checks the value with the bitmask and
626 * fills the cellPtr's DmrsConfig Type
628 * @params[in] Pointer to ClCellParam
629 * Value to be compared
632 ******************************************************************/
634 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
636 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
638 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
640 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
642 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
646 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
650 /*******************************************************************
652 * @brief fills the PDSCH DmrsLength by comparing the bitmask
656 * Function : fillPdschDmrsLength
659 * -checks the value with the bitmask and
660 * fills the cellPtr's PdschDmrsLength
662 * @params[in] Pointer to ClCellParam
663 * Value to be compared
666 ******************************************************************/
667 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
669 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
671 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
673 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
675 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
679 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
683 /*******************************************************************
685 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
689 * Function : fillPdschDmrsAddPos
692 * -checks the value with the bitmask and
693 * fills the cellPtr's Pdsch DmrsAddPos
695 * @params[in] Pointer to ClCellParam
696 * Value to be compared
699 ******************************************************************/
701 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
703 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
705 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
707 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
709 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
711 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
713 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
715 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
717 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
721 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
725 /*******************************************************************
727 * @brief fills the Modulation Order in DL by comparing the bitmask
731 * Function : fillModulationOrderDl
734 * -checks the value with the bitmask and
735 * fills the cellPtr's ModulationOrder in DL.
737 * @params[in] Pointer to ClCellParam
738 * Value to be compared
741 ******************************************************************/
742 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
746 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
750 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
754 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
758 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
762 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
766 /*******************************************************************
768 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
772 * Function : fillPuschDmrsConfigType
775 * -checks the value with the bitmask and
776 * fills the cellPtr's PUSCH DmrsConfigType
778 * @params[in] Pointer to ClCellParam
779 * Value to be compared
782 ******************************************************************/
784 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
786 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
788 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
790 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
792 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
796 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
800 /*******************************************************************
802 * @brief fills the PUSCH DmrsLength by comparing the bitmask
806 * Function : fillPuschDmrsLength
809 * -checks the value with the bitmask and
810 * fills the cellPtr's PUSCH DmrsLength
812 * @params[in] Pointer to ClCellParam
813 * Value to be compared
816 ******************************************************************/
818 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
820 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
822 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
824 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
826 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
830 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
834 /*******************************************************************
836 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
840 * Function : fillPuschDmrsAddPos
843 * -checks the value with the bitmask and
844 * fills the cellPtr's PUSCH DmrsAddPos
846 * @params[in] Pointer to ClCellParam
847 * Value to be compared
850 ******************************************************************/
852 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
854 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
856 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
858 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
860 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
862 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
864 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
866 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
868 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
872 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
876 /*******************************************************************
878 * @brief fills the PUSCH Mapping Type by comparing the bitmask
882 * Function : fillPuschMappingType
885 * -checks the value with the bitmask and
886 * fills the cellPtr's PUSCH MappingType
888 * @params[in] Pointer to ClCellParam
889 * Value to be compared
892 ******************************************************************/
894 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
896 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
898 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
900 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
902 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
906 (*cellPtr)->puschMappingType = INVALID_VALUE;
910 /*******************************************************************
912 * @brief fills the PUSCH Allocation Type by comparing the bitmask
916 * Function : fillPuschAllocationType
919 * -checks the value with the bitmask and
920 * fills the cellPtr's PUSCH AllocationType
922 * @params[in] Pointer to ClCellParam
923 * Value to be compared
926 ******************************************************************/
928 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
930 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
932 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
934 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
936 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
940 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
944 /*******************************************************************
946 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
950 * Function : fillPuschPrbMappingType
953 * -checks the value with the bitmask and
954 * fills the cellPtr's PUSCH PRB MApping Type
956 * @params[in] Pointer to ClCellParam
957 * Value to be compared
960 ******************************************************************/
962 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
964 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
966 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
968 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
970 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
974 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
978 /*******************************************************************
980 * @brief fills the Modulation Order in Ul by comparing the bitmask
984 * Function : fillModulationOrderUl
987 * -checks the value with the bitmask and
988 * fills the cellPtr's Modualtsion Order in UL.
990 * @params[in] Pointer to ClCellParam
991 * Value to be compared
994 ******************************************************************/
996 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1000 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1004 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1008 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1012 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1016 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1020 /*******************************************************************
1022 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1026 * Function : fillPuschAggregationFactor
1029 * -checks the value with the bitmask and
1030 * fills the cellPtr's PUSCH Aggregation Factor
1032 * @params[in] Pointer to ClCellParam
1033 * Value to be compared
1036 ******************************************************************/
1038 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1040 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1042 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1044 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1046 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1048 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1050 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1052 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1054 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1058 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1062 /*******************************************************************
1064 * @brief fills the PRACH Long Format by comparing the bitmask
1068 * Function : fillPrachLongFormat
1071 * -checks the value with the bitmask and
1072 * fills the cellPtr's PRACH Long Format
1074 * @params[in] Pointer to ClCellParam
1075 * Value to be compared
1078 ******************************************************************/
1080 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1082 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1084 (*cellPtr)->prachLongFormats = FORMAT_0;
1086 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1088 (*cellPtr)->prachLongFormats = FORMAT_1;
1090 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1092 (*cellPtr)->prachLongFormats = FORMAT_2;
1094 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1096 (*cellPtr)->prachLongFormats = FORMAT_3;
1100 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1104 /*******************************************************************
1106 * @brief fills the PRACH Short Format by comparing the bitmask
1110 * Function : fillPrachShortFormat
1113 * -checks the value with the bitmask and
1114 * fills the cellPtr's PRACH ShortFormat
1116 * @params[in] Pointer to ClCellParam
1117 * Value to be compared
1120 ******************************************************************/
1122 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1124 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1126 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1128 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1132 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1136 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1140 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1144 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1146 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1148 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1150 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1152 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1154 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1156 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1158 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1162 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1166 /*******************************************************************
1168 * @brief fills the Fd Occasions Type by comparing the bitmask
1172 * Function : fillFdOccasions
1175 * -checks the value with the bitmask and
1176 * fills the cellPtr's Fd Occasions
1178 * @params[in] Pointer to ClCellParam
1179 * Value to be compared
1182 ******************************************************************/
1184 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1188 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1192 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1196 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1200 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1204 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1208 /*******************************************************************
1210 * @brief fills the RSSI Measurement by comparing the bitmask
1214 * Function : fillRssiMeas
1217 * -checks the value with the bitmask and
1218 * fills the cellPtr's RSSI Measurement report
1220 * @params[in] Pointer to ClCellParam
1221 * Value to be compared
1224 ******************************************************************/
1226 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1228 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1230 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1232 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1234 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1238 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1242 /*******************************************************************
1244 * @brief Returns the TLVs value
1248 * Function : getParamValue
1251 * -return TLVs value
1254 * @return ROK - temp
1257 * ****************************************************************/
1259 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1262 posPtr = &tlv->tl.tag;
1263 posPtr += sizeof(tlv->tl.tag);
1264 posPtr += sizeof(tlv->tl.length);
1265 /*TO DO: malloc to SSI memory */
1266 if(type == FAPI_UINT_8)
1268 return(*(uint8_t *)posPtr);
1270 else if(type == FAPI_UINT_16)
1272 return(*(uint16_t *)posPtr);
1274 else if(type == FAPI_UINT_32)
1276 return(*(uint32_t *)posPtr);
1280 DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
1286 /*******************************************************************
1288 * @brief Modifes the received mibPdu to uint32 bit
1289 * and stores it in MacCellCfg
1293 * Function : setMibPdu
1298 * @params[in] Pointer to mibPdu
1299 * pointer to modified value
1300 ******************************************************************/
1301 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1303 *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1304 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1305 DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
1308 /*******************************************************************
1310 * @brief Sends FAPI Param req to PHY
1314 * Function : lwr_mac_procParamReqEvt
1317 * -Sends FAPI Param req to PHY
1320 * @return ROK - success
1323 * ****************************************************************/
1325 uint8_t lwr_mac_procParamReqEvt(void *msg)
1328 /* startGuardTimer(); */
1329 fapi_param_req_t *paramReq = NULL;
1330 fapi_msg_header_t *msgHeader;
1331 p_fapi_api_queue_elem_t paramReqElem;
1332 p_fapi_api_queue_elem_t headerElem;
1334 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1335 if(paramReq != NULL)
1337 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1338 sizeof(fapi_tx_data_req_t));
1339 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1340 memset(paramReq, 0, sizeof(fapi_param_req_t));
1341 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1343 /* Fill message header */
1344 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1347 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
1348 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1351 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1352 sizeof(fapi_msg_header_t));
1353 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1354 msgHeader->num_msg = 1;
1355 msgHeader->handle = 0;
1357 DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
1358 LwrMacSendToL1(headerElem);
1362 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
1369 /*******************************************************************
1371 * @brief Sends FAPI Param Response to MAC via PHY
1375 * Function : lwr_mac_procParamRspEvt
1378 * -Sends FAPI Param rsp to MAC via PHY
1381 * @return ROK - success
1384 * ****************************************************************/
1386 uint8_t lwr_mac_procParamRspEvt(void *msg)
1389 /* stopGuardTimer(); */
1391 uint32_t encodedVal;
1392 fapi_param_resp_t *paramRsp;
1393 ClCellParam *cellParam = NULLP;
1395 paramRsp = (fapi_param_resp_t *)msg;
1396 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1398 if(paramRsp != NULLP)
1400 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1401 if(cellParam != NULLP)
1403 DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
1404 if(paramRsp->error_code == MSG_OK)
1406 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1408 switch(paramRsp->tlvs[index].tl.tag)
1410 case FAPI_RELEASE_CAPABILITY_TAG:
1411 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1412 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1414 cellParam->releaseCapability = RELEASE_15;
1418 case FAPI_PHY_STATE_TAG:
1419 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1420 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1422 DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1427 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1428 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1429 if(encodedVal != RFAILED && encodedVal != 0)
1431 cellParam->skipBlankDlConfig = SUPPORTED;
1435 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1439 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1440 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1441 if(encodedVal != RFAILED && encodedVal != 0)
1443 cellParam->skipBlankUlConfig = SUPPORTED;
1447 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1451 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1452 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1455 case FAPI_CYCLIC_PREFIX_TAG:
1456 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1457 if(encodedVal != RFAILED)
1459 fillCyclicPrefix(encodedVal, &cellParam);
1463 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1464 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1465 if(encodedVal != RFAILED)
1467 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1471 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1472 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1473 if(encodedVal != RFAILED)
1475 fillBandwidthDl(encodedVal, &cellParam);
1479 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1480 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1481 if(encodedVal != RFAILED)
1483 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1487 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1488 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1489 if(encodedVal != RFAILED)
1491 fillBandwidthUl(encodedVal, &cellParam);
1495 case FAPI_CCE_MAPPING_TYPE_TAG:
1496 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1497 if(encodedVal != RFAILED)
1499 fillCCEmaping(encodedVal, &cellParam);
1503 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1504 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1505 if(encodedVal != RFAILED && encodedVal != 0)
1507 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1511 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1515 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1516 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1517 if(encodedVal != RFAILED && encodedVal != 0)
1519 cellParam->precoderGranularityCoreset = SUPPORTED;
1523 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1527 case FAPI_PDCCH_MU_MIMO_TAG:
1528 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1529 if(encodedVal != RFAILED && encodedVal != 0)
1531 cellParam->pdcchMuMimo = SUPPORTED;
1535 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1539 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1540 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1541 if(encodedVal != RFAILED && encodedVal != 0)
1543 cellParam->pdcchPrecoderCycling = SUPPORTED;
1547 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1551 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1552 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1555 case FAPI_PUCCH_FORMATS_TAG:
1556 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1557 if(encodedVal != RFAILED)
1559 fillPucchFormat(encodedVal, &cellParam);
1563 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1564 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1567 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1568 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1569 if(encodedVal != RFAILED)
1571 fillPdschMappingType(encodedVal, &cellParam);
1575 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1576 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1577 if(encodedVal != RFAILED)
1579 fillPdschAllocationType(encodedVal, &cellParam);
1583 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1584 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1585 if(encodedVal != RFAILED)
1587 fillPrbMappingType(encodedVal, &cellParam);
1591 case FAPI_PDSCH_CBG_TAG:
1592 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1593 if(encodedVal != RFAILED && encodedVal != 0)
1595 cellParam->pdschCbg = SUPPORTED;
1599 cellParam->pdschCbg = NOT_SUPPORTED;
1603 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1604 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1605 if(encodedVal != RFAILED)
1607 fillPdschDmrsConfigType(encodedVal, &cellParam);
1611 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1612 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1613 if(encodedVal != RFAILED)
1615 fillPdschDmrsLength(encodedVal, &cellParam);
1619 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1620 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1621 if(encodedVal != RFAILED)
1623 fillPdschDmrsAddPos(encodedVal, &cellParam);
1627 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1628 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1631 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1632 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1633 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1635 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1639 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1640 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1641 if(encodedVal != RFAILED)
1643 fillModulationOrderDl(encodedVal, &cellParam);
1647 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1648 cellParam->maxMuMimoUsersDl = \
1649 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1652 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1653 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1654 if(encodedVal != RFAILED && encodedVal != 0)
1656 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1660 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1664 case FAPI_PREMPTIONSUPPORT_TAG:
1665 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1666 if(encodedVal != RFAILED && encodedVal != 0)
1668 cellParam->premptionSupport = SUPPORTED;
1672 cellParam->premptionSupport = NOT_SUPPORTED;
1676 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1677 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1678 if(encodedVal != RFAILED && encodedVal != 0)
1680 cellParam->pdschNonSlotSupport = SUPPORTED;
1684 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1688 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1689 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1690 if(encodedVal != RFAILED && encodedVal != 0)
1692 cellParam->uciMuxUlschInPusch = SUPPORTED;
1696 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1700 case FAPI_UCI_ONLY_PUSCH_TAG:
1701 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1702 if(encodedVal != RFAILED && encodedVal != 0)
1704 cellParam->uciOnlyPusch = SUPPORTED;
1708 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1712 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1713 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1714 if(encodedVal != RFAILED && encodedVal != 0)
1716 cellParam->puschFrequencyHopping = SUPPORTED;
1720 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1724 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1725 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1726 if(encodedVal != RFAILED)
1728 fillPuschDmrsConfig(encodedVal, &cellParam);
1732 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1733 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1734 if(encodedVal != RFAILED)
1736 fillPuschDmrsLength(encodedVal, &cellParam);
1740 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1741 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1742 if(encodedVal != RFAILED)
1744 fillPuschDmrsAddPos(encodedVal, &cellParam);
1748 case FAPI_PUSCH_CBG_TAG:
1749 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1750 if(encodedVal != RFAILED && encodedVal != 0)
1752 cellParam->puschCbg = SUPPORTED;
1756 cellParam->puschCbg = NOT_SUPPORTED;
1760 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1761 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1762 if(encodedVal != RFAILED)
1764 fillPuschMappingType(encodedVal, &cellParam);
1768 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1769 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1770 if(encodedVal != RFAILED)
1772 fillPuschAllocationType(encodedVal, &cellParam);
1776 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1777 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1778 if(encodedVal != RFAILED)
1780 fillPuschPrbMappingType(encodedVal, &cellParam);
1784 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1785 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1786 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1788 cellParam->puschMaxPtrsPorts = encodedVal;
1792 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1793 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1796 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1797 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1800 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1801 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1802 if(encodedVal != RFAILED)
1804 fillModulationOrderUl(encodedVal, &cellParam);
1808 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1809 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1812 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1813 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1814 if(encodedVal != RFAILED && encodedVal != 0)
1816 cellParam->dftsOfdmSupport = SUPPORTED;
1820 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1824 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1825 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1826 if(encodedVal != RFAILED)
1828 fillPuschAggregationFactor(encodedVal, &cellParam);
1832 case FAPI_PRACH_LONG_FORMATS_TAG:
1833 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1834 if(encodedVal != RFAILED)
1836 fillPrachLongFormat(encodedVal, &cellParam);
1840 case FAPI_PRACH_SHORT_FORMATS_TAG:
1841 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1842 if(encodedVal != RFAILED)
1844 fillPrachShortFormat(encodedVal, &cellParam);
1848 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1849 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1850 if(encodedVal != RFAILED && encodedVal != 0)
1852 cellParam->prachRestrictedSets = SUPPORTED;
1856 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1860 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1861 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1862 if(encodedVal != RFAILED)
1864 fillFdOccasions(encodedVal, &cellParam);
1868 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1869 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1870 if(encodedVal != RFAILED)
1872 fillRssiMeas(encodedVal, &cellParam);
1876 //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1880 MAC_FREE(cellParam, sizeof(ClCellParam));
1881 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1886 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
1892 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
1898 DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
1906 #ifdef INTEL_TIMER_MODE
1907 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1909 void * wlsHdlr = NULLP;
1910 fapi_msg_header_t *msgHeader;
1911 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1912 p_fapi_api_queue_elem_t headerElem;
1913 p_fapi_api_queue_elem_t iqSampleElem;
1914 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1916 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1918 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1920 /* Fill IQ sample req */
1921 mtGetWlsHdl(&wlsHdlr);
1922 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1923 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1924 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1927 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
1930 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1931 sizeof(fapi_vendor_ext_iq_samples_req_t));
1933 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1934 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1935 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1936 sizeof(fapi_vendor_ext_iq_samples_req_t));
1938 iqSampleReq->iq_samples_info.carrNum = 0;
1939 iqSampleReq->iq_samples_info.numSubframes = 40;
1940 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1941 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1942 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1943 iqSampleReq->iq_samples_info.startFrameNum = 0;
1944 iqSampleReq->iq_samples_info.startSlotNum = 0;
1945 iqSampleReq->iq_samples_info.startSymNum = 0;
1946 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1947 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1949 /* TODO : Fill remaining parameters */
1951 /* Fill message header */
1952 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1955 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1958 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1959 sizeof(fapi_msg_header_t));
1960 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1961 msgHeader->num_msg = 1;
1962 msgHeader->handle = 0;
1964 DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
1965 LwrMacSendToL1(headerElem);
1970 /*******************************************************************
1972 * @brief Sends FAPI Config req to PHY
1976 * Function : lwr_mac_procConfigReqEvt
1979 * -Sends FAPI Config Req to PHY
1982 * @return ROK - success
1985 * ****************************************************************/
1987 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1991 uint8_t slotIdx = 0;
1992 uint8_t symbolIdx =0;
1995 uint16_t *cellId =NULLP;
1996 uint16_t cellIdx =0;
1997 uint32_t msgLen = 0;
1999 MacCellCfg macCfgParams;
2000 fapi_vendor_msg_t *vendorMsg;
2001 fapi_config_req_t *configReq;
2002 fapi_msg_header_t *msgHeader;
2003 p_fapi_api_queue_elem_t headerElem;
2004 p_fapi_api_queue_elem_t vendorMsgQElem;
2005 p_fapi_api_queue_elem_t cfgReqQElem;
2007 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2010 cellId = (uint16_t *)msg;
2011 GET_CELL_IDX(*cellId, cellIdx);
2012 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2014 /* Fill Cell Configuration in lwrMacCb */
2015 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2016 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2017 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2020 /* Allocte And fill Vendor msg */
2021 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2024 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2027 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2028 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2029 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2030 vendorMsg->config_req_vendor.hopping_id = 0;
2031 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2032 vendorMsg->config_req_vendor.group_hop_flag = 0;
2033 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2034 vendorMsg->start_req_vendor.sfn = 0;
2035 vendorMsg->start_req_vendor.slot = 0;
2036 vendorMsg->start_req_vendor.mode = 4;
2038 vendorMsg->start_req_vendor.count = 0;
2039 vendorMsg->start_req_vendor.period = 1;
2041 /* Fill FAPI config req */
2042 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2045 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2046 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2049 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2050 sizeof(fapi_config_req_t));
2052 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2053 memset(configReq, 0, sizeof(fapi_config_req_t));
2054 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2055 configReq->number_of_tlvs = 25;
2056 msgLen = sizeof(configReq->number_of_tlvs);
2058 if(macCfgParams.dlCarrCfg.pres)
2060 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2061 sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2062 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2063 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2064 /* Due to bug in Intel FT code, commenting TLVs that are are not
2065 * needed to avoid error. Must be uncommented when FT bug is fixed */
2066 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2067 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2068 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2069 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2070 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2071 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2073 if(macCfgParams.ulCarrCfg.pres)
2075 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2076 sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2077 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2078 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2079 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2080 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2081 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2082 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2083 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2084 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2086 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2087 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2089 /* fill cell config */
2090 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2091 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2092 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2093 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2095 /* fill SSB configuration */
2096 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2097 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2098 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2099 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2100 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2101 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2103 /* fill PRACH configuration */
2104 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2105 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2106 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2107 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2108 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2109 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2110 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2111 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2112 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2113 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2114 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2115 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2116 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2117 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2118 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2119 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2120 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2121 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2122 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2123 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2124 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2126 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2127 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2128 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2133 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2136 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2137 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2138 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2139 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2141 /* fill SSB table */
2142 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2143 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2144 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2145 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2146 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2147 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2148 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2149 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2151 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2152 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2153 sizeof(uint32_t), mib, &msgLen);
2155 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2156 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2157 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2158 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2159 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2160 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2161 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2162 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2165 /* fill TDD table */
2166 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2167 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2168 for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2170 for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2172 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2173 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2178 /* fill measurement config */
2179 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2180 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2182 /* fill DMRS Type A Pos */
2183 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2184 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2186 /* Fill message header */
2187 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2190 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2191 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2192 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2195 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2196 sizeof(fapi_msg_header_t));
2197 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2198 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2199 msgHeader->handle = 0;
2201 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2202 LwrMacSendToL1(headerElem);
2206 } /* lwr_mac_handleConfigReqEvt */
2208 /*******************************************************************
2210 * @brief Processes config response from phy
2214 * Function : lwr_mac_procConfigRspEvt
2217 * Processes config response from phy
2219 * @params[in] FAPI message pointer
2220 * @return ROK - success
2223 * ****************************************************************/
2225 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2228 fapi_config_resp_t *configRsp;
2229 configRsp = (fapi_config_resp_t *)msg;
2231 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2234 if(configRsp != NULL)
2236 if(configRsp->error_code == MSG_OK)
2238 DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
2239 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2240 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2242 * Store config response into an intermediate struture and send to MAC
2243 * Support LC and LWLC for sending config rsp to MAC
2245 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2249 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
2255 DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
2261 } /* lwr_mac_procConfigRspEvt */
2263 /*******************************************************************
2265 * @brief Build and send start request to phy
2269 * Function : lwr_mac_procStartReqEvt
2272 * Build and send start request to phy
2274 * @params[in] FAPI message pointer
2275 * @return ROK - success
2278 * ****************************************************************/
2279 uint8_t lwr_mac_procStartReqEvt(void *msg)
2282 fapi_msg_header_t *msgHeader;
2283 fapi_start_req_t *startReq;
2284 fapi_vendor_msg_t *vendorMsg;
2285 p_fapi_api_queue_elem_t headerElem;
2286 p_fapi_api_queue_elem_t startReqElem;
2287 p_fapi_api_queue_elem_t vendorMsgElem;
2289 /* Allocte And fill Vendor msg */
2290 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2293 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
2296 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2297 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2298 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2299 vendorMsg->start_req_vendor.sfn = 0;
2300 vendorMsg->start_req_vendor.slot = 0;
2301 vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2303 vendorMsg->start_req_vendor.count = 0;
2304 vendorMsg->start_req_vendor.period = 1;
2307 /* Fill FAPI config req */
2308 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2311 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
2312 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2315 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2316 sizeof(fapi_start_req_t));
2318 startReq = (fapi_start_req_t *)(startReqElem + 1);
2319 memset(startReq, 0, sizeof(fapi_start_req_t));
2320 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2322 /* Fill message header */
2323 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2326 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2327 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2328 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2331 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2332 sizeof(fapi_msg_header_t));
2333 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2334 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2335 msgHeader->handle = 0;
2338 DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
2339 LwrMacSendToL1(headerElem);
2342 } /* lwr_mac_procStartReqEvt */
2344 /*******************************************************************
2346 * @brief Sends FAPI Stop Req to PHY
2350 * Function : lwr_mac_procStopReqEvt
2353 * -Sends FAPI Stop Req to PHY
2356 * @return ROK - success
2359 ********************************************************************/
2361 uint8_t lwr_mac_procStopReqEvt(SlotIndInfo slotInfo, p_fapi_api_queue_elem_t prevElem)
2364 fapi_stop_req_t *stopReq;
2365 fapi_vendor_msg_t *vendorMsg;
2366 p_fapi_api_queue_elem_t stopReqElem;
2367 p_fapi_api_queue_elem_t vendorMsgElem;
2369 /* Allocte And fill Vendor msg */
2370 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2373 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in stop req");
2376 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2377 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2378 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2379 vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
2380 vendorMsg->stop_req_vendor.slot = slotInfo.slot;
2382 /* Fill FAPI stop req */
2383 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2386 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
2387 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2390 FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2391 sizeof(fapi_stop_req_t));
2392 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2393 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2394 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2397 DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
2398 prevElem->p_next = stopReqElem;
2405 /*******************************************************************
2407 * @brief fills SSB PDU required for DL TTI info in MAC
2411 * Function : fillSsbPdu
2414 * -Fills the SSB PDU info
2417 * @params[in] Pointer to FAPI DL TTI Req
2418 * Pointer to RgCellCb
2419 * Pointer to msgLen of DL TTI Info
2422 ******************************************************************/
2424 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2425 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2427 uint32_t mibPayload = 0;
2428 if(dlTtiReqPdu != NULL)
2430 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2431 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2432 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2433 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2434 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2435 /* ssbOfPdufstA to be filled in ssbCfg */
2436 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2437 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2438 /* Bit manipulation for SFN */
2439 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2440 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2441 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2442 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2443 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2444 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2445 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2446 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2447 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2454 /*******************************************************************
2456 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2460 * Function : fillSib1DlDciPdu
2463 * -Fills the Dl DCI PDU
2465 * @params[in] Pointer to fapi_dl_dci_t
2466 * Pointer to PdcchCfg
2469 ******************************************************************/
2471 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2473 if(dlDciPtr != NULLP)
2479 uint16_t coreset0Size=0;
2482 uint32_t freqDomResAssign=0;
2483 uint32_t timeDomResAssign=0;
2484 uint8_t VRB2PRBMap=0;
2485 uint32_t modNCodScheme=0;
2486 uint8_t redundancyVer=0;
2487 uint32_t sysInfoInd=0;
2488 uint32_t reserved=0;
2490 /* Size(in bits) of each field in DCI format 0_1
2491 * as mentioned in spec 38.214 */
2492 uint8_t freqDomResAssignSize = 0;
2493 uint8_t timeDomResAssignSize = 4;
2494 uint8_t VRB2PRBMapSize = 1;
2495 uint8_t modNCodSchemeSize = 5;
2496 uint8_t redundancyVerSize = 2;
2497 uint8_t sysInfoIndSize = 1;
2498 uint8_t reservedSize = 15;
2500 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2501 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2502 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2503 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2504 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2505 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2506 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2507 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2508 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2509 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2510 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2511 dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2513 /* Calculating freq domain resource allocation field value and size
2514 * coreset0Size = Size of coreset 0
2515 * RBStart = Starting Virtual Rsource block
2516 * RBLen = length of contiguously allocted RBs
2517 * Spec 38.214 Sec 5.1.2.2.2
2519 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2520 rbStart = 0; /* For SIB1 */
2521 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2522 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2524 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2526 if((rbLen - 1) <= floor(coreset0Size / 2))
2527 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2529 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2530 + (coreset0Size - 1 - rbStart);
2532 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2535 /* Fetching DCI field values */
2536 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2538 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2540 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2541 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2542 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2545 /* Reversing bits in each DCI field */
2546 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2547 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2548 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2549 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2550 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2551 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2553 /* Calulating total number of bytes in buffer */
2554 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2555 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2556 + sysInfoIndSize + reservedSize;
2558 numBytes = dlDciPtr->payloadSizeBits / 8;
2559 if(dlDciPtr->payloadSizeBits % 8)
2562 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2564 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2568 /* Initialize buffer */
2569 for(bytePos = 0; bytePos < numBytes; bytePos++)
2570 dlDciPtr->payload[bytePos] = 0;
2572 bytePos = numBytes - 1;
2575 /* Packing DCI format fields */
2576 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2577 freqDomResAssign, freqDomResAssignSize);
2578 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2579 timeDomResAssign, timeDomResAssignSize);
2580 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2581 VRB2PRBMap, VRB2PRBMapSize);
2582 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2583 modNCodScheme, modNCodSchemeSize);
2584 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2585 redundancyVer, redundancyVerSize);
2586 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2587 sysInfoInd, sysInfoIndSize);
2588 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2589 reserved, reservedSize);
2592 } /* fillSib1DlDciPdu */
2594 /*******************************************************************
2596 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2600 * Function : fillRarDlDciPdu
2603 * -Fills the Dl DCI PDU
2605 * @params[in] Pointer to fapi_dl_dci_t
2606 * Pointer to PdcchCfg
2609 ******************************************************************/
2611 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2613 if(dlDciPtr != NULLP)
2615 uint8_t numBytes =0;
2619 uint16_t coreset0Size =0;
2620 uint16_t rbStart =0;
2622 uint32_t freqDomResAssign =0;
2623 uint8_t timeDomResAssign =0;
2624 uint8_t VRB2PRBMap =0;
2625 uint8_t modNCodScheme =0;
2626 uint8_t tbScaling =0;
2627 uint32_t reserved =0;
2629 /* Size(in bits) of each field in DCI format 1_0 */
2630 uint8_t freqDomResAssignSize = 0;
2631 uint8_t timeDomResAssignSize = 4;
2632 uint8_t VRB2PRBMapSize = 1;
2633 uint8_t modNCodSchemeSize = 5;
2634 uint8_t tbScalingSize = 2;
2635 uint8_t reservedSize = 16;
2637 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2638 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2639 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2640 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2641 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2642 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2643 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2644 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2645 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2646 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2647 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2648 dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2650 /* Calculating freq domain resource allocation field value and size
2651 * coreset0Size = Size of coreset 0
2652 * RBStart = Starting Virtual Rsource block
2653 * RBLen = length of contiguously allocted RBs
2654 * Spec 38.214 Sec 5.1.2.2.2
2657 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2658 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2659 rbStart = 0; /* For SIB1 */
2660 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2661 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2663 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2665 if((rbLen - 1) <= floor(coreset0Size / 2))
2666 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2668 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2669 + (coreset0Size - 1 - rbStart);
2671 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2674 /* Fetching DCI field values */
2675 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2676 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2677 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2678 tbScaling = 0; /* configured to 0 scaling */
2681 /* Reversing bits in each DCI field */
2682 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2683 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2684 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2685 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2686 tbScaling = reverseBits(tbScaling, tbScalingSize);
2688 /* Calulating total number of bytes in buffer */
2689 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2690 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2692 numBytes = dlDciPtr->payloadSizeBits / 8;
2693 if(dlDciPtr->payloadSizeBits % 8)
2696 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2698 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2702 /* Initialize buffer */
2703 for(bytePos = 0; bytePos < numBytes; bytePos++)
2704 dlDciPtr->payload[bytePos] = 0;
2706 bytePos = numBytes - 1;
2709 /* Packing DCI format fields */
2710 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2711 freqDomResAssign, freqDomResAssignSize);
2712 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2713 timeDomResAssign, timeDomResAssignSize);
2714 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2715 VRB2PRBMap, VRB2PRBMapSize);
2716 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2717 modNCodScheme, modNCodSchemeSize);
2718 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2719 tbScaling, tbScalingSize);
2720 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2721 reserved, reservedSize);
2723 } /* fillRarDlDciPdu */
2725 /*******************************************************************
2727 * @brief fills DL DCI PDU required for DL TTI info in MAC
2731 * Function : fillDlMsgDlDciPdu
2734 * -Fills the Dl DCI PDU
2736 * @params[in] Pointer to fapi_dl_dci_t
2737 * Pointer to PdcchCfg
2740 ******************************************************************/
2741 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2742 DlMsgInfo *dlMsgInfo)
2744 if(dlDciPtr != NULLP)
2750 uint16_t coresetSize = 0;
2751 uint16_t rbStart = 0;
2753 uint8_t dciFormatId;
2754 uint32_t freqDomResAssign;
2755 uint8_t timeDomResAssign;
2757 uint8_t modNCodScheme;
2759 uint8_t redundancyVer = 0;
2760 uint8_t harqProcessNum = 0;
2761 uint8_t dlAssignmentIdx = 0;
2762 uint8_t pucchTpc = 0;
2763 uint8_t pucchResoInd = 0;
2764 uint8_t harqFeedbackInd = 0;
2766 /* Size(in bits) of each field in DCI format 1_0 */
2767 uint8_t dciFormatIdSize = 1;
2768 uint8_t freqDomResAssignSize = 0;
2769 uint8_t timeDomResAssignSize = 4;
2770 uint8_t VRB2PRBMapSize = 1;
2771 uint8_t modNCodSchemeSize = 5;
2772 uint8_t ndiSize = 1;
2773 uint8_t redundancyVerSize = 2;
2774 uint8_t harqProcessNumSize = 4;
2775 uint8_t dlAssignmentIdxSize = 2;
2776 uint8_t pucchTpcSize = 2;
2777 uint8_t pucchResoIndSize = 3;
2778 uint8_t harqFeedbackIndSize = 3;
2780 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2781 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2782 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2783 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2784 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2785 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2786 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2787 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2788 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2789 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2790 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2791 dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2793 /* Calculating freq domain resource allocation field value and size
2794 * coreset0Size = Size of coreset 0
2795 * RBStart = Starting Virtual Rsource block
2796 * RBLen = length of contiguously allocted RBs
2797 * Spec 38.214 Sec 5.1.2.2.2
2799 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2800 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2801 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2803 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2805 if((rbLen - 1) <= floor(coresetSize / 2))
2806 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2808 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2809 + (coresetSize - 1 - rbStart);
2811 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2814 /* Fetching DCI field values */
2815 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
2816 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2817 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2818 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2819 ndi = dlMsgInfo->ndi;
2820 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2821 harqProcessNum = dlMsgInfo->harqProcNum;
2822 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
2823 pucchTpc = dlMsgInfo->pucchTpc;
2824 pucchResoInd = dlMsgInfo->pucchResInd;
2825 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
2827 /* Reversing bits in each DCI field */
2828 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2829 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2830 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2831 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2832 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2833 ndi = reverseBits(ndi, ndiSize);
2834 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2835 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2836 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2837 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2838 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2839 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2842 /* Calulating total number of bytes in buffer */
2843 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2844 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2845 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2846 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2848 numBytes = dlDciPtr->payloadSizeBits / 8;
2849 if(dlDciPtr->payloadSizeBits % 8)
2852 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2854 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2858 /* Initialize buffer */
2859 for(bytePos = 0; bytePos < numBytes; bytePos++)
2860 dlDciPtr->payload[bytePos] = 0;
2862 bytePos = numBytes - 1;
2865 /* Packing DCI format fields */
2866 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2867 dciFormatId, dciFormatIdSize);
2868 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2869 freqDomResAssign, freqDomResAssignSize);
2870 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2871 timeDomResAssign, timeDomResAssignSize);
2872 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2873 VRB2PRBMap, VRB2PRBMapSize);
2874 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2875 modNCodScheme, modNCodSchemeSize);
2876 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2878 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2879 redundancyVer, redundancyVerSize);
2880 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2881 redundancyVer, redundancyVerSize);
2882 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2883 harqProcessNum, harqProcessNumSize);
2884 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2885 dlAssignmentIdx, dlAssignmentIdxSize);
2886 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2887 pucchTpc, pucchTpcSize);
2888 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2889 pucchResoInd, pucchResoIndSize);
2890 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2891 harqFeedbackInd, harqFeedbackIndSize);
2895 /*******************************************************************
2897 * @brief fills PDCCH PDU required for DL TTI info in MAC
2901 * Function : fillPdcchPdu
2904 * -Fills the Pdcch PDU info
2907 * @params[in] Pointer to FAPI DL TTI Req
2908 * Pointer to PdcchCfg
2911 ******************************************************************/
2912 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2913 RntiType rntiType, uint8_t coreSetType)
2915 if(dlTtiReqPdu != NULLP)
2917 PdcchCfg *pdcchInfo = NULLP;
2918 BwpCfg *bwp = NULLP;
2920 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2921 if(rntiType == SI_RNTI_TYPE)
2923 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2924 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2925 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2927 else if(rntiType == RA_RNTI_TYPE)
2929 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2930 bwp = &dlInfo->rarAlloc->bwp;
2931 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2933 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2935 pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2936 bwp = &dlInfo->dlMsgAlloc->bwp;
2937 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2938 &dlInfo->dlMsgAlloc->dlMsgInfo);
2942 DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
2945 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2946 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2947 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2948 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2949 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2950 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2951 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2952 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2953 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2954 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2955 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2956 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
2957 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2958 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2959 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2961 /* Calculating PDU length. Considering only one dl dci pdu for now */
2962 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2968 /*******************************************************************
2970 * @brief fills PDSCH PDU required for DL TTI info in MAC
2974 * Function : fillPdschPdu
2977 * -Fills the Pdsch PDU info
2980 * @params[in] Pointer to FAPI DL TTI Req
2981 * Pointer to PdschCfg
2982 * Pointer to msgLen of DL TTI Info
2985 ******************************************************************/
2987 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2988 BwpCfg bwp, uint16_t pduIndex)
2992 if(dlTtiReqPdu != NULLP)
2994 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2995 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2996 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2997 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2998 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2999 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3000 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3001 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3002 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3003 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3004 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3006 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3007 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3008 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3009 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3010 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3011 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3013 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3014 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3015 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3016 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3017 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3018 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3019 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3020 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3021 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3022 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3023 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3024 /* since we are using type-1, hence rbBitmap excluded */
3025 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3026 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3027 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3028 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3029 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3030 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3031 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3032 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3033 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3034 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3035 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3036 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3037 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3038 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3039 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3040 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3041 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3043 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3047 /***********************************************************************
3049 * @brief calculates the total size to be allocated for DL TTI Req
3053 * Function : calcDlTtiReqPduCount
3056 * -calculates the total pdu count to be allocated for DL TTI Req
3058 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3061 * ********************************************************************/
3062 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3067 if(dlInfo->isBroadcastPres)
3069 if(dlInfo->brdcstAlloc.ssbTrans)
3071 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3073 /* SSB PDU is filled */
3077 if(dlInfo->brdcstAlloc.sib1Trans)
3079 /* PDCCH and PDSCH PDU is filled */
3083 if(dlInfo->rarAlloc != NULLP)
3085 /* PDCCH and PDSCH PDU is filled */
3088 if(dlInfo->dlMsgAlloc != NULLP)
3090 /* PDCCH and PDSCH PDU is filled */
3096 /***********************************************************************
3098 * @brief calculates the total size to be allocated for DL TTI Req
3102 * Function : calcTxDataReqPduCount
3105 * -calculates the total pdu count to be allocated for DL TTI Req
3107 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3110 * ********************************************************************/
3111 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3115 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3119 if(dlInfo->rarAlloc != NULLP)
3123 if(dlInfo->dlMsgAlloc != NULLP)
3129 /***********************************************************************
3131 * @brief fills the SIB1 TX-DATA request message
3135 * Function : fillSib1TxDataReq
3138 * - fills the SIB1 TX-DATA request message
3140 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3141 * @params[in] macCellCfg consist of SIB1 pdu
3142 * @params[in] uint32_t *msgLen
3143 * @params[in] uint16_t pduIndex
3146 * ********************************************************************/
3147 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3150 uint32_t payloadSize = 0;
3151 uint8_t *sib1Payload = NULLP;
3152 fapi_api_queue_elem_t *payloadElem = NULLP;
3153 #ifdef INTEL_WLS_MEM
3154 void * wlsHdlr = NULLP;
3157 pduDesc[pduIndex].pdu_index = pduIndex;
3158 pduDesc[pduIndex].num_tlvs = 1;
3161 payloadSize = pdschCfg.codeword[0].tbSize;
3162 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3163 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3164 LWR_MAC_ALLOC(sib1Payload, payloadSize);
3165 if(sib1Payload == NULLP)
3169 payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3170 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3171 macCellCfg->sib1Cfg.sib1PduLen);
3172 memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
3174 #ifdef INTEL_WLS_MEM
3175 mtGetWlsHdl(&wlsHdlr);
3176 pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, sib1Payload);
3178 pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3180 pduDesc[pduIndex].pdu_length = payloadSize;
3182 #ifdef INTEL_WLS_MEM
3183 addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3185 LWR_MAC_FREE(sib1Payload, payloadSize);
3191 /***********************************************************************
3193 * @brief fills the RAR TX-DATA request message
3197 * Function : fillRarTxDataReq
3200 * - fills the RAR TX-DATA request message
3202 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3203 * @params[in] RarInfo *rarInfo
3204 * @params[in] uint32_t *msgLen
3205 * @params[in] uint16_t pduIndex
3208 * ********************************************************************/
3209 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3211 uint16_t payloadSize;
3212 uint8_t *rarPayload = NULLP;
3213 fapi_api_queue_elem_t *payloadElem = NULLP;
3214 #ifdef INTEL_WLS_MEM
3215 void * wlsHdlr = NULLP;
3218 pduDesc[pduIndex].pdu_index = pduIndex;
3219 pduDesc[pduIndex].num_tlvs = 1;
3222 payloadSize = pdschCfg.codeword[0].tbSize;
3223 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3224 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3225 LWR_MAC_ALLOC(rarPayload, payloadSize);
3226 if(rarPayload == NULLP)
3230 payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3231 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3232 memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3234 #ifdef INTEL_WLS_MEM
3235 mtGetWlsHdl(&wlsHdlr);
3236 pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, rarPayload);
3238 pduDesc[pduIndex].tlvs[0].value = rarPayload;
3240 pduDesc[pduIndex].pdu_length = payloadSize;
3242 #ifdef INTEL_WLS_MEM
3243 addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3245 LWR_MAC_FREE(rarPayload, payloadSize);
3250 /***********************************************************************
3252 * @brief fills the DL dedicated Msg TX-DATA request message
3256 * Function : fillDlMsgTxDataReq
3259 * - fills the Dl Dedicated Msg TX-DATA request message
3261 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3262 * @params[in] DlMsgInfo *dlMsgInfo
3263 * @params[in] uint32_t *msgLen
3264 * @params[in] uint16_t pduIndex
3267 * ********************************************************************/
3268 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3270 uint16_t payloadSize;
3271 uint8_t *dlMsgPayload = NULLP;
3272 fapi_api_queue_elem_t *payloadElem = NULLP;
3273 #ifdef INTEL_WLS_MEM
3274 void * wlsHdlr = NULLP;
3277 pduDesc[pduIndex].pdu_index = pduIndex;
3278 pduDesc[pduIndex].num_tlvs = 1;
3281 payloadSize = pdschCfg.codeword[0].tbSize;
3282 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3283 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3284 LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3285 if(dlMsgPayload == NULLP)
3289 payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3290 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3291 memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3293 #ifdef INTEL_WLS_MEM
3294 mtGetWlsHdl(&wlsHdlr);
3295 pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, dlMsgPayload);
3297 pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3299 pduDesc[pduIndex].pdu_length = payloadSize;
3301 #ifdef INTEL_WLS_MEM
3302 addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3304 LWR_MAC_FREE(dlMsgPayload, payloadSize);
3311 /*******************************************************************
3313 * @brief Sends DL TTI Request to PHY
3317 * Function : fillDlTtiReq
3320 * -Sends FAPI DL TTI req to PHY
3322 * @params[in] timing info
3323 * @return ROK - success
3326 * ****************************************************************/
3327 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3332 uint8_t numPduEncoded = 0;
3333 uint16_t cellIdx =0;
3334 uint16_t pduIndex = 0;
3336 SlotIndInfo dlTtiReqTimingInfo;
3337 MacDlSlot *currDlSlot = NULLP;
3338 MacCellCfg macCellCfg;
3340 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3341 fapi_msg_header_t *msgHeader = NULLP;
3342 p_fapi_api_queue_elem_t dlTtiElem;
3343 p_fapi_api_queue_elem_t headerElem;
3344 p_fapi_api_queue_elem_t prevElem;
3346 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3348 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3349 /* consider phy delay */
3350 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
3351 dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3353 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3355 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3357 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3360 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3361 sizeof(fapi_dl_tti_req_t));
3363 /* Fill message header */
3364 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3367 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
3368 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3371 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3372 sizeof(fapi_msg_header_t));
3373 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3374 msgHeader->num_msg = 1;
3375 msgHeader->handle = 0;
3377 /* Fill Dl TTI Request */
3378 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3379 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3380 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3382 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3383 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3384 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3385 nPdu = dlTtiReq->nPdus;
3386 dlTtiReq->nGroup = 0;
3387 if(dlTtiReq->nPdus > 0)
3389 if(currDlSlot->dlInfo.isBroadcastPres)
3391 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3393 if(dlTtiReq->pdus != NULLP)
3395 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3397 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3398 currDlSlot, idx, dlTtiReq->sfn);
3402 DU_LOG("\033[1;31m");
3403 DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
3406 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3408 /* Filling SIB1 param */
3409 if(numPduEncoded != nPdu)
3411 rntiType = SI_RNTI_TYPE;
3412 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3413 rntiType, CORESET_TYPE0);
3415 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3416 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3417 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3419 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3424 DU_LOG("\033[1;34m");
3425 DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
3429 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3431 /* Filling RAR param */
3432 rntiType = RA_RNTI_TYPE;
3433 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3434 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3436 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3437 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3438 currDlSlot->dlInfo.rarAlloc->bwp,
3443 DU_LOG("\033[1;32m");
3444 DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
3447 if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3449 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3451 /* Filling Msg4 param */
3452 DU_LOG("\033[1;32m");
3453 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3455 rntiType = TC_RNTI_TYPE;
3456 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3457 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3458 DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
3462 /* Filling other DL msg params */
3463 rntiType = C_RNTI_TYPE;
3464 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3465 &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3466 DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
3471 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3472 &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3473 currDlSlot->dlInfo.dlMsgAlloc->bwp,
3480 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3481 currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3485 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3488 #ifdef ODU_SLOT_IND_DEBUG_LOG
3489 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
3492 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3493 fillUlTtiReq(currTimingInfo, dlTtiElem);
3494 msgHeader->num_msg++;
3496 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3497 fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
3498 msgHeader->num_msg++;
3500 /* send Tx-DATA req message */
3501 sendTxDataReq(dlTtiReqTimingInfo, &currDlSlot->dlInfo, dlTtiElem->p_next->p_next);
3502 if(dlTtiElem->p_next->p_next->p_next)
3504 msgHeader->num_msg++;
3505 prevElem = dlTtiElem->p_next->p_next->p_next;
3508 prevElem = dlTtiElem->p_next->p_next;
3512 #ifdef ODU_SLOT_IND_DEBUG_LOG
3513 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
3516 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3517 fillUlTtiReq(currTimingInfo, dlTtiElem);
3518 msgHeader->num_msg++;
3520 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3521 fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
3522 msgHeader->num_msg++;
3524 prevElem = dlTtiElem->p_next->p_next;
3527 if(macCb.macCell[cellIdx]->state == CELL_STATE_DELETION_IN_PROGRESS)
3529 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3530 lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
3531 msgHeader->num_msg++;
3533 LwrMacSendToL1(headerElem);
3534 memset(currDlSlot, 0, sizeof(MacDlSlot));
3539 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
3540 memset(currDlSlot, 0, sizeof(MacDlSlot));
3546 lwr_mac_procInvalidEvt(&currTimingInfo);
3553 /*******************************************************************
3555 * @brief Sends TX data Request to PHY
3559 * Function : sendTxDataReq
3562 * -Sends FAPI TX data req to PHY
3564 * @params[in] timing info
3565 * @return ROK - success
3568 * ****************************************************************/
3569 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem)
3574 uint16_t pduIndex = 0;
3575 fapi_tx_data_req_t *txDataReq =NULLP;
3576 p_fapi_api_queue_elem_t txDataElem = 0;
3578 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3580 /* send TX_Data request message */
3581 nPdu = calcTxDataReqPduCount(dlInfo);
3584 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3585 if(txDataElem == NULLP)
3587 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
3591 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3592 sizeof(fapi_tx_data_req_t));
3593 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3594 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3595 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3597 txDataReq->sfn = currTimingInfo.sfn;
3598 txDataReq->slot = currTimingInfo.slot;
3599 if(dlInfo->brdcstAlloc.sib1Trans)
3601 fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
3602 dlInfo->brdcstAlloc.sib1Alloc.sib1PdschCfg);
3604 txDataReq->num_pdus++;
3606 if(dlInfo->rarAlloc != NULLP)
3608 fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->rarAlloc->rarInfo,\
3609 dlInfo->rarAlloc->rarPdschCfg);
3611 txDataReq->num_pdus++;
3613 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3614 dlInfo->rarAlloc = NULLP;
3616 if(dlInfo->dlMsgAlloc != NULLP)
3618 fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->dlMsgAlloc->dlMsgInfo,\
3619 dlInfo->dlMsgAlloc->dlMsgPdschCfg);
3621 txDataReq->num_pdus++;
3623 MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3624 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3625 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3626 MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3627 dlInfo->dlMsgAlloc = NULLP;
3630 /* Fill message header */
3631 DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
3632 prevElem->p_next = txDataElem;
3638 /***********************************************************************
3640 * @brief calculates the total size to be allocated for UL TTI Req
3644 * Function : getnPdus
3647 * -calculates the total pdu count to be allocated for UL TTI Req
3649 * @params[in] Pointer to fapi Ul TTI Req
3650 * Pointer to CurrUlSlot
3652 * ********************************************************************/
3654 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3656 uint8_t pduCount = 0;
3658 if(ulTtiReq && currUlSlot)
3660 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3663 ulTtiReq->rachPresent++;
3665 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3670 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3675 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3680 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3689 /***********************************************************************
3691 * @brief Set the value of zero correlation config in PRACH PDU
3695 * Function : setNumCs
3698 * -Set the value of zero correlation config in PRACH PDU
3700 * @params[in] Pointer to zero correlation config
3701 * Pointer to MacCellCfg
3702 * ********************************************************************/
3704 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3708 if(macCellCfg != NULLP)
3710 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3711 *numCs = UnrestrictedSetNcsTable[idx];
3716 /***********************************************************************
3718 * @brief Fills the PRACH PDU in UL TTI Request
3722 * Function : fillPrachPdu
3725 * -Fills the PRACH PDU in UL TTI Request
3727 * @params[in] Pointer to Prach Pdu
3728 * Pointer to CurrUlSlot
3729 * Pointer to macCellCfg
3731 * ********************************************************************/
3734 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3736 if(ulTtiReqPdu != NULLP)
3738 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3739 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3740 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3741 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3742 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3743 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3744 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3745 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3746 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3747 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3748 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3749 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3750 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3751 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3752 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3756 /*******************************************************************
3758 * @brief Filling PUSCH PDU in UL TTI Request
3762 * Function : fillPuschPdu
3764 * Functionality: Filling PUSCH PDU in UL TTI Request
3767 * @return ROK - success
3770 * ****************************************************************/
3771 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3773 if(ulTtiReqPdu != NULLP)
3775 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3776 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3777 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3778 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3779 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3780 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3781 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3782 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3783 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3784 macCellCfg->initialUlBwp.bwp.scs;
3785 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3786 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3787 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3788 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3789 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3790 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3791 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3792 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3793 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3794 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3795 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3796 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3797 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3798 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3799 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3800 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3801 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3802 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3803 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3804 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3805 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3806 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3807 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3808 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3809 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3810 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3811 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3812 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3813 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3814 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3815 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3816 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3817 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3818 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3819 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3820 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3821 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3822 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3823 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3824 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3825 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3826 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3827 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3828 /* numCb is 0 for new transmission */
3829 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3831 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3835 /*******************************************************************
3837 * @brief Fill PUCCH PDU in Ul TTI Request
3841 * Function : fillPucchPdu
3843 * Functionality: Fill PUCCH PDU in Ul TTI Request
3846 * @return ROK - success
3849 * ****************************************************************/
3850 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3851 MacUlSlot *currUlSlot)
3853 if(ulTtiReqPdu != NULLP)
3855 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3856 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3857 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3858 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3859 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3860 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3861 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3862 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3863 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3864 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3865 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3867 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3868 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3869 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3870 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3871 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
3872 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
3873 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3874 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3875 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3877 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
3879 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3880 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
3881 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
3882 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
3883 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
3884 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
3885 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3886 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3887 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3888 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3889 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3890 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3891 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3892 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3893 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3894 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3896 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3902 /*******************************************************************
3904 * @brief Sends UL TTI Request to PHY
3908 * Function : fillUlTtiReq
3911 * -Sends FAPI Param req to PHY
3913 * @params[in] Pointer to CmLteTimingInfo
3914 * @return ROK - success
3917 ******************************************************************/
3918 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
3921 uint16_t cellIdx =0;
3922 uint8_t pduIdx = -1;
3923 SlotIndInfo ulTtiReqTimingInfo;
3924 MacUlSlot *currUlSlot = NULLP;
3925 MacCellCfg macCellCfg;
3926 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3927 p_fapi_api_queue_elem_t ulTtiElem;
3929 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3931 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3932 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3935 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
3936 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
3938 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3941 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3942 sizeof(fapi_ul_tti_req_t));
3943 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3944 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3945 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3946 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3947 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3948 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3949 ulTtiReq->nGroup = 0;
3950 if(ulTtiReq->nPdus > 0)
3952 /* Fill Prach Pdu */
3953 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3956 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3959 /* Fill PUSCH PDU */
3960 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3963 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3965 /* Fill PUCCH PDU */
3966 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3969 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3973 #ifdef ODU_SLOT_IND_DEBUG_LOG
3974 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
3976 prevElem->p_next = ulTtiElem;
3978 memset(currUlSlot, 0, sizeof(MacUlSlot));
3983 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
3984 memset(currUlSlot, 0, sizeof(MacUlSlot));
3990 lwr_mac_procInvalidEvt(&currTimingInfo);
3997 /*******************************************************************
3999 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4003 * Function : fillUlDciPdu
4006 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4008 * @params[in] Pointer to fapi_dl_dci_t
4009 * Pointer to DciInfo
4012 ******************************************************************/
4013 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4015 if(ulDciPtr != NULLP)
4017 uint8_t numBytes =0;
4021 uint8_t coreset1Size = 0;
4022 uint16_t rbStart = 0;
4024 uint8_t dciFormatId = 0;
4025 uint32_t freqDomResAssign =0;
4026 uint8_t timeDomResAssign =0;
4027 uint8_t freqHopFlag =0;
4028 uint8_t modNCodScheme =0;
4030 uint8_t redundancyVer = 0;
4031 uint8_t harqProcessNum = 0;
4032 uint8_t puschTpc = 0;
4033 uint8_t ul_SlInd = 0;
4035 /* Size(in bits) of each field in DCI format 0_0 */
4036 uint8_t dciFormatIdSize = 1;
4037 uint8_t freqDomResAssignSize = 0;
4038 uint8_t timeDomResAssignSize = 4;
4039 uint8_t freqHopFlagSize = 1;
4040 uint8_t modNCodSchemeSize = 5;
4041 uint8_t ndiSize = 1;
4042 uint8_t redundancyVerSize = 2;
4043 uint8_t harqProcessNumSize = 4;
4044 uint8_t puschTpcSize = 2;
4045 uint8_t ul_SlIndSize = 1;
4047 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4048 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4049 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4050 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4051 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4052 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4053 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4054 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4055 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4056 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4057 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
4058 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4060 /* Calculating freq domain resource allocation field value and size
4061 * coreset1Size = Size of coreset 1
4062 * RBStart = Starting Virtual Rsource block
4063 * RBLen = length of contiguously allocted RBs
4064 * Spec 38.214 Sec 5.1.2.2.2
4066 if(schDciInfo->formatType == FORMAT0_0)
4068 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4069 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4070 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4072 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4074 if((rbLen - 1) <= floor(coreset1Size / 2))
4075 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4077 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4078 + (coreset1Size - 1 - rbStart);
4080 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4082 /* Fetching DCI field values */
4083 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4084 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4085 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
4086 modNCodScheme = schDciInfo->format.format0_0.mcs;
4087 ndi = schDciInfo->format.format0_0.ndi;
4088 redundancyVer = schDciInfo->format.format0_0.rv;
4089 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
4090 puschTpc = schDciInfo->format.format0_0.tpcCmd;
4091 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
4093 /* Reversing bits in each DCI field */
4094 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4095 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4096 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4097 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4098 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4099 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4100 puschTpc = reverseBits(puschTpc, puschTpcSize);
4101 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4103 /* Calulating total number of bytes in buffer */
4104 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4105 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4106 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4108 numBytes = ulDciPtr->payloadSizeBits / 8;
4109 if(ulDciPtr->payloadSizeBits % 8)
4112 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4114 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
4118 /* Initialize buffer */
4119 for(bytePos = 0; bytePos < numBytes; bytePos++)
4120 ulDciPtr->payload[bytePos] = 0;
4122 bytePos = numBytes - 1;
4125 /* Packing DCI format fields */
4126 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4127 dciFormatId, dciFormatIdSize);
4128 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4129 freqDomResAssign, freqDomResAssignSize);
4130 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4131 timeDomResAssign, timeDomResAssignSize);
4132 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4133 freqHopFlag, freqHopFlagSize);
4134 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4135 modNCodScheme, modNCodSchemeSize);
4136 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4138 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4139 redundancyVer, redundancyVerSize);
4140 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4141 harqProcessNum, harqProcessNumSize);
4142 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4143 puschTpc, puschTpcSize);
4144 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4145 ul_SlInd, ul_SlIndSize);
4147 } /* fillUlDciPdu */
4149 /*******************************************************************
4151 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4155 * Function : fillUlDciPdcchPdu
4158 * -Fills the Pdcch PDU info
4160 * @params[in] Pointer to FAPI DL TTI Req
4161 * Pointer to PdcchCfg
4164 ******************************************************************/
4165 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4167 if(ulDciReqPdu != NULLP)
4169 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4170 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4171 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4172 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4173 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4174 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4175 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4176 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4177 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4178 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4179 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4180 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4181 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4182 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4183 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4184 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4185 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4187 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4188 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4193 /*******************************************************************
4195 * @brief Sends UL DCI Request to PHY
4199 * Function : fillUlDciReq
4202 * -Sends FAPI Ul Dci req to PHY
4204 * @params[in] Pointer to CmLteTimingInfo
4205 * @return ROK - success
4208 ******************************************************************/
4209 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
4213 uint8_t numPduEncoded = 0;
4214 SlotIndInfo ulDciReqTimingInfo ={0};
4215 MacDlSlot *currDlSlot = NULLP;
4216 fapi_ul_dci_req_t *ulDciReq =NULLP;
4217 p_fapi_api_queue_elem_t ulDciElem;
4219 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4221 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4222 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4223 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4225 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4228 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4229 sizeof(fapi_ul_dci_req_t));
4230 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4231 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4232 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4234 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4235 ulDciReq->slot = ulDciReqTimingInfo.slot;
4236 if(currDlSlot->dlInfo.ulGrant != NULLP)
4238 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4239 if(ulDciReq->numPdus > 0)
4241 /* Fill PDCCH configuration Pdu */
4242 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4244 /* free UL GRANT at SCH */
4245 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4246 currDlSlot->dlInfo.ulGrant = NULLP;
4248 #ifdef ODU_SLOT_IND_DEBUG_LOG
4249 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
4252 prevElem->p_next = ulDciElem;
4257 lwr_mac_procInvalidEvt(&currTimingInfo);
4263 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4266 /* PHY_STATE_IDLE */
4267 #ifdef INTEL_TIMER_MODE
4268 lwr_mac_procIqSamplesReqEvt,
4270 lwr_mac_procParamReqEvt,
4271 lwr_mac_procParamRspEvt,
4272 lwr_mac_procConfigReqEvt,
4273 lwr_mac_procConfigRspEvt,
4274 lwr_mac_procInvalidEvt,
4275 lwr_mac_procInvalidEvt,
4278 /* PHY_STATE_CONFIGURED */
4279 #ifdef INTEL_TIMER_MODE
4280 lwr_mac_procInvalidEvt,
4282 lwr_mac_procParamReqEvt,
4283 lwr_mac_procParamRspEvt,
4284 lwr_mac_procConfigReqEvt,
4285 lwr_mac_procConfigRspEvt,
4286 lwr_mac_procStartReqEvt,
4287 lwr_mac_procInvalidEvt,
4290 /* PHY_STATE_RUNNING */
4291 #ifdef INTEL_TIMER_MODE
4292 lwr_mac_procInvalidEvt,
4294 lwr_mac_procInvalidEvt,
4295 lwr_mac_procInvalidEvt,
4296 lwr_mac_procConfigReqEvt,
4297 lwr_mac_procConfigRspEvt,
4298 lwr_mac_procInvalidEvt,
4299 lwr_mac_procInvalidEvt,
4303 /*******************************************************************
4305 * @brief Sends message to LWR_MAC Fsm Event Handler
4309 * Function : sendToLowerMac
4312 * -Sends message to LowerMac
4314 * @params[in] Message Type
4320 ******************************************************************/
4321 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4323 lwrMacCb.event = msgType;
4324 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4326 /**********************************************************************
4328 **********************************************************************/