1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
28 #include "lwr_mac_phy.h"
32 #include "fapi_vendor_extension.h"
37 #include "lwr_mac_fsm.h"
38 #include "mac_utils.h"
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
48 #define SET_MSG_LEN(x, size) x += size
50 void fapiMacConfigRsp(uint16_t cellId);
51 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
53 /* Global variables */
55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
57 void lwrMacLayerInit()
62 /* Initializing WLS free mem list */
64 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
66 cmLListInit(&wlsBlockToFreeList[idx]);
71 /*******************************************************************
73 * @brief Handles Invalid Request Event
77 * Function : lwr_mac_procInvalidEvt
80 * - Displays the PHY state when the invalid event occurs
83 * @return ROK - success
86 * ****************************************************************/
87 uint8_t lwr_mac_procInvalidEvt(void *msg)
89 printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
94 /*******************************************************************
96 * @brief Fills FAPI message header
100 * Function : fillMsgHeader
103 * -Fills FAPI message header
105 * @params[in] Pointer to header
111 * ****************************************************************/
112 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
114 memset(hdr, 0, sizeof(fapi_msg_t));
115 hdr->msg_id = msgType;
116 hdr->length = msgLen;
119 /*******************************************************************
121 * @brief Fills FAPI Config Request message header
125 * Function : fillTlvs
128 * -Fills FAPI Config Request message header
130 * @params[in] Pointer to TLV
137 * ****************************************************************/
138 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
139 uint32_t value, uint32_t *msgLen)
142 tlv->tl.length = length;
144 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
146 /*******************************************************************
148 * @brief fills the cyclic prefix by comparing the bitmask
152 * Function : fillCyclicPrefix
155 * -checks the value with the bitmask and
156 * fills the cellPtr's cyclic prefix.
158 * @params[in] Pointer to ClCellParam
159 * Value to be compared
162 ********************************************************************/
163 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
165 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
167 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
169 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
171 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
175 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
179 /*******************************************************************
181 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
185 * Function : fillSubcarrierSpaceDl
188 * -checks the value with the bitmask and
189 * fills the cellPtr's subcarrier spacing in DL
191 * @params[in] Pointer to ClCellParam
192 * Value to be compared
195 * ****************************************************************/
197 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
199 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
201 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
203 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
205 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
207 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
209 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
211 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
213 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
217 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
221 /*******************************************************************
223 * @brief fills the downlink bandwidth by comparing the bitmask
227 * Function : fillBandwidthDl
230 * -checks the value with the bitmask and
231 * -fills the cellPtr's DL Bandwidth
233 * @params[in] Pointer to ClCellParam
234 * Value to be compared
237 * ****************************************************************/
239 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
241 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
243 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
245 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
247 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
249 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
251 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
253 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
255 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
257 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
261 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
265 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
269 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
273 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
277 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
281 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
285 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
289 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
291 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
295 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
299 /*******************************************************************
301 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
305 * Function : fillSubcarrierSpaceUl
308 * -checks the value with the bitmask and
309 * -fills cellPtr's subcarrier spacing in UL
311 * @params[in] Pointer to ClCellParam
312 * Value to be compared
315 * ****************************************************************/
317 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
319 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
321 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
323 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
325 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
327 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
329 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
331 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
333 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
337 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
341 /*******************************************************************
343 * @brief fills the uplink bandwidth by comparing the bitmask
347 * Function : fillBandwidthUl
350 * -checks the value with the bitmask and
351 * fills the cellPtr's UL Bandwidth
355 * @params[in] Pointer to ClCellParam
356 * Value to be compared
360 * ****************************************************************/
362 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
364 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
366 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
368 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
370 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
372 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
374 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
376 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
378 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
380 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
384 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
388 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
392 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
396 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
400 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
404 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
408 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
412 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
414 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
418 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
421 /*******************************************************************
423 * @brief fills the CCE maping by comparing the bitmask
427 * Function : fillCCEmaping
430 * -checks the value with the bitmask and
431 * fills the cellPtr's CCE Mapping Type
434 * @params[in] Pointer to ClCellParam
435 * Value to be compared
438 * ****************************************************************/
440 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
442 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
444 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
446 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
448 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
452 (*cellPtr)->cceMappingType = INVALID_VALUE;
456 /*******************************************************************
458 * @brief fills the PUCCH format by comparing the bitmask
462 * Function : fillPucchFormat
465 * -checks the value with the bitmask and
466 * fills the cellPtr's pucch format
469 * @params[in] Pointer to ClCellParam
470 * Value to be compared
473 * ****************************************************************/
475 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
477 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
479 (*cellPtr)->pucchFormats = FORMAT_0;
481 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
483 (*cellPtr)->pucchFormats = FORMAT_1;
485 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
487 (*cellPtr)->pucchFormats = FORMAT_2;
489 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
491 (*cellPtr)->pucchFormats = FORMAT_3;
493 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
495 (*cellPtr)->pucchFormats = FORMAT_4;
499 (*cellPtr)->pucchFormats = INVALID_VALUE;
503 /*******************************************************************
505 * @brief fills the PDSCH Mapping Type by comparing the bitmask
509 * Function : fillPdschMappingType
512 * -checks the value with the bitmask and
513 * fills the cellPtr's PDSCH MappingType
515 * @params[in] Pointer to ClCellParam
516 * Value to be compared
519 * ****************************************************************/
521 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
523 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
525 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
527 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
529 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
533 (*cellPtr)->pdschMappingType = INVALID_VALUE;
537 /*******************************************************************
539 * @brief fills the PDSCH Allocation Type by comparing the bitmask
543 * Function : fillPdschAllocationType
546 * -checks the value with the bitmask and
547 * fills the cellPtr's PDSCH AllocationType
549 * @params[in] Pointer to ClCellParam
550 * Value to be compared
553 * ****************************************************************/
555 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
557 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
559 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
561 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
563 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
567 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
571 /*******************************************************************
573 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
577 * Function : fillPrbMappingType
580 * -checks the value with the bitmask and
581 * fills the cellPtr's PRB Mapping Type
583 * @params[in] Pointer to ClCellParam
584 * Value to be compared
587 ******************************************************************/
588 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
590 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
592 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
594 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
596 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
600 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
604 /*******************************************************************
606 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
610 * Function : fillPdschDmrsConfigType
613 * -checks the value with the bitmask and
614 * fills the cellPtr's DmrsConfig Type
616 * @params[in] Pointer to ClCellParam
617 * Value to be compared
620 ******************************************************************/
622 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
624 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
626 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
628 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
630 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
634 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
638 /*******************************************************************
640 * @brief fills the PDSCH DmrsLength by comparing the bitmask
644 * Function : fillPdschDmrsLength
647 * -checks the value with the bitmask and
648 * fills the cellPtr's PdschDmrsLength
650 * @params[in] Pointer to ClCellParam
651 * Value to be compared
654 ******************************************************************/
655 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
657 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
659 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
661 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
663 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
667 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
671 /*******************************************************************
673 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
677 * Function : fillPdschDmrsAddPos
680 * -checks the value with the bitmask and
681 * fills the cellPtr's Pdsch DmrsAddPos
683 * @params[in] Pointer to ClCellParam
684 * Value to be compared
687 ******************************************************************/
689 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
691 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
693 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
695 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
697 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
699 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
701 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
703 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
705 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
709 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
713 /*******************************************************************
715 * @brief fills the Modulation Order in DL by comparing the bitmask
719 * Function : fillModulationOrderDl
722 * -checks the value with the bitmask and
723 * fills the cellPtr's ModulationOrder in DL.
725 * @params[in] Pointer to ClCellParam
726 * Value to be compared
729 ******************************************************************/
730 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
734 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
738 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
742 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
746 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
750 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
754 /*******************************************************************
756 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
760 * Function : fillPuschDmrsConfigType
763 * -checks the value with the bitmask and
764 * fills the cellPtr's PUSCH DmrsConfigType
766 * @params[in] Pointer to ClCellParam
767 * Value to be compared
770 ******************************************************************/
772 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
774 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
776 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
778 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
780 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
784 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
788 /*******************************************************************
790 * @brief fills the PUSCH DmrsLength by comparing the bitmask
794 * Function : fillPuschDmrsLength
797 * -checks the value with the bitmask and
798 * fills the cellPtr's PUSCH DmrsLength
800 * @params[in] Pointer to ClCellParam
801 * Value to be compared
804 ******************************************************************/
806 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
808 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
810 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
812 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
814 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
818 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
822 /*******************************************************************
824 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
828 * Function : fillPuschDmrsAddPos
831 * -checks the value with the bitmask and
832 * fills the cellPtr's PUSCH DmrsAddPos
834 * @params[in] Pointer to ClCellParam
835 * Value to be compared
838 ******************************************************************/
840 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
842 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
844 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
846 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
848 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
850 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
852 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
854 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
856 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
860 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
864 /*******************************************************************
866 * @brief fills the PUSCH Mapping Type by comparing the bitmask
870 * Function : fillPuschMappingType
873 * -checks the value with the bitmask and
874 * fills the cellPtr's PUSCH MappingType
876 * @params[in] Pointer to ClCellParam
877 * Value to be compared
880 ******************************************************************/
882 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
884 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
886 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
888 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
890 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
894 (*cellPtr)->puschMappingType = INVALID_VALUE;
898 /*******************************************************************
900 * @brief fills the PUSCH Allocation Type by comparing the bitmask
904 * Function : fillPuschAllocationType
907 * -checks the value with the bitmask and
908 * fills the cellPtr's PUSCH AllocationType
910 * @params[in] Pointer to ClCellParam
911 * Value to be compared
914 ******************************************************************/
916 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
918 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
920 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
922 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
924 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
928 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
932 /*******************************************************************
934 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
938 * Function : fillPuschPrbMappingType
941 * -checks the value with the bitmask and
942 * fills the cellPtr's PUSCH PRB MApping Type
944 * @params[in] Pointer to ClCellParam
945 * Value to be compared
948 ******************************************************************/
950 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
952 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
954 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
956 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
958 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
962 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
966 /*******************************************************************
968 * @brief fills the Modulation Order in Ul by comparing the bitmask
972 * Function : fillModulationOrderUl
975 * -checks the value with the bitmask and
976 * fills the cellPtr's Modualtsion Order in UL.
978 * @params[in] Pointer to ClCellParam
979 * Value to be compared
982 ******************************************************************/
984 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
988 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
992 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
996 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1000 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1004 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1008 /*******************************************************************
1010 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1014 * Function : fillPuschAggregationFactor
1017 * -checks the value with the bitmask and
1018 * fills the cellPtr's PUSCH Aggregation Factor
1020 * @params[in] Pointer to ClCellParam
1021 * Value to be compared
1024 ******************************************************************/
1026 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1028 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1030 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1032 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1034 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1036 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1038 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1040 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1042 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1046 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1050 /*******************************************************************
1052 * @brief fills the PRACH Long Format by comparing the bitmask
1056 * Function : fillPrachLongFormat
1059 * -checks the value with the bitmask and
1060 * fills the cellPtr's PRACH Long Format
1062 * @params[in] Pointer to ClCellParam
1063 * Value to be compared
1066 ******************************************************************/
1068 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1070 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1072 (*cellPtr)->prachLongFormats = FORMAT_0;
1074 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1076 (*cellPtr)->prachLongFormats = FORMAT_1;
1078 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1080 (*cellPtr)->prachLongFormats = FORMAT_2;
1082 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1084 (*cellPtr)->prachLongFormats = FORMAT_3;
1088 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1092 /*******************************************************************
1094 * @brief fills the PRACH Short Format by comparing the bitmask
1098 * Function : fillPrachShortFormat
1101 * -checks the value with the bitmask and
1102 * fills the cellPtr's PRACH ShortFormat
1104 * @params[in] Pointer to ClCellParam
1105 * Value to be compared
1108 ******************************************************************/
1110 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1112 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1114 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1116 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1118 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1120 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1122 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1124 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1126 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1128 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1132 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1136 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1140 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1144 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1146 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1150 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1154 /*******************************************************************
1156 * @brief fills the Fd Occasions Type by comparing the bitmask
1160 * Function : fillFdOccasions
1163 * -checks the value with the bitmask and
1164 * fills the cellPtr's Fd Occasions
1166 * @params[in] Pointer to ClCellParam
1167 * Value to be compared
1170 ******************************************************************/
1172 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1176 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1180 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1184 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1188 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1192 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1196 /*******************************************************************
1198 * @brief fills the RSSI Measurement by comparing the bitmask
1202 * Function : fillRssiMeas
1205 * -checks the value with the bitmask and
1206 * fills the cellPtr's RSSI Measurement report
1208 * @params[in] Pointer to ClCellParam
1209 * Value to be compared
1212 ******************************************************************/
1214 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1216 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1218 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1220 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1222 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1226 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1230 /*******************************************************************
1232 * @brief Returns the TLVs value
1236 * Function : getParamValue
1239 * -return TLVs value
1242 * @return ROK - temp
1245 * ****************************************************************/
1247 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1250 posPtr = &tlv->tl.tag;
1251 posPtr += sizeof(tlv->tl.tag);
1252 posPtr += sizeof(tlv->tl.length);
1253 /*TO DO: malloc to SSI memory */
1254 if(type == FAPI_UINT_8)
1256 return(*(uint8_t *)posPtr);
1258 else if(type == FAPI_UINT_16)
1260 return(*(uint16_t *)posPtr);
1262 else if(type == FAPI_UINT_32)
1264 return(*(uint32_t *)posPtr);
1268 DU_LOG("\nLWR_MAC: Value Extraction failed" );
1274 /*******************************************************************
1276 * @brief Modifes the received mibPdu to uint32 bit
1277 * and stores it in MacCellCfg
1281 * Function : setMibPdu
1286 * @params[in] Pointer to mibPdu
1287 * pointer to modified value
1288 ******************************************************************/
1289 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1291 *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
1292 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1293 DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
1296 /*******************************************************************
1298 * @brief Sends FAPI Param req to PHY
1302 * Function : lwr_mac_procParamReqEvt
1305 * -Sends FAPI Param req to PHY
1308 * @return ROK - success
1311 * ****************************************************************/
1313 uint8_t lwr_mac_procParamReqEvt(void *msg)
1316 /* startGuardTimer(); */
1317 fapi_param_req_t *paramReq = NULL;
1318 fapi_msg_header_t *msgHeader;
1319 p_fapi_api_queue_elem_t paramReqElem;
1320 p_fapi_api_queue_elem_t headerElem;
1322 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1323 if(paramReq != NULL)
1325 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1326 sizeof(fapi_tx_data_req_t));
1327 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1328 memset(paramReq, 0, sizeof(fapi_param_req_t));
1329 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1331 /* Fill message header */
1332 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1335 DU_LOG("\nLWR_MAC: Memory allocation failed for param req header");
1336 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1339 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1340 sizeof(fapi_msg_header_t));
1341 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1342 msgHeader->num_msg = 1;
1343 msgHeader->handle = 0;
1345 DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
1346 LwrMacSendToL1(headerElem);
1350 DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
1357 /*******************************************************************
1359 * @brief Sends FAPI Param Response to MAC via PHY
1363 * Function : lwr_mac_procParamRspEvt
1366 * -Sends FAPI Param rsp to MAC via PHY
1369 * @return ROK - success
1372 * ****************************************************************/
1374 uint8_t lwr_mac_procParamRspEvt(void *msg)
1377 /* stopGuardTimer(); */
1379 uint32_t encodedVal;
1380 fapi_param_resp_t *paramRsp;
1381 ClCellParam *cellParam = NULLP;
1383 paramRsp = (fapi_param_resp_t *)msg;
1384 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1386 if(paramRsp != NULLP)
1388 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1389 if(cellParam != NULLP)
1391 DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
1392 if(paramRsp->error_code == MSG_OK)
1394 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1396 switch(paramRsp->tlvs[index].tl.tag)
1398 case FAPI_RELEASE_CAPABILITY_TAG:
1399 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1400 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1402 cellParam->releaseCapability = RELEASE_15;
1406 case FAPI_PHY_STATE_TAG:
1407 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1408 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1410 printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1415 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1416 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1417 if(encodedVal != RFAILED && encodedVal != 0)
1419 cellParam->skipBlankDlConfig = SUPPORTED;
1423 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1427 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1428 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1429 if(encodedVal != RFAILED && encodedVal != 0)
1431 cellParam->skipBlankUlConfig = SUPPORTED;
1435 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1439 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1440 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1443 case FAPI_CYCLIC_PREFIX_TAG:
1444 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1445 if(encodedVal != RFAILED)
1447 fillCyclicPrefix(encodedVal, &cellParam);
1451 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1452 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1453 if(encodedVal != RFAILED)
1455 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1459 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1460 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1461 if(encodedVal != RFAILED)
1463 fillBandwidthDl(encodedVal, &cellParam);
1467 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1468 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1469 if(encodedVal != RFAILED)
1471 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1475 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1476 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1477 if(encodedVal != RFAILED)
1479 fillBandwidthUl(encodedVal, &cellParam);
1483 case FAPI_CCE_MAPPING_TYPE_TAG:
1484 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1485 if(encodedVal != RFAILED)
1487 fillCCEmaping(encodedVal, &cellParam);
1491 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1492 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1493 if(encodedVal != RFAILED && encodedVal != 0)
1495 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1499 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1503 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1504 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1505 if(encodedVal != RFAILED && encodedVal != 0)
1507 cellParam->precoderGranularityCoreset = SUPPORTED;
1511 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1515 case FAPI_PDCCH_MU_MIMO_TAG:
1516 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1517 if(encodedVal != RFAILED && encodedVal != 0)
1519 cellParam->pdcchMuMimo = SUPPORTED;
1523 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1527 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1528 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1529 if(encodedVal != RFAILED && encodedVal != 0)
1531 cellParam->pdcchPrecoderCycling = SUPPORTED;
1535 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1539 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1540 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1543 case FAPI_PUCCH_FORMATS_TAG:
1544 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1545 if(encodedVal != RFAILED)
1547 fillPucchFormat(encodedVal, &cellParam);
1551 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1552 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1555 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1556 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1557 if(encodedVal != RFAILED)
1559 fillPdschMappingType(encodedVal, &cellParam);
1563 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1564 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1565 if(encodedVal != RFAILED)
1567 fillPdschAllocationType(encodedVal, &cellParam);
1571 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1572 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1573 if(encodedVal != RFAILED)
1575 fillPrbMappingType(encodedVal, &cellParam);
1579 case FAPI_PDSCH_CBG_TAG:
1580 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1581 if(encodedVal != RFAILED && encodedVal != 0)
1583 cellParam->pdschCbg = SUPPORTED;
1587 cellParam->pdschCbg = NOT_SUPPORTED;
1591 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1592 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1593 if(encodedVal != RFAILED)
1595 fillPdschDmrsConfigType(encodedVal, &cellParam);
1599 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1600 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1601 if(encodedVal != RFAILED)
1603 fillPdschDmrsLength(encodedVal, &cellParam);
1607 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1608 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1609 if(encodedVal != RFAILED)
1611 fillPdschDmrsAddPos(encodedVal, &cellParam);
1615 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1616 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1619 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1620 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1621 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1623 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1627 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1628 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1629 if(encodedVal != RFAILED)
1631 fillModulationOrderDl(encodedVal, &cellParam);
1635 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1636 cellParam->maxMuMimoUsersDl = \
1637 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1640 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1641 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1642 if(encodedVal != RFAILED && encodedVal != 0)
1644 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1648 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1652 case FAPI_PREMPTIONSUPPORT_TAG:
1653 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1654 if(encodedVal != RFAILED && encodedVal != 0)
1656 cellParam->premptionSupport = SUPPORTED;
1660 cellParam->premptionSupport = NOT_SUPPORTED;
1664 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1665 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1666 if(encodedVal != RFAILED && encodedVal != 0)
1668 cellParam->pdschNonSlotSupport = SUPPORTED;
1672 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1676 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1677 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1678 if(encodedVal != RFAILED && encodedVal != 0)
1680 cellParam->uciMuxUlschInPusch = SUPPORTED;
1684 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1688 case FAPI_UCI_ONLY_PUSCH_TAG:
1689 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1690 if(encodedVal != RFAILED && encodedVal != 0)
1692 cellParam->uciOnlyPusch = SUPPORTED;
1696 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1700 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1701 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1702 if(encodedVal != RFAILED && encodedVal != 0)
1704 cellParam->puschFrequencyHopping = SUPPORTED;
1708 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1712 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1713 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1714 if(encodedVal != RFAILED)
1716 fillPuschDmrsConfig(encodedVal, &cellParam);
1720 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1721 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1722 if(encodedVal != RFAILED)
1724 fillPuschDmrsLength(encodedVal, &cellParam);
1728 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1729 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1730 if(encodedVal != RFAILED)
1732 fillPuschDmrsAddPos(encodedVal, &cellParam);
1736 case FAPI_PUSCH_CBG_TAG:
1737 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1738 if(encodedVal != RFAILED && encodedVal != 0)
1740 cellParam->puschCbg = SUPPORTED;
1744 cellParam->puschCbg = NOT_SUPPORTED;
1748 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1749 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1750 if(encodedVal != RFAILED)
1752 fillPuschMappingType(encodedVal, &cellParam);
1756 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1757 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1758 if(encodedVal != RFAILED)
1760 fillPuschAllocationType(encodedVal, &cellParam);
1764 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1765 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1766 if(encodedVal != RFAILED)
1768 fillPuschPrbMappingType(encodedVal, &cellParam);
1772 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1773 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1774 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1776 cellParam->puschMaxPtrsPorts = encodedVal;
1780 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1781 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1784 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1785 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1788 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1789 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1790 if(encodedVal != RFAILED)
1792 fillModulationOrderUl(encodedVal, &cellParam);
1796 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1797 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1800 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1801 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1802 if(encodedVal != RFAILED && encodedVal != 0)
1804 cellParam->dftsOfdmSupport = SUPPORTED;
1808 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1812 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1813 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1814 if(encodedVal != RFAILED)
1816 fillPuschAggregationFactor(encodedVal, &cellParam);
1820 case FAPI_PRACH_LONG_FORMATS_TAG:
1821 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1822 if(encodedVal != RFAILED)
1824 fillPrachLongFormat(encodedVal, &cellParam);
1828 case FAPI_PRACH_SHORT_FORMATS_TAG:
1829 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1830 if(encodedVal != RFAILED)
1832 fillPrachShortFormat(encodedVal, &cellParam);
1836 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1837 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1838 if(encodedVal != RFAILED && encodedVal != 0)
1840 cellParam->prachRestrictedSets = SUPPORTED;
1844 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1848 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1849 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1850 if(encodedVal != RFAILED)
1852 fillFdOccasions(encodedVal, &cellParam);
1856 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1857 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1858 if(encodedVal != RFAILED)
1860 fillRssiMeas(encodedVal, &cellParam);
1864 //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1868 MAC_FREE(cellParam, sizeof(ClCellParam));
1869 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1874 DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
1880 DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
1886 DU_LOG("\nLWR_MAC: Param Response received from PHY is NULL");
1894 /*******************************************************************
1896 * @brief Sends FAPI Config req to PHY
1900 * Function : lwr_mac_procConfigReqEvt
1903 * -Sends FAPI Config Req to PHY
1906 * @return ROK - success
1909 * ****************************************************************/
1911 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1918 uint32_t msgLen = 0;
1920 MacCellCfg macCfgParams;
1921 fapi_vendor_msg_t *vendorMsg;
1922 fapi_config_req_t *configReq;
1923 fapi_msg_header_t *msgHeader;
1924 p_fapi_api_queue_elem_t headerElem;
1925 p_fapi_api_queue_elem_t vendorMsgQElem;
1926 p_fapi_api_queue_elem_t cfgReqQElem;
1928 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1931 cellId = (uint16_t *)msg;
1932 GET_CELL_IDX(*cellId, cellIdx);
1933 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
1935 /* Fill Cell Configuration in lwrMacCb */
1936 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
1937 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
1938 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
1941 /* Allocte And fill Vendor msg */
1942 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
1945 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
1948 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
1949 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
1950 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
1951 vendorMsg->config_req_vendor.hopping_id = 0;
1952 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
1953 vendorMsg->config_req_vendor.group_hop_flag = 0;
1954 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
1956 /* Fill FAPI config req */
1957 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
1960 DU_LOG("\nLWR_MAC: Memory allocation failed for config req");
1961 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
1964 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
1965 sizeof(fapi_config_req_t));
1967 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
1968 memset(configReq, 0, sizeof(fapi_config_req_t));
1969 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
1970 configReq->number_of_tlvs = 25;
1971 msgLen = sizeof(configReq->number_of_tlvs);
1973 if(macCfgParams.dlCarrCfg.pres)
1975 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
1976 sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
1977 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
1978 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
1979 /* Due to bug in Intel FT code, commenting TLVs that are are not
1980 * needed to avoid error. Must be uncommented when FT bug is fixed */
1981 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
1982 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
1983 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
1984 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
1985 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
1986 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
1988 if(macCfgParams.ulCarrCfg.pres)
1990 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
1991 sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
1992 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
1993 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
1994 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
1995 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
1996 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
1997 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
1998 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
1999 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2001 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2002 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2004 /* fill cell config */
2005 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2006 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2007 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2008 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2010 /* fill SSB configuration */
2011 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2012 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2013 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2014 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2015 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2016 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2018 /* fill PRACH configuration */
2019 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2020 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2021 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2022 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2023 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2024 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2025 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2026 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2027 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2028 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2029 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2030 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2031 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2032 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2033 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2034 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2035 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2036 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2037 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2038 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2039 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2041 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2042 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2043 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2048 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2051 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2052 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2053 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2054 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2056 /* fill SSB table */
2057 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2058 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2059 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2060 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2061 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2062 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2063 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2064 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2066 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2067 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2068 sizeof(uint32_t), mib, &msgLen);
2070 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2071 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2072 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2073 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2074 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2075 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2076 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2077 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2079 /* fill TDD table */
2080 //fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2081 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2082 //fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2083 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
2085 /* fill measurement config */
2086 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2087 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2089 /* fill DMRS Type A Pos */
2090 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2091 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2093 /* Fill message header */
2094 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2097 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2098 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2099 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2102 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2103 sizeof(fapi_msg_header_t));
2104 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2105 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2106 msgHeader->handle = 0;
2108 DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
2109 LwrMacSendToL1(headerElem);
2113 } /* lwr_mac_handleConfigReqEvt */
2115 /*******************************************************************
2117 * @brief Processes config response from phy
2121 * Function : lwr_mac_procConfigRspEvt
2124 * Processes config response from phy
2126 * @params[in] FAPI message pointer
2127 * @return ROK - success
2130 * ****************************************************************/
2132 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2135 fapi_config_resp_t *configRsp;
2136 configRsp = (fapi_config_resp_t *)msg;
2138 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2141 if(configRsp != NULL)
2143 if(configRsp->error_code == MSG_OK)
2145 DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
2146 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2147 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2149 * Store config response into an intermediate struture and send to MAC
2150 * Support LC and LWLC for sending config rsp to MAC
2152 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2156 DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
2162 DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
2168 } /* lwr_mac_procConfigRspEvt */
2170 /*******************************************************************
2172 * @brief Build and send start request to phy
2176 * Function : lwr_mac_procStartReqEvt
2179 * Build and send start request to phy
2181 * @params[in] FAPI message pointer
2182 * @return ROK - success
2185 * ****************************************************************/
2186 uint8_t lwr_mac_procStartReqEvt(void *msg)
2189 fapi_msg_header_t *msgHeader;
2190 fapi_start_req_t *startReq;
2191 fapi_vendor_msg_t *vendorMsg;
2192 p_fapi_api_queue_elem_t headerElem;
2193 p_fapi_api_queue_elem_t startReqElem;
2194 p_fapi_api_queue_elem_t vendorMsgElem;
2196 /* Allocte And fill Vendor msg */
2197 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2200 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in start req");
2203 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2204 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2205 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2206 vendorMsg->start_req_vendor.sfn = 0;
2207 vendorMsg->start_req_vendor.slot = 0;
2208 vendorMsg->start_req_vendor.mode = 1; /* for FDD */
2210 vendorMsg->start_req_vendor.count = 0;
2211 vendorMsg->start_req_vendor.period = 1;
2214 /* Fill FAPI config req */
2215 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2218 DU_LOG("\nLWR_MAC: Memory allocation failed for start req");
2219 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2222 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2223 sizeof(fapi_start_req_t));
2225 startReq = (fapi_start_req_t *)(startReqElem + 1);
2226 memset(startReq, 0, sizeof(fapi_start_req_t));
2227 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2229 /* Fill message header */
2230 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2233 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2234 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2235 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2238 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2239 sizeof(fapi_msg_header_t));
2240 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2241 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2242 msgHeader->handle = 0;
2245 DU_LOG("\nLWR_MAC: Sending Start Request to Phy");
2246 LwrMacSendToL1(headerElem);
2249 } /* lwr_mac_procStartReqEvt */
2251 /*******************************************************************
2253 * @brief Sends FAPI Stop Req to PHY
2257 * Function : lwr_mac_procStopReqEvt
2260 * -Sends FAPI Stop Req to PHY
2263 * @return ROK - success
2266 ********************************************************************/
2268 uint8_t lwr_mac_procStopReqEvt(void *msg)
2271 SlotIndInfo *slotInfo;
2272 fapi_msg_header_t *msgHeader;
2273 fapi_stop_req_t *stopReq;
2274 fapi_vendor_msg_t *vendorMsg;
2275 p_fapi_api_queue_elem_t headerElem;
2276 p_fapi_api_queue_elem_t stopReqElem;
2277 p_fapi_api_queue_elem_t vendorMsgElem;
2279 slotInfo = (SlotIndInfo *)msg;
2281 /* Allocte And fill Vendor msg */
2282 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2285 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in stop req");
2288 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2289 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2290 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2291 vendorMsg->stop_req_vendor.sfn = slotInfo->sfn;
2292 vendorMsg->stop_req_vendor.slot = slotInfo->slot;
2294 /* Fill FAPI stop req */
2295 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2298 DU_LOG("\nLWR_MAC: Memory allocation failed for stop req");
2299 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2302 FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2303 sizeof(fapi_stop_req_t));
2304 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2305 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2306 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2308 /* Fill message header */
2309 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2312 DU_LOG("\nLWR_MAC: Memory allocation failed for header in stop req");
2313 LWR_MAC_FREE(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2314 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2317 FILL_FAPI_LIST_ELEM(headerElem, stopReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2318 sizeof(fapi_msg_header_t));
2319 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2320 msgHeader->num_msg = 2; /* Stop req msg and vendor specific msg */
2321 msgHeader->handle = 0;
2324 DU_LOG("\nLWR_MAC: Sending Stop Request to Phy");
2325 LwrMacSendToL1(headerElem);
2332 /*******************************************************************
2334 * @brief fills SSB PDU required for DL TTI info in MAC
2338 * Function : fillSsbPdu
2341 * -Fills the SSB PDU info
2344 * @params[in] Pointer to FAPI DL TTI Req
2345 * Pointer to RgCellCb
2346 * Pointer to msgLen of DL TTI Info
2349 ******************************************************************/
2351 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2352 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2354 uint32_t mibPayload = 0;
2355 if(dlTtiReqPdu != NULL)
2357 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2358 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2359 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2360 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2361 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2362 /* ssbOfPdufstA to be filled in ssbCfg */
2363 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2364 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2365 /* Bit manipulation for SFN */
2366 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2367 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2368 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2369 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2370 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2371 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2372 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2373 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2374 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2381 /*******************************************************************
2383 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2387 * Function : fillSib1DlDciPdu
2390 * -Fills the Dl DCI PDU
2392 * @params[in] Pointer to fapi_dl_dci_t
2393 * Pointer to PdcchCfg
2396 ******************************************************************/
2398 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2400 if(dlDciPtr != NULLP)
2406 uint16_t coreset0Size;
2409 uint32_t freqDomResAssign;
2410 uint32_t timeDomResAssign;
2412 uint32_t modNCodScheme;
2413 uint8_t redundancyVer;
2414 uint32_t sysInfoInd;
2417 /* Size(in bits) of each field in DCI format 0_1
2418 * as mentioned in spec 38.214 */
2419 uint8_t freqDomResAssignSize;
2420 uint8_t timeDomResAssignSize = 4;
2421 uint8_t VRB2PRBMapSize = 1;
2422 uint8_t modNCodSchemeSize = 5;
2423 uint8_t redundancyVerSize = 2;
2424 uint8_t sysInfoIndSize = 1;
2425 uint8_t reservedSize = 15;
2427 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2428 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2429 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2430 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2431 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2432 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2433 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2434 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2435 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2436 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2437 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2438 dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2440 /* Calculating freq domain resource allocation field value and size
2441 * coreset0Size = Size of coreset 0
2442 * RBStart = Starting Virtual Rsource block
2443 * RBLen = length of contiguously allocted RBs
2444 * Spec 38.214 Sec 5.1.2.2.2
2446 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2447 rbStart = 0; /* For SIB1 */
2448 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2449 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2451 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2453 if((rbLen - 1) <= floor(coreset0Size / 2))
2454 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2456 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2457 + (coreset0Size - 1 - rbStart);
2459 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2462 /* Fetching DCI field values */
2463 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2465 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2467 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2468 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2469 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2472 /* Reversing bits in each DCI field */
2473 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2474 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2475 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2476 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2477 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2478 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2480 /* Calulating total number of bytes in buffer */
2481 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2482 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2483 + sysInfoIndSize + reservedSize;
2485 numBytes = dlDciPtr->payloadSizeBits / 8;
2486 if(dlDciPtr->payloadSizeBits % 8)
2489 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2491 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2495 /* Initialize buffer */
2496 for(bytePos = 0; bytePos < numBytes; bytePos++)
2497 dlDciPtr->payload[bytePos] = 0;
2499 bytePos = numBytes - 1;
2502 /* Packing DCI format fields */
2503 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2504 freqDomResAssign, freqDomResAssignSize);
2505 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2506 timeDomResAssign, timeDomResAssignSize);
2507 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2508 VRB2PRBMap, VRB2PRBMapSize);
2509 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2510 modNCodScheme, modNCodSchemeSize);
2511 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2512 redundancyVer, redundancyVerSize);
2513 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2514 sysInfoInd, sysInfoIndSize);
2515 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2516 reserved, reservedSize);
2519 } /* fillSib1DlDciPdu */
2521 /*******************************************************************
2523 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2527 * Function : fillRarDlDciPdu
2530 * -Fills the Dl DCI PDU
2532 * @params[in] Pointer to fapi_dl_dci_t
2533 * Pointer to PdcchCfg
2536 ******************************************************************/
2538 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2540 if(dlDciPtr != NULLP)
2546 uint16_t coreset0Size;
2549 uint32_t freqDomResAssign;
2550 uint8_t timeDomResAssign;
2552 uint8_t modNCodScheme;
2556 /* Size(in bits) of each field in DCI format 1_0 */
2557 uint8_t freqDomResAssignSize;
2558 uint8_t timeDomResAssignSize = 4;
2559 uint8_t VRB2PRBMapSize = 1;
2560 uint8_t modNCodSchemeSize = 5;
2561 uint8_t tbScalingSize = 2;
2562 uint8_t reservedSize = 16;
2564 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2565 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2566 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2567 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2568 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2569 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2570 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2571 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2572 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2573 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2574 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2575 dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2577 /* Calculating freq domain resource allocation field value and size
2578 * coreset0Size = Size of coreset 0
2579 * RBStart = Starting Virtual Rsource block
2580 * RBLen = length of contiguously allocted RBs
2581 * Spec 38.214 Sec 5.1.2.2.2
2584 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2585 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2586 rbStart = 0; /* For SIB1 */
2587 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2588 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2590 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2592 if((rbLen - 1) <= floor(coreset0Size / 2))
2593 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2595 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2596 + (coreset0Size - 1 - rbStart);
2598 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2601 /* Fetching DCI field values */
2602 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2603 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2604 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2605 tbScaling = 0; /* configured to 0 scaling */
2608 /* Reversing bits in each DCI field */
2609 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2610 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2611 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2612 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2613 tbScaling = reverseBits(tbScaling, tbScalingSize);
2615 /* Calulating total number of bytes in buffer */
2616 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2617 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2619 numBytes = dlDciPtr->payloadSizeBits / 8;
2620 if(dlDciPtr->payloadSizeBits % 8)
2623 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2625 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2629 /* Initialize buffer */
2630 for(bytePos = 0; bytePos < numBytes; bytePos++)
2631 dlDciPtr->payload[bytePos] = 0;
2633 bytePos = numBytes - 1;
2636 /* Packing DCI format fields */
2637 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2638 freqDomResAssign, freqDomResAssignSize);
2639 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2640 timeDomResAssign, timeDomResAssignSize);
2641 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2642 VRB2PRBMap, VRB2PRBMapSize);
2643 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2644 modNCodScheme, modNCodSchemeSize);
2645 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2646 tbScaling, tbScalingSize);
2647 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2648 reserved, reservedSize);
2650 } /* fillRarDlDciPdu */
2652 /*******************************************************************
2654 * @brief fills DL DCI PDU required for DL TTI info in MAC
2658 * Function : fillDlMsgDlDciPdu
2661 * -Fills the Dl DCI PDU
2663 * @params[in] Pointer to fapi_dl_dci_t
2664 * Pointer to PdcchCfg
2667 ******************************************************************/
2668 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2669 DlMsgInfo *dlMsgInfo)
2671 if(dlDciPtr != NULLP)
2677 uint16_t coresetSize = 0;
2678 uint16_t rbStart = 0;
2680 uint8_t dciFormatId;
2681 uint32_t freqDomResAssign;
2682 uint8_t timeDomResAssign;
2684 uint8_t modNCodScheme;
2686 uint8_t redundancyVer = 0;
2687 uint8_t harqProcessNum = 0;
2688 uint8_t dlAssignmentIdx = 0;
2689 uint8_t pucchTpc = 0;
2690 uint8_t pucchResoInd = 0;
2691 uint8_t harqFeedbackInd = 0;
2693 /* Size(in bits) of each field in DCI format 1_0 */
2694 uint8_t dciFormatIdSize = 1;
2695 uint8_t freqDomResAssignSize = 0;
2696 uint8_t timeDomResAssignSize = 4;
2697 uint8_t VRB2PRBMapSize = 1;
2698 uint8_t modNCodSchemeSize = 5;
2699 uint8_t ndiSize = 1;
2700 uint8_t redundancyVerSize = 2;
2701 uint8_t harqProcessNumSize = 4;
2702 uint8_t dlAssignmentIdxSize = 2;
2703 uint8_t pucchTpcSize = 2;
2704 uint8_t pucchResoIndSize = 3;
2705 uint8_t harqFeedbackIndSize = 3;
2707 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2708 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2709 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2710 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2711 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2712 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2713 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2714 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2715 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2716 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2717 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2718 dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2720 /* Calculating freq domain resource allocation field value and size
2721 * coreset0Size = Size of coreset 0
2722 * RBStart = Starting Virtual Rsource block
2723 * RBLen = length of contiguously allocted RBs
2724 * Spec 38.214 Sec 5.1.2.2.2
2726 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2727 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2728 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2730 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2732 if((rbLen - 1) <= floor(coresetSize / 2))
2733 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2735 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2736 + (coresetSize - 1 - rbStart);
2738 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2741 /* Fetching DCI field values */
2742 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
2743 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2744 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2745 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2746 ndi = dlMsgInfo->ndi;
2747 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2748 harqProcessNum = dlMsgInfo->harqProcNum;
2749 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
2750 pucchTpc = dlMsgInfo->pucchTpc;
2751 pucchResoInd = dlMsgInfo->pucchResInd;
2752 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
2754 /* Reversing bits in each DCI field */
2755 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2756 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2757 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2758 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2759 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2760 ndi = reverseBits(ndi, ndiSize);
2761 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2762 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2763 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2764 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2765 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2766 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2769 /* Calulating total number of bytes in buffer */
2770 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2771 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2772 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2773 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2775 numBytes = dlDciPtr->payloadSizeBits / 8;
2776 if(dlDciPtr->payloadSizeBits % 8)
2779 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2781 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2785 /* Initialize buffer */
2786 for(bytePos = 0; bytePos < numBytes; bytePos++)
2787 dlDciPtr->payload[bytePos] = 0;
2789 bytePos = numBytes - 1;
2792 /* Packing DCI format fields */
2793 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2794 dciFormatId, dciFormatIdSize);
2795 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2796 freqDomResAssign, freqDomResAssignSize);
2797 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2798 timeDomResAssign, timeDomResAssignSize);
2799 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2800 VRB2PRBMap, VRB2PRBMapSize);
2801 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2802 modNCodScheme, modNCodSchemeSize);
2803 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2805 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2806 redundancyVer, redundancyVerSize);
2807 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2808 redundancyVer, redundancyVerSize);
2809 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2810 harqProcessNum, harqProcessNumSize);
2811 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2812 dlAssignmentIdx, dlAssignmentIdxSize);
2813 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2814 pucchTpc, pucchTpcSize);
2815 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2816 pucchResoInd, pucchResoIndSize);
2817 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2818 harqFeedbackInd, harqFeedbackIndSize);
2822 /*******************************************************************
2824 * @brief fills PDCCH PDU required for DL TTI info in MAC
2828 * Function : fillPdcchPdu
2831 * -Fills the Pdcch PDU info
2834 * @params[in] Pointer to FAPI DL TTI Req
2835 * Pointer to PdcchCfg
2838 ******************************************************************/
2839 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2840 RntiType rntiType, uint8_t coreSetType)
2842 if(dlTtiReqPdu != NULLP)
2844 PdcchCfg *pdcchInfo = NULLP;
2845 BwpCfg *bwp = NULLP;
2847 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2848 if(rntiType == SI_RNTI_TYPE)
2850 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2851 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2852 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2854 else if(rntiType == RA_RNTI_TYPE)
2856 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2857 bwp = &dlInfo->rarAlloc->bwp;
2858 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2860 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2862 pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2863 bwp = &dlInfo->dlMsgAlloc->bwp;
2864 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2865 &dlInfo->dlMsgAlloc->dlMsgInfo);
2869 DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
2872 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2873 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2874 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2875 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2876 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2877 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2878 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2879 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2880 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2881 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2882 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2883 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
2884 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2885 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2886 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2888 /* Calculating PDU length. Considering only one dl dci pdu for now */
2889 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2895 /*******************************************************************
2897 * @brief fills PDSCH PDU required for DL TTI info in MAC
2901 * Function : fillPdschPdu
2904 * -Fills the Pdsch PDU info
2907 * @params[in] Pointer to FAPI DL TTI Req
2908 * Pointer to PdschCfg
2909 * Pointer to msgLen of DL TTI Info
2912 ******************************************************************/
2914 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2915 BwpCfg bwp, uint16_t pduIndex)
2919 if(dlTtiReqPdu != NULLP)
2921 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2922 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2923 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2924 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2925 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2926 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
2927 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
2928 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
2929 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
2930 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
2931 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
2933 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
2934 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
2935 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
2936 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
2937 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
2938 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
2940 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
2941 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
2942 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
2943 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
2944 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
2945 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
2946 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
2947 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
2948 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
2949 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
2950 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
2951 /* since we are using type-1, hence rbBitmap excluded */
2952 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
2953 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
2954 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
2955 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
2956 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
2957 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
2958 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
2959 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
2960 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2961 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
2962 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2963 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
2964 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
2965 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
2966 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
2967 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
2968 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
2970 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
2974 /***********************************************************************
2976 * @brief calculates the total size to be allocated for DL TTI Req
2980 * Function : calcDlTtiReqPduCount
2983 * -calculates the total pdu count to be allocated for DL TTI Req
2985 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2988 * ********************************************************************/
2989 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
2994 if(dlInfo->isBroadcastPres)
2996 if(dlInfo->brdcstAlloc.ssbTrans)
2998 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3000 /* SSB PDU is filled */
3004 if(dlInfo->brdcstAlloc.sib1Trans)
3006 /* PDCCH and PDSCH PDU is filled */
3010 if(dlInfo->rarAlloc != NULLP)
3012 /* PDCCH and PDSCH PDU is filled */
3015 if(dlInfo->dlMsgAlloc != NULLP)
3017 /* PDCCH and PDSCH PDU is filled */
3023 /***********************************************************************
3025 * @brief calculates the total size to be allocated for DL TTI Req
3029 * Function : calcTxDataReqPduCount
3032 * -calculates the total pdu count to be allocated for DL TTI Req
3034 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3037 * ********************************************************************/
3038 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3042 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3046 if(dlInfo->rarAlloc != NULLP)
3050 if(dlInfo->dlMsgAlloc != NULLP)
3056 /***********************************************************************
3058 * @brief fills the SIB1 TX-DATA request message
3062 * Function : fillSib1TxDataReq
3065 * - fills the SIB1 TX-DATA request message
3067 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3068 * @params[in] macCellCfg consist of SIB1 pdu
3069 * @params[in] uint32_t *msgLen
3070 * @params[in] uint16_t pduIndex
3073 * ********************************************************************/
3074 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
3077 uint32_t pduLen = 0;
3078 uint8_t *sib1TxdataValue = NULLP;
3080 pduDesc[pduIndex].pdu_index = pduIndex;
3081 pduDesc[pduIndex].num_tlvs = 1;
3084 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3085 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3086 pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
3087 LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3088 if(sib1TxdataValue == NULLP)
3092 memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
3093 macCellCfg->sib1Cfg.sib1PduLen);
3094 pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
3096 /* The total length of the PDU description and PDU data */
3097 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3098 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3099 pduDesc[pduIndex].pdu_length = pduLen;
3101 #ifdef INTEL_WLS_MEM
3102 addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (slotIndIdx-1));
3104 LWR_MAC_FREE(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen);
3110 /***********************************************************************
3112 * @brief fills the RAR TX-DATA request message
3116 * Function : fillRarTxDataReq
3119 * - fills the RAR TX-DATA request message
3121 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3122 * @params[in] RarInfo *rarInfo
3123 * @params[in] uint32_t *msgLen
3124 * @params[in] uint16_t pduIndex
3127 * ********************************************************************/
3128 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
3131 uint32_t pduLen = 0;
3132 uint8_t *rarTxdataValue = NULLP;
3134 pduDesc[pduIndex].pdu_index = pduIndex;
3135 pduDesc[pduIndex].num_tlvs = 1;
3138 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3139 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3140 pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3141 LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3142 if(rarTxdataValue == NULLP)
3146 memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3147 pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3149 /* The total length of the PDU description and PDU data */
3150 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3151 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3152 pduDesc[pduIndex].pdu_length = pduLen;
3154 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3155 * But since we did not implement WLS, this has to be done here
3157 #ifdef INTEL_WLS_MEM
3158 addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (slotIndIdx-1));
3160 LWR_MAC_FREE(rarTxdataValue, rarInfo->rarPduLen);
3166 /***********************************************************************
3168 * @brief fills the DL dedicated Msg TX-DATA request message
3172 * Function : fillDlMsgTxDataReq
3175 * - fills the Dl Dedicated Msg TX-DATA request message
3177 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3178 * @params[in] DlMsgInfo *dlMsgInfo
3179 * @params[in] uint32_t *msgLen
3180 * @params[in] uint16_t pduIndex
3183 * ********************************************************************/
3184 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3187 uint32_t pduLen = 0;
3188 uint8_t *dedMsgTxDataValue = NULLP;
3190 pduDesc[pduIndex].pdu_index = pduIndex;
3191 pduDesc[pduIndex].num_tlvs = 1;
3194 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3195 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3196 pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3197 LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3198 if(dedMsgTxDataValue == NULLP)
3202 memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3203 pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3205 /* The total length of the PDU description and PDU data */
3206 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3207 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3208 pduDesc[pduIndex].pdu_length = pduLen;
3210 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3211 * But since we did not implement WLS, this has to be done here
3213 #ifdef INTEL_WLS_MEM
3214 addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (slotIndIdx-1));
3216 LWR_MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3224 /*******************************************************************
3226 * @brief Sends DL TTI Request to PHY
3230 * Function : fillDlTtiReq
3233 * -Sends FAPI DL TTI req to PHY
3235 * @params[in] timing info
3236 * @return ROK - success
3239 * ****************************************************************/
3240 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3245 uint8_t numPduEncoded = 0;
3247 uint16_t pduIndex = 0;
3249 SlotIndInfo dlTtiReqTimingInfo;
3250 MacDlSlot *currDlSlot = NULLP;
3251 MacCellCfg macCellCfg;
3253 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3254 fapi_msg_header_t *msgHeader;
3255 p_fapi_api_queue_elem_t dlTtiElem;
3256 p_fapi_api_queue_elem_t headerElem;
3258 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3260 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3261 /* consider phy delay */
3262 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3264 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3266 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3267 nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
3269 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3272 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3273 sizeof(fapi_dl_tti_req_t));
3275 /* Fill message header */
3276 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3279 DU_LOG("\nLWR_MAC: Memory allocation failed for header in DL TTI req");
3280 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3283 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3284 sizeof(fapi_msg_header_t));
3285 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3286 msgHeader->num_msg = 1;
3287 msgHeader->handle = 0;
3289 /* Fill Dl TTI Request */
3290 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3291 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3292 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3294 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3295 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3296 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3297 nPdu = dlTtiReq->nPdus;
3298 dlTtiReq->nGroup = 0;
3300 if(dlTtiReq->nPdus > 0)
3302 if(currDlSlot->dlInfo.isBroadcastPres)
3304 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3306 if(dlTtiReq->pdus != NULLP)
3308 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3310 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3311 currDlSlot, idx, dlTtiReq->sfn);
3315 printf("\033[1;31m");
3316 DU_LOG("\nLWR_MAC: MIB sent..");
3319 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3321 /* Filling SIB1 param */
3322 if(numPduEncoded != nPdu)
3324 rntiType = SI_RNTI_TYPE;
3325 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3326 rntiType, CORESET_TYPE0);
3328 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3329 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3330 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3335 printf("\033[1;34m");
3336 DU_LOG("\nLWR_MAC: SIB1 sent...");
3340 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3342 /* Filling RAR param */
3343 rntiType = RA_RNTI_TYPE;
3344 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3345 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3347 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3348 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3349 currDlSlot->dlInfo.rarAlloc->bwp,
3354 printf("\033[1;32m");
3355 DU_LOG("\nLWR_MAC: RAR sent...");
3358 if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3360 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3362 /* Filling Msg4 param */
3363 printf("\033[1;32m");
3364 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3366 rntiType = TC_RNTI_TYPE;
3367 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3368 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3369 DU_LOG("\nLWR_MAC: MSG4 sent...");
3373 /* Filling other DL msg params */
3374 rntiType = C_RNTI_TYPE;
3375 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3376 &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3377 DU_LOG("\nLWR_MAC: DL MSG sent...");
3382 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3383 &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3384 currDlSlot->dlInfo.dlMsgAlloc->bwp,
3391 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3392 currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3396 #ifdef ODU_SLOT_IND_DEBUG_LOG
3397 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3399 LwrMacSendToL1(headerElem);
3401 /* send Tx-DATA req message */
3402 sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3406 #ifdef ODU_SLOT_IND_DEBUG_LOG
3407 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3409 LwrMacSendToL1(headerElem);
3411 memset(currDlSlot, 0, sizeof(MacDlSlot));
3416 DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
3417 memset(currDlSlot, 0, sizeof(MacDlSlot));
3423 lwr_mac_procInvalidEvt(&currTimingInfo);
3430 /*******************************************************************
3432 * @brief Sends TX data Request to PHY
3436 * Function : sendTxDataReq
3439 * -Sends FAPI TX data req to PHY
3441 * @params[in] timing info
3442 * @return ROK - success
3445 * ****************************************************************/
3446 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3451 uint16_t pduIndex = 0;
3452 fapi_tx_data_req_t *txDataReq;
3453 fapi_msg_header_t *msgHeader;
3454 p_fapi_api_queue_elem_t txDataElem;
3455 p_fapi_api_queue_elem_t headerElem;
3457 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3459 /* send TX_Data request message */
3460 nPdu = calcTxDataReqPduCount(dlInfo);
3463 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3464 if(txDataElem == NULLP)
3466 DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
3470 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3471 sizeof(fapi_tx_data_req_t));
3472 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3473 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3474 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3476 txDataReq->sfn = currTimingInfo.sfn;
3477 txDataReq->slot = currTimingInfo.slot;
3478 if(dlInfo->brdcstAlloc.sib1Trans)
3480 fillSib1TxDataReq(txDataReq->pdu_desc,
3481 &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3483 txDataReq->num_pdus++;
3485 if(dlInfo->rarAlloc != NULLP)
3487 fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3489 txDataReq->num_pdus++;
3491 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3492 dlInfo->rarAlloc = NULLP;
3494 if(dlInfo->dlMsgAlloc != NULLP)
3496 fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3497 &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3499 txDataReq->num_pdus++;
3501 MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3502 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3503 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3504 MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3505 dlInfo->dlMsgAlloc = NULLP;
3508 /* Fill message header */
3509 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3512 DU_LOG("\nLWR_MAC: Memory allocation failed for TxDataReq header");
3513 LWR_MAC_FREE(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3516 FILL_FAPI_LIST_ELEM(headerElem, txDataElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3517 sizeof(fapi_msg_header_t));
3518 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3519 msgHeader->num_msg = 1;
3520 msgHeader->handle = 0;
3522 DU_LOG("\nLWR_MAC: Sending TX DATA Request");
3523 LwrMacSendToL1(headerElem);
3529 /***********************************************************************
3531 * @brief calculates the total size to be allocated for UL TTI Req
3535 * Function : getnPdus
3538 * -calculates the total pdu count to be allocated for UL TTI Req
3540 * @params[in] Pointer to fapi Ul TTI Req
3541 * Pointer to CurrUlSlot
3543 * ********************************************************************/
3545 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3547 uint8_t pduCount = 0;
3549 if(ulTtiReq && currUlSlot)
3551 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3554 ulTtiReq->rachPresent++;
3556 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3561 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3566 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3571 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3580 /***********************************************************************
3582 * @brief Set the value of zero correlation config in PRACH PDU
3586 * Function : setNumCs
3589 * -Set the value of zero correlation config in PRACH PDU
3591 * @params[in] Pointer to zero correlation config
3592 * Pointer to MacCellCfg
3593 * ********************************************************************/
3595 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3599 if(macCellCfg != NULLP)
3601 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3602 *numCs = UnrestrictedSetNcsTable[idx];
3607 /***********************************************************************
3609 * @brief Fills the PRACH PDU in UL TTI Request
3613 * Function : fillPrachPdu
3616 * -Fills the PRACH PDU in UL TTI Request
3618 * @params[in] Pointer to Prach Pdu
3619 * Pointer to CurrUlSlot
3620 * Pointer to macCellCfg
3622 * ********************************************************************/
3625 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3627 if(ulTtiReqPdu != NULLP)
3629 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3630 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3631 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3632 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3633 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3634 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3635 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3636 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3637 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3638 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3639 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3640 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3641 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3642 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3643 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3647 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3649 if(ulTtiReqPdu != NULLP)
3651 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3652 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3653 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3654 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3655 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3656 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3657 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3658 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3659 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3660 macCellCfg->initialUlBwp.bwp.scs;
3661 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3662 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3663 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3664 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = 2;
3665 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = \
3666 currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3667 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = 0;
3668 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3669 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3670 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3671 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3672 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3673 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3674 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3675 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3676 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3677 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3678 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3679 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3680 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3681 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3682 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3683 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3684 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3685 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3686 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3687 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3688 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3689 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3690 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3691 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3692 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3693 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3694 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3695 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3696 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3697 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3698 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3699 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3700 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3701 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3702 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3703 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3704 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3705 /* numCb is 0 for new transmission */
3706 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3708 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3712 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3713 MacUlSlot *currUlSlot)
3715 if(ulTtiReqPdu != NULLP)
3717 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3718 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3719 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3720 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3721 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3722 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3723 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3724 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3725 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3726 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3727 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3728 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
3729 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3730 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3731 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3732 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3733 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
3734 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
3735 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3736 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3737 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3738 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
3739 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3740 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
3741 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
3742 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
3743 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
3744 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3745 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3746 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3747 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3748 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3749 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3750 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3751 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3752 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3753 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3755 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3761 /*******************************************************************
3763 * @brief Sends UL TTI Request to PHY
3767 * Function : fillUlTtiReq
3770 * -Sends FAPI Param req to PHY
3772 * @params[in] Pointer to CmLteTimingInfo
3773 * @return ROK - success
3776 ******************************************************************/
3777 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3781 uint8_t pduIdx = -1;
3782 SlotIndInfo ulTtiReqTimingInfo;
3783 MacUlSlot *currUlSlot = NULLP;
3784 MacCellCfg macCellCfg;
3785 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3786 fapi_msg_header_t *msgHeader;
3787 p_fapi_api_queue_elem_t ulTtiElem;
3788 p_fapi_api_queue_elem_t headerElem;
3790 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3792 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3793 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3796 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3797 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3799 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3802 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3803 sizeof(fapi_ul_tti_req_t));
3804 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3805 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3806 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3807 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3808 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3809 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3810 ulTtiReq->nGroup = 0;
3811 if(ulTtiReq->nPdus > 0)
3813 /* Fill Prach Pdu */
3814 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3817 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3820 /* Fill PUSCH PDU */
3821 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3824 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3826 /* Fill PUCCH PDU */
3827 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3830 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3834 /* Fill message header */
3835 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3838 DU_LOG("\nLWR_MAC: Memory allocation failed for UL TTI req header");
3839 LWR_MAC_FREE(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3842 FILL_FAPI_LIST_ELEM(headerElem, ulTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3843 sizeof(fapi_msg_header_t));
3844 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3845 msgHeader->num_msg = 1;
3846 msgHeader->handle = 0;
3847 #ifdef ODU_SLOT_IND_DEBUG_LOG
3848 DU_LOG("\nLWR_MAC: Sending UL TTI Request");
3850 LwrMacSendToL1(headerElem);
3852 memset(currUlSlot, 0, sizeof(MacUlSlot));
3857 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
3858 memset(currUlSlot, 0, sizeof(MacUlSlot));
3864 lwr_mac_procInvalidEvt(&currTimingInfo);
3871 /*******************************************************************
3873 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3877 * Function : fillUlDciPdu
3880 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3882 * @params[in] Pointer to fapi_dl_dci_t
3883 * Pointer to DciInfo
3886 ******************************************************************/
3887 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3889 if(ulDciPtr != NULLP)
3895 uint8_t coreset1Size = 0;
3896 uint16_t rbStart = 0;
3898 uint8_t dciFormatId = 0;
3899 uint32_t freqDomResAssign;
3900 uint8_t timeDomResAssign;
3901 uint8_t freqHopFlag;
3902 uint8_t modNCodScheme;
3904 uint8_t redundancyVer = 0;
3905 uint8_t harqProcessNum = 0;
3906 uint8_t puschTpc = 0;
3907 uint8_t ul_SlInd = 0;
3909 /* Size(in bits) of each field in DCI format 0_0 */
3910 uint8_t dciFormatIdSize = 1;
3911 uint8_t freqDomResAssignSize = 0;
3912 uint8_t timeDomResAssignSize = 4;
3913 uint8_t freqHopFlagSize = 1;
3914 uint8_t modNCodSchemeSize = 5;
3915 uint8_t ndiSize = 1;
3916 uint8_t redundancyVerSize = 2;
3917 uint8_t harqProcessNumSize = 4;
3918 uint8_t puschTpcSize = 2;
3919 uint8_t ul_SlIndSize = 1;
3921 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
3922 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
3923 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
3924 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
3925 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
3926 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
3927 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
3928 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
3929 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
3930 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
3931 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
3932 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
3934 /* Calculating freq domain resource allocation field value and size
3935 * coreset1Size = Size of coreset 1
3936 * RBStart = Starting Virtual Rsource block
3937 * RBLen = length of contiguously allocted RBs
3938 * Spec 38.214 Sec 5.1.2.2.2
3940 if(schDciInfo->formatType == FORMAT0_0)
3942 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
3943 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
3944 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
3946 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
3948 if((rbLen - 1) <= floor(coreset1Size / 2))
3949 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
3951 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
3952 + (coreset1Size - 1 - rbStart);
3954 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
3956 /* Fetching DCI field values */
3957 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
3958 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
3959 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
3960 modNCodScheme = schDciInfo->format.format0_0.mcs;
3961 ndi = schDciInfo->format.format0_0.ndi;
3962 redundancyVer = schDciInfo->format.format0_0.rv;
3963 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
3964 puschTpc = schDciInfo->format.format0_0.tpcCmd;
3965 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
3967 /* Reversing bits in each DCI field */
3968 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3969 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3970 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3971 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3972 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3973 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3974 puschTpc = reverseBits(puschTpc, puschTpcSize);
3975 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
3977 /* Calulating total number of bytes in buffer */
3978 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3979 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
3980 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
3982 numBytes = ulDciPtr->payloadSizeBits / 8;
3983 if(ulDciPtr->payloadSizeBits % 8)
3986 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3988 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
3992 /* Initialize buffer */
3993 for(bytePos = 0; bytePos < numBytes; bytePos++)
3994 ulDciPtr->payload[bytePos] = 0;
3996 bytePos = numBytes - 1;
3999 /* Packing DCI format fields */
4000 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4001 dciFormatId, dciFormatIdSize);
4002 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4003 freqDomResAssign, freqDomResAssignSize);
4004 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4005 timeDomResAssign, timeDomResAssignSize);
4006 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4007 freqHopFlag, freqHopFlagSize);
4008 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4009 modNCodScheme, modNCodSchemeSize);
4010 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4012 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4013 redundancyVer, redundancyVerSize);
4014 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4015 harqProcessNum, harqProcessNumSize);
4016 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4017 puschTpc, puschTpcSize);
4018 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4019 ul_SlInd, ul_SlIndSize);
4021 } /* fillUlDciPdu */
4023 /*******************************************************************
4025 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4029 * Function : fillUlDciPdcchPdu
4032 * -Fills the Pdcch PDU info
4034 * @params[in] Pointer to FAPI DL TTI Req
4035 * Pointer to PdcchCfg
4038 ******************************************************************/
4039 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4041 if(ulDciReqPdu != NULLP)
4043 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4044 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4045 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4046 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4047 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4048 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4049 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4050 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4051 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4052 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4053 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4054 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4055 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4056 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4057 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4058 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4059 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4061 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4062 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4067 /*******************************************************************
4069 * @brief Sends UL DCI Request to PHY
4073 * Function : fillUlDciReq
4076 * -Sends FAPI Ul Dci req to PHY
4078 * @params[in] Pointer to CmLteTimingInfo
4079 * @return ROK - success
4082 ******************************************************************/
4083 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
4087 uint8_t numPduEncoded = 0;
4088 SlotIndInfo ulDciReqTimingInfo;
4089 MacDlSlot *currDlSlot = NULLP;
4090 fapi_ul_dci_req_t *ulDciReq;
4091 fapi_msg_header_t *msgHeader;
4092 p_fapi_api_queue_elem_t ulDciElem;
4093 p_fapi_api_queue_elem_t headerElem;
4095 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4097 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4098 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4099 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
4101 if(currDlSlot->dlInfo.ulGrant != NULLP)
4103 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4106 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4107 sizeof(fapi_ul_dci_req_t));
4108 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4109 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4110 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4112 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4113 ulDciReq->slot = ulDciReqTimingInfo.slot;
4114 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4115 if(ulDciReq->numPdus > 0)
4117 /* Fill PDCCH configuration Pdu */
4118 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4120 /* free UL GRANT at SCH */
4121 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4122 currDlSlot->dlInfo.ulGrant = NULLP;
4124 /* Fill message header */
4125 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
4128 DU_LOG("\nLWR_MAC: Memory allocation failed for UL DCI req header");
4129 LWR_MAC_FREE(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4132 FILL_FAPI_LIST_ELEM(headerElem, ulDciElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
4133 sizeof(fapi_msg_header_t));
4134 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
4135 msgHeader->num_msg = 1;
4136 msgHeader->handle = 0;
4137 #ifdef ODU_SLOT_IND_DEBUG_LOG
4138 DU_LOG("\nLWR_MAC: Sending UL DCI Request");
4140 LwrMacSendToL1(headerElem);
4145 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
4146 memset(currDlSlot, 0, sizeof(MacDlSlot));
4153 lwr_mac_procInvalidEvt(&currTimingInfo);
4159 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4162 /* PHY_STATE_IDLE */
4163 lwr_mac_procParamReqEvt,
4164 lwr_mac_procParamRspEvt,
4165 lwr_mac_procConfigReqEvt,
4166 lwr_mac_procConfigRspEvt,
4167 lwr_mac_procInvalidEvt,
4168 lwr_mac_procInvalidEvt,
4171 /* PHY_STATE_CONFIGURED */
4172 lwr_mac_procParamReqEvt,
4173 lwr_mac_procParamRspEvt,
4174 lwr_mac_procConfigReqEvt,
4175 lwr_mac_procConfigRspEvt,
4176 lwr_mac_procStartReqEvt,
4177 lwr_mac_procInvalidEvt,
4180 /* PHY_STATE_RUNNING */
4181 lwr_mac_procInvalidEvt,
4182 lwr_mac_procInvalidEvt,
4183 lwr_mac_procConfigReqEvt,
4184 lwr_mac_procConfigRspEvt,
4185 lwr_mac_procInvalidEvt,
4186 lwr_mac_procStopReqEvt,
4190 /*******************************************************************
4192 * @brief Sends message to LWR_MAC Fsm Event Handler
4196 * Function : sendToLowerMac
4199 * -Sends message to LowerMac
4201 * @params[in] Message Type
4207 ******************************************************************/
4208 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4210 lwrMacCb.event = msgType;
4211 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4213 /**********************************************************************
4215 **********************************************************************/