src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "fapi.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 /* Global variables */
  51 LwrMacCb lwrMacCb;
  52
  53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  54 void fapiMacConfigRsp(uint16_t cellId);
  55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem);
  56 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
  57 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
  58 uint8_t lwr_mac_procStopReqEvt(SlotIndInfo slotInfo, p_fapi_api_queue_elem_t  prevElem);
  59
  60 void lwrMacLayerInit(Region region, Pool pool)
  61 {
  62 #ifdef INTEL_WLS_MEM
  63    uint8_t idx;
  64 #endif
  65
  66    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  67    lwrMacCb.region = region;
  68    lwrMacCb.pool = pool;
  69    lwrMacCb.clCfgDone = TRUE;
  70    lwrMacCb.numCell = 0;
  71    lwrMacCb.phyState = PHY_STATE_IDLE;
  72
  73 #ifdef INTEL_WLS_MEM
  74    /* Initializing WLS free mem list */
  75    lwrMacCb.phySlotIndCntr = 1;
  76    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  77    {
  78       cmLListInit(&wlsBlockToFreeList[idx]);
  79    }
  80 #endif
  81 }
  82
  83 /*******************************************************************
  84  *
  85  * @brief Handles Invalid Request Event
  86  *
  87  * @details
  88  *
  89  *    Function : lwr_mac_procInvalidEvt
  90  *
  91  *    Functionality:
  92  *         - Displays the PHY state when the invalid event occurs
  93  *
  94  * @params[in]
  95  * @return ROK     - success
  96  *         RFAILED - failure
  97  *
  98  * ****************************************************************/
  99 uint8_t lwr_mac_procInvalidEvt(void *msg)
 100 {
 101    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 102    return ROK;
 103 }
 104
 105 #ifdef INTEL_FAPI
 106 /*******************************************************************
 107  *
 108  * @brief Fills FAPI message header
 109  *
 110  * @details
 111  *
 112  *    Function : fillMsgHeader
 113  *
 114  *    Functionality:
 115  *         -Fills FAPI message header
 116  *
 117  * @params[in] Pointer to header
 118  *             Number of messages
 119  *             Messae Type
 120  *             Length of message
 121  * @return void
 122  *
 123  * ****************************************************************/
 124 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 125 {
 126    memset(hdr, 0, sizeof(fapi_msg_t));
 127    hdr->msg_id = msgType;
 128    hdr->length = msgLen;
 129 }
 130
 131 /*******************************************************************
 132  *
 133  * @brief Fills FAPI Config Request message header
 134  *
 135  * @details
 136  *
 137  *    Function : fillTlvs
 138  *
 139  *    Functionality:
 140  *         -Fills FAPI Config Request message header
 141  *
 142  * @params[in] Pointer to TLV
 143  *             Tag
 144  *             Length
 145  *             Value
 146  *             MsgLen
 147  * @return void
 148  *
 149  * ****************************************************************/
 150 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 151       uint32_t value, uint32_t *msgLen)
 152 {
 153    tlv->tl.tag    = tag;
 154    tlv->tl.length = length;
 155    tlv->value     = value;
 156    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 157 }
 158 /*******************************************************************
 159  *
 160  * @brief fills the cyclic prefix by comparing the bitmask
 161  *
 162  * @details
 163  *
 164  *    Function : fillCyclicPrefix
 165  *
 166  *    Functionality:
 167  *         -checks the value with the bitmask and
 168  *          fills the cellPtr's cyclic prefix.
 169  *
 170  * @params[in] Pointer to ClCellParam
 171  *             Value to be compared
 172  * @return void
 173  *
 174  ********************************************************************/
 175 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 176 {
 177    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 178    {
 179       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 180    }
 181    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 182    {
 183       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 184    }
 185    else
 186    {
 187       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 188    }
 189 }
 190
 191 /*******************************************************************
 192  *
 193  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 194  *
 195  * @details
 196  *
 197  *    Function : fillSubcarrierSpaceDl
 198  *
 199  *    Functionality:
 200  *         -checks the value with the bitmask and
 201  *          fills the cellPtr's subcarrier spacing in DL
 202  *
 203  * @params[in] Pointer to ClCellParam
 204  *             Value to be compared
 205  * @return void
 206  *
 207  * ****************************************************************/
 208
 209 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 210 {
 211    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 212    {
 213       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 214    }
 215    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 216    {
 217       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 218    }
 219    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 220    {
 221       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 222    }
 223    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 224    {
 225       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 226    }
 227    else
 228    {
 229       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 230    }
 231 }
 232
 233 /*******************************************************************
 234  *
 235  * @brief fills the downlink bandwidth by comparing the bitmask
 236  *
 237  * @details
 238  *
 239  *    Function : fillBandwidthDl
 240  *
 241  *    Functionality:
 242  *         -checks the value with the bitmask and
 243  *         -fills the cellPtr's DL Bandwidth
 244  *
 245  * @params[in] Pointer to ClCellParam
 246  *             Value to be compared
 247  * @return void
 248  *
 249  * ****************************************************************/
 250
 251 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 252 {
 253    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 254    {
 255       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 256    }
 257    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 258    {
 259       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 260    }
 261    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 262    {
 263       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 264    }
 265    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 266    {
 267       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 268    }
 269    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 270    {
 271       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 272    }
 273    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 274    {
 275       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 276    }
 277    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 278    {
 279       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 280    }
 281    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 282    {
 283       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 284    }
 285    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 286    {
 287       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 288    }
 289    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 290    {
 291       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 292    }
 293    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 294    {
 295       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 296    }
 297    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 298    {
 299       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 300    }
 301    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 302    {
 303       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 304    }
 305    else
 306    {
 307       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 308    }
 309 }
 310
 311 /*******************************************************************
 312  *
 313  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 314  *
 315  * @details
 316  *
 317  *    Function : fillSubcarrierSpaceUl
 318  *
 319  *    Functionality:
 320  *         -checks the value with the bitmask and
 321  *         -fills cellPtr's subcarrier spacing in UL
 322  *
 323  * @params[in] Pointer to ClCellParam
 324  *             Value to be compared
 325  * @return void
 326  *
 327  * ****************************************************************/
 328
 329 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 330 {
 331    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 332    {
 333       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 334    }
 335    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 336    {
 337       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 338    }
 339    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 340    {
 341       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 342    }
 343    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 344    {
 345       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 346    }
 347    else
 348    {
 349       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 350    }
 351 }
 352
 353 /*******************************************************************
 354  *
 355  * @brief fills the uplink bandwidth by comparing the bitmask
 356  *
 357  * @details
 358  *
 359  *    Function : fillBandwidthUl
 360  *
 361  *    Functionality:
 362  *         -checks the value with the bitmask and
 363  *          fills the cellPtr's UL Bandwidth
 364  *
 365  *
 366  *
 367  * @params[in] Pointer to ClCellParam
 368  *             Value to be compared
 369  * @return void
 370  *
 371  *
 372  * ****************************************************************/
 373
 374 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 375 {
 376    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 377    {
 378       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 379    }
 380    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 381    {
 382       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 383    }
 384    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 385    {
 386       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 387    }
 388    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 389    {
 390       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 391    }
 392    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 393    {
 394       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 395    }
 396    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 397    {
 398       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 399    }
 400    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 401    {
 402       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 403    }
 404    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 405    {
 406       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 407    }
 408    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 409    {
 410       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 411    }
 412    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 413    {
 414       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 415    }
 416    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 417    {
 418       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 419    }
 420    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 421    {
 422       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 423    }
 424    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 425    {
 426       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 427    }
 428    else
 429    {
 430       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 431    }
 432 }
 433 /*******************************************************************
 434  *
 435  * @brief fills the CCE maping by comparing the bitmask
 436  *
 437  * @details
 438  *
 439  *    Function : fillCCEmaping
 440  *
 441  *    Functionality:
 442  *         -checks the value with the bitmask and
 443  *          fills the cellPtr's CCE Mapping Type
 444  *
 445  *
 446  * @params[in] Pointer to ClCellParam
 447  *             Value to be compared
 448  * @return void
 449  *
 450  * ****************************************************************/
 451
 452 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 453 {
 454    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 455    {
 456       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 457    }
 458    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 459    {
 460       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 461    }
 462    else
 463    {
 464       (*cellPtr)->cceMappingType = INVALID_VALUE;
 465    }
 466 }
 467
 468 /*******************************************************************
 469  *
 470  * @brief fills the PUCCH format by comparing the bitmask
 471  *
 472  * @details
 473  *
 474  *    Function : fillPucchFormat
 475  *
 476  *    Functionality:
 477  *         -checks the value with the bitmask and
 478  *          fills the cellPtr's pucch format
 479  *
 480  *
 481  * @params[in] Pointer to ClCellParam
 482  *             Value to be compared
 483  * @return void
 484  *
 485  * ****************************************************************/
 486
 487 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 488 {
 489    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 490    {
 491       (*cellPtr)->pucchFormats    = FORMAT_0;
 492    }
 493    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 494    {
 495       (*cellPtr)->pucchFormats    = FORMAT_1;
 496    }
 497    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 498    {
 499       (*cellPtr)->pucchFormats    = FORMAT_2;
 500    }
 501    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 502    {
 503       (*cellPtr)->pucchFormats    = FORMAT_3;
 504    }
 505    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 506    {
 507       (*cellPtr)->pucchFormats    = FORMAT_4;
 508    }
 509    else
 510    {
 511       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 512    }
 513 }
 514
 515 /*******************************************************************
 516  *
 517  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 518  *
 519  * @details
 520  *
 521  *    Function : fillPdschMappingType
 522  *
 523  *    Functionality:
 524  *         -checks the value with the bitmask and
 525  *          fills the cellPtr's PDSCH MappingType
 526  *
 527  * @params[in] Pointer to ClCellParam
 528  *             Value to be compared
 529  * @return void
 530  *
 531  * ****************************************************************/
 532
 533 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 534 {
 535    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 536    {
 537       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 538    }
 539    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 540    {
 541       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 542    }
 543    else
 544    {
 545       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 546    }
 547 }
 548
 549 /*******************************************************************
 550  *
 551  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 552  *
 553  * @details
 554  *
 555  *    Function : fillPdschAllocationType
 556  *
 557  *    Functionality:
 558  *         -checks the value with the bitmask and
 559  *          fills the cellPtr's PDSCH AllocationType
 560  *
 561  * @params[in] Pointer to ClCellParam
 562  *             Value to be compared
 563  * @return void
 564  *
 565  * ****************************************************************/
 566
 567 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 568 {
 569    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 570    {
 571       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 572    }
 573    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 574    {
 575       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 576    }
 577    else
 578    {
 579       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 580    }
 581 }
 582
 583 /*******************************************************************
 584  *
 585  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 586  *
 587  * @details
 588  *
 589  *    Function : fillPrbMappingType
 590  *
 591  *    Functionality:
 592  *         -checks the value with the bitmask and
 593  *          fills the cellPtr's PRB Mapping Type
 594  *
 595  * @params[in] Pointer to ClCellParam
 596  *             Value to be compared
 597  * @return void
 598  *
 599  ******************************************************************/
 600 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 601 {
 602    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 603    {
 604       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 605    }
 606    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 607    {
 608       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 609    }
 610    else
 611    {
 612       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 613    }
 614 }
 615
 616 /*******************************************************************
 617  *
 618  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 619  *
 620  * @details
 621  *
 622  *    Function : fillPdschDmrsConfigType
 623  *
 624  *    Functionality:
 625  *         -checks the value with the bitmask and
 626  *          fills the cellPtr's DmrsConfig Type
 627  *
 628  * @params[in] Pointer to ClCellParam
 629  *             Value to be compared
 630  * @return void
 631  *
 632  ******************************************************************/
 633
 634 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 635 {
 636    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 637    {
 638       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 639    }
 640    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 641    {
 642       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 643    }
 644    else
 645    {
 646       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 647    }
 648 }
 649
 650 /*******************************************************************
 651  *
 652  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 653  *
 654  * @details
 655  *
 656  *    Function : fillPdschDmrsLength
 657  *
 658  *    Functionality:
 659  *         -checks the value with the bitmask and
 660  *          fills the cellPtr's PdschDmrsLength
 661  *
 662  * @params[in] Pointer to ClCellParam
 663  *             Value to be compared
 664  * @return void
 665  *
 666  ******************************************************************/
 667 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 668 {
 669    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 670    {
 671       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 672    }
 673    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 674    {
 675       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 676    }
 677    else
 678    {
 679       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 680    }
 681 }
 682
 683 /*******************************************************************
 684  *
 685  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 686  *
 687  * @details
 688  *
 689  *    Function : fillPdschDmrsAddPos
 690  *
 691  *    Functionality:
 692  *         -checks the value with the bitmask and
 693  *          fills the cellPtr's Pdsch DmrsAddPos
 694  *
 695  * @params[in] Pointer to ClCellParam
 696  *             Value to be compared
 697  * @return void
 698  *
 699  ******************************************************************/
 700
 701 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 702 {
 703    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 704    {
 705       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 706    }
 707    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 708    {
 709       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 710    }
 711    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 712    {
 713       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 714    }
 715    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 716    {
 717       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 718    }
 719    else
 720    {
 721       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 722    }
 723 }
 724
 725 /*******************************************************************
 726  *
 727  * @brief fills the Modulation Order in DL by comparing the bitmask
 728  *
 729  * @details
 730  *
 731  *    Function : fillModulationOrderDl
 732  *
 733  *    Functionality:
 734  *         -checks the value with the bitmask and
 735  *          fills the cellPtr's ModulationOrder in DL.
 736  *
 737  * @params[in] Pointer to ClCellParam
 738  *             Value to be compared
 739  * @return void
 740  *
 741  ******************************************************************/
 742 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 743 {
 744    if(value == 0 )
 745    {
 746       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 747    }
 748    else if(value == 1)
 749    {
 750       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 751    }
 752    else if(value == 2)
 753    {
 754       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 755    }
 756    else if(value == 3)
 757    {
 758       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 759    }
 760    else
 761    {
 762       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 763    }
 764 }
 765
 766 /*******************************************************************
 767  *
 768  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 769  *
 770  * @details
 771  *
 772  *    Function : fillPuschDmrsConfigType
 773  *
 774  *    Functionality:
 775  *         -checks the value with the bitmask and
 776  *          fills the cellPtr's PUSCH DmrsConfigType
 777  *
 778  * @params[in] Pointer to ClCellParam
 779  *             Value to be compared
 780  * @return void
 781  *
 782  ******************************************************************/
 783
 784 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 785 {
 786    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 787    {
 788       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 789    }
 790    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 791    {
 792       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 793    }
 794    else
 795    {
 796       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 797    }
 798 }
 799
 800 /*******************************************************************
 801  *
 802  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 803  *
 804  * @details
 805  *
 806  *    Function : fillPuschDmrsLength
 807  *
 808  *    Functionality:
 809  *         -checks the value with the bitmask and
 810  *          fills the cellPtr's PUSCH DmrsLength
 811  *
 812  * @params[in] Pointer to ClCellParam
 813  *             Value to be compared
 814  * @return void
 815  *
 816  ******************************************************************/
 817
 818 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 819 {
 820    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 821    {
 822       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 823    }
 824    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 825    {
 826       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 827    }
 828    else
 829    {
 830       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 831    }
 832 }
 833
 834 /*******************************************************************
 835  *
 836  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 837  *
 838  * @details
 839  *
 840  *    Function : fillPuschDmrsAddPos
 841  *
 842  *    Functionality:
 843  *         -checks the value with the bitmask and
 844  *          fills the cellPtr's PUSCH DmrsAddPos
 845  *
 846  * @params[in] Pointer to ClCellParam
 847  *             Value to be compared
 848  * @return void
 849  *
 850  ******************************************************************/
 851
 852 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 853 {
 854    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 855    {
 856       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 857    }
 858    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 859    {
 860       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 861    }
 862    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 863    {
 864       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 865    }
 866    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 867    {
 868       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 869    }
 870    else
 871    {
 872       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 873    }
 874 }
 875
 876 /*******************************************************************
 877  *
 878  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 879  *
 880  * @details
 881  *
 882  *    Function : fillPuschMappingType
 883  *
 884  *    Functionality:
 885  *         -checks the value with the bitmask and
 886  *          fills the cellPtr's PUSCH MappingType
 887  *
 888  * @params[in] Pointer to ClCellParam
 889  *             Value to be compared
 890  * @return void
 891  *
 892  ******************************************************************/
 893
 894 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 895 {
 896    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 897    {
 898       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 899    }
 900    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 901    {
 902       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 903    }
 904    else
 905    {
 906       (*cellPtr)->puschMappingType = INVALID_VALUE;
 907    }
 908 }
 909
 910 /*******************************************************************
 911  *
 912  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 913  *
 914  * @details
 915  *
 916  *    Function : fillPuschAllocationType
 917  *
 918  *    Functionality:
 919  *         -checks the value with the bitmask and
 920  *          fills the cellPtr's PUSCH AllocationType
 921  *
 922  * @params[in] Pointer to ClCellParam
 923  *             Value to be compared
 924  * @return void
 925  *
 926  ******************************************************************/
 927
 928 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 929 {
 930    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 931    {
 932       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 933    }
 934    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 935    {
 936       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 937    }
 938    else
 939    {
 940       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 941    }
 942 }
 943
 944 /*******************************************************************
 945  *
 946  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 947  *
 948  * @details
 949  *
 950  *    Function : fillPuschPrbMappingType
 951  *
 952  *    Functionality:
 953  *         -checks the value with the bitmask and
 954  *          fills the cellPtr's PUSCH PRB MApping Type
 955  *
 956  * @params[in] Pointer to ClCellParam
 957  *             Value to be compared
 958  * @return void
 959  *
 960  ******************************************************************/
 961
 962 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 963 {
 964    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 965    {
 966       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 967    }
 968    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 969    {
 970       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 971    }
 972    else
 973    {
 974       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 975    }
 976 }
 977
 978 /*******************************************************************
 979  *
 980  * @brief fills the Modulation Order in Ul by comparing the bitmask
 981  *
 982  * @details
 983  *
 984  *    Function : fillModulationOrderUl
 985  *
 986  *    Functionality:
 987  *         -checks the value with the bitmask and
 988  *          fills the cellPtr's Modualtsion Order in UL.
 989  *
 990  * @params[in] Pointer to ClCellParam
 991  *             Value to be compared
 992  * @return void
 993  *
 994  ******************************************************************/
 995
 996 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
 997 {
 998    if(value == 0)
 999    {
1000       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1001    }
1002    else if(value == 1)
1003    {
1004       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1005    }
1006    else if(value == 2)
1007    {
1008       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1009    }
1010    else if(value == 3)
1011    {
1012       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1013    }
1014    else
1015    {
1016       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1017    }
1018 }
1019
1020 /*******************************************************************
1021  *
1022  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1023  *
1024  * @details
1025  *
1026  *    Function : fillPuschAggregationFactor
1027  *
1028  *    Functionality:
1029  *         -checks the value with the bitmask and
1030  *          fills the cellPtr's PUSCH Aggregation Factor
1031  *
1032  * @params[in] Pointer to ClCellParam
1033  *             Value to be compared
1034  * @return void
1035  *
1036  ******************************************************************/
1037
1038 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1039 {
1040    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1041    {
1042       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1043    }
1044    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1045    {
1046       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1047    }
1048    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1049    {
1050       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1051    }
1052    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1053    {
1054       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1055    }
1056    else
1057    {
1058       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1059    }
1060 }
1061
1062 /*******************************************************************
1063  *
1064  * @brief fills the PRACH Long Format by comparing the bitmask
1065  *
1066  * @details
1067  *
1068  *    Function : fillPrachLongFormat
1069  *
1070  *    Functionality:
1071  *         -checks the value with the bitmask and
1072  *          fills the cellPtr's PRACH Long Format
1073  *
1074  * @params[in] Pointer to ClCellParam
1075  *             Value to be compared
1076  * @return void
1077  *
1078  ******************************************************************/
1079
1080 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1081 {
1082    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1083    {
1084       (*cellPtr)->prachLongFormats    = FORMAT_0;
1085    }
1086    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1087    {
1088       (*cellPtr)->prachLongFormats    = FORMAT_1;
1089    }
1090    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1091    {
1092       (*cellPtr)->prachLongFormats    = FORMAT_2;
1093    }
1094    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1095    {
1096       (*cellPtr)->prachLongFormats    = FORMAT_3;
1097    }
1098    else
1099    {
1100       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1101    }
1102 }
1103
1104 /*******************************************************************
1105  *
1106  * @brief fills the PRACH Short Format by comparing the bitmask
1107  *
1108  * @details
1109  *
1110  *    Function : fillPrachShortFormat
1111  *
1112  *    Functionality:
1113  *         -checks the value with the bitmask and
1114  *          fills the cellPtr's PRACH ShortFormat
1115  *
1116  * @params[in] Pointer to ClCellParam
1117  *             Value to be compared
1118  * @return void
1119  *
1120  ******************************************************************/
1121
1122 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1123 {
1124    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1125    {
1126       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1127    }
1128    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1129    {
1130       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1131    }
1132    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1133    {
1134       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1135    }
1136    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1137    {
1138       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1139    }
1140    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1141    {
1142       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1143    }
1144    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1145    {
1146       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1147    }
1148    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1149    {
1150       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1151    }
1152    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1153    {
1154       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1155    }
1156    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1157    {
1158       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1159    }
1160    else
1161    {
1162       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1163    }
1164 }
1165
1166 /*******************************************************************
1167  *
1168  * @brief fills the Fd Occasions Type by comparing the bitmask
1169  *
1170  * @details
1171  *
1172  *    Function : fillFdOccasions
1173  *
1174  *    Functionality:
1175  *         -checks the value with the bitmask and
1176  *          fills the cellPtr's Fd Occasions
1177  *
1178  * @params[in] Pointer to ClCellParam
1179  *             Value to be compared
1180  * @return void
1181  *
1182  ******************************************************************/
1183
1184 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1185 {
1186    if(value == 0)
1187    {
1188       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1189    }
1190    else if(value == 1)
1191    {
1192       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1193    }
1194    else if(value == 3)
1195    {
1196       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1197    }
1198    else if(value == 4)
1199    {
1200       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1201    }
1202    else
1203    {
1204       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1205    }
1206 }
1207
1208 /*******************************************************************
1209  *
1210  * @brief fills the RSSI Measurement by comparing the bitmask
1211  *
1212  * @details
1213  *
1214  *    Function : fillRssiMeas
1215  *
1216  *    Functionality:
1217  *         -checks the value with the bitmask and
1218  *          fills the cellPtr's RSSI Measurement report
1219  *
1220  * @params[in] Pointer to ClCellParam
1221  *             Value to be compared
1222  * @return void
1223  *
1224  ******************************************************************/
1225
1226 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1227 {
1228    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1229    {
1230       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1231    }
1232    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1233    {
1234       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1235    }
1236    else
1237    {
1238       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1239    }
1240 }
1241
1242 /*******************************************************************
1243  *
1244  * @brief Returns the TLVs value
1245  *
1246  * @details
1247  *
1248  *    Function : getParamValue
1249  *
1250  *    Functionality:
1251  *         -return TLVs value
1252  *
1253  * @params[in]
1254  * @return ROK     - temp
1255  *         RFAILED - failure
1256  *
1257  * ****************************************************************/
1258
1259 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1260 {
1261    void *posPtr;
1262    posPtr   = &tlv->tl.tag;
1263    posPtr   += sizeof(tlv->tl.tag);
1264    posPtr   += sizeof(tlv->tl.length);
1265    /*TO DO: malloc to SSI memory */
1266    if(type == FAPI_UINT_8)
1267    {
1268       return(*(uint8_t *)posPtr);
1269    }
1270    else if(type == FAPI_UINT_16)
1271    {
1272       return(*(uint16_t *)posPtr);
1273    }
1274    else if(type == FAPI_UINT_32)
1275    {
1276       return(*(uint32_t *)posPtr);
1277    }
1278    else
1279    {
1280       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1281       return RFAILED;
1282    }
1283 }
1284 #endif /* FAPI */
1285
1286 /*******************************************************************
1287  *
1288  * @brief Modifes the received mibPdu to uint32 bit
1289  *        and stores it in MacCellCfg
1290  *
1291  * @details
1292  *
1293  *    Function : setMibPdu
1294  *
1295  *    Functionality:
1296  *         -Sets the MibPdu
1297  *
1298  * @params[in] Pointer to mibPdu
1299  *             pointer to modified value
1300  ******************************************************************/
1301 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1302 {
1303    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1304    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1305    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1306 }
1307
1308 /*******************************************************************
1309  *
1310  * @brief Sends FAPI Param req to PHY
1311  *
1312  * @details
1313  *
1314  *    Function : lwr_mac_procParamReqEvt
1315  *
1316  *    Functionality:
1317  *         -Sends FAPI Param req to PHY
1318  *
1319  * @params[in]
1320  * @return ROK     - success
1321  *         RFAILED - failure
1322  *
1323  * ****************************************************************/
1324
1325 uint8_t lwr_mac_procParamReqEvt(void *msg)
1326 {
1327 #ifdef INTEL_FAPI
1328    /* startGuardTimer(); */
1329    fapi_param_req_t         *paramReq = NULL;
1330    fapi_msg_header_t        *msgHeader;
1331    p_fapi_api_queue_elem_t  paramReqElem;
1332    p_fapi_api_queue_elem_t  headerElem;
1333
1334    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1335    if(paramReq != NULL)
1336    {
1337       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1338          sizeof(fapi_tx_data_req_t));
1339       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1340       memset(paramReq, 0, sizeof(fapi_param_req_t));
1341       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1342
1343       /* Fill message header */
1344       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1345       if(!headerElem)
1346       {
1347          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1348          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1349          return RFAILED;
1350       }
1351       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1352          sizeof(fapi_msg_header_t));
1353       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1354       msgHeader->num_msg = 1;
1355       msgHeader->handle = 0;
1356
1357       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1358       LwrMacSendToL1(headerElem);
1359    }
1360    else
1361    {
1362       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1363       return RFAILED;
1364    }
1365 #endif
1366    return ROK;
1367 }
1368
1369 /*******************************************************************
1370  *
1371  * @brief Sends FAPI Param Response to MAC via PHY
1372  *
1373  * @details
1374  *
1375  *    Function : lwr_mac_procParamRspEvt
1376  *
1377  *    Functionality:
1378  *         -Sends FAPI Param rsp to MAC via PHY
1379  *
1380  * @params[in]
1381  * @return ROK     - success
1382  *         RFAILED - failure
1383  *
1384  * ****************************************************************/
1385
1386 uint8_t lwr_mac_procParamRspEvt(void *msg)
1387 {
1388 #ifdef INTEL_FAPI
1389    /* stopGuardTimer(); */
1390    uint8_t index;
1391    uint32_t encodedVal;
1392    fapi_param_resp_t *paramRsp;
1393    ClCellParam *cellParam = NULLP;
1394
1395    paramRsp = (fapi_param_resp_t *)msg;
1396    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1397
1398    if(paramRsp != NULLP)
1399    {
1400       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1401       if(cellParam != NULLP)
1402       {
1403          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1404          if(paramRsp->error_code == MSG_OK)
1405          {
1406             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1407             {
1408                switch(paramRsp->tlvs[index].tl.tag)
1409                {
1410                   case FAPI_RELEASE_CAPABILITY_TAG:
1411                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1412                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1413                      {
1414                         cellParam->releaseCapability = RELEASE_15;
1415                      }
1416                      break;
1417
1418                   case FAPI_PHY_STATE_TAG:
1419                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1420                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1421                      {
1422                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1423                         return RFAILED;
1424                      }
1425                      break;
1426
1427                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1428                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1429                      if(encodedVal != RFAILED && encodedVal != 0)
1430                      {
1431                         cellParam->skipBlankDlConfig = SUPPORTED;
1432                      }
1433                      else
1434                      {
1435                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1436                      }
1437                      break;
1438
1439                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1440                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1441                      if(encodedVal != RFAILED && encodedVal != 0)
1442                      {
1443                         cellParam->skipBlankUlConfig = SUPPORTED;
1444                      }
1445                      else
1446                      {
1447                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1448                      }
1449                      break;
1450
1451                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1452                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1453                      break;
1454
1455                   case FAPI_CYCLIC_PREFIX_TAG:
1456                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1457                      if(encodedVal != RFAILED)
1458                      {
1459                         fillCyclicPrefix(encodedVal, &cellParam);
1460                      }
1461                      break;
1462
1463                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1464                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1465                      if(encodedVal != RFAILED)
1466                      {
1467                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1468                      }
1469                      break;
1470
1471                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1472                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1473                      if(encodedVal != RFAILED)
1474                      {
1475                         fillBandwidthDl(encodedVal, &cellParam);
1476                      }
1477                      break;
1478
1479                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1480                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1481                      if(encodedVal != RFAILED)
1482                      {
1483                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1484                      }
1485                      break;
1486
1487                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1488                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1489                      if(encodedVal != RFAILED)
1490                      {
1491                         fillBandwidthUl(encodedVal, &cellParam);
1492                      }
1493                      break;
1494
1495                   case FAPI_CCE_MAPPING_TYPE_TAG:
1496                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1497                      if(encodedVal != RFAILED)
1498                      {
1499                         fillCCEmaping(encodedVal, &cellParam);
1500                      }
1501                      break;
1502
1503                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1504                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1505                      if(encodedVal != RFAILED && encodedVal != 0)
1506                      {
1507                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1508                      }
1509                      else
1510                      {
1511                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1512                      }
1513                      break;
1514
1515                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1516                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1517                      if(encodedVal != RFAILED && encodedVal != 0)
1518                      {
1519                         cellParam->precoderGranularityCoreset = SUPPORTED;
1520                      }
1521                      else
1522                      {
1523                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1524                      }
1525                      break;
1526
1527                   case FAPI_PDCCH_MU_MIMO_TAG:
1528                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1529                      if(encodedVal != RFAILED && encodedVal != 0)
1530                      {
1531                         cellParam->pdcchMuMimo = SUPPORTED;
1532                      }
1533                      else
1534                      {
1535                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1536                      }
1537                      break;
1538
1539                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1540                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1541                      if(encodedVal != RFAILED && encodedVal != 0)
1542                      {
1543                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1544                      }
1545                      else
1546                      {
1547                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1548                      }
1549                      break;
1550
1551                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1552                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1553                      break;
1554
1555                   case FAPI_PUCCH_FORMATS_TAG:
1556                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1557                      if(encodedVal != RFAILED)
1558                      {
1559                         fillPucchFormat(encodedVal, &cellParam);
1560                      }
1561                      break;
1562
1563                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1564                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1565                      break;
1566
1567                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1568                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1569                      if(encodedVal != RFAILED)
1570                      {
1571                         fillPdschMappingType(encodedVal, &cellParam);
1572                      }
1573                      break;
1574
1575                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1576                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1577                      if(encodedVal != RFAILED)
1578                      {
1579                         fillPdschAllocationType(encodedVal, &cellParam);
1580                      }
1581                      break;
1582
1583                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1584                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1585                      if(encodedVal != RFAILED)
1586                      {
1587                         fillPrbMappingType(encodedVal, &cellParam);
1588                      }
1589                      break;
1590
1591                   case FAPI_PDSCH_CBG_TAG:
1592                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1593                      if(encodedVal != RFAILED && encodedVal != 0)
1594                      {
1595                         cellParam->pdschCbg = SUPPORTED;
1596                      }
1597                      else
1598                      {
1599                         cellParam->pdschCbg = NOT_SUPPORTED;
1600                      }
1601                      break;
1602
1603                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1604                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1605                      if(encodedVal != RFAILED)
1606                      {
1607                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1608                      }
1609                      break;
1610
1611                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1612                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1613                      if(encodedVal != RFAILED)
1614                      {
1615                         fillPdschDmrsLength(encodedVal, &cellParam);
1616                      }
1617                      break;
1618
1619                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1620                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1621                      if(encodedVal != RFAILED)
1622                      {
1623                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1624                      }
1625                      break;
1626
1627                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1628                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1629                      break;
1630
1631                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1632                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1633                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1634                      {
1635                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1636                      }
1637                      break;
1638
1639                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1640                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1641                      if(encodedVal != RFAILED)
1642                      {
1643                         fillModulationOrderDl(encodedVal, &cellParam);
1644                      }
1645                      break;
1646
1647                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1648                      cellParam->maxMuMimoUsersDl         = \
1649                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1650                      break;
1651
1652                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1653                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1654                      if(encodedVal != RFAILED && encodedVal != 0)
1655                      {
1656                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1657                      }
1658                      else
1659                      {
1660                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1661                      }
1662                      break;
1663
1664                   case FAPI_PREMPTIONSUPPORT_TAG:
1665                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1666                      if(encodedVal != RFAILED && encodedVal != 0)
1667                      {
1668                         cellParam->premptionSupport = SUPPORTED;
1669                      }
1670                      else
1671                      {
1672                         cellParam->premptionSupport = NOT_SUPPORTED;
1673                      }
1674                      break;
1675
1676                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1677                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1678                      if(encodedVal != RFAILED && encodedVal != 0)
1679                      {
1680                         cellParam->pdschNonSlotSupport = SUPPORTED;
1681                      }
1682                      else
1683                      {
1684                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1685                      }
1686                      break;
1687
1688                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1689                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1690                      if(encodedVal != RFAILED && encodedVal != 0)
1691                      {
1692                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1693                      }
1694                      else
1695                      {
1696                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1697                      }
1698                      break;
1699
1700                   case FAPI_UCI_ONLY_PUSCH_TAG:
1701                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1702                      if(encodedVal != RFAILED && encodedVal != 0)
1703                      {
1704                         cellParam->uciOnlyPusch = SUPPORTED;
1705                      }
1706                      else
1707                      {
1708                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1709                      }
1710                      break;
1711
1712                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1713                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1714                      if(encodedVal != RFAILED && encodedVal != 0)
1715                      {
1716                         cellParam->puschFrequencyHopping = SUPPORTED;
1717                      }
1718                      else
1719                      {
1720                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1721                      }
1722                      break;
1723
1724                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1725                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1726                      if(encodedVal != RFAILED)
1727                      {
1728                         fillPuschDmrsConfig(encodedVal, &cellParam);
1729                      }
1730                      break;
1731
1732                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1733                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1734                      if(encodedVal != RFAILED)
1735                      {
1736                         fillPuschDmrsLength(encodedVal, &cellParam);
1737                      }
1738                      break;
1739
1740                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1741                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1742                      if(encodedVal != RFAILED)
1743                      {
1744                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1745                      }
1746                      break;
1747
1748                   case FAPI_PUSCH_CBG_TAG:
1749                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1750                      if(encodedVal != RFAILED && encodedVal != 0)
1751                      {
1752                         cellParam->puschCbg = SUPPORTED;
1753                      }
1754                      else
1755                      {
1756                         cellParam->puschCbg = NOT_SUPPORTED;
1757                      }
1758                      break;
1759
1760                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1761                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1762                      if(encodedVal != RFAILED)
1763                      {
1764                         fillPuschMappingType(encodedVal, &cellParam);
1765                      }
1766                      break;
1767
1768                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1769                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1770                      if(encodedVal != RFAILED)
1771                      {
1772                         fillPuschAllocationType(encodedVal, &cellParam);
1773                      }
1774                      break;
1775
1776                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1777                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1778                      if(encodedVal != RFAILED)
1779                      {
1780                         fillPuschPrbMappingType(encodedVal, &cellParam);
1781                      }
1782                      break;
1783
1784                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1785                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1786                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1787                      {
1788                         cellParam->puschMaxPtrsPorts = encodedVal;
1789                      }
1790                      break;
1791
1792                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1793                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1794                      break;
1795
1796                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1797                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1798                      break;
1799
1800                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1801                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1802                      if(encodedVal != RFAILED)
1803                      {
1804                         fillModulationOrderUl(encodedVal, &cellParam);
1805                      }
1806                      break;
1807
1808                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1809                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1810                      break;
1811
1812                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1813                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1814                      if(encodedVal != RFAILED && encodedVal != 0)
1815                      {
1816                         cellParam->dftsOfdmSupport = SUPPORTED;
1817                      }
1818                      else
1819                      {
1820                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1821                      }
1822                      break;
1823
1824                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1825                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1826                      if(encodedVal != RFAILED)
1827                      {
1828                         fillPuschAggregationFactor(encodedVal, &cellParam);
1829                      }
1830                      break;
1831
1832                   case FAPI_PRACH_LONG_FORMATS_TAG:
1833                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1834                      if(encodedVal != RFAILED)
1835                      {
1836                         fillPrachLongFormat(encodedVal, &cellParam);
1837                      }
1838                      break;
1839
1840                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1841                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1842                      if(encodedVal != RFAILED)
1843                      {
1844                         fillPrachShortFormat(encodedVal, &cellParam);
1845                      }
1846                      break;
1847
1848                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1849                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1850                      if(encodedVal != RFAILED && encodedVal != 0)
1851                      {
1852                         cellParam->prachRestrictedSets = SUPPORTED;
1853                      }
1854                      else
1855                      {
1856                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1857                      }
1858                      break;
1859
1860                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1861                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1862                      if(encodedVal != RFAILED)
1863                      {
1864                         fillFdOccasions(encodedVal, &cellParam);
1865                      }
1866                      break;
1867
1868                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1869                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1870                      if(encodedVal != RFAILED)
1871                      {
1872                         fillRssiMeas(encodedVal, &cellParam);
1873                      }
1874                      break;
1875                   default:
1876                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1877                      break;
1878                }
1879             }
1880             MAC_FREE(cellParam, sizeof(ClCellParam));
1881             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1882             return ROK;
1883          }
1884          else
1885          {
1886             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1887             return RFAILED;
1888          }
1889       }
1890       else
1891       {
1892          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1893          return RFAILED;
1894       }
1895    }
1896    else
1897    {
1898       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1899       return RFAILED;
1900    }
1901 #else
1902    return ROK;
1903 #endif
1904 }
1905
1906 #ifdef INTEL_TIMER_MODE
1907 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1908 {
1909    void * wlsHdlr = NULLP;
1910    fapi_msg_header_t *msgHeader;
1911    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1912    p_fapi_api_queue_elem_t  headerElem;
1913    p_fapi_api_queue_elem_t  iqSampleElem;
1914    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1915
1916    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1917
1918    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1919
1920    /* Fill IQ sample req */
1921    mtGetWlsHdl(&wlsHdlr);
1922    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1923       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1924    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1925    if(!iqSampleElem)
1926    {
1927       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1928       return RFAILED;
1929    }
1930    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1931       sizeof(fapi_vendor_ext_iq_samples_req_t));
1932
1933    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1934    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1935    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1936       sizeof(fapi_vendor_ext_iq_samples_req_t));
1937
1938    iqSampleReq->iq_samples_info.carrNum = 0;
1939    iqSampleReq->iq_samples_info.numSubframes = 40;
1940    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1941    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1942    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1943    iqSampleReq->iq_samples_info.startFrameNum = 0;
1944    iqSampleReq->iq_samples_info.startSlotNum = 0;
1945    iqSampleReq->iq_samples_info.startSymNum = 0;
1946    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1947    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1948
1949    /* TODO : Fill remaining parameters */
1950
1951    /* Fill message header */
1952    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1953    if(!headerElem)
1954    {
1955       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1956       return RFAILED;
1957    }
1958    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1959      sizeof(fapi_msg_header_t));
1960    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1961    msgHeader->num_msg = 1;
1962    msgHeader->handle = 0;
1963
1964    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1965    LwrMacSendToL1(headerElem);
1966    return ROK;
1967 }
1968 #endif
1969
1970 /*******************************************************************
1971  *
1972  * @brief Sends FAPI Config req to PHY
1973  *
1974  * @details
1975  *
1976  *    Function : lwr_mac_procConfigReqEvt
1977  *
1978  *    Functionality:
1979  *         -Sends FAPI Config Req to PHY
1980  *
1981  * @params[in]
1982  * @return ROK     - success
1983  *         RFAILED - failure
1984  *
1985  * ****************************************************************/
1986
1987 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1988 {
1989 #ifdef INTEL_FAPI
1990 #ifdef NR_TDD
1991    uint8_t slotIdx = 0;
1992    uint8_t symbolIdx =0;
1993 #endif
1994    uint8_t index = 0;
1995    uint16_t *cellId =NULLP;
1996    uint16_t cellIdx =0;
1997    uint32_t msgLen = 0;
1998    uint32_t mib = 0;
1999    MacCellCfg macCfgParams;
2000    fapi_vendor_msg_t *vendorMsg;
2001    fapi_config_req_t *configReq;
2002    fapi_msg_header_t *msgHeader;
2003    p_fapi_api_queue_elem_t  headerElem;
2004    p_fapi_api_queue_elem_t  vendorMsgQElem;
2005    p_fapi_api_queue_elem_t  cfgReqQElem;
2006
2007    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2008          lwrMacCb.phyState);
2009
2010    cellId = (uint16_t *)msg;
2011    GET_CELL_IDX(*cellId, cellIdx);
2012    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2013
2014    /* Fill Cell Configuration in lwrMacCb */
2015    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2016    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2017    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2018    lwrMacCb.numCell++;
2019
2020    /* Allocte And fill Vendor msg */
2021    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2022    if(!vendorMsgQElem)
2023    {
2024       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2025       return RFAILED;
2026    }
2027    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2028    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2029    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2030    vendorMsg->config_req_vendor.hopping_id = 0;
2031    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2032    vendorMsg->config_req_vendor.group_hop_flag = 0;
2033    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2034    vendorMsg->start_req_vendor.sfn = 0;
2035    vendorMsg->start_req_vendor.slot = 0;
2036    vendorMsg->start_req_vendor.mode = 4;
2037 #ifdef DEBUG_MODE
2038    vendorMsg->start_req_vendor.count = 0;
2039    vendorMsg->start_req_vendor.period = 1;
2040 #endif
2041    /* Fill FAPI config req */
2042    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2043    if(!cfgReqQElem)
2044    {
2045       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2046       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2047       return RFAILED;
2048    }
2049    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2050       sizeof(fapi_config_req_t));
2051
2052    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2053    memset(configReq, 0, sizeof(fapi_config_req_t));
2054    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2055    configReq->number_of_tlvs = 25;
2056    msgLen = sizeof(configReq->number_of_tlvs);
2057
2058    if(macCfgParams.dlCarrCfg.pres)
2059    {
2060       fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2061          sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2062       fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2063          sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2064       /* Due to bug in Intel FT code, commenting TLVs that are are not
2065        * needed to avoid error. Must be uncommented when FT bug is fixed */
2066       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2067          sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2068       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2069          sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2070       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2071          sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2072    }
2073    if(macCfgParams.ulCarrCfg.pres)
2074    {
2075       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2076             sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2077       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2078             sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2079       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2080       sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2081       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2082       sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2083       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2084             sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2085    }
2086    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2087    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2088
2089    /* fill cell config */
2090    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2091          sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2092    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2093          sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2094
2095    /* fill SSB configuration */
2096    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2097          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2098    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2099    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2100    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2101          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2102
2103    /* fill PRACH configuration */
2104    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2105    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2106    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2107          sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2108    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2109          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2110    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2111          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2112    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2113          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2114    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2115          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2116    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2117    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2118    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2119          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2120    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2121          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2122    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2123    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2124    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2125       {
2126       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2127       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2128       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2129       &msgLen);
2130       }
2131       else
2132       {
2133       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2134       }*/
2135
2136    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2137          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2138    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2139    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2140
2141    /* fill SSB table */
2142    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2143          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2144    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2145    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2146    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2147          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2148    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2149          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2150
2151    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2152    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2153          sizeof(uint32_t), mib, &msgLen);
2154
2155    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2156          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2157    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2158          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2159    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2160    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2161    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2162    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2163
2164 #ifdef NR_TDD
2165    /* fill TDD table */
2166    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2167    sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2168    for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2169    {
2170       for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2171       {
2172          fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2173                sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2174       }
2175    }
2176 #endif
2177
2178    /* fill measurement config */
2179    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2180    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2181
2182    /* fill DMRS Type A Pos */
2183    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2184          sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2185
2186    /* Fill message header */
2187    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2188    if(!headerElem)
2189    {
2190       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2191       LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2192       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2193       return RFAILED;
2194    }
2195    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2196          sizeof(fapi_msg_header_t));
2197    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2198    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2199    msgHeader->handle = 0;
2200
2201    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2202    LwrMacSendToL1(headerElem);
2203 #endif
2204
2205    return ROK;
2206 } /* lwr_mac_handleConfigReqEvt */
2207
2208 /*******************************************************************
2209  *
2210  * @brief Processes config response from phy
2211  *
2212  * @details
2213  *
2214  *    Function : lwr_mac_procConfigRspEvt
2215  *
2216  *    Functionality:
2217  *          Processes config response from phy
2218  *
2219  * @params[in] FAPI message pointer
2220  * @return ROK     - success
2221  *         RFAILED - failure
2222  *
2223  * ****************************************************************/
2224
2225 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2226 {
2227 #ifdef INTEL_FAPI
2228    fapi_config_resp_t *configRsp;
2229    configRsp = (fapi_config_resp_t *)msg;
2230
2231    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2232          lwrMacCb.phyState);
2233
2234    if(configRsp != NULL)
2235    {
2236       if(configRsp->error_code == MSG_OK)
2237       {
2238          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2239          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2240          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2241          /* TODO :
2242           * Store config response into an intermediate struture and send to MAC
2243           * Support LC and LWLC for sending config rsp to MAC
2244           */
2245          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2246       }
2247       else
2248       {
2249          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2250          return RFAILED;
2251       }
2252    }
2253    else
2254    {
2255       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2256       return RFAILED;
2257    }
2258 #endif
2259
2260    return ROK;
2261 } /* lwr_mac_procConfigRspEvt */
2262
2263 /*******************************************************************
2264  *
2265  * @brief Build and send start request to phy
2266  *
2267  * @details
2268  *
2269  *    Function : lwr_mac_procStartReqEvt
2270  *
2271  *    Functionality:
2272  *       Build and send start request to phy
2273  *
2274  * @params[in] FAPI message pointer
2275  * @return ROK     - success
2276  *         RFAILED - failure
2277  *
2278  * ****************************************************************/
2279 uint8_t lwr_mac_procStartReqEvt(void *msg)
2280 {
2281 #ifdef INTEL_FAPI
2282    fapi_msg_header_t *msgHeader;
2283    fapi_start_req_t *startReq;
2284    fapi_vendor_msg_t *vendorMsg;
2285    p_fapi_api_queue_elem_t  headerElem;
2286    p_fapi_api_queue_elem_t  startReqElem;
2287    p_fapi_api_queue_elem_t  vendorMsgElem;
2288
2289    /* Allocte And fill Vendor msg */
2290    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2291    if(!vendorMsgElem)
2292    {
2293       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2294       return RFAILED;
2295    }
2296    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2297    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2298    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2299    vendorMsg->start_req_vendor.sfn = 0;
2300    vendorMsg->start_req_vendor.slot = 0;
2301    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2302 #ifdef DEBUG_MODE
2303    vendorMsg->start_req_vendor.count = 0;
2304    vendorMsg->start_req_vendor.period = 1;
2305 #endif
2306
2307    /* Fill FAPI config req */
2308    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2309    if(!startReqElem)
2310    {
2311       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2312       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2313       return RFAILED;
2314    }
2315    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2316       sizeof(fapi_start_req_t));
2317
2318    startReq = (fapi_start_req_t *)(startReqElem + 1);
2319    memset(startReq, 0, sizeof(fapi_start_req_t));
2320    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2321
2322    /* Fill message header */
2323    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2324    if(!headerElem)
2325    {
2326       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2327       LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2328       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2329       return RFAILED;
2330    }
2331    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2332       sizeof(fapi_msg_header_t));
2333    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2334    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2335    msgHeader->handle = 0;
2336
2337    /* Send to PHY */
2338    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2339    LwrMacSendToL1(headerElem);
2340 #endif
2341    return ROK;
2342 } /* lwr_mac_procStartReqEvt */
2343
2344 /*******************************************************************
2345  *
2346  * @brief Sends FAPI Stop Req to PHY
2347  *
2348  * @details
2349  *
2350  *    Function : lwr_mac_procStopReqEvt
2351  *
2352  *    Functionality:
2353  *         -Sends FAPI Stop Req to PHY
2354  *
2355  * @params[in]
2356  * @return ROK     - success
2357  *         RFAILED - failure
2358  *
2359  ********************************************************************/
2360
2361 uint8_t lwr_mac_procStopReqEvt(SlotIndInfo slotInfo, p_fapi_api_queue_elem_t  prevElem)
2362 {
2363 #ifdef INTEL_FAPI
2364    fapi_stop_req_t   *stopReq;
2365    fapi_vendor_msg_t *vendorMsg;
2366    p_fapi_api_queue_elem_t  stopReqElem;
2367    p_fapi_api_queue_elem_t  vendorMsgElem;
2368
2369    /* Allocte And fill Vendor msg */
2370    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2371    if(!vendorMsgElem)
2372    {
2373       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in stop req");
2374       return RFAILED;
2375    }
2376    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2377    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2378    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2379    vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
2380    vendorMsg->stop_req_vendor.slot = slotInfo.slot;
2381
2382    /* Fill FAPI stop req */
2383    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2384    if(!stopReqElem)
2385    {
2386       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2387       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2388       return RFAILED;
2389    }
2390    FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2391       sizeof(fapi_stop_req_t));
2392    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2393    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2394    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2395
2396    /* Send to PHY */
2397    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2398    prevElem->p_next = stopReqElem;
2399
2400 #endif
2401    return ROK;
2402 }
2403
2404 #ifdef INTEL_FAPI
2405 /*******************************************************************
2406  *
2407  * @brief fills SSB PDU required for DL TTI info in MAC
2408  *
2409  * @details
2410  *
2411  *    Function : fillSsbPdu
2412  *
2413  *    Functionality:
2414  *         -Fills the SSB PDU info
2415  *          stored in MAC
2416  *
2417  * @params[in] Pointer to FAPI DL TTI Req
2418  *             Pointer to RgCellCb
2419  *             Pointer to msgLen of DL TTI Info
2420  * @return ROK
2421  *
2422  ******************************************************************/
2423
2424 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2425       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2426 {
2427    uint32_t mibPayload = 0;
2428    if(dlTtiReqPdu != NULL)
2429    {
2430       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2431       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2432       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2433       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2434       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2435       /* ssbOfPdufstA to be filled in ssbCfg */
2436       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2437       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2438       /* Bit manipulation for SFN */
2439       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2440       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2441       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2442       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2443       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2444       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2445       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2446          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2447       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2448
2449       return ROK;
2450    }
2451    return RFAILED;
2452 }
2453
2454 /*******************************************************************
2455  *
2456  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2457  *
2458  * @details
2459  *
2460  *    Function : fillSib1DlDciPdu
2461  *
2462  *    Functionality:
2463  *         -Fills the Dl DCI PDU
2464  *
2465  * @params[in] Pointer to fapi_dl_dci_t
2466  *             Pointer to PdcchCfg
2467  * @return ROK
2468  *
2469  ******************************************************************/
2470
2471 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2472 {
2473    if(dlDciPtr != NULLP)
2474    {
2475       uint8_t numBytes=0;
2476       uint8_t bytePos=0;
2477       uint8_t bitPos=0;
2478
2479       uint16_t coreset0Size=0;
2480       uint16_t rbStart=0;
2481       uint16_t rbLen=0;
2482       uint32_t freqDomResAssign=0;
2483       uint32_t timeDomResAssign=0;
2484       uint8_t  VRB2PRBMap=0;
2485       uint32_t modNCodScheme=0;
2486       uint8_t  redundancyVer=0;
2487       uint32_t sysInfoInd=0;
2488       uint32_t reserved=0;
2489
2490       /* Size(in bits) of each field in DCI format 0_1
2491        * as mentioned in spec 38.214 */
2492       uint8_t freqDomResAssignSize = 0;
2493       uint8_t timeDomResAssignSize = 4;
2494       uint8_t VRB2PRBMapSize       = 1;
2495       uint8_t modNCodSchemeSize    = 5;
2496       uint8_t redundancyVerSize    = 2;
2497       uint8_t sysInfoIndSize       = 1;
2498       uint8_t reservedSize         = 15;
2499
2500       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2501       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2502       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2503       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2504       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2505       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2506       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2507       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2508       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2509       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2510       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2511       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2512
2513       /* Calculating freq domain resource allocation field value and size
2514        * coreset0Size = Size of coreset 0
2515        * RBStart = Starting Virtual Rsource block
2516        * RBLen = length of contiguously allocted RBs
2517        * Spec 38.214 Sec 5.1.2.2.2
2518        */
2519       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2520       rbStart = 0;              /* For SIB1 */
2521       //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2522       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2523
2524       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2525       {
2526          if((rbLen - 1) <= floor(coreset0Size / 2))
2527             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2528          else
2529             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2530                                + (coreset0Size - 1 - rbStart);
2531
2532          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2533       }
2534
2535       /* Fetching DCI field values */
2536       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2537          rowIndex -1;
2538       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2539                          vrbPrbMapping;
2540       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2541       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2542       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2543       reserved         = 0;
2544
2545       /* Reversing bits in each DCI field */
2546       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2547       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2548       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2549       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2550       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2551       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2552
2553       /* Calulating total number of bytes in buffer */
2554       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2555                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2556                                   + sysInfoIndSize + reservedSize;
2557
2558       numBytes = dlDciPtr->payloadSizeBits / 8;
2559       if(dlDciPtr->payloadSizeBits % 8)
2560          numBytes += 1;
2561
2562       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2563       {
2564          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2565          return;
2566       }
2567
2568       /* Initialize buffer */
2569       for(bytePos = 0; bytePos < numBytes; bytePos++)
2570          dlDciPtr->payload[bytePos] = 0;
2571
2572       bytePos = numBytes - 1;
2573       bitPos = 0;
2574
2575       /* Packing DCI format fields */
2576       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2577             freqDomResAssign, freqDomResAssignSize);
2578       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2579             timeDomResAssign, timeDomResAssignSize);
2580       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2581             VRB2PRBMap, VRB2PRBMapSize);
2582       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2583             modNCodScheme, modNCodSchemeSize);
2584       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2585             redundancyVer, redundancyVerSize);
2586       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2587             sysInfoInd, sysInfoIndSize);
2588       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2589             reserved, reservedSize);
2590
2591    }
2592 } /* fillSib1DlDciPdu */
2593
2594 /*******************************************************************
2595  *
2596  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2597  *
2598  * @details
2599  *
2600  *    Function : fillRarDlDciPdu
2601  *
2602  *    Functionality:
2603  *         -Fills the Dl DCI PDU
2604  *
2605  * @params[in] Pointer to fapi_dl_dci_t
2606  *             Pointer to PdcchCfg
2607  * @return ROK
2608  *
2609  ******************************************************************/
2610
2611 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2612 {
2613    if(dlDciPtr != NULLP)
2614    {
2615       uint8_t numBytes =0;
2616       uint8_t bytePos =0;
2617       uint8_t bitPos =0;
2618
2619       uint16_t coreset0Size =0;
2620       uint16_t rbStart =0;
2621       uint16_t rbLen =0;
2622       uint32_t freqDomResAssign =0;
2623       uint8_t timeDomResAssign =0;
2624       uint8_t  VRB2PRBMap =0;
2625       uint8_t modNCodScheme =0;
2626       uint8_t tbScaling =0;
2627       uint32_t reserved =0;
2628
2629       /* Size(in bits) of each field in DCI format 1_0 */
2630       uint8_t freqDomResAssignSize = 0;
2631       uint8_t timeDomResAssignSize = 4;
2632       uint8_t VRB2PRBMapSize       = 1;
2633       uint8_t modNCodSchemeSize    = 5;
2634       uint8_t tbScalingSize        = 2;
2635       uint8_t reservedSize         = 16;
2636
2637       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2638       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2639       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2640       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2641       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2642       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2643       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2644       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2645       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2646       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2647       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2648       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2649
2650       /* Calculating freq domain resource allocation field value and size
2651        * coreset0Size = Size of coreset 0
2652        * RBStart = Starting Virtual Rsource block
2653        * RBLen = length of contiguously allocted RBs
2654        * Spec 38.214 Sec 5.1.2.2.2
2655        */
2656
2657       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2658       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2659       rbStart = 0;              /* For SIB1 */
2660       //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2661       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2662
2663       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2664       {
2665          if((rbLen - 1) <= floor(coreset0Size / 2))
2666             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2667          else
2668             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2669                                + (coreset0Size - 1 - rbStart);
2670
2671          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2672       }
2673
2674       /* Fetching DCI field values */
2675       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2676       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2677       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2678       tbScaling        = 0; /* configured to 0 scaling */
2679       reserved         = 0;
2680
2681       /* Reversing bits in each DCI field */
2682       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2683       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2684       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2685       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2686       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2687
2688       /* Calulating total number of bytes in buffer */
2689       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2690                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2691
2692       numBytes = dlDciPtr->payloadSizeBits / 8;
2693       if(dlDciPtr->payloadSizeBits % 8)
2694          numBytes += 1;
2695
2696       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2697       {
2698          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2699          return;
2700       }
2701
2702       /* Initialize buffer */
2703       for(bytePos = 0; bytePos < numBytes; bytePos++)
2704          dlDciPtr->payload[bytePos] = 0;
2705
2706       bytePos = numBytes - 1;
2707       bitPos = 0;
2708
2709       /* Packing DCI format fields */
2710       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2711             freqDomResAssign, freqDomResAssignSize);
2712       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2713             timeDomResAssign, timeDomResAssignSize);
2714       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2715             VRB2PRBMap, VRB2PRBMapSize);
2716       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2717             modNCodScheme, modNCodSchemeSize);
2718       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2719             tbScaling, tbScalingSize);
2720       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2721             reserved, reservedSize);
2722    }
2723 } /* fillRarDlDciPdu */
2724
2725 /*******************************************************************
2726  *
2727  * @brief fills DL DCI PDU required for DL TTI info in MAC
2728  *
2729  * @details
2730  *
2731  *    Function : fillDlMsgDlDciPdu
2732  *
2733  *    Functionality:
2734  *         -Fills the Dl DCI PDU
2735  *
2736  * @params[in] Pointer to fapi_dl_dci_t
2737  *             Pointer to PdcchCfg
2738  * @return ROK
2739  *
2740  ******************************************************************/
2741 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2742       DlMsgInfo *dlMsgInfo)
2743 {
2744    if(dlDciPtr != NULLP)
2745    {
2746       uint8_t numBytes;
2747       uint8_t bytePos;
2748       uint8_t bitPos;
2749
2750       uint16_t coresetSize = 0;
2751       uint16_t rbStart = 0;
2752       uint16_t rbLen = 0;
2753       uint8_t  dciFormatId;
2754       uint32_t freqDomResAssign;
2755       uint8_t  timeDomResAssign;
2756       uint8_t  VRB2PRBMap;
2757       uint8_t  modNCodScheme;
2758       uint8_t  ndi = 0;
2759       uint8_t  redundancyVer = 0;
2760       uint8_t  harqProcessNum = 0;
2761       uint8_t  dlAssignmentIdx = 0;
2762       uint8_t  pucchTpc = 0;
2763       uint8_t  pucchResoInd = 0;
2764       uint8_t  harqFeedbackInd = 0;
2765
2766       /* Size(in bits) of each field in DCI format 1_0 */
2767       uint8_t dciFormatIdSize    = 1;
2768       uint8_t freqDomResAssignSize = 0;
2769       uint8_t timeDomResAssignSize = 4;
2770       uint8_t VRB2PRBMapSize       = 1;
2771       uint8_t modNCodSchemeSize    = 5;
2772       uint8_t ndiSize              = 1;
2773       uint8_t redundancyVerSize    = 2;
2774       uint8_t harqProcessNumSize   = 4;
2775       uint8_t dlAssignmentIdxSize  = 2;
2776       uint8_t pucchTpcSize         = 2;
2777       uint8_t pucchResoIndSize     = 3;
2778       uint8_t harqFeedbackIndSize  = 3;
2779
2780       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2781       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2782       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2783       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2784       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2785       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2786       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2787       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2788       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2789       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2790       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2791       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2792
2793       /* Calculating freq domain resource allocation field value and size
2794        * coreset0Size = Size of coreset 0
2795        * RBStart = Starting Virtual Rsource block
2796        * RBLen = length of contiguously allocted RBs
2797        * Spec 38.214 Sec 5.1.2.2.2
2798        */
2799       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2800       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2801       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2802
2803       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2804       {
2805          if((rbLen - 1) <= floor(coresetSize / 2))
2806             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2807          else
2808             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2809                                + (coresetSize - 1 - rbStart);
2810
2811          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2812       }
2813
2814       /* Fetching DCI field values */
2815       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
2816       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2817       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2818       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2819       ndi              = dlMsgInfo->ndi;
2820       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2821       harqProcessNum   = dlMsgInfo->harqProcNum;
2822       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
2823       pucchTpc         = dlMsgInfo->pucchTpc;
2824       pucchResoInd     = dlMsgInfo->pucchResInd;
2825       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
2826
2827       /* Reversing bits in each DCI field */
2828       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
2829       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2830       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2831       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2832       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2833       ndi              = reverseBits(ndi, ndiSize);
2834       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2835       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
2836       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2837       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
2838       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
2839       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2840
2841
2842       /* Calulating total number of bytes in buffer */
2843       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2844             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2845             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2846             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2847
2848       numBytes = dlDciPtr->payloadSizeBits / 8;
2849       if(dlDciPtr->payloadSizeBits % 8)
2850          numBytes += 1;
2851
2852       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2853       {
2854          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2855          return;
2856       }
2857
2858       /* Initialize buffer */
2859       for(bytePos = 0; bytePos < numBytes; bytePos++)
2860          dlDciPtr->payload[bytePos] = 0;
2861
2862       bytePos = numBytes - 1;
2863       bitPos = 0;
2864
2865       /* Packing DCI format fields */
2866       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2867             dciFormatId, dciFormatIdSize);
2868       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2869             freqDomResAssign, freqDomResAssignSize);
2870       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2871             timeDomResAssign, timeDomResAssignSize);
2872       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2873             VRB2PRBMap, VRB2PRBMapSize);
2874       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2875             modNCodScheme, modNCodSchemeSize);
2876       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2877             ndi, ndiSize);
2878       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2879             redundancyVer, redundancyVerSize);
2880       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2881             redundancyVer, redundancyVerSize);
2882       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2883             harqProcessNum, harqProcessNumSize);
2884       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2885             dlAssignmentIdx, dlAssignmentIdxSize);
2886       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2887             pucchTpc, pucchTpcSize);
2888       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2889             pucchResoInd, pucchResoIndSize);
2890       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2891             harqFeedbackInd, harqFeedbackIndSize);
2892    }
2893 }
2894
2895 /*******************************************************************
2896  *
2897  * @brief fills PDCCH PDU required for DL TTI info in MAC
2898  *
2899  * @details
2900  *
2901  *    Function : fillPdcchPdu
2902  *
2903  *    Functionality:
2904  *         -Fills the Pdcch PDU info
2905  *          stored in MAC
2906  *
2907  * @params[in] Pointer to FAPI DL TTI Req
2908  *             Pointer to PdcchCfg
2909  * @return ROK
2910  *
2911  ******************************************************************/
2912 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2913       RntiType rntiType, uint8_t coreSetType)
2914 {
2915    if(dlTtiReqPdu != NULLP)
2916    {
2917       PdcchCfg *pdcchInfo = NULLP;
2918       BwpCfg *bwp = NULLP;
2919
2920       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2921       if(rntiType == SI_RNTI_TYPE)
2922       {
2923          pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2924          bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2925          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2926       }
2927       else if(rntiType == RA_RNTI_TYPE)
2928       {
2929          pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2930          bwp = &dlInfo->rarAlloc->bwp;
2931          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2932       }
2933       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2934       {
2935          pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2936          bwp = &dlInfo->dlMsgAlloc->bwp;
2937          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2938             &dlInfo->dlMsgAlloc->dlMsgInfo);
2939       }
2940       else
2941       {
2942          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
2943          return RFAILED;
2944       }
2945       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2946       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2947       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2948       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2949       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2950       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2951       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2952       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2953       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2954       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2955       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2956       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
2957       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2958       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2959       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2960
2961       /* Calculating PDU length. Considering only one dl dci pdu for now */
2962       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2963    }
2964
2965    return ROK;
2966 }
2967
2968 /*******************************************************************
2969  *
2970  * @brief fills PDSCH PDU required for DL TTI info in MAC
2971  *
2972  * @details
2973  *
2974  *    Function : fillPdschPdu
2975  *
2976  *    Functionality:
2977  *         -Fills the Pdsch PDU info
2978  *          stored in MAC
2979  *
2980  * @params[in] Pointer to FAPI DL TTI Req
2981  *             Pointer to PdschCfg
2982  *             Pointer to msgLen of DL TTI Info
2983  * @return ROK
2984  *
2985  ******************************************************************/
2986
2987 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2988       BwpCfg bwp, uint16_t pduIndex)
2989 {
2990    uint8_t idx;
2991
2992    if(dlTtiReqPdu != NULLP)
2993    {
2994       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2995       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2996       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2997       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2998       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2999       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3000       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3001       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3002       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3003       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3004       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3005       {
3006          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3007          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3008          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3009          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3010          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3011          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3012       }
3013       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3014       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3015       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3016       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3017       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3018       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3019       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3020       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3021       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3022       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3023       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3024       /* since we are using type-1, hence rbBitmap excluded */
3025       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3026       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3027       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3028       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3029       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3030       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3031       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3032       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3033       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3034          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3035       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3036          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3037       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3038       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3039       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3040       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3041       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3042
3043       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3044    }
3045 }
3046
3047 /***********************************************************************
3048  *
3049  * @brief calculates the total size to be allocated for DL TTI Req
3050  *
3051  * @details
3052  *
3053  *    Function : calcDlTtiReqPduCount
3054  *
3055  *    Functionality:
3056  *         -calculates the total pdu count to be allocated for DL TTI Req
3057  *
3058  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3059  * @return count
3060  *
3061  * ********************************************************************/
3062 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3063 {
3064    uint8_t count = 0;
3065    uint8_t idx = 0;
3066
3067    if(dlInfo->isBroadcastPres)
3068    {
3069       if(dlInfo->brdcstAlloc.ssbTrans)
3070       {
3071          for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3072          {
3073             /* SSB PDU is filled */
3074             count++;
3075          }
3076       }
3077       if(dlInfo->brdcstAlloc.sib1Trans)
3078       {
3079          /* PDCCH and PDSCH PDU is filled */
3080          count += 2;
3081       }
3082    }
3083    if(dlInfo->rarAlloc != NULLP)
3084    {
3085       /* PDCCH and PDSCH PDU is filled */
3086       count += 2;
3087    }
3088    if(dlInfo->dlMsgAlloc != NULLP)
3089    {
3090       /* PDCCH and PDSCH PDU is filled */
3091       count += 2;
3092    }
3093    return count;
3094 }
3095
3096 /***********************************************************************
3097  *
3098  * @brief calculates the total size to be allocated for DL TTI Req
3099  *
3100  * @details
3101  *
3102  *    Function : calcTxDataReqPduCount
3103  *
3104  *    Functionality:
3105  *         -calculates the total pdu count to be allocated for DL TTI Req
3106  *
3107  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3108  * @return count
3109  *
3110  * ********************************************************************/
3111 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3112 {
3113    uint8_t count = 0;
3114
3115    if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3116    {
3117       count++;
3118    }
3119    if(dlInfo->rarAlloc != NULLP)
3120    {
3121       count++;
3122    }
3123    if(dlInfo->dlMsgAlloc != NULLP)
3124    {
3125       count++;
3126    }
3127    return count;
3128 }
3129 /***********************************************************************
3130  *
3131  * @brief fills the SIB1 TX-DATA request message
3132  *
3133  * @details
3134  *
3135  *    Function : fillSib1TxDataReq
3136  *
3137  *    Functionality:
3138  *         - fills the SIB1 TX-DATA request message
3139  *
3140  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3141  * @params[in]    macCellCfg consist of SIB1 pdu
3142  * @params[in]    uint32_t *msgLen
3143  * @params[in]    uint16_t pduIndex
3144  * @return ROK
3145  *
3146  * ********************************************************************/
3147 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3148       PdschCfg pdschCfg)
3149 {
3150    uint32_t payloadSize = 0;
3151    uint8_t *sib1Payload = NULLP;
3152    fapi_api_queue_elem_t *payloadElem = NULLP;
3153 #ifdef INTEL_WLS_MEM
3154    void * wlsHdlr = NULLP;
3155 #endif
3156
3157    pduDesc[pduIndex].pdu_index = pduIndex;
3158    pduDesc[pduIndex].num_tlvs = 1;
3159
3160    /* fill the TLV */
3161    payloadSize = pdschCfg.codeword[0].tbSize;
3162    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3163    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3164    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3165    if(sib1Payload == NULLP)
3166    {
3167       return RFAILED;
3168    }
3169    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3170    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3171       macCellCfg->sib1Cfg.sib1PduLen);
3172    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
3173
3174 #ifdef INTEL_WLS_MEM
3175    mtGetWlsHdl(&wlsHdlr);
3176    pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, sib1Payload);
3177 #else
3178    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3179 #endif
3180    pduDesc[pduIndex].pdu_length = payloadSize;
3181
3182 #ifdef INTEL_WLS_MEM
3183    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3184 #else
3185    LWR_MAC_FREE(sib1Payload, payloadSize);
3186 #endif
3187
3188    return ROK;
3189 }
3190
3191 /***********************************************************************
3192  *
3193  * @brief fills the RAR TX-DATA request message
3194  *
3195  * @details
3196  *
3197  *    Function : fillRarTxDataReq
3198  *
3199  *    Functionality:
3200  *         - fills the RAR TX-DATA request message
3201  *
3202  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3203  * @params[in]    RarInfo *rarInfo
3204  * @params[in]    uint32_t *msgLen
3205  * @params[in]    uint16_t pduIndex
3206  * @return ROK
3207  *
3208  * ********************************************************************/
3209 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3210 {
3211    uint16_t payloadSize;
3212    uint8_t  *rarPayload = NULLP;
3213    fapi_api_queue_elem_t *payloadElem = NULLP;
3214 #ifdef INTEL_WLS_MEM
3215    void * wlsHdlr = NULLP;
3216 #endif
3217
3218    pduDesc[pduIndex].pdu_index = pduIndex;
3219    pduDesc[pduIndex].num_tlvs = 1;
3220
3221    /* fill the TLV */
3222    payloadSize = pdschCfg.codeword[0].tbSize;
3223    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3224    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3225    LWR_MAC_ALLOC(rarPayload, payloadSize);
3226    if(rarPayload == NULLP)
3227    {
3228       return RFAILED;
3229    }
3230    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3231    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3232    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3233
3234 #ifdef INTEL_WLS_MEM
3235    mtGetWlsHdl(&wlsHdlr);
3236    pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, rarPayload);
3237 #else
3238    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3239 #endif
3240    pduDesc[pduIndex].pdu_length = payloadSize;
3241
3242 #ifdef INTEL_WLS_MEM
3243    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3244 #else
3245    LWR_MAC_FREE(rarPayload, payloadSize);
3246 #endif
3247    return ROK;
3248 }
3249
3250 /***********************************************************************
3251  *
3252  * @brief fills the DL dedicated Msg TX-DATA request message
3253  *
3254  * @details
3255  *
3256  *    Function : fillDlMsgTxDataReq
3257  *
3258  *    Functionality:
3259  *         - fills the Dl Dedicated Msg TX-DATA request message
3260  *
3261  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3262  * @params[in]    DlMsgInfo *dlMsgInfo
3263  * @params[in]    uint32_t *msgLen
3264  * @params[in]    uint16_t pduIndex
3265  * @return ROK
3266  *
3267  * ********************************************************************/
3268 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3269 {
3270    uint16_t payloadSize;
3271    uint8_t  *dlMsgPayload = NULLP;
3272    fapi_api_queue_elem_t *payloadElem = NULLP;
3273 #ifdef INTEL_WLS_MEM
3274    void * wlsHdlr = NULLP;
3275 #endif
3276
3277    pduDesc[pduIndex].pdu_index = pduIndex;
3278    pduDesc[pduIndex].num_tlvs = 1;
3279
3280    /* fill the TLV */
3281    payloadSize = pdschCfg.codeword[0].tbSize;
3282    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3283    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3284    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3285    if(dlMsgPayload == NULLP)
3286    {
3287       return RFAILED;
3288    }
3289    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3290    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3291    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3292
3293 #ifdef INTEL_WLS_MEM
3294    mtGetWlsHdl(&wlsHdlr);
3295    pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, dlMsgPayload);
3296 #else
3297    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3298 #endif
3299    pduDesc[pduIndex].pdu_length = payloadSize;
3300
3301 #ifdef INTEL_WLS_MEM
3302    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3303 #else
3304    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3305 #endif
3306    return ROK;
3307 }
3308
3309 #endif /* FAPI */
3310
3311 /*******************************************************************
3312  *
3313  * @brief Sends DL TTI Request to PHY
3314  *
3315  * @details
3316  *
3317  *    Function : fillDlTtiReq
3318  *
3319  *    Functionality:
3320  *         -Sends FAPI DL TTI req to PHY
3321  *
3322  * @params[in]    timing info
3323  * @return ROK     - success
3324  *         RFAILED - failure
3325  *
3326  * ****************************************************************/
3327 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3328 {
3329 #ifdef INTEL_FAPI
3330    uint8_t idx =0;
3331    uint8_t nPdu = 0;
3332    uint8_t numPduEncoded = 0;
3333    uint16_t cellIdx =0;
3334    uint16_t pduIndex = 0;
3335
3336    SlotIndInfo dlTtiReqTimingInfo;
3337    MacDlSlot *currDlSlot = NULLP;
3338    MacCellCfg macCellCfg;
3339    RntiType rntiType;
3340    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3341    fapi_msg_header_t *msgHeader = NULLP;
3342    p_fapi_api_queue_elem_t dlTtiElem;
3343    p_fapi_api_queue_elem_t headerElem;
3344    p_fapi_api_queue_elem_t prevElem;
3345
3346    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3347    {
3348       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3349       /* consider phy delay */
3350       ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
3351       dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3352
3353       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3354
3355       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3356
3357       LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3358       if(dlTtiElem)
3359       {
3360          FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3361                sizeof(fapi_dl_tti_req_t));
3362
3363          /* Fill message header */
3364          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3365          if(!headerElem)
3366          {
3367             DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3368             LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3369             return RFAILED;
3370          }
3371          FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3372                sizeof(fapi_msg_header_t));
3373          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3374          msgHeader->num_msg = 1;
3375          msgHeader->handle = 0;
3376
3377          /* Fill Dl TTI Request */
3378          dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3379          memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3380          fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3381
3382          dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3383          dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3384          dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo);  /* get total Pdus */
3385          nPdu = dlTtiReq->nPdus;
3386          dlTtiReq->nGroup = 0;
3387          if(dlTtiReq->nPdus > 0)
3388          {
3389             if(currDlSlot->dlInfo.isBroadcastPres)
3390             {
3391                if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3392                {
3393                   if(dlTtiReq->pdus != NULLP)
3394                   {
3395                      for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3396                      {
3397                         fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3398                               currDlSlot, idx, dlTtiReq->sfn);
3399                         numPduEncoded++;
3400                      }
3401                   }
3402                   DU_LOG("\033[1;31m");
3403                   DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3404                   DU_LOG("\033[0m");
3405                }
3406                if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3407                {
3408                   /* Filling SIB1 param */
3409                   if(numPduEncoded != nPdu)
3410                   {
3411                      rntiType = SI_RNTI_TYPE;
3412                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3413                            rntiType, CORESET_TYPE0);
3414                      numPduEncoded++;
3415                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3416                            &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3417                            currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3418                            pduIndex);
3419                      dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3420                      pduIndex++;
3421                      numPduEncoded++;
3422                   }
3423
3424                   DU_LOG("\033[1;34m");
3425                   DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3426                   DU_LOG("\033[0m");
3427                }
3428             }
3429             if(currDlSlot->dlInfo.rarAlloc != NULLP)
3430             {
3431                /* Filling RAR param */
3432                rntiType = RA_RNTI_TYPE;
3433                fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3434                      &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3435                numPduEncoded++;
3436                fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3437                      &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3438                      currDlSlot->dlInfo.rarAlloc->bwp,
3439                      pduIndex);
3440                numPduEncoded++;
3441                pduIndex++;
3442
3443                DU_LOG("\033[1;32m");
3444                DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3445                DU_LOG("\033[0m");
3446             }
3447             if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3448             {
3449                if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3450                {
3451                   /* Filling Msg4 param */
3452                   DU_LOG("\033[1;32m");
3453                   if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3454                   {
3455                      rntiType = TC_RNTI_TYPE;
3456                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3457                            &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3458                      DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3459                   }
3460                   else
3461                   {
3462                      /* Filling other DL msg params */
3463                      rntiType = C_RNTI_TYPE;
3464                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3465                            &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3466                      DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3467                   }
3468                   DU_LOG("\033[0m");
3469
3470                   numPduEncoded++;
3471                   fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3472                         &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3473                         currDlSlot->dlInfo.dlMsgAlloc->bwp,
3474                         pduIndex);
3475                   numPduEncoded++;
3476                   pduIndex++;
3477                }
3478                else
3479                {
3480                   MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3481                   currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3482                }
3483             }
3484
3485             dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3486             dlTtiReq->nGroup++;
3487
3488 #ifdef ODU_SLOT_IND_DEBUG_LOG
3489             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3490 #endif
3491
3492             /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3493             fillUlTtiReq(currTimingInfo, dlTtiElem);
3494             msgHeader->num_msg++;
3495
3496             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3497             fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
3498             msgHeader->num_msg++;
3499
3500             /* send Tx-DATA req message */
3501             sendTxDataReq(dlTtiReqTimingInfo, &currDlSlot->dlInfo, dlTtiElem->p_next->p_next);
3502             if(dlTtiElem->p_next->p_next->p_next)
3503             {
3504                msgHeader->num_msg++;
3505                prevElem = dlTtiElem->p_next->p_next->p_next;
3506             }
3507             else
3508                prevElem = dlTtiElem->p_next->p_next;
3509          }
3510          else
3511          {
3512 #ifdef ODU_SLOT_IND_DEBUG_LOG
3513             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3514 #endif
3515
3516             /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3517             fillUlTtiReq(currTimingInfo, dlTtiElem);
3518             msgHeader->num_msg++;
3519
3520             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3521             fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
3522             msgHeader->num_msg++;
3523
3524             prevElem = dlTtiElem->p_next->p_next;
3525          }
3526
3527          if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
3528          {
3529             /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3530             lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
3531             msgHeader->num_msg++;
3532             macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
3533          }
3534          LwrMacSendToL1(headerElem);
3535          memset(currDlSlot, 0, sizeof(MacDlSlot));
3536          return ROK;
3537       }
3538       else
3539       {
3540          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
3541          memset(currDlSlot, 0, sizeof(MacDlSlot));
3542          return RFAILED;
3543       }
3544    }
3545    else
3546    {
3547       lwr_mac_procInvalidEvt(&currTimingInfo);
3548       return RFAILED;
3549    }
3550 #endif
3551    return ROK;
3552 }
3553
3554 /*******************************************************************
3555  *
3556  * @brief Sends TX data Request to PHY
3557  *
3558  * @details
3559  *
3560  *    Function : sendTxDataReq
3561  *
3562  *    Functionality:
3563  *         -Sends FAPI TX data req to PHY
3564  *
3565  * @params[in]    timing info
3566  * @return ROK     - success
3567  *         RFAILED - failure
3568  *
3569  * ****************************************************************/
3570 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem)
3571 {
3572 #ifdef INTEL_FAPI
3573    uint8_t nPdu = 0;
3574    uint16_t cellIdx;
3575    uint16_t pduIndex = 0;
3576    fapi_tx_data_req_t       *txDataReq =NULLP;
3577    p_fapi_api_queue_elem_t  txDataElem = 0;
3578
3579    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3580
3581    /* send TX_Data request message */
3582    nPdu = calcTxDataReqPduCount(dlInfo);
3583    if(nPdu > 0)
3584    {
3585       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3586       if(txDataElem == NULLP)
3587       {
3588          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
3589          return RFAILED;
3590       }
3591
3592       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3593           sizeof(fapi_tx_data_req_t));
3594       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3595       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3596       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3597
3598       txDataReq->sfn  = currTimingInfo.sfn;
3599       txDataReq->slot = currTimingInfo.slot;
3600       if(dlInfo->brdcstAlloc.sib1Trans)
3601       {
3602          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
3603             dlInfo->brdcstAlloc.sib1Alloc.sib1PdschCfg);
3604          pduIndex++;
3605          txDataReq->num_pdus++;
3606       }
3607       if(dlInfo->rarAlloc != NULLP)
3608       {
3609          fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->rarAlloc->rarInfo,\
3610             dlInfo->rarAlloc->rarPdschCfg);
3611          pduIndex++;
3612          txDataReq->num_pdus++;
3613
3614          MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3615          dlInfo->rarAlloc = NULLP;
3616       }
3617       if(dlInfo->dlMsgAlloc != NULLP)
3618       {
3619          fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->dlMsgAlloc->dlMsgInfo,\
3620             dlInfo->dlMsgAlloc->dlMsgPdschCfg);
3621          pduIndex++;
3622          txDataReq->num_pdus++;
3623
3624          MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3625             dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3626          dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3627          MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3628          dlInfo->dlMsgAlloc = NULLP;
3629       }
3630
3631       /* Fill message header */
3632       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
3633       prevElem->p_next = txDataElem;
3634    }
3635 #endif
3636    return ROK;
3637 }
3638
3639 /***********************************************************************
3640  *
3641  * @brief calculates the total size to be allocated for UL TTI Req
3642  *
3643  * @details
3644  *
3645  *    Function : getnPdus
3646  *
3647  *    Functionality:
3648  *         -calculates the total pdu count to be allocated for UL TTI Req
3649  *
3650  * @params[in] Pointer to fapi Ul TTI Req
3651  *             Pointer to CurrUlSlot
3652  * @return count
3653  * ********************************************************************/
3654 #ifdef INTEL_FAPI
3655 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3656 {
3657    uint8_t pduCount = 0;
3658
3659    if(ulTtiReq && currUlSlot)
3660    {
3661       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3662       {
3663          pduCount++;
3664          ulTtiReq->rachPresent++;
3665       }
3666       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3667       {
3668          pduCount++;
3669          ulTtiReq->nUlsch++;
3670       }
3671       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3672       {
3673          pduCount++;
3674          ulTtiReq->nUlsch++;
3675       }
3676       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3677       {
3678          pduCount++;
3679          ulTtiReq->nUlcch++;
3680       }
3681       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3682       {
3683          pduCount++;
3684       }
3685    }
3686    return pduCount;
3687 }
3688 #endif
3689
3690 /***********************************************************************
3691  *
3692  * @brief Set the value of zero correlation config in PRACH PDU
3693  *
3694  * @details
3695  *
3696  *    Function : setNumCs
3697  *
3698  *    Functionality:
3699  *         -Set the value of zero correlation config in PRACH PDU
3700  *
3701  * @params[in] Pointer to zero correlation config
3702  *             Pointer to MacCellCfg
3703  * ********************************************************************/
3704
3705 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3706 {
3707 #ifdef INTEL_FAPI
3708    uint8_t idx;
3709    if(macCellCfg != NULLP)
3710    {
3711       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3712       *numCs = UnrestrictedSetNcsTable[idx];
3713    }
3714 #endif
3715 }
3716
3717 /***********************************************************************
3718  *
3719  * @brief Fills the PRACH PDU in UL TTI Request
3720  *
3721  * @details
3722  *
3723  *    Function : fillPrachPdu
3724  *
3725  *    Functionality:
3726  *         -Fills the PRACH PDU in UL TTI Request
3727  *
3728  * @params[in] Pointer to Prach Pdu
3729  *             Pointer to CurrUlSlot
3730  *             Pointer to macCellCfg
3731  *             Pointer to msgLen
3732  * ********************************************************************/
3733
3734 #ifdef INTEL_FAPI
3735 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3736 {
3737    if(ulTtiReqPdu != NULLP)
3738    {
3739       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3740       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3741       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3742          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3743       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3744          currUlSlot->ulInfo.prachSchInfo.prachFormat;
3745       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3746       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3747          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3748       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3749       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3750       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3751       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3752       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3753       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3754    }
3755 }
3756
3757 /*******************************************************************
3758  *
3759  * @brief Filling PUSCH PDU in UL TTI Request
3760  *
3761  * @details
3762  *
3763  *    Function : fillPuschPdu
3764  *
3765  *    Functionality: Filling PUSCH PDU in UL TTI Request
3766  *
3767  * @params[in]
3768  * @return ROK     - success
3769  *         RFAILED - failure
3770  *
3771  * ****************************************************************/
3772 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3773 {
3774    if(ulTtiReqPdu != NULLP)
3775    {
3776       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3777       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3778       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3779       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3780       /* TODO : Fill handle in raCb when scheduling pusch and access here */
3781       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3782       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3783       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3784       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3785          macCellCfg->initialUlBwp.bwp.scs;
3786       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3787          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3788       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3789       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3790       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3791       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3792       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3793       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3794       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3795       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3796       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3797       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3798       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3799       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3800       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3801       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3802          currUlSlot->ulInfo.schPuschInfo.resAllocType;
3803       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3804          currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3805       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3806          currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3807       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3808       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3809       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3810       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3811       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3812          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3813       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3814          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3815       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3816          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3817       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3818          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3819       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3820          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3821       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3822          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3823       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3824          currUlSlot->ulInfo.schPuschInfo.harqProcId;
3825       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3826          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3827       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3828          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3829       /* numCb is 0 for new transmission */
3830       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3831
3832       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3833    }
3834 }
3835
3836 /*******************************************************************
3837  *
3838  * @brief Fill PUCCH PDU in Ul TTI Request
3839  *
3840  * @details
3841  *
3842  *    Function : fillPucchPdu
3843  *
3844  *    Functionality: Fill PUCCH PDU in Ul TTI Request
3845  *
3846  * @params[in]
3847  * @return ROK     - success
3848  *         RFAILED - failure
3849  *
3850  * ****************************************************************/
3851 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3852       MacUlSlot *currUlSlot)
3853 {
3854    if(ulTtiReqPdu != NULLP)
3855    {
3856       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
3857       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3858       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.schPucchInfo.rnti;
3859       /* TODO : Fill handle in raCb when scheduling pucch and access here */
3860       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
3861       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
3862       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
3863       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3864       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3865       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3866       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3867
3868       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3869       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3870       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3871       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3872       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
3873       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
3874       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3875       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3876       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
3877
3878       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
3879
3880       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3881       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
3882       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
3883       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
3884       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
3885       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
3886       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3887       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
3888       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
3889       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3890       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
3891       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
3892       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3893       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3894       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3895       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3896
3897       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3898    }
3899 }
3900
3901 #endif
3902
3903 /*******************************************************************
3904  *
3905  * @brief Sends UL TTI Request to PHY
3906  *
3907  * @details
3908  *
3909  *    Function : fillUlTtiReq
3910  *
3911  *    Functionality:
3912  *         -Sends FAPI Param req to PHY
3913  *
3914  * @params[in]  Pointer to CmLteTimingInfo
3915  * @return ROK     - success
3916  *         RFAILED - failure
3917  *
3918  ******************************************************************/
3919 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
3920 {
3921 #ifdef INTEL_FAPI
3922    uint16_t   cellIdx =0;
3923    uint8_t    pduIdx = -1;
3924    SlotIndInfo ulTtiReqTimingInfo;
3925    MacUlSlot *currUlSlot = NULLP;
3926    MacCellCfg macCellCfg;
3927    fapi_ul_tti_req_t *ulTtiReq = NULLP;
3928    p_fapi_api_queue_elem_t ulTtiElem;
3929
3930    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3931    {
3932       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3933       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3934
3935       /* add PHY delta */
3936       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
3937       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
3938
3939       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3940       if(ulTtiElem)
3941       {
3942          FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3943             sizeof(fapi_ul_tti_req_t));
3944          ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3945          memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3946          fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3947          ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
3948          ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3949          ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3950          ulTtiReq->nGroup = 0;
3951          if(ulTtiReq->nPdus > 0)
3952          {
3953             /* Fill Prach Pdu */
3954             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3955             {
3956                pduIdx++;
3957                fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3958             }
3959
3960             /* Fill PUSCH PDU */
3961             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3962             {
3963                pduIdx++;
3964                fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3965             }
3966             /* Fill PUCCH PDU */
3967             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3968             {
3969                pduIdx++;
3970                fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3971             }
3972          }
3973
3974 #ifdef ODU_SLOT_IND_DEBUG_LOG
3975          DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
3976 #endif
3977          prevElem->p_next = ulTtiElem;
3978
3979          memset(currUlSlot, 0, sizeof(MacUlSlot));
3980          return ROK;
3981       }
3982       else
3983       {
3984          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
3985          memset(currUlSlot, 0, sizeof(MacUlSlot));
3986          return RFAILED;
3987       }
3988    }
3989    else
3990    {
3991       lwr_mac_procInvalidEvt(&currTimingInfo);
3992    }
3993 #endif
3994    return ROK;
3995 }
3996
3997 #ifdef INTEL_FAPI
3998 /*******************************************************************
3999  *
4000  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4001  *
4002  * @details
4003  *
4004  *    Function : fillUlDciPdu
4005  *
4006  *    Functionality:
4007  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4008  *
4009  * @params[in] Pointer to fapi_dl_dci_t
4010  *             Pointer to DciInfo
4011  * @return ROK
4012  *
4013  ******************************************************************/
4014 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4015 {
4016    if(ulDciPtr != NULLP)
4017    {
4018       uint8_t numBytes =0;
4019       uint8_t bytePos =0;
4020       uint8_t bitPos =0;
4021
4022       uint8_t  coreset1Size = 0;
4023       uint16_t rbStart = 0;
4024       uint16_t rbLen = 0;
4025       uint8_t  dciFormatId = 0;
4026       uint32_t freqDomResAssign =0;
4027       uint8_t  timeDomResAssign =0;
4028       uint8_t  freqHopFlag =0;
4029       uint8_t  modNCodScheme =0;
4030       uint8_t  ndi =0;
4031       uint8_t  redundancyVer = 0;
4032       uint8_t  harqProcessNum = 0;
4033       uint8_t  puschTpc = 0;
4034       uint8_t  ul_SlInd = 0;
4035
4036       /* Size(in bits) of each field in DCI format 0_0 */
4037       uint8_t dciFormatIdSize      = 1;
4038       uint8_t freqDomResAssignSize = 0;
4039       uint8_t timeDomResAssignSize = 4;
4040       uint8_t freqHopFlagSize      = 1;
4041       uint8_t modNCodSchemeSize    = 5;
4042       uint8_t ndiSize              = 1;
4043       uint8_t redundancyVerSize    = 2;
4044       uint8_t harqProcessNumSize   = 4;
4045       uint8_t puschTpcSize         = 2;
4046       uint8_t ul_SlIndSize         = 1;
4047
4048       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4049       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4050       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4051       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4052       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4053       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4054       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4055       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4056       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4057       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4058       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.powerValue;
4059       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4060
4061       /* Calculating freq domain resource allocation field value and size
4062        * coreset1Size = Size of coreset 1
4063        * RBStart = Starting Virtual Rsource block
4064        * RBLen = length of contiguously allocted RBs
4065        * Spec 38.214 Sec 5.1.2.2.2
4066        */
4067       if(schDciInfo->formatType == FORMAT0_0)
4068       {
4069          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4070          rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4071          rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4072
4073          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4074          {
4075             if((rbLen - 1) <= floor(coreset1Size / 2))
4076                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4077             else
4078                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4079                                   + (coreset1Size - 1 - rbStart);
4080
4081             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4082          }
4083          /* Fetching DCI field values */
4084          dciFormatId      = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4085          timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4086          freqHopFlag      = schDciInfo->format.format0_0.freqHopFlag;
4087          modNCodScheme    = schDciInfo->format.format0_0.mcs;
4088          ndi              = schDciInfo->format.format0_0.ndi;
4089          redundancyVer    = schDciInfo->format.format0_0.rv;
4090          harqProcessNum   = schDciInfo->format.format0_0.harqProcId;
4091          puschTpc         = schDciInfo->format.format0_0.tpcCmd;
4092          ul_SlInd         = schDciInfo->format.format0_0.sUlCfgd;
4093
4094          /* Reversing bits in each DCI field */
4095          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4096          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4097          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4098          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4099          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4100          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4101          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4102          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4103       }
4104       /* Calulating total number of bytes in buffer */
4105       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4106       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4107       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4108
4109       numBytes = ulDciPtr->payloadSizeBits / 8;
4110       if(ulDciPtr->payloadSizeBits % 8)
4111          numBytes += 1;
4112
4113       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4114       {
4115          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4116          return;
4117       }
4118
4119       /* Initialize buffer */
4120       for(bytePos = 0; bytePos < numBytes; bytePos++)
4121          ulDciPtr->payload[bytePos] = 0;
4122
4123       bytePos = numBytes - 1;
4124       bitPos = 0;
4125
4126       /* Packing DCI format fields */
4127       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4128             dciFormatId, dciFormatIdSize);
4129       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4130             freqDomResAssign, freqDomResAssignSize);
4131       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4132             timeDomResAssign, timeDomResAssignSize);
4133       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4134             freqHopFlag, freqHopFlagSize);
4135       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4136             modNCodScheme, modNCodSchemeSize);
4137       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4138             ndi, ndiSize);
4139       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4140             redundancyVer, redundancyVerSize);
4141       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4142             harqProcessNum, harqProcessNumSize);
4143       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4144             puschTpc, puschTpcSize);
4145       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4146             ul_SlInd, ul_SlIndSize);
4147    }
4148 } /* fillUlDciPdu */
4149
4150 /*******************************************************************
4151  *
4152  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4153  *
4154  * @details
4155  *
4156  *    Function : fillUlDciPdcchPdu
4157  *
4158  *    Functionality:
4159  *         -Fills the Pdcch PDU info
4160  *
4161  * @params[in] Pointer to FAPI DL TTI Req
4162  *             Pointer to PdcchCfg
4163  * @return ROK
4164  *
4165  ******************************************************************/
4166 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4167 {
4168    if(ulDciReqPdu != NULLP)
4169    {
4170       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4171       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4172       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4173       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4174       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4175       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4176       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4177       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4178       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4179       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4180       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4181       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4182       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4183       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4184       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4185       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4186       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4187
4188       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4189       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4190    }
4191    return ROK;
4192 }
4193 #endif
4194 /*******************************************************************
4195  *
4196  * @brief Sends UL DCI Request to PHY
4197  *
4198  * @details
4199  *
4200  *    Function : fillUlDciReq
4201  *
4202  *    Functionality:
4203  *         -Sends FAPI Ul Dci req to PHY
4204  *
4205  * @params[in]  Pointer to CmLteTimingInfo
4206  * @return ROK     - success
4207  *         RFAILED - failure
4208  *
4209  ******************************************************************/
4210 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
4211 {
4212 #ifdef INTEL_FAPI
4213    uint8_t      cellIdx =0;
4214    uint8_t      numPduEncoded = 0;
4215    SlotIndInfo  ulDciReqTimingInfo ={0};
4216    MacDlSlot    *currDlSlot = NULLP;
4217    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4218    p_fapi_api_queue_elem_t  ulDciElem;
4219
4220    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4221    {
4222       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4223       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4224       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4225
4226          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4227          if(ulDciElem)
4228          {
4229             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4230                sizeof(fapi_ul_dci_req_t));
4231             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4232             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4233             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4234
4235             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4236             ulDciReq->slot = ulDciReqTimingInfo.slot;
4237           if(currDlSlot->dlInfo.ulGrant != NULLP)
4238           {
4239             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4240             if(ulDciReq->numPdus > 0)
4241             {
4242                /* Fill PDCCH configuration Pdu */
4243                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4244                numPduEncoded++;
4245                /* free UL GRANT at SCH */
4246                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4247                currDlSlot->dlInfo.ulGrant = NULLP;
4248             }
4249 #ifdef ODU_SLOT_IND_DEBUG_LOG
4250                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4251 #endif
4252          }
4253                prevElem->p_next = ulDciElem;
4254       }
4255    }
4256    else
4257    {
4258        lwr_mac_procInvalidEvt(&currTimingInfo);
4259    }
4260 #endif
4261    return ROK;
4262 }
4263
4264 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4265 {
4266    {
4267       /* PHY_STATE_IDLE */
4268 #ifdef INTEL_TIMER_MODE
4269       lwr_mac_procIqSamplesReqEvt,
4270 #endif
4271       lwr_mac_procParamReqEvt,
4272       lwr_mac_procParamRspEvt,
4273       lwr_mac_procConfigReqEvt,
4274       lwr_mac_procConfigRspEvt,
4275       lwr_mac_procInvalidEvt,
4276       lwr_mac_procInvalidEvt,
4277    },
4278    {
4279       /* PHY_STATE_CONFIGURED */
4280 #ifdef INTEL_TIMER_MODE
4281       lwr_mac_procInvalidEvt,
4282 #endif
4283       lwr_mac_procParamReqEvt,
4284       lwr_mac_procParamRspEvt,
4285       lwr_mac_procConfigReqEvt,
4286       lwr_mac_procConfigRspEvt,
4287       lwr_mac_procStartReqEvt,
4288       lwr_mac_procInvalidEvt,
4289    },
4290    {
4291       /* PHY_STATE_RUNNING */
4292 #ifdef INTEL_TIMER_MODE
4293       lwr_mac_procInvalidEvt,
4294 #endif
4295       lwr_mac_procInvalidEvt,
4296       lwr_mac_procInvalidEvt,
4297       lwr_mac_procConfigReqEvt,
4298       lwr_mac_procConfigRspEvt,
4299       lwr_mac_procInvalidEvt,
4300       lwr_mac_procInvalidEvt,
4301    }
4302 };
4303
4304 /*******************************************************************
4305  *
4306  * @brief Sends message to LWR_MAC Fsm Event Handler
4307  *
4308  * @details
4309  *
4310  *    Function : sendToLowerMac
4311  *
4312  *    Functionality:
4313  *         -Sends message to LowerMac
4314  *
4315  * @params[in] Message Type
4316  *             Message Length
4317  *             Messaga Pointer
4318  *
4319  * @return void
4320  *
4321  ******************************************************************/
4322 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4323 {
4324    lwrMacCb.event = msgType;
4325    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4326 }
4327 /**********************************************************************
4328   End of file
4329  **********************************************************************/