src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac_phy.h"
  29 #include "lwr_mac.h"
  30 #ifdef INTEL_FAPI
  31 #include "fapi.h"
  32 #include "fapi_vendor_extension.h"
  33 #endif
  34 #ifdef INTEL_WLS_MEM
  35 #include "wls_lib.h"
  36 #endif
  37 #include "lwr_mac_fsm.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 void fapiMacConfigRsp(uint16_t cellId);
  51 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  52
  53 /* Global variables */
  54 uint8_t slotIndIdx;
  55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
  56
  57 void lwrMacLayerInit()
  58 {
  59 #ifdef INTEL_WLS_MEM
  60    uint8_t  idx;
  61
  62    /* Initializing WLS free mem list */
  63    slotIndIdx = 1;
  64    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  65    {
  66       cmLListInit(&wlsBlockToFreeList[idx]);
  67    }
  68 #endif
  69 }
  70
  71 /*******************************************************************
  72  *
  73  * @brief Handles Invalid Request Event
  74  *
  75  * @details
  76  *
  77  *    Function : lwr_mac_procInvalidEvt
  78  *
  79  *    Functionality:
  80  *         - Displays the PHY state when the invalid event occurs
  81  *
  82  * @params[in]
  83  * @return ROK     - success
  84  *         RFAILED - failure
  85  *
  86  * ****************************************************************/
  87 uint8_t lwr_mac_procInvalidEvt(void *msg)
  88 {
  89    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
  90    return ROK;
  91 }
  92
  93 #ifdef INTEL_FAPI
  94 /*******************************************************************
  95  *
  96  * @brief Fills FAPI message header
  97  *
  98  * @details
  99  *
 100  *    Function : fillMsgHeader
 101  *
 102  *    Functionality:
 103  *         -Fills FAPI message header
 104  *
 105  * @params[in] Pointer to header
 106  *             Number of messages
 107  *             Messae Type
 108  *             Length of message
 109  * @return void
 110  *
 111  * ****************************************************************/
 112 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 113 {
 114    memset(hdr, 0, sizeof(fapi_msg_t));
 115    hdr->msg_id = msgType;
 116    hdr->length = msgLen;
 117 }
 118
 119 /*******************************************************************
 120  *
 121  * @brief Fills FAPI Config Request message header
 122  *
 123  * @details
 124  *
 125  *    Function : fillTlvs
 126  *
 127  *    Functionality:
 128  *         -Fills FAPI Config Request message header
 129  *
 130  * @params[in] Pointer to TLV
 131  *             Tag
 132  *             Length
 133  *             Value
 134  *             MsgLen
 135  * @return void
 136  *
 137  * ****************************************************************/
 138 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 139       uint32_t value, uint32_t *msgLen)
 140 {
 141    tlv->tl.tag    = tag;
 142    tlv->tl.length = length;
 143    tlv->value     = value;
 144    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 145 }
 146 /*******************************************************************
 147  *
 148  * @brief fills the cyclic prefix by comparing the bitmask
 149  *
 150  * @details
 151  *
 152  *    Function : fillCyclicPrefix
 153  *
 154  *    Functionality:
 155  *         -checks the value with the bitmask and
 156  *          fills the cellPtr's cyclic prefix.
 157  *
 158  * @params[in] Pointer to ClCellParam
 159  *             Value to be compared
 160  * @return void
 161  *
 162  ********************************************************************/
 163 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 164 {
 165    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 166    {
 167       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 168    }
 169    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 170    {
 171       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 172    }
 173    else
 174    {
 175       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 176    }
 177 }
 178
 179 /*******************************************************************
 180  *
 181  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 182  *
 183  * @details
 184  *
 185  *    Function : fillSubcarrierSpaceDl
 186  *
 187  *    Functionality:
 188  *         -checks the value with the bitmask and
 189  *          fills the cellPtr's subcarrier spacing in DL
 190  *
 191  * @params[in] Pointer to ClCellParam
 192  *             Value to be compared
 193  * @return void
 194  *
 195  * ****************************************************************/
 196
 197 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 198 {
 199    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 200    {
 201       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 202    }
 203    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 204    {
 205       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 206    }
 207    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 208    {
 209       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 210    }
 211    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 212    {
 213       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 214    }
 215    else
 216    {
 217       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 218    }
 219 }
 220
 221 /*******************************************************************
 222  *
 223  * @brief fills the downlink bandwidth by comparing the bitmask
 224  *
 225  * @details
 226  *
 227  *    Function : fillBandwidthDl
 228  *
 229  *    Functionality:
 230  *         -checks the value with the bitmask and
 231  *         -fills the cellPtr's DL Bandwidth
 232  *
 233  * @params[in] Pointer to ClCellParam
 234  *             Value to be compared
 235  * @return void
 236  *
 237  * ****************************************************************/
 238
 239 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 240 {
 241    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 242    {
 243       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 244    }
 245    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 246    {
 247       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 248    }
 249    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 250    {
 251       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 252    }
 253    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 254    {
 255       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 256    }
 257    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 258    {
 259       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 260    }
 261    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 262    {
 263       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 264    }
 265    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 266    {
 267       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 268    }
 269    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 270    {
 271       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 272    }
 273    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 274    {
 275       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 276    }
 277    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 278    {
 279       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 280    }
 281    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 282    {
 283       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 284    }
 285    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 286    {
 287       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 288    }
 289    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 290    {
 291       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 292    }
 293    else
 294    {
 295       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 296    }
 297 }
 298
 299 /*******************************************************************
 300  *
 301  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 302  *
 303  * @details
 304  *
 305  *    Function : fillSubcarrierSpaceUl
 306  *
 307  *    Functionality:
 308  *         -checks the value with the bitmask and
 309  *         -fills cellPtr's subcarrier spacing in UL
 310  *
 311  * @params[in] Pointer to ClCellParam
 312  *             Value to be compared
 313  * @return void
 314  *
 315  * ****************************************************************/
 316
 317 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 318 {
 319    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 320    {
 321       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 322    }
 323    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 324    {
 325       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 326    }
 327    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 328    {
 329       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 330    }
 331    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 332    {
 333       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 334    }
 335    else
 336    {
 337       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 338    }
 339 }
 340
 341 /*******************************************************************
 342  *
 343  * @brief fills the uplink bandwidth by comparing the bitmask
 344  *
 345  * @details
 346  *
 347  *    Function : fillBandwidthUl
 348  *
 349  *    Functionality:
 350  *         -checks the value with the bitmask and
 351  *          fills the cellPtr's UL Bandwidth
 352  *
 353  *
 354  *
 355  * @params[in] Pointer to ClCellParam
 356  *             Value to be compared
 357  * @return void
 358  *
 359  *
 360  * ****************************************************************/
 361
 362 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 363 {
 364    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 365    {
 366       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 367    }
 368    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 369    {
 370       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 371    }
 372    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 373    {
 374       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 375    }
 376    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 377    {
 378       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 379    }
 380    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 381    {
 382       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 383    }
 384    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 385    {
 386       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 387    }
 388    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 389    {
 390       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 391    }
 392    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 393    {
 394       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 395    }
 396    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 397    {
 398       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 399    }
 400    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 401    {
 402       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 403    }
 404    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 405    {
 406       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 407    }
 408    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 409    {
 410       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 411    }
 412    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 413    {
 414       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 415    }
 416    else
 417    {
 418       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 419    }
 420 }
 421 /*******************************************************************
 422  *
 423  * @brief fills the CCE maping by comparing the bitmask
 424  *
 425  * @details
 426  *
 427  *    Function : fillCCEmaping
 428  *
 429  *    Functionality:
 430  *         -checks the value with the bitmask and
 431  *          fills the cellPtr's CCE Mapping Type
 432  *
 433  *
 434  * @params[in] Pointer to ClCellParam
 435  *             Value to be compared
 436  * @return void
 437  *
 438  * ****************************************************************/
 439
 440 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 441 {
 442    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 443    {
 444       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 445    }
 446    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 447    {
 448       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 449    }
 450    else
 451    {
 452       (*cellPtr)->cceMappingType = INVALID_VALUE;
 453    }
 454 }
 455
 456 /*******************************************************************
 457  *
 458  * @brief fills the PUCCH format by comparing the bitmask
 459  *
 460  * @details
 461  *
 462  *    Function : fillPucchFormat
 463  *
 464  *    Functionality:
 465  *         -checks the value with the bitmask and
 466  *          fills the cellPtr's pucch format
 467  *
 468  *
 469  * @params[in] Pointer to ClCellParam
 470  *             Value to be compared
 471  * @return void
 472  *
 473  * ****************************************************************/
 474
 475 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 476 {
 477    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 478    {
 479       (*cellPtr)->pucchFormats    = FORMAT_0;
 480    }
 481    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 482    {
 483       (*cellPtr)->pucchFormats    = FORMAT_1;
 484    }
 485    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 486    {
 487       (*cellPtr)->pucchFormats    = FORMAT_2;
 488    }
 489    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 490    {
 491       (*cellPtr)->pucchFormats    = FORMAT_3;
 492    }
 493    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 494    {
 495       (*cellPtr)->pucchFormats    = FORMAT_4;
 496    }
 497    else
 498    {
 499       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 500    }
 501 }
 502
 503 /*******************************************************************
 504  *
 505  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 506  *
 507  * @details
 508  *
 509  *    Function : fillPdschMappingType
 510  *
 511  *    Functionality:
 512  *         -checks the value with the bitmask and
 513  *          fills the cellPtr's PDSCH MappingType
 514  *
 515  * @params[in] Pointer to ClCellParam
 516  *             Value to be compared
 517  * @return void
 518  *
 519  * ****************************************************************/
 520
 521 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 522 {
 523    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 524    {
 525       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 526    }
 527    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 528    {
 529       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 530    }
 531    else
 532    {
 533       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 534    }
 535 }
 536
 537 /*******************************************************************
 538  *
 539  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 540  *
 541  * @details
 542  *
 543  *    Function : fillPdschAllocationType
 544  *
 545  *    Functionality:
 546  *         -checks the value with the bitmask and
 547  *          fills the cellPtr's PDSCH AllocationType
 548  *
 549  * @params[in] Pointer to ClCellParam
 550  *             Value to be compared
 551  * @return void
 552  *
 553  * ****************************************************************/
 554
 555 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 556 {
 557    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 558    {
 559       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 560    }
 561    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 562    {
 563       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 564    }
 565    else
 566    {
 567       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 568    }
 569 }
 570
 571 /*******************************************************************
 572  *
 573  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 574  *
 575  * @details
 576  *
 577  *    Function : fillPrbMappingType
 578  *
 579  *    Functionality:
 580  *         -checks the value with the bitmask and
 581  *          fills the cellPtr's PRB Mapping Type
 582  *
 583  * @params[in] Pointer to ClCellParam
 584  *             Value to be compared
 585  * @return void
 586  *
 587  ******************************************************************/
 588 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 589 {
 590    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 591    {
 592       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 593    }
 594    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 595    {
 596       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 597    }
 598    else
 599    {
 600       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 601    }
 602 }
 603
 604 /*******************************************************************
 605  *
 606  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 607  *
 608  * @details
 609  *
 610  *    Function : fillPdschDmrsConfigType
 611  *
 612  *    Functionality:
 613  *         -checks the value with the bitmask and
 614  *          fills the cellPtr's DmrsConfig Type
 615  *
 616  * @params[in] Pointer to ClCellParam
 617  *             Value to be compared
 618  * @return void
 619  *
 620  ******************************************************************/
 621
 622 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 623 {
 624    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 625    {
 626       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 627    }
 628    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 629    {
 630       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 631    }
 632    else
 633    {
 634       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 635    }
 636 }
 637
 638 /*******************************************************************
 639  *
 640  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 641  *
 642  * @details
 643  *
 644  *    Function : fillPdschDmrsLength
 645  *
 646  *    Functionality:
 647  *         -checks the value with the bitmask and
 648  *          fills the cellPtr's PdschDmrsLength
 649  *
 650  * @params[in] Pointer to ClCellParam
 651  *             Value to be compared
 652  * @return void
 653  *
 654  ******************************************************************/
 655 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 656 {
 657    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 658    {
 659       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 660    }
 661    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 662    {
 663       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 664    }
 665    else
 666    {
 667       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 668    }
 669 }
 670
 671 /*******************************************************************
 672  *
 673  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 674  *
 675  * @details
 676  *
 677  *    Function : fillPdschDmrsAddPos
 678  *
 679  *    Functionality:
 680  *         -checks the value with the bitmask and
 681  *          fills the cellPtr's Pdsch DmrsAddPos
 682  *
 683  * @params[in] Pointer to ClCellParam
 684  *             Value to be compared
 685  * @return void
 686  *
 687  ******************************************************************/
 688
 689 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 690 {
 691    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 692    {
 693       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 694    }
 695    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 696    {
 697       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 698    }
 699    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 700    {
 701       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 702    }
 703    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 704    {
 705       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 706    }
 707    else
 708    {
 709       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 710    }
 711 }
 712
 713 /*******************************************************************
 714  *
 715  * @brief fills the Modulation Order in DL by comparing the bitmask
 716  *
 717  * @details
 718  *
 719  *    Function : fillModulationOrderDl
 720  *
 721  *    Functionality:
 722  *         -checks the value with the bitmask and
 723  *          fills the cellPtr's ModulationOrder in DL.
 724  *
 725  * @params[in] Pointer to ClCellParam
 726  *             Value to be compared
 727  * @return void
 728  *
 729  ******************************************************************/
 730 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 731 {
 732    if(value == 0 )
 733    {
 734       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 735    }
 736    else if(value == 1)
 737    {
 738       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 739    }
 740    else if(value == 2)
 741    {
 742       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 743    }
 744    else if(value == 3)
 745    {
 746       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 747    }
 748    else
 749    {
 750       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 751    }
 752 }
 753
 754 /*******************************************************************
 755  *
 756  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 757  *
 758  * @details
 759  *
 760  *    Function : fillPuschDmrsConfigType
 761  *
 762  *    Functionality:
 763  *         -checks the value with the bitmask and
 764  *          fills the cellPtr's PUSCH DmrsConfigType
 765  *
 766  * @params[in] Pointer to ClCellParam
 767  *             Value to be compared
 768  * @return void
 769  *
 770  ******************************************************************/
 771
 772 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 773 {
 774    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 775    {
 776       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 777    }
 778    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 779    {
 780       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 781    }
 782    else
 783    {
 784       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 785    }
 786 }
 787
 788 /*******************************************************************
 789  *
 790  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 791  *
 792  * @details
 793  *
 794  *    Function : fillPuschDmrsLength
 795  *
 796  *    Functionality:
 797  *         -checks the value with the bitmask and
 798  *          fills the cellPtr's PUSCH DmrsLength
 799  *
 800  * @params[in] Pointer to ClCellParam
 801  *             Value to be compared
 802  * @return void
 803  *
 804  ******************************************************************/
 805
 806 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 807 {
 808    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 809    {
 810       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 811    }
 812    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 813    {
 814       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 815    }
 816    else
 817    {
 818       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 819    }
 820 }
 821
 822 /*******************************************************************
 823  *
 824  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 825  *
 826  * @details
 827  *
 828  *    Function : fillPuschDmrsAddPos
 829  *
 830  *    Functionality:
 831  *         -checks the value with the bitmask and
 832  *          fills the cellPtr's PUSCH DmrsAddPos
 833  *
 834  * @params[in] Pointer to ClCellParam
 835  *             Value to be compared
 836  * @return void
 837  *
 838  ******************************************************************/
 839
 840 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 841 {
 842    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 843    {
 844       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 845    }
 846    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 847    {
 848       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 849    }
 850    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 851    {
 852       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 853    }
 854    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 855    {
 856       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 857    }
 858    else
 859    {
 860       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 861    }
 862 }
 863
 864 /*******************************************************************
 865  *
 866  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 867  *
 868  * @details
 869  *
 870  *    Function : fillPuschMappingType
 871  *
 872  *    Functionality:
 873  *         -checks the value with the bitmask and
 874  *          fills the cellPtr's PUSCH MappingType
 875  *
 876  * @params[in] Pointer to ClCellParam
 877  *             Value to be compared
 878  * @return void
 879  *
 880  ******************************************************************/
 881
 882 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 883 {
 884    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 885    {
 886       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 887    }
 888    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 889    {
 890       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 891    }
 892    else
 893    {
 894       (*cellPtr)->puschMappingType = INVALID_VALUE;
 895    }
 896 }
 897
 898 /*******************************************************************
 899  *
 900  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 901  *
 902  * @details
 903  *
 904  *    Function : fillPuschAllocationType
 905  *
 906  *    Functionality:
 907  *         -checks the value with the bitmask and
 908  *          fills the cellPtr's PUSCH AllocationType
 909  *
 910  * @params[in] Pointer to ClCellParam
 911  *             Value to be compared
 912  * @return void
 913  *
 914  ******************************************************************/
 915
 916 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 917 {
 918    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 919    {
 920       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 921    }
 922    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 923    {
 924       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 925    }
 926    else
 927    {
 928       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 929    }
 930 }
 931
 932 /*******************************************************************
 933  *
 934  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 935  *
 936  * @details
 937  *
 938  *    Function : fillPuschPrbMappingType
 939  *
 940  *    Functionality:
 941  *         -checks the value with the bitmask and
 942  *          fills the cellPtr's PUSCH PRB MApping Type
 943  *
 944  * @params[in] Pointer to ClCellParam
 945  *             Value to be compared
 946  * @return void
 947  *
 948  ******************************************************************/
 949
 950 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 951 {
 952    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 953    {
 954       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 955    }
 956    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 957    {
 958       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 959    }
 960    else
 961    {
 962       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 963    }
 964 }
 965
 966 /*******************************************************************
 967  *
 968  * @brief fills the Modulation Order in Ul by comparing the bitmask
 969  *
 970  * @details
 971  *
 972  *    Function : fillModulationOrderUl
 973  *
 974  *    Functionality:
 975  *         -checks the value with the bitmask and
 976  *          fills the cellPtr's Modualtsion Order in UL.
 977  *
 978  * @params[in] Pointer to ClCellParam
 979  *             Value to be compared
 980  * @return void
 981  *
 982  ******************************************************************/
 983
 984 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
 985 {
 986    if(value == 0)
 987    {
 988       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
 989    }
 990    else if(value == 1)
 991    {
 992       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
 993    }
 994    else if(value == 2)
 995    {
 996       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
 997    }
 998    else if(value == 3)
 999    {
1000       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1001    }
1002    else
1003    {
1004       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1005    }
1006 }
1007
1008 /*******************************************************************
1009  *
1010  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1011  *
1012  * @details
1013  *
1014  *    Function : fillPuschAggregationFactor
1015  *
1016  *    Functionality:
1017  *         -checks the value with the bitmask and
1018  *          fills the cellPtr's PUSCH Aggregation Factor
1019  *
1020  * @params[in] Pointer to ClCellParam
1021  *             Value to be compared
1022  * @return void
1023  *
1024  ******************************************************************/
1025
1026 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1027 {
1028    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1029    {
1030       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1031    }
1032    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1033    {
1034       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1035    }
1036    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1037    {
1038       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1039    }
1040    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1041    {
1042       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1043    }
1044    else
1045    {
1046       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1047    }
1048 }
1049
1050 /*******************************************************************
1051  *
1052  * @brief fills the PRACH Long Format by comparing the bitmask
1053  *
1054  * @details
1055  *
1056  *    Function : fillPrachLongFormat
1057  *
1058  *    Functionality:
1059  *         -checks the value with the bitmask and
1060  *          fills the cellPtr's PRACH Long Format
1061  *
1062  * @params[in] Pointer to ClCellParam
1063  *             Value to be compared
1064  * @return void
1065  *
1066  ******************************************************************/
1067
1068 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1069 {
1070    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1071    {
1072       (*cellPtr)->prachLongFormats    = FORMAT_0;
1073    }
1074    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1075    {
1076       (*cellPtr)->prachLongFormats    = FORMAT_1;
1077    }
1078    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1079    {
1080       (*cellPtr)->prachLongFormats    = FORMAT_2;
1081    }
1082    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1083    {
1084       (*cellPtr)->prachLongFormats    = FORMAT_3;
1085    }
1086    else
1087    {
1088       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1089    }
1090 }
1091
1092 /*******************************************************************
1093  *
1094  * @brief fills the PRACH Short Format by comparing the bitmask
1095  *
1096  * @details
1097  *
1098  *    Function : fillPrachShortFormat
1099  *
1100  *    Functionality:
1101  *         -checks the value with the bitmask and
1102  *          fills the cellPtr's PRACH ShortFormat
1103  *
1104  * @params[in] Pointer to ClCellParam
1105  *             Value to be compared
1106  * @return void
1107  *
1108  ******************************************************************/
1109
1110 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1111 {
1112    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1113    {
1114       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1115    }
1116    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1117    {
1118       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1119    }
1120    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1121    {
1122       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1123    }
1124    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1125    {
1126       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1127    }
1128    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1129    {
1130       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1131    }
1132    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1133    {
1134       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1135    }
1136    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1137    {
1138       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1139    }
1140    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1141    {
1142       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1143    }
1144    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1145    {
1146       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1147    }
1148    else
1149    {
1150       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1151    }
1152 }
1153
1154 /*******************************************************************
1155  *
1156  * @brief fills the Fd Occasions Type by comparing the bitmask
1157  *
1158  * @details
1159  *
1160  *    Function : fillFdOccasions
1161  *
1162  *    Functionality:
1163  *         -checks the value with the bitmask and
1164  *          fills the cellPtr's Fd Occasions
1165  *
1166  * @params[in] Pointer to ClCellParam
1167  *             Value to be compared
1168  * @return void
1169  *
1170  ******************************************************************/
1171
1172 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1173 {
1174    if(value == 0)
1175    {
1176       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1177    }
1178    else if(value == 1)
1179    {
1180       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1181    }
1182    else if(value == 3)
1183    {
1184       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1185    }
1186    else if(value == 4)
1187    {
1188       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1189    }
1190    else
1191    {
1192       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1193    }
1194 }
1195
1196 /*******************************************************************
1197  *
1198  * @brief fills the RSSI Measurement by comparing the bitmask
1199  *
1200  * @details
1201  *
1202  *    Function : fillRssiMeas
1203  *
1204  *    Functionality:
1205  *         -checks the value with the bitmask and
1206  *          fills the cellPtr's RSSI Measurement report
1207  *
1208  * @params[in] Pointer to ClCellParam
1209  *             Value to be compared
1210  * @return void
1211  *
1212  ******************************************************************/
1213
1214 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1215 {
1216    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1217    {
1218       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1219    }
1220    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1221    {
1222       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1223    }
1224    else
1225    {
1226       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1227    }
1228 }
1229
1230 /*******************************************************************
1231  *
1232  * @brief Returns the TLVs value
1233  *
1234  * @details
1235  *
1236  *    Function : getParamValue
1237  *
1238  *    Functionality:
1239  *         -return TLVs value
1240  *
1241  * @params[in]
1242  * @return ROK     - temp
1243  *         RFAILED - failure
1244  *
1245  * ****************************************************************/
1246
1247 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1248 {
1249    void *posPtr;
1250    posPtr   = &tlv->tl.tag;
1251    posPtr   += sizeof(tlv->tl.tag);
1252    posPtr   += sizeof(tlv->tl.length);
1253    /*TO DO: malloc to SSI memory */
1254    if(type == FAPI_UINT_8)
1255    {
1256       return(*(uint8_t *)posPtr);
1257    }
1258    else if(type == FAPI_UINT_16)
1259    {
1260       return(*(uint16_t *)posPtr);
1261    }
1262    else if(type == FAPI_UINT_32)
1263    {
1264       return(*(uint32_t *)posPtr);
1265    }
1266    else
1267    {
1268       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1269       return RFAILED;
1270    }
1271 }
1272 #endif /* FAPI */
1273
1274 /*******************************************************************
1275  *
1276  * @brief Modifes the received mibPdu to uint32 bit
1277  *        and stores it in MacCellCfg
1278  *
1279  * @details
1280  *
1281  *    Function : setMibPdu
1282  *
1283  *    Functionality:
1284  *         -Sets the MibPdu
1285  *
1286  * @params[in] Pointer to mibPdu
1287  *             pointer to modified value
1288  ******************************************************************/
1289 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1290 {
1291    *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
1292    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1293    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1294 }
1295
1296 /*******************************************************************
1297  *
1298  * @brief Sends FAPI Param req to PHY
1299  *
1300  * @details
1301  *
1302  *    Function : lwr_mac_procParamReqEvt
1303  *
1304  *    Functionality:
1305  *         -Sends FAPI Param req to PHY
1306  *
1307  * @params[in]
1308  * @return ROK     - success
1309  *         RFAILED - failure
1310  *
1311  * ****************************************************************/
1312
1313 uint8_t lwr_mac_procParamReqEvt(void *msg)
1314 {
1315 #ifdef INTEL_FAPI
1316    /* startGuardTimer(); */
1317    fapi_param_req_t         *paramReq = NULL;
1318    fapi_msg_header_t        *msgHeader;
1319    p_fapi_api_queue_elem_t  paramReqElem;
1320    p_fapi_api_queue_elem_t  headerElem;
1321
1322    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1323    if(paramReq != NULL)
1324    {
1325       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1326          sizeof(fapi_tx_data_req_t));
1327       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1328       memset(paramReq, 0, sizeof(fapi_param_req_t));
1329       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1330
1331       /* Fill message header */
1332       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1333       if(!headerElem)
1334       {
1335          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1336          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1337          return RFAILED;
1338       }
1339       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1340          sizeof(fapi_msg_header_t));
1341       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1342       msgHeader->num_msg = 1;
1343       msgHeader->handle = 0;
1344
1345       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1346       LwrMacSendToL1(headerElem);
1347    }
1348    else
1349    {
1350       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1351       return RFAILED;
1352    }
1353 #endif
1354    return ROK;
1355 }
1356
1357 /*******************************************************************
1358  *
1359  * @brief Sends FAPI Param Response to MAC via PHY
1360  *
1361  * @details
1362  *
1363  *    Function : lwr_mac_procParamRspEvt
1364  *
1365  *    Functionality:
1366  *         -Sends FAPI Param rsp to MAC via PHY
1367  *
1368  * @params[in]
1369  * @return ROK     - success
1370  *         RFAILED - failure
1371  *
1372  * ****************************************************************/
1373
1374 uint8_t lwr_mac_procParamRspEvt(void *msg)
1375 {
1376 #ifdef INTEL_FAPI
1377    /* stopGuardTimer(); */
1378    uint8_t index;
1379    uint32_t encodedVal;
1380    fapi_param_resp_t *paramRsp;
1381    ClCellParam *cellParam = NULLP;
1382
1383    paramRsp = (fapi_param_resp_t *)msg;
1384    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1385
1386    if(paramRsp != NULLP)
1387    {
1388       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1389       if(cellParam != NULLP)
1390       {
1391          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1392          if(paramRsp->error_code == MSG_OK)
1393          {
1394             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1395             {
1396                switch(paramRsp->tlvs[index].tl.tag)
1397                {
1398                   case FAPI_RELEASE_CAPABILITY_TAG:
1399                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1400                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1401                      {
1402                         cellParam->releaseCapability = RELEASE_15;
1403                      }
1404                      break;
1405
1406                   case FAPI_PHY_STATE_TAG:
1407                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1408                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1409                      {
1410                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1411                         return RFAILED;
1412                      }
1413                      break;
1414
1415                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1416                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1417                      if(encodedVal != RFAILED && encodedVal != 0)
1418                      {
1419                         cellParam->skipBlankDlConfig = SUPPORTED;
1420                      }
1421                      else
1422                      {
1423                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1424                      }
1425                      break;
1426
1427                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1428                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1429                      if(encodedVal != RFAILED && encodedVal != 0)
1430                      {
1431                         cellParam->skipBlankUlConfig = SUPPORTED;
1432                      }
1433                      else
1434                      {
1435                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1436                      }
1437                      break;
1438
1439                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1440                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1441                      break;
1442
1443                   case FAPI_CYCLIC_PREFIX_TAG:
1444                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1445                      if(encodedVal != RFAILED)
1446                      {
1447                         fillCyclicPrefix(encodedVal, &cellParam);
1448                      }
1449                      break;
1450
1451                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1452                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1453                      if(encodedVal != RFAILED)
1454                      {
1455                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1456                      }
1457                      break;
1458
1459                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1460                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1461                      if(encodedVal != RFAILED)
1462                      {
1463                         fillBandwidthDl(encodedVal, &cellParam);
1464                      }
1465                      break;
1466
1467                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1468                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1469                      if(encodedVal != RFAILED)
1470                      {
1471                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1472                      }
1473                      break;
1474
1475                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1476                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1477                      if(encodedVal != RFAILED)
1478                      {
1479                         fillBandwidthUl(encodedVal, &cellParam);
1480                      }
1481                      break;
1482
1483                   case FAPI_CCE_MAPPING_TYPE_TAG:
1484                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1485                      if(encodedVal != RFAILED)
1486                      {
1487                         fillCCEmaping(encodedVal, &cellParam);
1488                      }
1489                      break;
1490
1491                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1492                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1493                      if(encodedVal != RFAILED && encodedVal != 0)
1494                      {
1495                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1496                      }
1497                      else
1498                      {
1499                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1500                      }
1501                      break;
1502
1503                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1504                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1505                      if(encodedVal != RFAILED && encodedVal != 0)
1506                      {
1507                         cellParam->precoderGranularityCoreset = SUPPORTED;
1508                      }
1509                      else
1510                      {
1511                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1512                      }
1513                      break;
1514
1515                   case FAPI_PDCCH_MU_MIMO_TAG:
1516                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1517                      if(encodedVal != RFAILED && encodedVal != 0)
1518                      {
1519                         cellParam->pdcchMuMimo = SUPPORTED;
1520                      }
1521                      else
1522                      {
1523                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1524                      }
1525                      break;
1526
1527                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1528                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1529                      if(encodedVal != RFAILED && encodedVal != 0)
1530                      {
1531                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1532                      }
1533                      else
1534                      {
1535                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1536                      }
1537                      break;
1538
1539                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1540                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1541                      break;
1542
1543                   case FAPI_PUCCH_FORMATS_TAG:
1544                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1545                      if(encodedVal != RFAILED)
1546                      {
1547                         fillPucchFormat(encodedVal, &cellParam);
1548                      }
1549                      break;
1550
1551                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1552                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1553                      break;
1554
1555                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1556                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1557                      if(encodedVal != RFAILED)
1558                      {
1559                         fillPdschMappingType(encodedVal, &cellParam);
1560                      }
1561                      break;
1562
1563                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1564                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1565                      if(encodedVal != RFAILED)
1566                      {
1567                         fillPdschAllocationType(encodedVal, &cellParam);
1568                      }
1569                      break;
1570
1571                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1572                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1573                      if(encodedVal != RFAILED)
1574                      {
1575                         fillPrbMappingType(encodedVal, &cellParam);
1576                      }
1577                      break;
1578
1579                   case FAPI_PDSCH_CBG_TAG:
1580                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1581                      if(encodedVal != RFAILED && encodedVal != 0)
1582                      {
1583                         cellParam->pdschCbg = SUPPORTED;
1584                      }
1585                      else
1586                      {
1587                         cellParam->pdschCbg = NOT_SUPPORTED;
1588                      }
1589                      break;
1590
1591                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1592                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1593                      if(encodedVal != RFAILED)
1594                      {
1595                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1596                      }
1597                      break;
1598
1599                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1600                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1601                      if(encodedVal != RFAILED)
1602                      {
1603                         fillPdschDmrsLength(encodedVal, &cellParam);
1604                      }
1605                      break;
1606
1607                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1608                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1609                      if(encodedVal != RFAILED)
1610                      {
1611                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1612                      }
1613                      break;
1614
1615                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1616                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1617                      break;
1618
1619                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1620                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1621                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1622                      {
1623                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1624                      }
1625                      break;
1626
1627                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1628                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1629                      if(encodedVal != RFAILED)
1630                      {
1631                         fillModulationOrderDl(encodedVal, &cellParam);
1632                      }
1633                      break;
1634
1635                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1636                      cellParam->maxMuMimoUsersDl         = \
1637                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1638                      break;
1639
1640                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1641                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1642                      if(encodedVal != RFAILED && encodedVal != 0)
1643                      {
1644                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1645                      }
1646                      else
1647                      {
1648                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1649                      }
1650                      break;
1651
1652                   case FAPI_PREMPTIONSUPPORT_TAG:
1653                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1654                      if(encodedVal != RFAILED && encodedVal != 0)
1655                      {
1656                         cellParam->premptionSupport = SUPPORTED;
1657                      }
1658                      else
1659                      {
1660                         cellParam->premptionSupport = NOT_SUPPORTED;
1661                      }
1662                      break;
1663
1664                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1665                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1666                      if(encodedVal != RFAILED && encodedVal != 0)
1667                      {
1668                         cellParam->pdschNonSlotSupport = SUPPORTED;
1669                      }
1670                      else
1671                      {
1672                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1673                      }
1674                      break;
1675
1676                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1677                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1678                      if(encodedVal != RFAILED && encodedVal != 0)
1679                      {
1680                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1681                      }
1682                      else
1683                      {
1684                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1685                      }
1686                      break;
1687
1688                   case FAPI_UCI_ONLY_PUSCH_TAG:
1689                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1690                      if(encodedVal != RFAILED && encodedVal != 0)
1691                      {
1692                         cellParam->uciOnlyPusch = SUPPORTED;
1693                      }
1694                      else
1695                      {
1696                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1697                      }
1698                      break;
1699
1700                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1701                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1702                      if(encodedVal != RFAILED && encodedVal != 0)
1703                      {
1704                         cellParam->puschFrequencyHopping = SUPPORTED;
1705                      }
1706                      else
1707                      {
1708                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1709                      }
1710                      break;
1711
1712                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1713                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1714                      if(encodedVal != RFAILED)
1715                      {
1716                         fillPuschDmrsConfig(encodedVal, &cellParam);
1717                      }
1718                      break;
1719
1720                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1721                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1722                      if(encodedVal != RFAILED)
1723                      {
1724                         fillPuschDmrsLength(encodedVal, &cellParam);
1725                      }
1726                      break;
1727
1728                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1729                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1730                      if(encodedVal != RFAILED)
1731                      {
1732                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1733                      }
1734                      break;
1735
1736                   case FAPI_PUSCH_CBG_TAG:
1737                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1738                      if(encodedVal != RFAILED && encodedVal != 0)
1739                      {
1740                         cellParam->puschCbg = SUPPORTED;
1741                      }
1742                      else
1743                      {
1744                         cellParam->puschCbg = NOT_SUPPORTED;
1745                      }
1746                      break;
1747
1748                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1749                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1750                      if(encodedVal != RFAILED)
1751                      {
1752                         fillPuschMappingType(encodedVal, &cellParam);
1753                      }
1754                      break;
1755
1756                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1757                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1758                      if(encodedVal != RFAILED)
1759                      {
1760                         fillPuschAllocationType(encodedVal, &cellParam);
1761                      }
1762                      break;
1763
1764                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1765                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1766                      if(encodedVal != RFAILED)
1767                      {
1768                         fillPuschPrbMappingType(encodedVal, &cellParam);
1769                      }
1770                      break;
1771
1772                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1773                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1774                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1775                      {
1776                         cellParam->puschMaxPtrsPorts = encodedVal;
1777                      }
1778                      break;
1779
1780                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1781                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1782                      break;
1783
1784                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1785                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1786                      break;
1787
1788                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1789                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1790                      if(encodedVal != RFAILED)
1791                      {
1792                         fillModulationOrderUl(encodedVal, &cellParam);
1793                      }
1794                      break;
1795
1796                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1797                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1798                      break;
1799
1800                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1801                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1802                      if(encodedVal != RFAILED && encodedVal != 0)
1803                      {
1804                         cellParam->dftsOfdmSupport = SUPPORTED;
1805                      }
1806                      else
1807                      {
1808                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1809                      }
1810                      break;
1811
1812                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1813                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1814                      if(encodedVal != RFAILED)
1815                      {
1816                         fillPuschAggregationFactor(encodedVal, &cellParam);
1817                      }
1818                      break;
1819
1820                   case FAPI_PRACH_LONG_FORMATS_TAG:
1821                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1822                      if(encodedVal != RFAILED)
1823                      {
1824                         fillPrachLongFormat(encodedVal, &cellParam);
1825                      }
1826                      break;
1827
1828                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1829                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1830                      if(encodedVal != RFAILED)
1831                      {
1832                         fillPrachShortFormat(encodedVal, &cellParam);
1833                      }
1834                      break;
1835
1836                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1837                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1838                      if(encodedVal != RFAILED && encodedVal != 0)
1839                      {
1840                         cellParam->prachRestrictedSets = SUPPORTED;
1841                      }
1842                      else
1843                      {
1844                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1845                      }
1846                      break;
1847
1848                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1849                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1850                      if(encodedVal != RFAILED)
1851                      {
1852                         fillFdOccasions(encodedVal, &cellParam);
1853                      }
1854                      break;
1855
1856                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1857                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1858                      if(encodedVal != RFAILED)
1859                      {
1860                         fillRssiMeas(encodedVal, &cellParam);
1861                      }
1862                      break;
1863                   default:
1864                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1865                      break;
1866                }
1867             }
1868             MAC_FREE(cellParam, sizeof(ClCellParam));
1869             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1870             return ROK;
1871          }
1872          else
1873          {
1874             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1875             return RFAILED;
1876          }
1877       }
1878       else
1879       {
1880          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1881          return RFAILED;
1882       }
1883    }
1884    else
1885    {
1886       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1887       return RFAILED;
1888    }
1889 #else
1890    return ROK;
1891 #endif
1892 }
1893
1894 #ifdef INTEL_TIMER_MODE
1895 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1896 {
1897    void * wlsHdlr = NULLP;
1898    fapi_msg_header_t *msgHeader;
1899    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1900    p_fapi_api_queue_elem_t  headerElem;
1901    p_fapi_api_queue_elem_t  iqSampleElem;
1902    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1903
1904    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1905
1906    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1907
1908    /* Fill IQ sample req */
1909    mtGetWlsHdl(&wlsHdlr);
1910    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1911       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1912    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1913    if(!iqSampleElem)
1914    {
1915       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1916       return RFAILED;
1917    }
1918    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1919       sizeof(fapi_vendor_ext_iq_samples_req_t));
1920
1921    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1922    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1923    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1924       sizeof(fapi_vendor_ext_iq_samples_req_t));
1925
1926    iqSampleReq->iq_samples_info.carrNum = 0;
1927    iqSampleReq->iq_samples_info.numSubframes = 40;
1928    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1929    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1930    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1931    iqSampleReq->iq_samples_info.startFrameNum = 0;
1932    iqSampleReq->iq_samples_info.startSlotNum = 0;
1933    iqSampleReq->iq_samples_info.startSymNum = 0;
1934    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1935    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1936
1937    /* TODO : Fill remaining parameters */
1938
1939    /* Fill message header */
1940    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1941    if(!headerElem)
1942    {
1943       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1944       return RFAILED;
1945    }
1946    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1947      sizeof(fapi_msg_header_t));
1948    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1949    msgHeader->num_msg = 1;
1950    msgHeader->handle = 0;
1951
1952    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1953    LwrMacSendToL1(headerElem);
1954    return ROK;
1955 }
1956 #endif
1957
1958 /*******************************************************************
1959  *
1960  * @brief Sends FAPI Config req to PHY
1961  *
1962  * @details
1963  *
1964  *    Function : lwr_mac_procConfigReqEvt
1965  *
1966  *    Functionality:
1967  *         -Sends FAPI Config Req to PHY
1968  *
1969  * @params[in]
1970  * @return ROK     - success
1971  *         RFAILED - failure
1972  *
1973  * ****************************************************************/
1974
1975 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1976 {
1977 #ifdef INTEL_FAPI
1978 #ifdef NR_TDD
1979    uint8_t slotIdx = 0;
1980    uint8_t symbolIdx =0;
1981 #endif
1982    uint8_t index = 0;
1983    uint16_t *cellId =NULLP;
1984    uint16_t cellIdx =0;
1985    uint32_t msgLen = 0;
1986    uint32_t mib = 0;
1987    MacCellCfg macCfgParams;
1988    fapi_vendor_msg_t *vendorMsg;
1989    fapi_config_req_t *configReq;
1990    fapi_msg_header_t *msgHeader;
1991    p_fapi_api_queue_elem_t  headerElem;
1992    p_fapi_api_queue_elem_t  vendorMsgQElem;
1993    p_fapi_api_queue_elem_t  cfgReqQElem;
1994
1995    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1996          lwrMacCb.phyState);
1997
1998    cellId = (uint16_t *)msg;
1999    GET_CELL_IDX(*cellId, cellIdx);
2000    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2001
2002    /* Fill Cell Configuration in lwrMacCb */
2003    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2004    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2005    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2006    lwrMacCb.numCell++;
2007
2008    /* Allocte And fill Vendor msg */
2009    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2010    if(!vendorMsgQElem)
2011    {
2012       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2013       return RFAILED;
2014    }
2015    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2016    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2017    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2018    vendorMsg->config_req_vendor.hopping_id = 0;
2019    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2020    vendorMsg->config_req_vendor.group_hop_flag = 0;
2021    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2022
2023    /* Fill FAPI config req */
2024    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2025    if(!cfgReqQElem)
2026    {
2027       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2028       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2029       return RFAILED;
2030    }
2031    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2032       sizeof(fapi_config_req_t));
2033
2034    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2035    memset(configReq, 0, sizeof(fapi_config_req_t));
2036    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2037    configReq->number_of_tlvs = 25;
2038    msgLen = sizeof(configReq->number_of_tlvs);
2039
2040    if(macCfgParams.dlCarrCfg.pres)
2041    {
2042       fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2043          sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2044       fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2045          sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2046       /* Due to bug in Intel FT code, commenting TLVs that are are not
2047        * needed to avoid error. Must be uncommented when FT bug is fixed */
2048       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2049          sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2050       //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2051          sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2052       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2053          sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2054    }
2055    if(macCfgParams.ulCarrCfg.pres)
2056    {
2057       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2058             sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2059       fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2060             sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2061       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2062       sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2063       //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2064       sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2065       fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2066             sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2067    }
2068    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2069    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2070
2071    /* fill cell config */
2072    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2073          sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2074    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2075          sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2076
2077    /* fill SSB configuration */
2078    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2079          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2080    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2081    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2082    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2083          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2084
2085    /* fill PRACH configuration */
2086    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2087    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2088    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2089          sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2090    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2091          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2092    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2093          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2094    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2095          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2096    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2097          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2098    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2099    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2100    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2101          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2102    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2103          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2104    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2105    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2106    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2107       {
2108       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2109       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2110       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2111       &msgLen);
2112       }
2113       else
2114       {
2115       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2116       }*/
2117
2118    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2119          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2120    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2121    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2122
2123    /* fill SSB table */
2124    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2125          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2126    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2127    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2128    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2129          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2130    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2131          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2132
2133    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2134    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2135          sizeof(uint32_t), mib, &msgLen);
2136
2137    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2138          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2139    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2140          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2141    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2142    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2143    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2144    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2145
2146 #ifdef NR_TDD
2147    /* fill TDD table */
2148    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2149    sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2150    for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2151    {
2152       for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2153       {
2154          fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2155                sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2156       }
2157    }
2158 #endif
2159
2160    /* fill measurement config */
2161    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2162    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2163
2164    /* fill DMRS Type A Pos */
2165    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2166          sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2167
2168    /* Fill message header */
2169    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2170    if(!headerElem)
2171    {
2172       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2173       LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2174       LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2175       return RFAILED;
2176    }
2177    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2178          sizeof(fapi_msg_header_t));
2179    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2180    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2181    msgHeader->handle = 0;
2182
2183    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2184    LwrMacSendToL1(headerElem);
2185 #endif
2186
2187    return ROK;
2188 } /* lwr_mac_handleConfigReqEvt */
2189
2190 /*******************************************************************
2191  *
2192  * @brief Processes config response from phy
2193  *
2194  * @details
2195  *
2196  *    Function : lwr_mac_procConfigRspEvt
2197  *
2198  *    Functionality:
2199  *          Processes config response from phy
2200  *
2201  * @params[in] FAPI message pointer
2202  * @return ROK     - success
2203  *         RFAILED - failure
2204  *
2205  * ****************************************************************/
2206
2207 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2208 {
2209 #ifdef INTEL_FAPI
2210    fapi_config_resp_t *configRsp;
2211    configRsp = (fapi_config_resp_t *)msg;
2212
2213    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2214          lwrMacCb.phyState);
2215
2216    if(configRsp != NULL)
2217    {
2218       if(configRsp->error_code == MSG_OK)
2219       {
2220          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2221          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2222          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2223          /* TODO :
2224           * Store config response into an intermediate struture and send to MAC
2225           * Support LC and LWLC for sending config rsp to MAC
2226           */
2227          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2228       }
2229       else
2230       {
2231          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2232          return RFAILED;
2233       }
2234    }
2235    else
2236    {
2237       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2238       return RFAILED;
2239    }
2240 #endif
2241
2242    return ROK;
2243 } /* lwr_mac_procConfigRspEvt */
2244
2245 /*******************************************************************
2246  *
2247  * @brief Build and send start request to phy
2248  *
2249  * @details
2250  *
2251  *    Function : lwr_mac_procStartReqEvt
2252  *
2253  *    Functionality:
2254  *       Build and send start request to phy
2255  *
2256  * @params[in] FAPI message pointer
2257  * @return ROK     - success
2258  *         RFAILED - failure
2259  *
2260  * ****************************************************************/
2261 uint8_t lwr_mac_procStartReqEvt(void *msg)
2262 {
2263 #ifdef INTEL_FAPI
2264    fapi_msg_header_t *msgHeader;
2265    fapi_start_req_t *startReq;
2266    fapi_vendor_msg_t *vendorMsg;
2267    p_fapi_api_queue_elem_t  headerElem;
2268    p_fapi_api_queue_elem_t  startReqElem;
2269    p_fapi_api_queue_elem_t  vendorMsgElem;
2270
2271    /* Allocte And fill Vendor msg */
2272    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2273    if(!vendorMsgElem)
2274    {
2275       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2276       return RFAILED;
2277    }
2278    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2279    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2280    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2281    vendorMsg->start_req_vendor.sfn = 0;
2282    vendorMsg->start_req_vendor.slot = 0;
2283    vendorMsg->start_req_vendor.mode = 1; /* for FDD */
2284 #ifdef DEBUG_MODE
2285    vendorMsg->start_req_vendor.count = 0;
2286    vendorMsg->start_req_vendor.period = 1;
2287 #endif
2288
2289    /* Fill FAPI config req */
2290    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2291    if(!startReqElem)
2292    {
2293       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2294       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2295       return RFAILED;
2296    }
2297    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2298       sizeof(fapi_start_req_t));
2299
2300    startReq = (fapi_start_req_t *)(startReqElem + 1);
2301    memset(startReq, 0, sizeof(fapi_start_req_t));
2302    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2303
2304    /* Fill message header */
2305    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2306    if(!headerElem)
2307    {
2308       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2309       LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2310       LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2311       return RFAILED;
2312    }
2313    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2314       sizeof(fapi_msg_header_t));
2315    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2316    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2317    msgHeader->handle = 0;
2318
2319    /* Send to PHY */
2320    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2321    LwrMacSendToL1(headerElem);
2322 #endif
2323    return ROK;
2324 } /* lwr_mac_procStartReqEvt */
2325
2326 /*******************************************************************
2327  *
2328  * @brief Sends FAPI Stop Req to PHY
2329  *
2330  * @details
2331  *
2332  *    Function : lwr_mac_procStopReqEvt
2333  *
2334  *    Functionality:
2335  *         -Sends FAPI Stop Req to PHY
2336  *
2337  * @params[in]
2338  * @return ROK     - success
2339  *         RFAILED - failure
2340  *
2341  ********************************************************************/
2342
2343 uint8_t lwr_mac_procStopReqEvt(void *msg)
2344 {
2345 #ifdef INTEL_FAPI
2346    SlotIndInfo       *slotInfo;
2347    fapi_msg_header_t *msgHeader;
2348    fapi_stop_req_t   *stopReq;
2349    fapi_vendor_msg_t *vendorMsg;
2350    p_fapi_api_queue_elem_t  headerElem;
2351    p_fapi_api_queue_elem_t  stopReqElem;
2352    p_fapi_api_queue_elem_t  vendorMsgElem;
2353
2354    slotInfo = (SlotIndInfo *)msg;
2355
2356    /* Allocte And fill Vendor msg */
2357    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2358    if(!vendorMsgElem)
2359    {
2360       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in stop req");
2361       return RFAILED;
2362    }
2363    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2364    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2365    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2366    vendorMsg->stop_req_vendor.sfn = slotInfo->sfn;
2367    vendorMsg->stop_req_vendor.slot = slotInfo->slot;
2368
2369    /* Fill FAPI stop req */
2370    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2371    if(!stopReqElem)
2372    {
2373       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2374       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2375       return RFAILED;
2376    }
2377    FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2378       sizeof(fapi_stop_req_t));
2379    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2380    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2381    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2382
2383    /* Fill message header */
2384    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2385    if(!headerElem)
2386    {
2387       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in stop req");
2388       LWR_MAC_FREE(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2389       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2390       return RFAILED;
2391    }
2392    FILL_FAPI_LIST_ELEM(headerElem, stopReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2393       sizeof(fapi_msg_header_t));
2394    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2395    msgHeader->num_msg = 2; /* Stop req msg and vendor specific msg */
2396    msgHeader->handle = 0;
2397
2398    /* Send to PHY */
2399    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2400    LwrMacSendToL1(headerElem);
2401
2402 #endif
2403    return ROK;
2404 }
2405
2406 #ifdef INTEL_FAPI
2407 /*******************************************************************
2408  *
2409  * @brief fills SSB PDU required for DL TTI info in MAC
2410  *
2411  * @details
2412  *
2413  *    Function : fillSsbPdu
2414  *
2415  *    Functionality:
2416  *         -Fills the SSB PDU info
2417  *          stored in MAC
2418  *
2419  * @params[in] Pointer to FAPI DL TTI Req
2420  *             Pointer to RgCellCb
2421  *             Pointer to msgLen of DL TTI Info
2422  * @return ROK
2423  *
2424  ******************************************************************/
2425
2426 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2427       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2428 {
2429    uint32_t mibPayload = 0;
2430    if(dlTtiReqPdu != NULL)
2431    {
2432       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2433       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2434       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2435       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2436       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2437       /* ssbOfPdufstA to be filled in ssbCfg */
2438       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2439       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2440       /* Bit manipulation for SFN */
2441       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2442       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2443       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2444       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2445       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2446       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2447       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2448          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2449       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2450
2451       return ROK;
2452    }
2453    return RFAILED;
2454 }
2455
2456 /*******************************************************************
2457  *
2458  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2459  *
2460  * @details
2461  *
2462  *    Function : fillSib1DlDciPdu
2463  *
2464  *    Functionality:
2465  *         -Fills the Dl DCI PDU
2466  *
2467  * @params[in] Pointer to fapi_dl_dci_t
2468  *             Pointer to PdcchCfg
2469  * @return ROK
2470  *
2471  ******************************************************************/
2472
2473 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2474 {
2475    if(dlDciPtr != NULLP)
2476    {
2477       uint8_t numBytes=0;
2478       uint8_t bytePos=0;
2479       uint8_t bitPos=0;
2480
2481       uint16_t coreset0Size=0;
2482       uint16_t rbStart=0;
2483       uint16_t rbLen=0;
2484       uint32_t freqDomResAssign=0;
2485       uint32_t timeDomResAssign=0;
2486       uint8_t  VRB2PRBMap=0;
2487       uint32_t modNCodScheme=0;
2488       uint8_t  redundancyVer=0;
2489       uint32_t sysInfoInd=0;
2490       uint32_t reserved=0;
2491
2492       /* Size(in bits) of each field in DCI format 0_1
2493        * as mentioned in spec 38.214 */
2494       uint8_t freqDomResAssignSize = 0;
2495       uint8_t timeDomResAssignSize = 4;
2496       uint8_t VRB2PRBMapSize       = 1;
2497       uint8_t modNCodSchemeSize    = 5;
2498       uint8_t redundancyVerSize    = 2;
2499       uint8_t sysInfoIndSize       = 1;
2500       uint8_t reservedSize         = 15;
2501
2502       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2503       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2504       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2505       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2506       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2507       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2508       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2509       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2510       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2511       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2512       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2513       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2514
2515       /* Calculating freq domain resource allocation field value and size
2516        * coreset0Size = Size of coreset 0
2517        * RBStart = Starting Virtual Rsource block
2518        * RBLen = length of contiguously allocted RBs
2519        * Spec 38.214 Sec 5.1.2.2.2
2520        */
2521       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2522       rbStart = 0;              /* For SIB1 */
2523       //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2524       rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2525
2526       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2527       {
2528          if((rbLen - 1) <= floor(coreset0Size / 2))
2529             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2530          else
2531             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2532                                + (coreset0Size - 1 - rbStart);
2533
2534          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2535       }
2536
2537       /* Fetching DCI field values */
2538       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2539          rowIndex -1;
2540       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2541                          vrbPrbMapping;
2542       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2543       redundancyVer    = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2544       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2545       reserved         = 0;
2546
2547       /* Reversing bits in each DCI field */
2548       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2549       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2550       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2551       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2552       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2553       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2554
2555       /* Calulating total number of bytes in buffer */
2556       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2557                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2558                                   + sysInfoIndSize + reservedSize;
2559
2560       numBytes = dlDciPtr->payloadSizeBits / 8;
2561       if(dlDciPtr->payloadSizeBits % 8)
2562          numBytes += 1;
2563
2564       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2565       {
2566          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2567          return;
2568       }
2569
2570       /* Initialize buffer */
2571       for(bytePos = 0; bytePos < numBytes; bytePos++)
2572          dlDciPtr->payload[bytePos] = 0;
2573
2574       bytePos = numBytes - 1;
2575       bitPos = 0;
2576
2577       /* Packing DCI format fields */
2578       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2579             freqDomResAssign, freqDomResAssignSize);
2580       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2581             timeDomResAssign, timeDomResAssignSize);
2582       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2583             VRB2PRBMap, VRB2PRBMapSize);
2584       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2585             modNCodScheme, modNCodSchemeSize);
2586       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2587             redundancyVer, redundancyVerSize);
2588       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2589             sysInfoInd, sysInfoIndSize);
2590       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2591             reserved, reservedSize);
2592
2593    }
2594 } /* fillSib1DlDciPdu */
2595
2596 /*******************************************************************
2597  *
2598  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2599  *
2600  * @details
2601  *
2602  *    Function : fillRarDlDciPdu
2603  *
2604  *    Functionality:
2605  *         -Fills the Dl DCI PDU
2606  *
2607  * @params[in] Pointer to fapi_dl_dci_t
2608  *             Pointer to PdcchCfg
2609  * @return ROK
2610  *
2611  ******************************************************************/
2612
2613 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2614 {
2615    if(dlDciPtr != NULLP)
2616    {
2617       uint8_t numBytes =0;
2618       uint8_t bytePos =0;
2619       uint8_t bitPos =0;
2620
2621       uint16_t coreset0Size =0;
2622       uint16_t rbStart =0;
2623       uint16_t rbLen =0;
2624       uint32_t freqDomResAssign =0;
2625       uint8_t timeDomResAssign =0;
2626       uint8_t  VRB2PRBMap =0;
2627       uint8_t modNCodScheme =0;
2628       uint8_t tbScaling =0;
2629       uint32_t reserved =0;
2630
2631       /* Size(in bits) of each field in DCI format 1_0 */
2632       uint8_t freqDomResAssignSize = 0;
2633       uint8_t timeDomResAssignSize = 4;
2634       uint8_t VRB2PRBMapSize       = 1;
2635       uint8_t modNCodSchemeSize    = 5;
2636       uint8_t tbScalingSize        = 2;
2637       uint8_t reservedSize         = 16;
2638
2639       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2640       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2641       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2642       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2643       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2644       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2645       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2646       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2647       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2648       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2649       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2650       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2651
2652       /* Calculating freq domain resource allocation field value and size
2653        * coreset0Size = Size of coreset 0
2654        * RBStart = Starting Virtual Rsource block
2655        * RBLen = length of contiguously allocted RBs
2656        * Spec 38.214 Sec 5.1.2.2.2
2657        */
2658
2659       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2660       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2661       rbStart = 0;              /* For SIB1 */
2662       //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2663       rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2664
2665       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2666       {
2667          if((rbLen - 1) <= floor(coreset0Size / 2))
2668             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2669          else
2670             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2671                                + (coreset0Size - 1 - rbStart);
2672
2673          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2674       }
2675
2676       /* Fetching DCI field values */
2677       timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2678       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2679       modNCodScheme    = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2680       tbScaling        = 0; /* configured to 0 scaling */
2681       reserved         = 0;
2682
2683       /* Reversing bits in each DCI field */
2684       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2685       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2686       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2687       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2688       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2689
2690       /* Calulating total number of bytes in buffer */
2691       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2692                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2693
2694       numBytes = dlDciPtr->payloadSizeBits / 8;
2695       if(dlDciPtr->payloadSizeBits % 8)
2696          numBytes += 1;
2697
2698       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2699       {
2700          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2701          return;
2702       }
2703
2704       /* Initialize buffer */
2705       for(bytePos = 0; bytePos < numBytes; bytePos++)
2706          dlDciPtr->payload[bytePos] = 0;
2707
2708       bytePos = numBytes - 1;
2709       bitPos = 0;
2710
2711       /* Packing DCI format fields */
2712       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2713             freqDomResAssign, freqDomResAssignSize);
2714       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2715             timeDomResAssign, timeDomResAssignSize);
2716       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2717             VRB2PRBMap, VRB2PRBMapSize);
2718       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2719             modNCodScheme, modNCodSchemeSize);
2720       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2721             tbScaling, tbScalingSize);
2722       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2723             reserved, reservedSize);
2724    }
2725 } /* fillRarDlDciPdu */
2726
2727 /*******************************************************************
2728  *
2729  * @brief fills DL DCI PDU required for DL TTI info in MAC
2730  *
2731  * @details
2732  *
2733  *    Function : fillDlMsgDlDciPdu
2734  *
2735  *    Functionality:
2736  *         -Fills the Dl DCI PDU
2737  *
2738  * @params[in] Pointer to fapi_dl_dci_t
2739  *             Pointer to PdcchCfg
2740  * @return ROK
2741  *
2742  ******************************************************************/
2743 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2744       DlMsgInfo *dlMsgInfo)
2745 {
2746    if(dlDciPtr != NULLP)
2747    {
2748       uint8_t numBytes;
2749       uint8_t bytePos;
2750       uint8_t bitPos;
2751
2752       uint16_t coresetSize = 0;
2753       uint16_t rbStart = 0;
2754       uint16_t rbLen = 0;
2755       uint8_t  dciFormatId;
2756       uint32_t freqDomResAssign;
2757       uint8_t  timeDomResAssign;
2758       uint8_t  VRB2PRBMap;
2759       uint8_t  modNCodScheme;
2760       uint8_t  ndi = 0;
2761       uint8_t  redundancyVer = 0;
2762       uint8_t  harqProcessNum = 0;
2763       uint8_t  dlAssignmentIdx = 0;
2764       uint8_t  pucchTpc = 0;
2765       uint8_t  pucchResoInd = 0;
2766       uint8_t  harqFeedbackInd = 0;
2767
2768       /* Size(in bits) of each field in DCI format 1_0 */
2769       uint8_t dciFormatIdSize    = 1;
2770       uint8_t freqDomResAssignSize = 0;
2771       uint8_t timeDomResAssignSize = 4;
2772       uint8_t VRB2PRBMapSize       = 1;
2773       uint8_t modNCodSchemeSize    = 5;
2774       uint8_t ndiSize              = 1;
2775       uint8_t redundancyVerSize    = 2;
2776       uint8_t harqProcessNumSize   = 4;
2777       uint8_t dlAssignmentIdxSize  = 2;
2778       uint8_t pucchTpcSize         = 2;
2779       uint8_t pucchResoIndSize     = 3;
2780       uint8_t harqFeedbackIndSize  = 3;
2781
2782       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2783       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2784       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2785       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2786       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2787       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2788       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2789       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2790       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2791       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2792       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2793       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2794
2795       /* Calculating freq domain resource allocation field value and size
2796        * coreset0Size = Size of coreset 0
2797        * RBStart = Starting Virtual Rsource block
2798        * RBLen = length of contiguously allocted RBs
2799        * Spec 38.214 Sec 5.1.2.2.2
2800        */
2801       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2802       rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2803       rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2804
2805       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2806       {
2807          if((rbLen - 1) <= floor(coresetSize / 2))
2808             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2809          else
2810             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2811                                + (coresetSize - 1 - rbStart);
2812
2813          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2814       }
2815
2816       /* Fetching DCI field values */
2817       dciFormatId      = dlMsgInfo->dciFormatId;     /* Always set to 1 for DL */
2818       timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2819       VRB2PRBMap       = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2820       modNCodScheme    = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2821       ndi              = dlMsgInfo->ndi;
2822       redundancyVer    = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2823       harqProcessNum   = dlMsgInfo->harqProcNum;
2824       dlAssignmentIdx  = dlMsgInfo->dlAssignIdx;
2825       pucchTpc         = dlMsgInfo->pucchTpc;
2826       pucchResoInd     = dlMsgInfo->pucchResInd;
2827       harqFeedbackInd  = dlMsgInfo->harqFeedbackInd;
2828
2829       /* Reversing bits in each DCI field */
2830       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
2831       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2832       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2833       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2834       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2835       ndi              = reverseBits(ndi, ndiSize);
2836       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2837       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
2838       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2839       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
2840       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
2841       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2842
2843
2844       /* Calulating total number of bytes in buffer */
2845       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2846             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2847             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2848             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2849
2850       numBytes = dlDciPtr->payloadSizeBits / 8;
2851       if(dlDciPtr->payloadSizeBits % 8)
2852          numBytes += 1;
2853
2854       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2855       {
2856          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2857          return;
2858       }
2859
2860       /* Initialize buffer */
2861       for(bytePos = 0; bytePos < numBytes; bytePos++)
2862          dlDciPtr->payload[bytePos] = 0;
2863
2864       bytePos = numBytes - 1;
2865       bitPos = 0;
2866
2867       /* Packing DCI format fields */
2868       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2869             dciFormatId, dciFormatIdSize);
2870       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2871             freqDomResAssign, freqDomResAssignSize);
2872       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2873             timeDomResAssign, timeDomResAssignSize);
2874       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2875             VRB2PRBMap, VRB2PRBMapSize);
2876       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2877             modNCodScheme, modNCodSchemeSize);
2878       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2879             ndi, ndiSize);
2880       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2881             redundancyVer, redundancyVerSize);
2882       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2883             redundancyVer, redundancyVerSize);
2884       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2885             harqProcessNum, harqProcessNumSize);
2886       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2887             dlAssignmentIdx, dlAssignmentIdxSize);
2888       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2889             pucchTpc, pucchTpcSize);
2890       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2891             pucchResoInd, pucchResoIndSize);
2892       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2893             harqFeedbackInd, harqFeedbackIndSize);
2894    }
2895 }
2896
2897 /*******************************************************************
2898  *
2899  * @brief fills PDCCH PDU required for DL TTI info in MAC
2900  *
2901  * @details
2902  *
2903  *    Function : fillPdcchPdu
2904  *
2905  *    Functionality:
2906  *         -Fills the Pdcch PDU info
2907  *          stored in MAC
2908  *
2909  * @params[in] Pointer to FAPI DL TTI Req
2910  *             Pointer to PdcchCfg
2911  * @return ROK
2912  *
2913  ******************************************************************/
2914 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2915       RntiType rntiType, uint8_t coreSetType)
2916 {
2917    if(dlTtiReqPdu != NULLP)
2918    {
2919       PdcchCfg *pdcchInfo = NULLP;
2920       BwpCfg *bwp = NULLP;
2921
2922       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2923       if(rntiType == SI_RNTI_TYPE)
2924       {
2925          pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2926          bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2927          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2928       }
2929       else if(rntiType == RA_RNTI_TYPE)
2930       {
2931          pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2932          bwp = &dlInfo->rarAlloc->bwp;
2933          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2934       }
2935       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2936       {
2937          pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2938          bwp = &dlInfo->dlMsgAlloc->bwp;
2939          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2940             &dlInfo->dlMsgAlloc->dlMsgInfo);
2941       }
2942       else
2943       {
2944          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
2945          return RFAILED;
2946       }
2947       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2948       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2949       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2950       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2951       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2952       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2953       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2954       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2955       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2956       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2957       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2958       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
2959       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2960       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2961       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2962
2963       /* Calculating PDU length. Considering only one dl dci pdu for now */
2964       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2965    }
2966
2967    return ROK;
2968 }
2969
2970 /*******************************************************************
2971  *
2972  * @brief fills PDSCH PDU required for DL TTI info in MAC
2973  *
2974  * @details
2975  *
2976  *    Function : fillPdschPdu
2977  *
2978  *    Functionality:
2979  *         -Fills the Pdsch PDU info
2980  *          stored in MAC
2981  *
2982  * @params[in] Pointer to FAPI DL TTI Req
2983  *             Pointer to PdschCfg
2984  *             Pointer to msgLen of DL TTI Info
2985  * @return ROK
2986  *
2987  ******************************************************************/
2988
2989 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2990       BwpCfg bwp, uint16_t pduIndex)
2991 {
2992    uint8_t idx;
2993
2994    if(dlTtiReqPdu != NULLP)
2995    {
2996       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2997       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2998       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2999       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3000       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3001       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3002       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3003       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3004       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3005       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3006       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3007       {
3008          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3009          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3010          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3011          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3012          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3013          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3014       }
3015       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3016       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3017       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3018       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3019       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3020       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3021       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3022       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3023       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3024       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3025       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3026       /* since we are using type-1, hence rbBitmap excluded */
3027       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3028       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3029       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3030       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3031       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3032       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3033       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3034       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3035       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3036          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3037       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3038          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3039       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3040       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3041       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3042       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3043       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3044
3045       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3046    }
3047 }
3048
3049 /***********************************************************************
3050  *
3051  * @brief calculates the total size to be allocated for DL TTI Req
3052  *
3053  * @details
3054  *
3055  *    Function : calcDlTtiReqPduCount
3056  *
3057  *    Functionality:
3058  *         -calculates the total pdu count to be allocated for DL TTI Req
3059  *
3060  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3061  * @return count
3062  *
3063  * ********************************************************************/
3064 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3065 {
3066    uint8_t count = 0;
3067    uint8_t idx = 0;
3068
3069    if(dlInfo->isBroadcastPres)
3070    {
3071       if(dlInfo->brdcstAlloc.ssbTrans)
3072       {
3073          for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3074          {
3075             /* SSB PDU is filled */
3076             count++;
3077          }
3078       }
3079       if(dlInfo->brdcstAlloc.sib1Trans)
3080       {
3081          /* PDCCH and PDSCH PDU is filled */
3082          count += 2;
3083       }
3084    }
3085    if(dlInfo->rarAlloc != NULLP)
3086    {
3087       /* PDCCH and PDSCH PDU is filled */
3088       count += 2;
3089    }
3090    if(dlInfo->dlMsgAlloc != NULLP)
3091    {
3092       /* PDCCH and PDSCH PDU is filled */
3093       count += 2;
3094    }
3095    return count;
3096 }
3097
3098 /***********************************************************************
3099  *
3100  * @brief calculates the total size to be allocated for DL TTI Req
3101  *
3102  * @details
3103  *
3104  *    Function : calcTxDataReqPduCount
3105  *
3106  *    Functionality:
3107  *         -calculates the total pdu count to be allocated for DL TTI Req
3108  *
3109  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3110  * @return count
3111  *
3112  * ********************************************************************/
3113 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3114 {
3115    uint8_t count = 0;
3116
3117    if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3118    {
3119       count++;
3120    }
3121    if(dlInfo->rarAlloc != NULLP)
3122    {
3123       count++;
3124    }
3125    if(dlInfo->dlMsgAlloc != NULLP)
3126    {
3127       count++;
3128    }
3129    return count;
3130 }
3131 /***********************************************************************
3132  *
3133  * @brief fills the SIB1 TX-DATA request message
3134  *
3135  * @details
3136  *
3137  *    Function : fillSib1TxDataReq
3138  *
3139  *    Functionality:
3140  *         - fills the SIB1 TX-DATA request message
3141  *
3142  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3143  * @params[in]    macCellCfg consist of SIB1 pdu
3144  * @params[in]    uint32_t *msgLen
3145  * @params[in]    uint16_t pduIndex
3146  * @return ROK
3147  *
3148  * ********************************************************************/
3149 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
3150       uint16_t pduIndex)
3151 {
3152    uint32_t pduLen = 0;
3153    uint8_t *sib1TxdataValue = NULLP;
3154
3155    pduDesc[pduIndex].pdu_index = pduIndex;
3156    pduDesc[pduIndex].num_tlvs = 1;
3157
3158    /* fill the TLV */
3159    /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3160    pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3161    pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
3162    LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3163    if(sib1TxdataValue == NULLP)
3164    {
3165       return RFAILED;
3166    }
3167    memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
3168          macCellCfg->sib1Cfg.sib1PduLen);
3169    pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
3170
3171    /* The total length of the PDU description and   PDU data */
3172    pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3173    pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3174    pduDesc[pduIndex].pdu_length = pduLen;
3175
3176 #ifdef INTEL_WLS_MEM
3177    addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (slotIndIdx-1));
3178 #else
3179    LWR_MAC_FREE(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen);
3180 #endif
3181
3182    return ROK;
3183 }
3184
3185 /***********************************************************************
3186  *
3187  * @brief fills the RAR TX-DATA request message
3188  *
3189  * @details
3190  *
3191  *    Function : fillRarTxDataReq
3192  *
3193  *    Functionality:
3194  *         - fills the RAR TX-DATA request message
3195  *
3196  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3197  * @params[in]    RarInfo *rarInfo
3198  * @params[in]    uint32_t *msgLen
3199  * @params[in]    uint16_t pduIndex
3200  * @return ROK
3201  *
3202  * ********************************************************************/
3203 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
3204       uint16_t pduIndex)
3205 {
3206    uint32_t pduLen = 0;
3207    uint8_t *rarTxdataValue = NULLP;
3208
3209    pduDesc[pduIndex].pdu_index = pduIndex;
3210    pduDesc[pduIndex].num_tlvs = 1;
3211
3212    /* fill the TLV */
3213    /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3214    pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3215    pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3216    LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3217    if(rarTxdataValue == NULLP)
3218    {
3219       return RFAILED;
3220    }
3221    memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3222    pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3223
3224    /* The total length of the PDU description and   PDU data */
3225    pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3226    pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3227    pduDesc[pduIndex].pdu_length = pduLen;
3228
3229    /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3230     * But since we did not implement WLS, this has to be done here
3231     */
3232 #ifdef INTEL_WLS_MEM
3233    addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (slotIndIdx-1));
3234 #else
3235    LWR_MAC_FREE(rarTxdataValue, rarInfo->rarPduLen);
3236 #endif
3237
3238    return ROK;
3239 }
3240
3241 /***********************************************************************
3242  *
3243  * @brief fills the DL dedicated Msg TX-DATA request message
3244  *
3245  * @details
3246  *
3247  *    Function : fillDlMsgTxDataReq
3248  *
3249  *    Functionality:
3250  *         - fills the Dl Dedicated Msg TX-DATA request message
3251  *
3252  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3253  * @params[in]    DlMsgInfo *dlMsgInfo
3254  * @params[in]    uint32_t *msgLen
3255  * @params[in]    uint16_t pduIndex
3256  * @return ROK
3257  *
3258  * ********************************************************************/
3259 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3260       uint16_t pduIndex)
3261 {
3262    uint32_t pduLen = 0;
3263    uint8_t *dedMsgTxDataValue = NULLP;
3264
3265    pduDesc[pduIndex].pdu_index = pduIndex;
3266    pduDesc[pduIndex].num_tlvs = 1;
3267
3268    /* fill the TLV */
3269    /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3270    pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3271    pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3272    LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3273    if(dedMsgTxDataValue == NULLP)
3274    {
3275       return RFAILED;
3276    }
3277    memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3278    pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3279
3280    /* The total length of the PDU description and PDU data */
3281    pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3282    pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3283    pduDesc[pduIndex].pdu_length = pduLen;
3284
3285    /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3286     * But since we did not implement WLS, this has to be done here
3287     */
3288 #ifdef INTEL_WLS_MEM
3289    addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (slotIndIdx-1));
3290 #else
3291    LWR_MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3292 #endif
3293
3294    return ROK;
3295 }
3296
3297
3298 #endif /* FAPI */
3299 /*******************************************************************
3300  *
3301  * @brief Sends DL TTI Request to PHY
3302  *
3303  * @details
3304  *
3305  *    Function : fillDlTtiReq
3306  *
3307  *    Functionality:
3308  *         -Sends FAPI DL TTI req to PHY
3309  *
3310  * @params[in]    timing info
3311  * @return ROK     - success
3312  *         RFAILED - failure
3313  *
3314  * ****************************************************************/
3315 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3316 {
3317 #ifdef INTEL_FAPI
3318    uint8_t idx =0;
3319    uint8_t nPdu = 0;
3320    uint8_t numPduEncoded = 0;
3321    uint16_t cellIdx =0;
3322    uint16_t pduIndex = 0;
3323
3324    SlotIndInfo dlTtiReqTimingInfo;
3325    MacDlSlot *currDlSlot = NULLP;
3326    MacCellCfg macCellCfg;
3327    RntiType rntiType;
3328    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3329    fapi_msg_header_t *msgHeader = NULLP;
3330    p_fapi_api_queue_elem_t dlTtiElem;
3331    p_fapi_api_queue_elem_t headerElem;
3332
3333    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3334    {
3335       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3336       /* consider phy delay */
3337       ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3338
3339       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3340
3341       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3342
3343       LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3344       if(dlTtiElem)
3345       {
3346          FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3347             sizeof(fapi_dl_tti_req_t));
3348
3349          /* Fill message header */
3350          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3351          if(!headerElem)
3352          {
3353             DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3354             LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3355             return RFAILED;
3356          }
3357          FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3358                sizeof(fapi_msg_header_t));
3359          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3360          msgHeader->num_msg = 1;
3361          msgHeader->handle = 0;
3362
3363          /* Fill Dl TTI Request */
3364          dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3365          memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3366          fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3367
3368          dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3369          dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3370          dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo);  /* get total Pdus */
3371          nPdu = dlTtiReq->nPdus;
3372          dlTtiReq->nGroup = 0;
3373          if(dlTtiReq->nPdus > 0)
3374          {
3375             if(currDlSlot->dlInfo.isBroadcastPres)
3376             {
3377                if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3378                {
3379                   if(dlTtiReq->pdus != NULLP)
3380                   {
3381                      for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3382                      {
3383                         fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3384                               currDlSlot, idx, dlTtiReq->sfn);
3385                         numPduEncoded++;
3386                      }
3387                   }
3388                   DU_LOG("\033[1;31m");
3389                   DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3390                   DU_LOG("\033[0m");
3391                }
3392                if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3393                {
3394                   /* Filling SIB1 param */
3395                   if(numPduEncoded != nPdu)
3396                   {
3397                      rntiType = SI_RNTI_TYPE;
3398                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3399                            rntiType, CORESET_TYPE0);
3400                      numPduEncoded++;
3401                      fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3402                            &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3403                            currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3404                            pduIndex);
3405                      pduIndex++;
3406                      numPduEncoded++;
3407                   }
3408                   DU_LOG("\033[1;34m");
3409                   DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3410                   DU_LOG("\033[0m");
3411                }
3412             }
3413             if(currDlSlot->dlInfo.rarAlloc != NULLP)
3414             {
3415                /* Filling RAR param */
3416                rntiType = RA_RNTI_TYPE;
3417                fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3418                      &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3419                numPduEncoded++;
3420                fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3421                      &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3422                      currDlSlot->dlInfo.rarAlloc->bwp,
3423                      pduIndex);
3424                numPduEncoded++;
3425                pduIndex++;
3426
3427                DU_LOG("\033[1;32m");
3428                DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3429                DU_LOG("\033[0m");
3430             }
3431             if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3432             {
3433                if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3434                {
3435                   /* Filling Msg4 param */
3436                   DU_LOG("\033[1;32m");
3437                   if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3438                   {
3439                      rntiType = TC_RNTI_TYPE;
3440                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3441                            &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3442                      DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3443                   }
3444                   else
3445                   {
3446                      /* Filling other DL msg params */
3447                      rntiType = C_RNTI_TYPE;
3448                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3449                            &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3450                      DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3451                   }
3452                   DU_LOG("\033[0m");
3453
3454                   numPduEncoded++;
3455                   fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3456                         &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3457                         currDlSlot->dlInfo.dlMsgAlloc->bwp,
3458                         pduIndex);
3459                   numPduEncoded++;
3460                   pduIndex++;
3461                }
3462                else
3463                {
3464                   MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3465                   currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3466                }
3467             }
3468
3469 #ifdef ODU_SLOT_IND_DEBUG_LOG
3470             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3471 #endif
3472             LwrMacSendToL1(headerElem);
3473
3474             /* send Tx-DATA req message */
3475             sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3476          }
3477          else
3478          {
3479 #ifdef ODU_SLOT_IND_DEBUG_LOG
3480             DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3481 #endif
3482             LwrMacSendToL1(headerElem);
3483          }
3484          memset(currDlSlot, 0, sizeof(MacDlSlot));
3485          return ROK;
3486       }
3487       else
3488       {
3489          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
3490          memset(currDlSlot, 0, sizeof(MacDlSlot));
3491          return RFAILED;
3492       }
3493    }
3494    else
3495    {
3496       lwr_mac_procInvalidEvt(&currTimingInfo);
3497       return RFAILED;
3498    }
3499 #endif
3500    return ROK;
3501 }
3502
3503 /*******************************************************************
3504  *
3505  * @brief Sends TX data Request to PHY
3506  *
3507  * @details
3508  *
3509  *    Function : sendTxDataReq
3510  *
3511  *    Functionality:
3512  *         -Sends FAPI TX data req to PHY
3513  *
3514  * @params[in]    timing info
3515  * @return ROK     - success
3516  *         RFAILED - failure
3517  *
3518  * ****************************************************************/
3519 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3520 {
3521 #ifdef INTEL_FAPI
3522    uint8_t nPdu = 0;
3523    uint16_t cellIdx;
3524    uint16_t pduIndex = 0;
3525    fapi_tx_data_req_t       *txDataReq =NULLP;
3526    fapi_msg_header_t        *msgHeader =NULLP;
3527    p_fapi_api_queue_elem_t  txDataElem = 0;
3528    p_fapi_api_queue_elem_t  headerElem =0;
3529
3530    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3531
3532    /* send TX_Data request message */
3533    nPdu = calcTxDataReqPduCount(dlInfo);
3534    if(nPdu > 0)
3535    {
3536       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3537       if(txDataElem == NULLP)
3538       {
3539          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
3540          return RFAILED;
3541       }
3542
3543       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3544           sizeof(fapi_tx_data_req_t));
3545       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3546       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3547       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3548
3549       txDataReq->sfn  = currTimingInfo.sfn;
3550       txDataReq->slot = currTimingInfo.slot;
3551       if(dlInfo->brdcstAlloc.sib1Trans)
3552       {
3553          fillSib1TxDataReq(txDataReq->pdu_desc,
3554                &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3555          pduIndex++;
3556          txDataReq->num_pdus++;
3557       }
3558       if(dlInfo->rarAlloc != NULLP)
3559       {
3560          fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3561          pduIndex++;
3562          txDataReq->num_pdus++;
3563
3564          MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3565          dlInfo->rarAlloc = NULLP;
3566       }
3567       if(dlInfo->dlMsgAlloc != NULLP)
3568       {
3569          fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3570             &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3571          pduIndex++;
3572          txDataReq->num_pdus++;
3573
3574          MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3575             dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3576          dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3577          MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3578          dlInfo->dlMsgAlloc = NULLP;
3579       }
3580
3581       /* Fill message header */
3582       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3583       if(!headerElem)
3584       {
3585          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for TxDataReq header");
3586          LWR_MAC_FREE(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3587          return RFAILED;
3588       }
3589       FILL_FAPI_LIST_ELEM(headerElem, txDataElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3590             sizeof(fapi_msg_header_t));
3591       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3592       msgHeader->num_msg = 1;
3593       msgHeader->handle = 0;
3594
3595       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
3596       LwrMacSendToL1(headerElem);
3597    }
3598 #endif
3599    return ROK;
3600 }
3601
3602 /***********************************************************************
3603  *
3604  * @brief calculates the total size to be allocated for UL TTI Req
3605  *
3606  * @details
3607  *
3608  *    Function : getnPdus
3609  *
3610  *    Functionality:
3611  *         -calculates the total pdu count to be allocated for UL TTI Req
3612  *
3613  * @params[in] Pointer to fapi Ul TTI Req
3614  *             Pointer to CurrUlSlot
3615  * @return count
3616  * ********************************************************************/
3617 #ifdef INTEL_FAPI
3618 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3619 {
3620    uint8_t pduCount = 0;
3621
3622    if(ulTtiReq && currUlSlot)
3623    {
3624       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3625       {
3626          pduCount++;
3627          ulTtiReq->rachPresent++;
3628       }
3629       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3630       {
3631          pduCount++;
3632          ulTtiReq->nUlsch++;
3633       }
3634       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3635       {
3636          pduCount++;
3637          ulTtiReq->nUlsch++;
3638       }
3639       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3640       {
3641          pduCount++;
3642          ulTtiReq->nUlcch++;
3643       }
3644       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3645       {
3646          pduCount++;
3647       }
3648    }
3649    return pduCount;
3650 }
3651 #endif
3652
3653 /***********************************************************************
3654  *
3655  * @brief Set the value of zero correlation config in PRACH PDU
3656  *
3657  * @details
3658  *
3659  *    Function : setNumCs
3660  *
3661  *    Functionality:
3662  *         -Set the value of zero correlation config in PRACH PDU
3663  *
3664  * @params[in] Pointer to zero correlation config
3665  *             Pointer to MacCellCfg
3666  * ********************************************************************/
3667
3668 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3669 {
3670 #ifdef INTEL_FAPI
3671    uint8_t idx;
3672    if(macCellCfg != NULLP)
3673    {
3674       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3675       *numCs = UnrestrictedSetNcsTable[idx];
3676    }
3677 #endif
3678 }
3679
3680 /***********************************************************************
3681  *
3682  * @brief Fills the PRACH PDU in UL TTI Request
3683  *
3684  * @details
3685  *
3686  *    Function : fillPrachPdu
3687  *
3688  *    Functionality:
3689  *         -Fills the PRACH PDU in UL TTI Request
3690  *
3691  * @params[in] Pointer to Prach Pdu
3692  *             Pointer to CurrUlSlot
3693  *             Pointer to macCellCfg
3694  *             Pointer to msgLen
3695  * ********************************************************************/
3696
3697 #ifdef INTEL_FAPI
3698 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3699 {
3700    if(ulTtiReqPdu != NULLP)
3701    {
3702       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3703       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3704       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3705          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3706       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3707          currUlSlot->ulInfo.prachSchInfo.prachFormat;
3708       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3709       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3710          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3711       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3712       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3713       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3714       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3715       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3716       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3717    }
3718 }
3719
3720 /*******************************************************************
3721  *
3722  * @brief Filling PUSCH PDU in UL TTI Request
3723  *
3724  * @details
3725  *
3726  *    Function : fillPuschPdu
3727  *
3728  *    Functionality: Filling PUSCH PDU in UL TTI Request
3729  *
3730  * @params[in]
3731  * @return ROK     - success
3732  *         RFAILED - failure
3733  *
3734  * ****************************************************************/
3735 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3736 {
3737    if(ulTtiReqPdu != NULLP)
3738    {
3739       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3740       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3741       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3742       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3743       /* TODO : Fill handle in raCb when scheduling pusch and access here */
3744       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3745       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3746       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3747       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3748          macCellCfg->initialUlBwp.bwp.scs;
3749       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3750          macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3751       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3752       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3753       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3754       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3755       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3756       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3757       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3758       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3759       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3760       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3761       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3762       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3763       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3764       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3765          currUlSlot->ulInfo.schPuschInfo.resAllocType;
3766       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3767          currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3768       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3769          currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3770       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3771       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3772       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3773       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3774       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3775          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3776       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3777          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3778       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3779          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3780       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3781          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3782       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3783          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3784       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3785          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3786       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3787          currUlSlot->ulInfo.schPuschInfo.harqProcId;
3788       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3789          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3790       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3791          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3792       /* numCb is 0 for new transmission */
3793       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3794
3795       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3796    }
3797 }
3798
3799 /*******************************************************************
3800  *
3801  * @brief Fill PUCCH PDU in Ul TTI Request
3802  *
3803  * @details
3804  *
3805  *    Function : fillPucchPdu
3806  *
3807  *    Functionality: Fill PUCCH PDU in Ul TTI Request
3808  *
3809  * @params[in]
3810  * @return ROK     - success
3811  *         RFAILED - failure
3812  *
3813  * ****************************************************************/
3814 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3815       MacUlSlot *currUlSlot)
3816 {
3817    if(ulTtiReqPdu != NULLP)
3818    {
3819       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
3820       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3821       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.schPucchInfo.rnti;
3822       /* TODO : Fill handle in raCb when scheduling pucch and access here */
3823       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
3824       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->initialUlBwp.bwp.numPrb;
3825       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->initialUlBwp.bwp.firstPrb;
3826       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3827       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3828       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3829       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3830
3831       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3832       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3833       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3834       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3835       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
3836       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
3837       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3838       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3839       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
3840
3841       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
3842
3843       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3844       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
3845       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
3846       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
3847       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
3848       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
3849       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3850       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
3851       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
3852       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3853       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
3854       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
3855       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3856       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3857       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3858       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3859
3860       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3861    }
3862 }
3863
3864 #endif
3865
3866 /*******************************************************************
3867  *
3868  * @brief Sends UL TTI Request to PHY
3869  *
3870  * @details
3871  *
3872  *    Function : fillUlTtiReq
3873  *
3874  *    Functionality:
3875  *         -Sends FAPI Param req to PHY
3876  *
3877  * @params[in]  Pointer to CmLteTimingInfo
3878  * @return ROK     - success
3879  *         RFAILED - failure
3880  *
3881  ******************************************************************/
3882 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3883 {
3884 #ifdef INTEL_FAPI
3885    uint16_t   cellIdx =0;
3886    uint8_t    pduIdx = -1;
3887    SlotIndInfo ulTtiReqTimingInfo;
3888    MacUlSlot *currUlSlot = NULLP;
3889    MacCellCfg macCellCfg;
3890    fapi_ul_tti_req_t *ulTtiReq = NULLP;
3891    fapi_msg_header_t *msgHeader = NULLP;
3892    p_fapi_api_queue_elem_t ulTtiElem;
3893    p_fapi_api_queue_elem_t headerElem;
3894
3895    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3896    {
3897       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3898       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3899
3900       /* add PHY delta */
3901       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3902       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
3903
3904       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3905       if(ulTtiElem)
3906       {
3907          FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3908             sizeof(fapi_ul_tti_req_t));
3909          ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3910          memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3911          fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3912          ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
3913          ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3914          ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3915          ulTtiReq->nGroup = 0;
3916          if(ulTtiReq->nPdus > 0)
3917          {
3918             /* Fill Prach Pdu */
3919             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3920             {
3921                pduIdx++;
3922                fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3923             }
3924
3925             /* Fill PUSCH PDU */
3926             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3927             {
3928                pduIdx++;
3929                fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3930             }
3931             /* Fill PUCCH PDU */
3932             if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3933             {
3934                pduIdx++;
3935                fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3936             }
3937          }
3938
3939          /* Fill message header */
3940          LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3941          if(!headerElem)
3942          {
3943             DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for UL TTI req header");
3944             LWR_MAC_FREE(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3945             return RFAILED;
3946          }
3947          FILL_FAPI_LIST_ELEM(headerElem, ulTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3948                sizeof(fapi_msg_header_t));
3949          msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3950          msgHeader->num_msg = 1;
3951          msgHeader->handle = 0;
3952 #ifdef ODU_SLOT_IND_DEBUG_LOG
3953          DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
3954 #endif
3955          LwrMacSendToL1(headerElem);
3956
3957          memset(currUlSlot, 0, sizeof(MacUlSlot));
3958          return ROK;
3959       }
3960       else
3961       {
3962          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
3963          memset(currUlSlot, 0, sizeof(MacUlSlot));
3964          return RFAILED;
3965       }
3966    }
3967    else
3968    {
3969       lwr_mac_procInvalidEvt(&currTimingInfo);
3970    }
3971 #endif
3972    return ROK;
3973 }
3974
3975 #ifdef INTEL_FAPI
3976 /*******************************************************************
3977  *
3978  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3979  *
3980  * @details
3981  *
3982  *    Function : fillUlDciPdu
3983  *
3984  *    Functionality:
3985  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3986  *
3987  * @params[in] Pointer to fapi_dl_dci_t
3988  *             Pointer to DciInfo
3989  * @return ROK
3990  *
3991  ******************************************************************/
3992 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3993 {
3994    if(ulDciPtr != NULLP)
3995    {
3996       uint8_t numBytes =0;
3997       uint8_t bytePos =0;
3998       uint8_t bitPos =0;
3999
4000       uint8_t  coreset1Size = 0;
4001       uint16_t rbStart = 0;
4002       uint16_t rbLen = 0;
4003       uint8_t  dciFormatId = 0;
4004       uint32_t freqDomResAssign =0;
4005       uint8_t  timeDomResAssign =0;
4006       uint8_t  freqHopFlag =0;
4007       uint8_t  modNCodScheme =0;
4008       uint8_t  ndi =0;
4009       uint8_t  redundancyVer = 0;
4010       uint8_t  harqProcessNum = 0;
4011       uint8_t  puschTpc = 0;
4012       uint8_t  ul_SlInd = 0;
4013
4014       /* Size(in bits) of each field in DCI format 0_0 */
4015       uint8_t dciFormatIdSize      = 1;
4016       uint8_t freqDomResAssignSize = 0;
4017       uint8_t timeDomResAssignSize = 4;
4018       uint8_t freqHopFlagSize      = 1;
4019       uint8_t modNCodSchemeSize    = 5;
4020       uint8_t ndiSize              = 1;
4021       uint8_t redundancyVerSize    = 2;
4022       uint8_t harqProcessNumSize   = 4;
4023       uint8_t puschTpcSize         = 2;
4024       uint8_t ul_SlIndSize         = 1;
4025
4026       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4027       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4028       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4029       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4030       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4031       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4032       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4033       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4034       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4035       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4036       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.powerValue;
4037       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4038
4039       /* Calculating freq domain resource allocation field value and size
4040        * coreset1Size = Size of coreset 1
4041        * RBStart = Starting Virtual Rsource block
4042        * RBLen = length of contiguously allocted RBs
4043        * Spec 38.214 Sec 5.1.2.2.2
4044        */
4045       if(schDciInfo->formatType == FORMAT0_0)
4046       {
4047          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4048          rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4049          rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4050
4051          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4052          {
4053             if((rbLen - 1) <= floor(coreset1Size / 2))
4054                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4055             else
4056                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4057                                   + (coreset1Size - 1 - rbStart);
4058
4059             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4060          }
4061          /* Fetching DCI field values */
4062          dciFormatId      = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4063          timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4064          freqHopFlag      = schDciInfo->format.format0_0.freqHopFlag;
4065          modNCodScheme    = schDciInfo->format.format0_0.mcs;
4066          ndi              = schDciInfo->format.format0_0.ndi;
4067          redundancyVer    = schDciInfo->format.format0_0.rv;
4068          harqProcessNum   = schDciInfo->format.format0_0.harqProcId;
4069          puschTpc         = schDciInfo->format.format0_0.tpcCmd;
4070          ul_SlInd         = schDciInfo->format.format0_0.sUlCfgd;
4071
4072          /* Reversing bits in each DCI field */
4073          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4074          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4075          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4076          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4077          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4078          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4079          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4080          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4081       }
4082       /* Calulating total number of bytes in buffer */
4083       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4084       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4085       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4086
4087       numBytes = ulDciPtr->payloadSizeBits / 8;
4088       if(ulDciPtr->payloadSizeBits % 8)
4089          numBytes += 1;
4090
4091       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4092       {
4093          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4094          return;
4095       }
4096
4097       /* Initialize buffer */
4098       for(bytePos = 0; bytePos < numBytes; bytePos++)
4099          ulDciPtr->payload[bytePos] = 0;
4100
4101       bytePos = numBytes - 1;
4102       bitPos = 0;
4103
4104       /* Packing DCI format fields */
4105       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4106             dciFormatId, dciFormatIdSize);
4107       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4108             freqDomResAssign, freqDomResAssignSize);
4109       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4110             timeDomResAssign, timeDomResAssignSize);
4111       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4112             freqHopFlag, freqHopFlagSize);
4113       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4114             modNCodScheme, modNCodSchemeSize);
4115       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4116             ndi, ndiSize);
4117       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4118             redundancyVer, redundancyVerSize);
4119       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4120             harqProcessNum, harqProcessNumSize);
4121       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4122             puschTpc, puschTpcSize);
4123       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4124             ul_SlInd, ul_SlIndSize);
4125    }
4126 } /* fillUlDciPdu */
4127
4128 /*******************************************************************
4129  *
4130  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4131  *
4132  * @details
4133  *
4134  *    Function : fillUlDciPdcchPdu
4135  *
4136  *    Functionality:
4137  *         -Fills the Pdcch PDU info
4138  *
4139  * @params[in] Pointer to FAPI DL TTI Req
4140  *             Pointer to PdcchCfg
4141  * @return ROK
4142  *
4143  ******************************************************************/
4144 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4145 {
4146    if(ulDciReqPdu != NULLP)
4147    {
4148       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4149       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4150       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4151       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4152       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4153       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4154       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4155       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4156       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4157       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4158       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4159       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4160       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4161       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4162       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4163       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4164       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4165
4166       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4167       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4168    }
4169    return ROK;
4170 }
4171 #endif
4172 /*******************************************************************
4173  *
4174  * @brief Sends UL DCI Request to PHY
4175  *
4176  * @details
4177  *
4178  *    Function : fillUlDciReq
4179  *
4180  *    Functionality:
4181  *         -Sends FAPI Ul Dci req to PHY
4182  *
4183  * @params[in]  Pointer to CmLteTimingInfo
4184  * @return ROK     - success
4185  *         RFAILED - failure
4186  *
4187  ******************************************************************/
4188 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
4189 {
4190 #ifdef INTEL_FAPI
4191    uint8_t      cellIdx =0;
4192    uint8_t      numPduEncoded = 0;
4193    SlotIndInfo  ulDciReqTimingInfo ={0};
4194    MacDlSlot    *currDlSlot = NULLP;
4195    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4196    fapi_msg_header_t        *msgHeader =NULLP;
4197    p_fapi_api_queue_elem_t  ulDciElem;
4198    p_fapi_api_queue_elem_t  headerElem;
4199
4200    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4201    {
4202       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4203       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4204       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4205
4206       if(currDlSlot->dlInfo.ulGrant != NULLP)
4207       {
4208          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4209          if(ulDciElem)
4210          {
4211             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4212                sizeof(fapi_ul_dci_req_t));
4213             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4214             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4215             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4216
4217             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4218             ulDciReq->slot = ulDciReqTimingInfo.slot;
4219             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4220             if(ulDciReq->numPdus > 0)
4221             {
4222                /* Fill PDCCH configuration Pdu */
4223                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4224                numPduEncoded++;
4225                /* free UL GRANT at SCH */
4226                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4227                currDlSlot->dlInfo.ulGrant = NULLP;
4228
4229                /* Fill message header */
4230                LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
4231                if(!headerElem)
4232                {
4233                   DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for UL DCI req header");
4234                   LWR_MAC_FREE(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4235                   return RFAILED;
4236                }
4237                FILL_FAPI_LIST_ELEM(headerElem, ulDciElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
4238                   sizeof(fapi_msg_header_t));
4239                msgHeader = (fapi_msg_header_t *)(headerElem + 1);
4240                msgHeader->num_msg = 1;
4241                msgHeader->handle = 0;
4242 #ifdef ODU_SLOT_IND_DEBUG_LOG
4243                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4244 #endif
4245                LwrMacSendToL1(headerElem);
4246             }
4247          }
4248          else
4249          {
4250             DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL DCI Request");
4251             memset(currDlSlot, 0, sizeof(MacDlSlot));
4252             return RFAILED;
4253          }
4254       }
4255    }
4256    else
4257    {
4258        lwr_mac_procInvalidEvt(&currTimingInfo);
4259    }
4260 #endif
4261    return ROK;
4262 }
4263
4264 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4265 {
4266    {
4267       /* PHY_STATE_IDLE */
4268 #ifdef INTEL_TIMER_MODE
4269       lwr_mac_procIqSamplesReqEvt,
4270 #endif
4271       lwr_mac_procParamReqEvt,
4272       lwr_mac_procParamRspEvt,
4273       lwr_mac_procConfigReqEvt,
4274       lwr_mac_procConfigRspEvt,
4275       lwr_mac_procInvalidEvt,
4276       lwr_mac_procInvalidEvt,
4277    },
4278    {
4279       /* PHY_STATE_CONFIGURED */
4280 #ifdef INTEL_TIMER_MODE
4281       lwr_mac_procInvalidEvt,
4282 #endif
4283       lwr_mac_procParamReqEvt,
4284       lwr_mac_procParamRspEvt,
4285       lwr_mac_procConfigReqEvt,
4286       lwr_mac_procConfigRspEvt,
4287       lwr_mac_procStartReqEvt,
4288       lwr_mac_procInvalidEvt,
4289    },
4290    {
4291       /* PHY_STATE_RUNNING */
4292 #ifdef INTEL_TIMER_MODE
4293       lwr_mac_procInvalidEvt,
4294 #endif
4295       lwr_mac_procInvalidEvt,
4296       lwr_mac_procInvalidEvt,
4297       lwr_mac_procConfigReqEvt,
4298       lwr_mac_procConfigRspEvt,
4299       lwr_mac_procInvalidEvt,
4300       lwr_mac_procStopReqEvt,
4301    }
4302 };
4303
4304 /*******************************************************************
4305  *
4306  * @brief Sends message to LWR_MAC Fsm Event Handler
4307  *
4308  * @details
4309  *
4310  *    Function : sendToLowerMac
4311  *
4312  *    Functionality:
4313  *         -Sends message to LowerMac
4314  *
4315  * @params[in] Message Type
4316  *             Message Length
4317  *             Messaga Pointer
4318  *
4319  * @return void
4320  *
4321  ******************************************************************/
4322 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4323 {
4324    lwrMacCb.event = msgType;
4325    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4326 }
4327 /**********************************************************************
4328   End of file
4329  **********************************************************************/