src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "nr5g_fapi_internal.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "lwr_mac_utils.h"
  39 #include "mac_utils.h"
  40
  41 #define MIB_SFN_BITMASK 0xFC
  42 #define PDCCH_PDU_TYPE 0
  43 #define PDSCH_PDU_TYPE 1
  44 #define SSB_PDU_TYPE 3
  45 #define PRACH_PDU_TYPE 0
  46 #define PUSCH_PDU_TYPE 1
  47 #define PUCCH_PDU_TYPE 2
  48 #define PDU_PRESENT 1
  49 #define SET_MSG_LEN(x, size) x += size
  50
  51 /* Global variables */
  52 LwrMacCb lwrMacCb;
  53
  54 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  55 void fapiMacConfigRsp(uint16_t cellId);
  56 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
  57 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
  58 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
  59 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
  60
  61 void lwrMacLayerInit(Region region, Pool pool)
  62 {
  63 #ifdef INTEL_WLS_MEM
  64    uint8_t idx;
  65 #endif
  66
  67    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  68    lwrMacCb.region = region;
  69    lwrMacCb.pool = pool;
  70    lwrMacCb.clCfgDone = TRUE;
  71    lwrMacCb.numCell = 0;
  72    lwrMacCb.phyState = PHY_STATE_IDLE;
  73
  74 #ifdef INTEL_WLS_MEM
  75    /* Initializing WLS free mem list */
  76    lwrMacCb.phySlotIndCntr = 1;
  77    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  78    {
  79       cmLListInit(&wlsBlockToFreeList[idx]);
  80    }
  81 #endif
  82 }
  83
  84 /*******************************************************************
  85  *
  86  * @brief Handles Invalid Request Event
  87  *
  88  * @details
  89  *
  90  *    Function : lwr_mac_procInvalidEvt
  91  *
  92  *    Functionality:
  93  *         - Displays the PHY state when the invalid event occurs
  94  *
  95  * @params[in]
  96  * @return ROK     - success
  97  *         RFAILED - failure
  98  *
  99  * ****************************************************************/
 100 uint8_t lwr_mac_procInvalidEvt(void *msg)
 101 {
 102 #ifdef CALL_FLOW_DEBUG_LOG
 103    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
 104 #endif
 105    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 106    return ROK;
 107 }
 108
 109 #ifdef INTEL_FAPI
 110 /*******************************************************************
 111  *
 112  * @brief Fills FAPI message header
 113  *
 114  * @details
 115  *
 116  *    Function : fillMsgHeader
 117  *
 118  *    Functionality:
 119  *         -Fills FAPI message header
 120  *
 121  * @params[in] Pointer to header
 122  *             Number of messages
 123  *             Messae Type
 124  *             Length of message
 125  * @return void
 126  *
 127  * ****************************************************************/
 128 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 129 {
 130    memset(hdr, 0, sizeof(fapi_msg_t));
 131    hdr->msg_id = msgType;
 132    hdr->length = msgLen;
 133 }
 134
 135 /*******************************************************************
 136  *
 137  * @brief Fills FAPI Config Request message header
 138  *
 139  * @details
 140  *
 141  *    Function : fillTlvs
 142  *
 143  *    Functionality:
 144  *         -Fills FAPI Config Request message header
 145  *
 146  * @params[in] Pointer to TLV
 147  *             Tag
 148  *             Length
 149  *             Value
 150  *             MsgLen
 151  * @return void
 152  *
 153  * ****************************************************************/
 154 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 155       uint32_t value, uint32_t *msgLen)
 156 {
 157    tlv->tl.tag    = tag;
 158    tlv->tl.length = length;
 159    tlv->value     = value;
 160    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 161 }
 162 /*******************************************************************
 163  *
 164  * @brief fills the cyclic prefix by comparing the bitmask
 165  *
 166  * @details
 167  *
 168  *    Function : fillCyclicPrefix
 169  *
 170  *    Functionality:
 171  *         -checks the value with the bitmask and
 172  *          fills the cellPtr's cyclic prefix.
 173  *
 174  * @params[in] Pointer to ClCellParam
 175  *             Value to be compared
 176  * @return void
 177  *
 178  ********************************************************************/
 179 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 180 {
 181    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 182    {
 183       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 184    }
 185    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 186    {
 187       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 188    }
 189    else
 190    {
 191       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 192    }
 193 }
 194
 195 /*******************************************************************
 196  *
 197  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 198  *
 199  * @details
 200  *
 201  *    Function : fillSubcarrierSpaceDl
 202  *
 203  *    Functionality:
 204  *         -checks the value with the bitmask and
 205  *          fills the cellPtr's subcarrier spacing in DL
 206  *
 207  * @params[in] Pointer to ClCellParam
 208  *             Value to be compared
 209  * @return void
 210  *
 211  * ****************************************************************/
 212
 213 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 214 {
 215    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 216    {
 217       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 218    }
 219    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 220    {
 221       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 222    }
 223    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 224    {
 225       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 226    }
 227    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 228    {
 229       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 230    }
 231    else
 232    {
 233       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 234    }
 235 }
 236
 237 /*******************************************************************
 238  *
 239  * @brief fills the downlink bandwidth by comparing the bitmask
 240  *
 241  * @details
 242  *
 243  *    Function : fillBandwidthDl
 244  *
 245  *    Functionality:
 246  *         -checks the value with the bitmask and
 247  *         -fills the cellPtr's DL Bandwidth
 248  *
 249  * @params[in] Pointer to ClCellParam
 250  *             Value to be compared
 251  * @return void
 252  *
 253  * ****************************************************************/
 254
 255 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 256 {
 257    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 258    {
 259       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 260    }
 261    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 262    {
 263       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 264    }
 265    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 266    {
 267       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 268    }
 269    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 270    {
 271       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 272    }
 273    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 274    {
 275       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 276    }
 277    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 278    {
 279       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 280    }
 281    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 282    {
 283       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 284    }
 285    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 286    {
 287       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 288    }
 289    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 290    {
 291       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 292    }
 293    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 294    {
 295       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 296    }
 297    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 298    {
 299       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 300    }
 301    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 302    {
 303       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 304    }
 305    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 306    {
 307       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 308    }
 309    else
 310    {
 311       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 312    }
 313 }
 314
 315 /*******************************************************************
 316  *
 317  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 318  *
 319  * @details
 320  *
 321  *    Function : fillSubcarrierSpaceUl
 322  *
 323  *    Functionality:
 324  *         -checks the value with the bitmask and
 325  *         -fills cellPtr's subcarrier spacing in UL
 326  *
 327  * @params[in] Pointer to ClCellParam
 328  *             Value to be compared
 329  * @return void
 330  *
 331  * ****************************************************************/
 332
 333 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 334 {
 335    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 336    {
 337       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 338    }
 339    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 340    {
 341       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 342    }
 343    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 344    {
 345       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 346    }
 347    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 348    {
 349       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 350    }
 351    else
 352    {
 353       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 354    }
 355 }
 356
 357 /*******************************************************************
 358  *
 359  * @brief fills the uplink bandwidth by comparing the bitmask
 360  *
 361  * @details
 362  *
 363  *    Function : fillBandwidthUl
 364  *
 365  *    Functionality:
 366  *         -checks the value with the bitmask and
 367  *          fills the cellPtr's UL Bandwidth
 368  *
 369  *
 370  *
 371  * @params[in] Pointer to ClCellParam
 372  *             Value to be compared
 373  * @return void
 374  *
 375  *
 376  * ****************************************************************/
 377
 378 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 379 {
 380    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 381    {
 382       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 383    }
 384    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 385    {
 386       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 387    }
 388    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 389    {
 390       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 391    }
 392    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 393    {
 394       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 395    }
 396    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 397    {
 398       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 399    }
 400    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 401    {
 402       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 403    }
 404    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 405    {
 406       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 407    }
 408    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 409    {
 410       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 411    }
 412    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 413    {
 414       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 415    }
 416    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 417    {
 418       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 419    }
 420    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 421    {
 422       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 423    }
 424    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 425    {
 426       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 427    }
 428    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 429    {
 430       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 431    }
 432    else
 433    {
 434       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 435    }
 436 }
 437 /*******************************************************************
 438  *
 439  * @brief fills the CCE maping by comparing the bitmask
 440  *
 441  * @details
 442  *
 443  *    Function : fillCCEmaping
 444  *
 445  *    Functionality:
 446  *         -checks the value with the bitmask and
 447  *          fills the cellPtr's CCE Mapping Type
 448  *
 449  *
 450  * @params[in] Pointer to ClCellParam
 451  *             Value to be compared
 452  * @return void
 453  *
 454  * ****************************************************************/
 455
 456 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 457 {
 458    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 459    {
 460       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 461    }
 462    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 463    {
 464       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 465    }
 466    else
 467    {
 468       (*cellPtr)->cceMappingType = INVALID_VALUE;
 469    }
 470 }
 471
 472 /*******************************************************************
 473  *
 474  * @brief fills the PUCCH format by comparing the bitmask
 475  *
 476  * @details
 477  *
 478  *    Function : fillPucchFormat
 479  *
 480  *    Functionality:
 481  *         -checks the value with the bitmask and
 482  *          fills the cellPtr's pucch format
 483  *
 484  *
 485  * @params[in] Pointer to ClCellParam
 486  *             Value to be compared
 487  * @return void
 488  *
 489  * ****************************************************************/
 490
 491 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 492 {
 493    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 494    {
 495       (*cellPtr)->pucchFormats    = FORMAT_0;
 496    }
 497    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 498    {
 499       (*cellPtr)->pucchFormats    = FORMAT_1;
 500    }
 501    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 502    {
 503       (*cellPtr)->pucchFormats    = FORMAT_2;
 504    }
 505    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 506    {
 507       (*cellPtr)->pucchFormats    = FORMAT_3;
 508    }
 509    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 510    {
 511       (*cellPtr)->pucchFormats    = FORMAT_4;
 512    }
 513    else
 514    {
 515       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 516    }
 517 }
 518
 519 /*******************************************************************
 520  *
 521  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 522  *
 523  * @details
 524  *
 525  *    Function : fillPdschMappingType
 526  *
 527  *    Functionality:
 528  *         -checks the value with the bitmask and
 529  *          fills the cellPtr's PDSCH MappingType
 530  *
 531  * @params[in] Pointer to ClCellParam
 532  *             Value to be compared
 533  * @return void
 534  *
 535  * ****************************************************************/
 536
 537 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 538 {
 539    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 540    {
 541       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 542    }
 543    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 544    {
 545       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 546    }
 547    else
 548    {
 549       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 550    }
 551 }
 552
 553 /*******************************************************************
 554  *
 555  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 556  *
 557  * @details
 558  *
 559  *    Function : fillPdschAllocationType
 560  *
 561  *    Functionality:
 562  *         -checks the value with the bitmask and
 563  *          fills the cellPtr's PDSCH AllocationType
 564  *
 565  * @params[in] Pointer to ClCellParam
 566  *             Value to be compared
 567  * @return void
 568  *
 569  * ****************************************************************/
 570
 571 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 572 {
 573    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 574    {
 575       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 576    }
 577    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 578    {
 579       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 580    }
 581    else
 582    {
 583       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 584    }
 585 }
 586
 587 /*******************************************************************
 588  *
 589  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 590  *
 591  * @details
 592  *
 593  *    Function : fillPrbMappingType
 594  *
 595  *    Functionality:
 596  *         -checks the value with the bitmask and
 597  *          fills the cellPtr's PRB Mapping Type
 598  *
 599  * @params[in] Pointer to ClCellParam
 600  *             Value to be compared
 601  * @return void
 602  *
 603  ******************************************************************/
 604 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 605 {
 606    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 607    {
 608       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 609    }
 610    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 611    {
 612       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 613    }
 614    else
 615    {
 616       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 617    }
 618 }
 619
 620 /*******************************************************************
 621  *
 622  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 623  *
 624  * @details
 625  *
 626  *    Function : fillPdschDmrsConfigType
 627  *
 628  *    Functionality:
 629  *         -checks the value with the bitmask and
 630  *          fills the cellPtr's DmrsConfig Type
 631  *
 632  * @params[in] Pointer to ClCellParam
 633  *             Value to be compared
 634  * @return void
 635  *
 636  ******************************************************************/
 637
 638 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 639 {
 640    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 641    {
 642       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 643    }
 644    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 645    {
 646       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 647    }
 648    else
 649    {
 650       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 651    }
 652 }
 653
 654 /*******************************************************************
 655  *
 656  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 657  *
 658  * @details
 659  *
 660  *    Function : fillPdschDmrsLength
 661  *
 662  *    Functionality:
 663  *         -checks the value with the bitmask and
 664  *          fills the cellPtr's PdschDmrsLength
 665  *
 666  * @params[in] Pointer to ClCellParam
 667  *             Value to be compared
 668  * @return void
 669  *
 670  ******************************************************************/
 671 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 672 {
 673    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 674    {
 675       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 676    }
 677    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 678    {
 679       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 680    }
 681    else
 682    {
 683       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 684    }
 685 }
 686
 687 /*******************************************************************
 688  *
 689  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 690  *
 691  * @details
 692  *
 693  *    Function : fillPdschDmrsAddPos
 694  *
 695  *    Functionality:
 696  *         -checks the value with the bitmask and
 697  *          fills the cellPtr's Pdsch DmrsAddPos
 698  *
 699  * @params[in] Pointer to ClCellParam
 700  *             Value to be compared
 701  * @return void
 702  *
 703  ******************************************************************/
 704
 705 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 706 {
 707    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 708    {
 709       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 710    }
 711    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 712    {
 713       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 714    }
 715    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 716    {
 717       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 718    }
 719    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 720    {
 721       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 722    }
 723    else
 724    {
 725       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 726    }
 727 }
 728
 729 /*******************************************************************
 730  *
 731  * @brief fills the Modulation Order in DL by comparing the bitmask
 732  *
 733  * @details
 734  *
 735  *    Function : fillModulationOrderDl
 736  *
 737  *    Functionality:
 738  *         -checks the value with the bitmask and
 739  *          fills the cellPtr's ModulationOrder in DL.
 740  *
 741  * @params[in] Pointer to ClCellParam
 742  *             Value to be compared
 743  * @return void
 744  *
 745  ******************************************************************/
 746 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 747 {
 748    if(value == 0 )
 749    {
 750       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 751    }
 752    else if(value == 1)
 753    {
 754       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 755    }
 756    else if(value == 2)
 757    {
 758       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 759    }
 760    else if(value == 3)
 761    {
 762       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 763    }
 764    else
 765    {
 766       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 767    }
 768 }
 769
 770 /*******************************************************************
 771  *
 772  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 773  *
 774  * @details
 775  *
 776  *    Function : fillPuschDmrsConfigType
 777  *
 778  *    Functionality:
 779  *         -checks the value with the bitmask and
 780  *          fills the cellPtr's PUSCH DmrsConfigType
 781  *
 782  * @params[in] Pointer to ClCellParam
 783  *             Value to be compared
 784  * @return void
 785  *
 786  ******************************************************************/
 787
 788 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 789 {
 790    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 791    {
 792       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 793    }
 794    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 795    {
 796       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 797    }
 798    else
 799    {
 800       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 801    }
 802 }
 803
 804 /*******************************************************************
 805  *
 806  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 807  *
 808  * @details
 809  *
 810  *    Function : fillPuschDmrsLength
 811  *
 812  *    Functionality:
 813  *         -checks the value with the bitmask and
 814  *          fills the cellPtr's PUSCH DmrsLength
 815  *
 816  * @params[in] Pointer to ClCellParam
 817  *             Value to be compared
 818  * @return void
 819  *
 820  ******************************************************************/
 821
 822 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 823 {
 824    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 825    {
 826       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 827    }
 828    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 829    {
 830       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 831    }
 832    else
 833    {
 834       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 835    }
 836 }
 837
 838 /*******************************************************************
 839  *
 840  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 841  *
 842  * @details
 843  *
 844  *    Function : fillPuschDmrsAddPos
 845  *
 846  *    Functionality:
 847  *         -checks the value with the bitmask and
 848  *          fills the cellPtr's PUSCH DmrsAddPos
 849  *
 850  * @params[in] Pointer to ClCellParam
 851  *             Value to be compared
 852  * @return void
 853  *
 854  ******************************************************************/
 855
 856 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 857 {
 858    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 859    {
 860       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 861    }
 862    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 863    {
 864       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 865    }
 866    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 867    {
 868       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 869    }
 870    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 871    {
 872       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 873    }
 874    else
 875    {
 876       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 877    }
 878 }
 879
 880 /*******************************************************************
 881  *
 882  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 883  *
 884  * @details
 885  *
 886  *    Function : fillPuschMappingType
 887  *
 888  *    Functionality:
 889  *         -checks the value with the bitmask and
 890  *          fills the cellPtr's PUSCH MappingType
 891  *
 892  * @params[in] Pointer to ClCellParam
 893  *             Value to be compared
 894  * @return void
 895  *
 896  ******************************************************************/
 897
 898 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 899 {
 900    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 901    {
 902       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 903    }
 904    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 905    {
 906       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 907    }
 908    else
 909    {
 910       (*cellPtr)->puschMappingType = INVALID_VALUE;
 911    }
 912 }
 913
 914 /*******************************************************************
 915  *
 916  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 917  *
 918  * @details
 919  *
 920  *    Function : fillPuschAllocationType
 921  *
 922  *    Functionality:
 923  *         -checks the value with the bitmask and
 924  *          fills the cellPtr's PUSCH AllocationType
 925  *
 926  * @params[in] Pointer to ClCellParam
 927  *             Value to be compared
 928  * @return void
 929  *
 930  ******************************************************************/
 931
 932 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 933 {
 934    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 935    {
 936       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 937    }
 938    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 939    {
 940       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 941    }
 942    else
 943    {
 944       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 945    }
 946 }
 947
 948 /*******************************************************************
 949  *
 950  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 951  *
 952  * @details
 953  *
 954  *    Function : fillPuschPrbMappingType
 955  *
 956  *    Functionality:
 957  *         -checks the value with the bitmask and
 958  *          fills the cellPtr's PUSCH PRB MApping Type
 959  *
 960  * @params[in] Pointer to ClCellParam
 961  *             Value to be compared
 962  * @return void
 963  *
 964  ******************************************************************/
 965
 966 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 967 {
 968    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 969    {
 970       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 971    }
 972    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 973    {
 974       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 975    }
 976    else
 977    {
 978       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 979    }
 980 }
 981
 982 /*******************************************************************
 983  *
 984  * @brief fills the Modulation Order in Ul by comparing the bitmask
 985  *
 986  * @details
 987  *
 988  *    Function : fillModulationOrderUl
 989  *
 990  *    Functionality:
 991  *         -checks the value with the bitmask and
 992  *          fills the cellPtr's Modualtsion Order in UL.
 993  *
 994  * @params[in] Pointer to ClCellParam
 995  *             Value to be compared
 996  * @return void
 997  *
 998  ******************************************************************/
 999
1000 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1001 {
1002    if(value == 0)
1003    {
1004       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1005    }
1006    else if(value == 1)
1007    {
1008       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1009    }
1010    else if(value == 2)
1011    {
1012       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1013    }
1014    else if(value == 3)
1015    {
1016       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1017    }
1018    else
1019    {
1020       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1021    }
1022 }
1023
1024 /*******************************************************************
1025  *
1026  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1027  *
1028  * @details
1029  *
1030  *    Function : fillPuschAggregationFactor
1031  *
1032  *    Functionality:
1033  *         -checks the value with the bitmask and
1034  *          fills the cellPtr's PUSCH Aggregation Factor
1035  *
1036  * @params[in] Pointer to ClCellParam
1037  *             Value to be compared
1038  * @return void
1039  *
1040  ******************************************************************/
1041
1042 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1043 {
1044    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1045    {
1046       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1047    }
1048    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1049    {
1050       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1051    }
1052    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1053    {
1054       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1055    }
1056    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1057    {
1058       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1059    }
1060    else
1061    {
1062       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1063    }
1064 }
1065
1066 /*******************************************************************
1067  *
1068  * @brief fills the PRACH Long Format by comparing the bitmask
1069  *
1070  * @details
1071  *
1072  *    Function : fillPrachLongFormat
1073  *
1074  *    Functionality:
1075  *         -checks the value with the bitmask and
1076  *          fills the cellPtr's PRACH Long Format
1077  *
1078  * @params[in] Pointer to ClCellParam
1079  *             Value to be compared
1080  * @return void
1081  *
1082  ******************************************************************/
1083
1084 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1085 {
1086    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1087    {
1088       (*cellPtr)->prachLongFormats    = FORMAT_0;
1089    }
1090    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1091    {
1092       (*cellPtr)->prachLongFormats    = FORMAT_1;
1093    }
1094    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1095    {
1096       (*cellPtr)->prachLongFormats    = FORMAT_2;
1097    }
1098    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1099    {
1100       (*cellPtr)->prachLongFormats    = FORMAT_3;
1101    }
1102    else
1103    {
1104       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1105    }
1106 }
1107
1108 /*******************************************************************
1109  *
1110  * @brief fills the PRACH Short Format by comparing the bitmask
1111  *
1112  * @details
1113  *
1114  *    Function : fillPrachShortFormat
1115  *
1116  *    Functionality:
1117  *         -checks the value with the bitmask and
1118  *          fills the cellPtr's PRACH ShortFormat
1119  *
1120  * @params[in] Pointer to ClCellParam
1121  *             Value to be compared
1122  * @return void
1123  *
1124  ******************************************************************/
1125
1126 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1127 {
1128    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1129    {
1130       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1131    }
1132    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1133    {
1134       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1135    }
1136    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1137    {
1138       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1139    }
1140    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1141    {
1142       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1143    }
1144    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1145    {
1146       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1147    }
1148    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1149    {
1150       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1151    }
1152    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1153    {
1154       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1155    }
1156    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1157    {
1158       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1159    }
1160    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1161    {
1162       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1163    }
1164    else
1165    {
1166       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1167    }
1168 }
1169
1170 /*******************************************************************
1171  *
1172  * @brief fills the Fd Occasions Type by comparing the bitmask
1173  *
1174  * @details
1175  *
1176  *    Function : fillFdOccasions
1177  *
1178  *    Functionality:
1179  *         -checks the value with the bitmask and
1180  *          fills the cellPtr's Fd Occasions
1181  *
1182  * @params[in] Pointer to ClCellParam
1183  *             Value to be compared
1184  * @return void
1185  *
1186  ******************************************************************/
1187
1188 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1189 {
1190    if(value == 0)
1191    {
1192       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1193    }
1194    else if(value == 1)
1195    {
1196       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1197    }
1198    else if(value == 3)
1199    {
1200       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1201    }
1202    else if(value == 4)
1203    {
1204       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1205    }
1206    else
1207    {
1208       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1209    }
1210 }
1211
1212 /*******************************************************************
1213  *
1214  * @brief fills the RSSI Measurement by comparing the bitmask
1215  *
1216  * @details
1217  *
1218  *    Function : fillRssiMeas
1219  *
1220  *    Functionality:
1221  *         -checks the value with the bitmask and
1222  *          fills the cellPtr's RSSI Measurement report
1223  *
1224  * @params[in] Pointer to ClCellParam
1225  *             Value to be compared
1226  * @return void
1227  *
1228  ******************************************************************/
1229
1230 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1231 {
1232    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1233    {
1234       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1235    }
1236    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1237    {
1238       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1239    }
1240    else
1241    {
1242       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1243    }
1244 }
1245
1246 /*******************************************************************
1247  *
1248  * @brief Returns the TLVs value
1249  *
1250  * @details
1251  *
1252  *    Function : getParamValue
1253  *
1254  *    Functionality:
1255  *         -return TLVs value
1256  *
1257  * @params[in]
1258  * @return ROK     - temp
1259  *         RFAILED - failure
1260  *
1261  * ****************************************************************/
1262
1263 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1264 {
1265    void *posPtr;
1266    posPtr   = &tlv->tl.tag;
1267    posPtr   += sizeof(tlv->tl.tag);
1268    posPtr   += sizeof(tlv->tl.length);
1269    /*TO DO: malloc to SSI memory */
1270    if(type == FAPI_UINT_8)
1271    {
1272       return(*(uint8_t *)posPtr);
1273    }
1274    else if(type == FAPI_UINT_16)
1275    {
1276       return(*(uint16_t *)posPtr);
1277    }
1278    else if(type == FAPI_UINT_32)
1279    {
1280       return(*(uint32_t *)posPtr);
1281    }
1282    else
1283    {
1284       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1285       return RFAILED;
1286    }
1287 }
1288 #endif /* FAPI */
1289
1290 /*******************************************************************
1291  *
1292  * @brief Modifes the received mibPdu to uint32 bit
1293  *        and stores it in MacCellCfg
1294  *
1295  * @details
1296  *
1297  *    Function : setMibPdu
1298  *
1299  *    Functionality:
1300  *         -Sets the MibPdu
1301  *
1302  * @params[in] Pointer to mibPdu
1303  *             pointer to modified value
1304  ******************************************************************/
1305 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1306 {
1307    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1308    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1309    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1310 }
1311
1312 /*******************************************************************
1313  *
1314  * @brief Sends FAPI Param req to PHY
1315  *
1316  * @details
1317  *
1318  *    Function : lwr_mac_procParamReqEvt
1319  *
1320  *    Functionality:
1321  *         -Sends FAPI Param req to PHY
1322  *
1323  * @params[in]
1324  * @return ROK     - success
1325  *         RFAILED - failure
1326  *
1327  * ****************************************************************/
1328
1329 uint8_t lwr_mac_procParamReqEvt(void *msg)
1330 {
1331 #ifdef INTEL_FAPI
1332 #ifdef CALL_FLOW_DEBUG_LOG
1333    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1334 #endif
1335
1336    /* startGuardTimer(); */
1337    fapi_param_req_t         *paramReq = NULL;
1338    fapi_msg_header_t        *msgHeader;
1339    p_fapi_api_queue_elem_t  paramReqElem;
1340    p_fapi_api_queue_elem_t  headerElem;
1341
1342    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1343    if(paramReq != NULL)
1344    {
1345       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1346          sizeof(fapi_tx_data_req_t));
1347       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1348       memset(paramReq, 0, sizeof(fapi_param_req_t));
1349       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1350
1351       /* Fill message header */
1352       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1353       if(!headerElem)
1354       {
1355          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1356          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1357          return RFAILED;
1358       }
1359       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1360          sizeof(fapi_msg_header_t));
1361       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1362       msgHeader->num_msg = 1;
1363       msgHeader->handle = 0;
1364
1365       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1366       LwrMacSendToL1(headerElem);
1367    }
1368    else
1369    {
1370       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1371       return RFAILED;
1372    }
1373 #endif
1374    return ROK;
1375 }
1376
1377 /*******************************************************************
1378  *
1379  * @brief Sends FAPI Param Response to MAC via PHY
1380  *
1381  * @details
1382  *
1383  *    Function : lwr_mac_procParamRspEvt
1384  *
1385  *    Functionality:
1386  *         -Sends FAPI Param rsp to MAC via PHY
1387  *
1388  * @params[in]
1389  * @return ROK     - success
1390  *         RFAILED - failure
1391  *
1392  * ****************************************************************/
1393
1394 uint8_t lwr_mac_procParamRspEvt(void *msg)
1395 {
1396 #ifdef INTEL_FAPI
1397    /* stopGuardTimer(); */
1398    uint8_t index;
1399    uint32_t encodedVal;
1400    fapi_param_resp_t *paramRsp;
1401    ClCellParam *cellParam = NULLP;
1402
1403    paramRsp = (fapi_param_resp_t *)msg;
1404    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1405
1406    if(paramRsp != NULLP)
1407    {
1408       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1409       if(cellParam != NULLP)
1410       {
1411          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1412          if(paramRsp->error_code == MSG_OK)
1413          {
1414             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1415             {
1416                switch(paramRsp->tlvs[index].tl.tag)
1417                {
1418                   case FAPI_RELEASE_CAPABILITY_TAG:
1419                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1420                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1421                      {
1422                         cellParam->releaseCapability = RELEASE_15;
1423                      }
1424                      break;
1425
1426                   case FAPI_PHY_STATE_TAG:
1427                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1428                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1429                      {
1430                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1431                         return RFAILED;
1432                      }
1433                      break;
1434
1435                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1436                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1437                      if(encodedVal != RFAILED && encodedVal != 0)
1438                      {
1439                         cellParam->skipBlankDlConfig = SUPPORTED;
1440                      }
1441                      else
1442                      {
1443                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1444                      }
1445                      break;
1446
1447                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1448                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1449                      if(encodedVal != RFAILED && encodedVal != 0)
1450                      {
1451                         cellParam->skipBlankUlConfig = SUPPORTED;
1452                      }
1453                      else
1454                      {
1455                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1456                      }
1457                      break;
1458
1459                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1460                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1461                      break;
1462
1463                   case FAPI_CYCLIC_PREFIX_TAG:
1464                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1465                      if(encodedVal != RFAILED)
1466                      {
1467                         fillCyclicPrefix(encodedVal, &cellParam);
1468                      }
1469                      break;
1470
1471                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1472                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1473                      if(encodedVal != RFAILED)
1474                      {
1475                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1476                      }
1477                      break;
1478
1479                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1480                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1481                      if(encodedVal != RFAILED)
1482                      {
1483                         fillBandwidthDl(encodedVal, &cellParam);
1484                      }
1485                      break;
1486
1487                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1488                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1489                      if(encodedVal != RFAILED)
1490                      {
1491                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1492                      }
1493                      break;
1494
1495                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1496                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1497                      if(encodedVal != RFAILED)
1498                      {
1499                         fillBandwidthUl(encodedVal, &cellParam);
1500                      }
1501                      break;
1502
1503                   case FAPI_CCE_MAPPING_TYPE_TAG:
1504                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1505                      if(encodedVal != RFAILED)
1506                      {
1507                         fillCCEmaping(encodedVal, &cellParam);
1508                      }
1509                      break;
1510
1511                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1512                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1513                      if(encodedVal != RFAILED && encodedVal != 0)
1514                      {
1515                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1516                      }
1517                      else
1518                      {
1519                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1520                      }
1521                      break;
1522
1523                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1524                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1525                      if(encodedVal != RFAILED && encodedVal != 0)
1526                      {
1527                         cellParam->precoderGranularityCoreset = SUPPORTED;
1528                      }
1529                      else
1530                      {
1531                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1532                      }
1533                      break;
1534
1535                   case FAPI_PDCCH_MU_MIMO_TAG:
1536                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1537                      if(encodedVal != RFAILED && encodedVal != 0)
1538                      {
1539                         cellParam->pdcchMuMimo = SUPPORTED;
1540                      }
1541                      else
1542                      {
1543                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1544                      }
1545                      break;
1546
1547                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1548                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1549                      if(encodedVal != RFAILED && encodedVal != 0)
1550                      {
1551                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1552                      }
1553                      else
1554                      {
1555                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1556                      }
1557                      break;
1558
1559                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1560                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1561                      break;
1562
1563                   case FAPI_PUCCH_FORMATS_TAG:
1564                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1565                      if(encodedVal != RFAILED)
1566                      {
1567                         fillPucchFormat(encodedVal, &cellParam);
1568                      }
1569                      break;
1570
1571                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1572                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1573                      break;
1574
1575                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1576                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1577                      if(encodedVal != RFAILED)
1578                      {
1579                         fillPdschMappingType(encodedVal, &cellParam);
1580                      }
1581                      break;
1582
1583                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1584                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1585                      if(encodedVal != RFAILED)
1586                      {
1587                         fillPdschAllocationType(encodedVal, &cellParam);
1588                      }
1589                      break;
1590
1591                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1592                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1593                      if(encodedVal != RFAILED)
1594                      {
1595                         fillPrbMappingType(encodedVal, &cellParam);
1596                      }
1597                      break;
1598
1599                   case FAPI_PDSCH_CBG_TAG:
1600                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1601                      if(encodedVal != RFAILED && encodedVal != 0)
1602                      {
1603                         cellParam->pdschCbg = SUPPORTED;
1604                      }
1605                      else
1606                      {
1607                         cellParam->pdschCbg = NOT_SUPPORTED;
1608                      }
1609                      break;
1610
1611                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1612                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1613                      if(encodedVal != RFAILED)
1614                      {
1615                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1616                      }
1617                      break;
1618
1619                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1620                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1621                      if(encodedVal != RFAILED)
1622                      {
1623                         fillPdschDmrsLength(encodedVal, &cellParam);
1624                      }
1625                      break;
1626
1627                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1628                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1629                      if(encodedVal != RFAILED)
1630                      {
1631                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1632                      }
1633                      break;
1634
1635                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1636                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1637                      break;
1638
1639                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1640                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1641                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1642                      {
1643                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1644                      }
1645                      break;
1646
1647                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1648                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1649                      if(encodedVal != RFAILED)
1650                      {
1651                         fillModulationOrderDl(encodedVal, &cellParam);
1652                      }
1653                      break;
1654
1655                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1656                      cellParam->maxMuMimoUsersDl         = \
1657                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1658                      break;
1659
1660                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1661                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1662                      if(encodedVal != RFAILED && encodedVal != 0)
1663                      {
1664                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1665                      }
1666                      else
1667                      {
1668                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1669                      }
1670                      break;
1671
1672                   case FAPI_PREMPTIONSUPPORT_TAG:
1673                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1674                      if(encodedVal != RFAILED && encodedVal != 0)
1675                      {
1676                         cellParam->premptionSupport = SUPPORTED;
1677                      }
1678                      else
1679                      {
1680                         cellParam->premptionSupport = NOT_SUPPORTED;
1681                      }
1682                      break;
1683
1684                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1685                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1686                      if(encodedVal != RFAILED && encodedVal != 0)
1687                      {
1688                         cellParam->pdschNonSlotSupport = SUPPORTED;
1689                      }
1690                      else
1691                      {
1692                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1693                      }
1694                      break;
1695
1696                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1697                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1698                      if(encodedVal != RFAILED && encodedVal != 0)
1699                      {
1700                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1701                      }
1702                      else
1703                      {
1704                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1705                      }
1706                      break;
1707
1708                   case FAPI_UCI_ONLY_PUSCH_TAG:
1709                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1710                      if(encodedVal != RFAILED && encodedVal != 0)
1711                      {
1712                         cellParam->uciOnlyPusch = SUPPORTED;
1713                      }
1714                      else
1715                      {
1716                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1717                      }
1718                      break;
1719
1720                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1721                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1722                      if(encodedVal != RFAILED && encodedVal != 0)
1723                      {
1724                         cellParam->puschFrequencyHopping = SUPPORTED;
1725                      }
1726                      else
1727                      {
1728                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1729                      }
1730                      break;
1731
1732                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1733                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1734                      if(encodedVal != RFAILED)
1735                      {
1736                         fillPuschDmrsConfig(encodedVal, &cellParam);
1737                      }
1738                      break;
1739
1740                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1741                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1742                      if(encodedVal != RFAILED)
1743                      {
1744                         fillPuschDmrsLength(encodedVal, &cellParam);
1745                      }
1746                      break;
1747
1748                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1749                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1750                      if(encodedVal != RFAILED)
1751                      {
1752                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1753                      }
1754                      break;
1755
1756                   case FAPI_PUSCH_CBG_TAG:
1757                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1758                      if(encodedVal != RFAILED && encodedVal != 0)
1759                      {
1760                         cellParam->puschCbg = SUPPORTED;
1761                      }
1762                      else
1763                      {
1764                         cellParam->puschCbg = NOT_SUPPORTED;
1765                      }
1766                      break;
1767
1768                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1769                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1770                      if(encodedVal != RFAILED)
1771                      {
1772                         fillPuschMappingType(encodedVal, &cellParam);
1773                      }
1774                      break;
1775
1776                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1777                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1778                      if(encodedVal != RFAILED)
1779                      {
1780                         fillPuschAllocationType(encodedVal, &cellParam);
1781                      }
1782                      break;
1783
1784                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1785                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1786                      if(encodedVal != RFAILED)
1787                      {
1788                         fillPuschPrbMappingType(encodedVal, &cellParam);
1789                      }
1790                      break;
1791
1792                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1793                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1794                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1795                      {
1796                         cellParam->puschMaxPtrsPorts = encodedVal;
1797                      }
1798                      break;
1799
1800                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1801                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1802                      break;
1803
1804                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1805                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1806                      break;
1807
1808                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1809                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1810                      if(encodedVal != RFAILED)
1811                      {
1812                         fillModulationOrderUl(encodedVal, &cellParam);
1813                      }
1814                      break;
1815
1816                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1817                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1818                      break;
1819
1820                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1821                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1822                      if(encodedVal != RFAILED && encodedVal != 0)
1823                      {
1824                         cellParam->dftsOfdmSupport = SUPPORTED;
1825                      }
1826                      else
1827                      {
1828                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1829                      }
1830                      break;
1831
1832                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1833                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1834                      if(encodedVal != RFAILED)
1835                      {
1836                         fillPuschAggregationFactor(encodedVal, &cellParam);
1837                      }
1838                      break;
1839
1840                   case FAPI_PRACH_LONG_FORMATS_TAG:
1841                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1842                      if(encodedVal != RFAILED)
1843                      {
1844                         fillPrachLongFormat(encodedVal, &cellParam);
1845                      }
1846                      break;
1847
1848                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1849                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1850                      if(encodedVal != RFAILED)
1851                      {
1852                         fillPrachShortFormat(encodedVal, &cellParam);
1853                      }
1854                      break;
1855
1856                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1857                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1858                      if(encodedVal != RFAILED && encodedVal != 0)
1859                      {
1860                         cellParam->prachRestrictedSets = SUPPORTED;
1861                      }
1862                      else
1863                      {
1864                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1865                      }
1866                      break;
1867
1868                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1869                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1870                      if(encodedVal != RFAILED)
1871                      {
1872                         fillFdOccasions(encodedVal, &cellParam);
1873                      }
1874                      break;
1875
1876                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1877                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1878                      if(encodedVal != RFAILED)
1879                      {
1880                         fillRssiMeas(encodedVal, &cellParam);
1881                      }
1882                      break;
1883                   default:
1884                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1885                      break;
1886                }
1887             }
1888             MAC_FREE(cellParam, sizeof(ClCellParam));
1889             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1890             return ROK;
1891          }
1892          else
1893          {
1894             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1895             return RFAILED;
1896          }
1897       }
1898       else
1899       {
1900          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1901          return RFAILED;
1902       }
1903    }
1904    else
1905    {
1906       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1907       return RFAILED;
1908    }
1909 #else
1910    return ROK;
1911 #endif
1912 }
1913
1914 #ifdef INTEL_TIMER_MODE
1915 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1916 {
1917    void * wlsHdlr = NULLP;
1918    fapi_msg_header_t *msgHeader;
1919    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1920    p_fapi_api_queue_elem_t  headerElem;
1921    p_fapi_api_queue_elem_t  iqSampleElem;
1922    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1923
1924    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1925
1926    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1927
1928    /* Fill IQ sample req */
1929    mtGetWlsHdl(&wlsHdlr);
1930    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1931       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1933    if(!iqSampleElem)
1934    {
1935       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1936       return RFAILED;
1937    }
1938    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1939       sizeof(fapi_vendor_ext_iq_samples_req_t));
1940
1941    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1942    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1943    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1944       sizeof(fapi_vendor_ext_iq_samples_req_t));
1945
1946    iqSampleReq->iq_samples_info.carrNum = 0;
1947    iqSampleReq->iq_samples_info.numSubframes = 40;
1948    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1949    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1950    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1951    iqSampleReq->iq_samples_info.startFrameNum = 0;
1952    iqSampleReq->iq_samples_info.startSlotNum = 0;
1953    iqSampleReq->iq_samples_info.startSymNum = 0;
1954    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1955    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1956
1957    /* TODO : Fill remaining parameters */
1958
1959    /* Fill message header */
1960    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1961    if(!headerElem)
1962    {
1963       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1964       return RFAILED;
1965    }
1966    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1967      sizeof(fapi_msg_header_t));
1968    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1969    msgHeader->num_msg = 1;
1970    msgHeader->handle = 0;
1971
1972    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1973    LwrMacSendToL1(headerElem);
1974    return ROK;
1975 }
1976 #endif
1977
1978 /*******************************************************************
1979  *
1980  * @brief Sends FAPI Config req to PHY
1981  *
1982  * @details
1983  *
1984  *    Function : lwr_mac_procConfigReqEvt
1985  *
1986  *    Functionality:
1987  *         -Sends FAPI Config Req to PHY
1988  *
1989  * @params[in]
1990  * @return ROK     - success
1991  *         RFAILED - failure
1992  *
1993  * ****************************************************************/
1994
1995 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1996 {
1997 #ifdef INTEL_FAPI
1998 #ifdef CALL_FLOW_DEBUG_LOG
1999    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
2000 #endif
2001 #ifdef NR_TDD
2002    uint8_t slotIdx = 0;
2003    uint8_t symbolIdx =0;
2004 #endif
2005    uint16_t index = 0;
2006    uint16_t *cellId =NULLP;
2007    uint16_t cellIdx =0;
2008    uint32_t msgLen = 0;
2009    uint32_t mib = 0;
2010    uint32_t dlFreq = 0, ulFreq = 0;
2011    MacCellCfg macCfgParams;
2012    fapi_vendor_msg_t *vendorMsg;
2013    fapi_config_req_t *configReq;
2014    fapi_msg_header_t *msgHeader;
2015    p_fapi_api_queue_elem_t  headerElem;
2016    p_fapi_api_queue_elem_t  vendorMsgQElem;
2017    p_fapi_api_queue_elem_t  cfgReqQElem;
2018
2019    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2020          lwrMacCb.phyState);
2021
2022    cellId = (uint16_t *)msg;
2023    GET_CELL_IDX(*cellId, cellIdx);
2024    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2025
2026    /* Fill Cell Configuration in lwrMacCb */
2027    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2028    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2029    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2030    lwrMacCb.numCell++;
2031
2032    /* Allocte And fill Vendor msg */
2033    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2034    if(!vendorMsgQElem)
2035    {
2036       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2037       return RFAILED;
2038    }
2039    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2040    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2041    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2042    vendorMsg->config_req_vendor.hopping_id = 0;
2043    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2044    vendorMsg->config_req_vendor.group_hop_flag = 0;
2045    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2046    vendorMsg->config_req_vendor.urllc_capable = 0;
2047    vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2048    vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2049    vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2050    vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2051    vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2052    vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2053    vendorMsg->start_req_vendor.sfn = 0;
2054    vendorMsg->start_req_vendor.slot = 0;
2055    vendorMsg->start_req_vendor.mode = 4;
2056 #ifdef DEBUG_MODE
2057    vendorMsg->start_req_vendor.count = 0;
2058    vendorMsg->start_req_vendor.period = 1;
2059 #endif
2060    /* Fill FAPI config req */
2061    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2062    if(!cfgReqQElem)
2063    {
2064       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2065       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2066       return RFAILED;
2067    }
2068    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2069          sizeof(fapi_config_req_t));
2070
2071    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2072    memset(configReq, 0, sizeof(fapi_config_req_t));
2073    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2074 #ifndef NR_TDD
2075    configReq->number_of_tlvs = 25;
2076 #else
2077    configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2078 #endif
2079
2080    msgLen = sizeof(configReq->number_of_tlvs);
2081
2082    fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2083          sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
2084    dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
2085    fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2086          sizeof(uint32_t), dlFreq, &msgLen);
2087    /* Due to bug in Intel FT code, commenting TLVs that are are not
2088     * needed to avoid error. Must be uncommented when FT bug is fixed */
2089    //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2090    sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2091    //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2092    sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2093    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2094          sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2095    fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2096          sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
2097    ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
2098    fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2099          sizeof(uint32_t), ulFreq, &msgLen);
2100    //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2101    sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2102    //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2103    sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2104    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2105          sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2106    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2107    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2108
2109    /* fill cell config */
2110    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2111          sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2112    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2113          sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2114
2115    /* fill SSB configuration */
2116    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2117          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2118    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2119    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2120    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2121          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2122
2123    /* fill PRACH configuration */
2124    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2125    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2126    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2127          sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2128    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2129          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2130    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2131          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2132    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2133          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2134    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2135          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2136    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2137    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2138    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2139          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2140    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2141          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2142    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2143    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2144    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2145       {
2146       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2147       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2148       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2149       &msgLen);
2150       }
2151       else
2152       {
2153       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2154       }*/
2155
2156    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2157          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2158    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2159    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2160
2161    /* fill SSB table */
2162    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2163          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2164    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2165    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2166    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2167          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2168    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2169          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2170
2171    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2172    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2173          sizeof(uint32_t), mib, &msgLen);
2174
2175    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2176          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2177    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2178          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2179    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2180    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2181    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2182    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2183
2184 #ifdef NR_TDD
2185    /* fill TDD table */
2186    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2187          sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2188
2189    for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2190    {
2191       for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2192       {
2193          /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2194          if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2195                (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2196          {
2197             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2198                   sizeof(uint8_t), DL_SYMBOL, &msgLen);
2199          }
2200
2201          /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2202          else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) ||  \
2203                (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2204                 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2205          {
2206             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2207                   sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2208          }
2209          /*Fill Partial UL symbols and Full-UL slot*/
2210          else
2211          {
2212             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2213                   sizeof(uint8_t), UL_SYMBOL, &msgLen);
2214          }
2215       }
2216    }
2217 #endif
2218
2219    /* fill measurement config */
2220    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2221    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2222
2223    /* fill DMRS Type A Pos */
2224    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2225          sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2226
2227    /* Fill message header */
2228    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2229    if(!headerElem)
2230    {
2231       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2232       LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2233       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2234       return RFAILED;
2235    }
2236    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2237          sizeof(fapi_msg_header_t));
2238    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2239    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2240    msgHeader->handle = 0;
2241
2242    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2243    LwrMacSendToL1(headerElem);
2244 #endif
2245
2246    return ROK;
2247 } /* lwr_mac_handleConfigReqEvt */
2248
2249 /*******************************************************************
2250  *
2251  * @brief Processes config response from phy
2252  *
2253  * @details
2254  *
2255  *    Function : lwr_mac_procConfigRspEvt
2256  *
2257  *    Functionality:
2258  *          Processes config response from phy
2259  *
2260  * @params[in] FAPI message pointer
2261  * @return ROK     - success
2262  *         RFAILED - failure
2263  *
2264  * ****************************************************************/
2265
2266 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2267 {
2268 #ifdef INTEL_FAPI
2269    fapi_config_resp_t *configRsp;
2270    configRsp = (fapi_config_resp_t *)msg;
2271
2272    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2273          lwrMacCb.phyState);
2274
2275    if(configRsp != NULL)
2276    {
2277       if(configRsp->error_code == MSG_OK)
2278       {
2279          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2280          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2281          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2282          /* TODO :
2283           * Store config response into an intermediate struture and send to MAC
2284           * Support LC and LWLC for sending config rsp to MAC
2285           */
2286          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2287       }
2288       else
2289       {
2290          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2291          return RFAILED;
2292       }
2293    }
2294    else
2295    {
2296       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2297       return RFAILED;
2298    }
2299 #endif
2300
2301    return ROK;
2302 } /* lwr_mac_procConfigRspEvt */
2303
2304 /*******************************************************************
2305  *
2306  * @brief Build and send start request to phy
2307  *
2308  * @details
2309  *
2310  *    Function : lwr_mac_procStartReqEvt
2311  *
2312  *    Functionality:
2313  *       Build and send start request to phy
2314  *
2315  * @params[in] FAPI message pointer
2316  * @return ROK     - success
2317  *         RFAILED - failure
2318  *
2319  * ****************************************************************/
2320 uint8_t lwr_mac_procStartReqEvt(void *msg)
2321 {
2322 #ifdef INTEL_FAPI
2323 #ifdef CALL_FLOW_DEBUG_LOG
2324    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2325 #endif
2326    fapi_msg_header_t *msgHeader;
2327    fapi_start_req_t *startReq;
2328    fapi_vendor_msg_t *vendorMsg;
2329    p_fapi_api_queue_elem_t  headerElem;
2330    p_fapi_api_queue_elem_t  startReqElem;
2331    p_fapi_api_queue_elem_t  vendorMsgElem;
2332
2333    /* Allocte And fill Vendor msg */
2334    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2335    if(!vendorMsgElem)
2336    {
2337       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2338       return RFAILED;
2339    }
2340    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2341    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2342    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2343    vendorMsg->start_req_vendor.sfn = 0;
2344    vendorMsg->start_req_vendor.slot = 0;
2345    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2346 #ifdef DEBUG_MODE
2347    vendorMsg->start_req_vendor.count = 0;
2348    vendorMsg->start_req_vendor.period = 1;
2349 #endif
2350
2351    /* Fill FAPI config req */
2352    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2353    if(!startReqElem)
2354    {
2355       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2356       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2357       return RFAILED;
2358    }
2359    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2360       sizeof(fapi_start_req_t));
2361
2362    startReq = (fapi_start_req_t *)(startReqElem + 1);
2363    memset(startReq, 0, sizeof(fapi_start_req_t));
2364    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2365
2366    /* Fill message header */
2367    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2368    if(!headerElem)
2369    {
2370       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2371       LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2372       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2373       return RFAILED;
2374    }
2375    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2376       sizeof(fapi_msg_header_t));
2377    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2378    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2379    msgHeader->handle = 0;
2380
2381    /* Send to PHY */
2382    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2383    LwrMacSendToL1(headerElem);
2384 #endif
2385    return ROK;
2386 } /* lwr_mac_procStartReqEvt */
2387
2388 /*******************************************************************
2389  *
2390  * @brief Sends FAPI Stop Req to PHY
2391  *
2392  * @details
2393  *
2394  *    Function : lwr_mac_procStopReqEvt
2395  *
2396  *    Functionality:
2397  *         -Sends FAPI Stop Req to PHY
2398  *
2399  * @params[in]
2400  * @return ROK     - success
2401  *         RFAILED - failure
2402  *
2403  ********************************************************************/
2404
2405 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2406 {
2407 #ifdef INTEL_FAPI
2408 #ifdef CALL_FLOW_DEBUG_LOG
2409    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2410 #endif
2411
2412    fapi_stop_req_t   *stopReq;
2413    p_fapi_api_queue_elem_t  stopReqElem;
2414
2415    vendorMsg->sfn = slotInfo.sfn;
2416    vendorMsg->slot = slotInfo.slot;
2417
2418    /* Fill FAPI stop req */
2419    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2420    if(!stopReqElem)
2421    {
2422       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2423       return RFAILED;
2424    }
2425    FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2426    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2427    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2428    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2429
2430    /* Send to PHY */
2431    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2432    prevElem->p_next = stopReqElem;
2433
2434 #endif
2435    return ROK;
2436 }
2437
2438 #ifdef INTEL_FAPI
2439 /*******************************************************************
2440  *
2441  * @brief fills SSB PDU required for DL TTI info in MAC
2442  *
2443  * @details
2444  *
2445  *    Function : fillSsbPdu
2446  *
2447  *    Functionality:
2448  *         -Fills the SSB PDU info
2449  *          stored in MAC
2450  *
2451  * @params[in] Pointer to FAPI DL TTI Req
2452  *             Pointer to RgCellCb
2453  *             Pointer to msgLen of DL TTI Info
2454  * @return ROK
2455  *
2456  ******************************************************************/
2457
2458 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2459       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2460 {
2461    uint32_t mibPayload = 0;
2462    if(dlTtiReqPdu != NULL)
2463    {
2464       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2465       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
2466       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2467       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2468       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
2469       /* ssbOfPdufstA to be filled in ssbCfg */
2470       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
2471       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2472       /* Bit manipulation for SFN */
2473       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2474       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2475       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2476       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2477       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2478       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2479       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2480          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2481       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2482       return ROK;
2483    }
2484    return RFAILED;
2485 }
2486
2487 /*******************************************************************
2488  *
2489  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2490  *
2491  * @details
2492  *
2493  *    Function : fillSib1DlDciPdu
2494  *
2495  *    Functionality:
2496  *         -Fills the Dl DCI PDU
2497  *
2498  * @params[in] Pointer to fapi_dl_dci_t
2499  *             Pointer to PdcchCfg
2500  * @return ROK
2501  *
2502  ******************************************************************/
2503
2504 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2505 {
2506    if(dlDciPtr != NULLP)
2507    {
2508       uint8_t numBytes=0;
2509       uint8_t bytePos=0;
2510       uint8_t bitPos=0;
2511
2512       uint16_t coreset0Size=0;
2513       uint16_t rbStart=0;
2514       uint16_t rbLen=0;
2515       uint32_t freqDomResAssign=0;
2516       uint32_t timeDomResAssign=0;
2517       uint8_t  VRB2PRBMap=0;
2518       uint32_t modNCodScheme=0;
2519       uint8_t  redundancyVer=0;
2520       uint32_t sysInfoInd=0;
2521       uint32_t reserved=0;
2522
2523       /* Size(in bits) of each field in DCI format 0_1
2524        * as mentioned in spec 38.214 */
2525       uint8_t freqDomResAssignSize = 0;
2526       uint8_t timeDomResAssignSize = 4;
2527       uint8_t VRB2PRBMapSize       = 1;
2528       uint8_t modNCodSchemeSize    = 5;
2529       uint8_t redundancyVerSize    = 2;
2530       uint8_t sysInfoIndSize       = 1;
2531       uint8_t reservedSize         = 15;
2532
2533       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2534       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2535       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2536       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2537       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2538       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2539       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2540       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2541       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2542       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2543       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2544       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2545
2546       /* Calculating freq domain resource allocation field value and size
2547        * coreset0Size = Size of coreset 0
2548        * RBStart = Starting Virtual Rsource block
2549        * RBLen = length of contiguously allocted RBs
2550        * Spec 38.214 Sec 5.1.2.2.2
2551        */
2552       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2553       rbStart = sib1PdcchInfo->dci.pdschCfg.pdschFreqAlloc.startPrb;
2554       rbLen = sib1PdcchInfo->dci.pdschCfg.pdschFreqAlloc.numPrb;
2555
2556       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2557       {
2558          if((rbLen - 1) <= floor(coreset0Size / 2))
2559             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2560          else
2561             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2562                                + (coreset0Size - 1 - rbStart);
2563
2564          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2565       }
2566
2567       /* Fetching DCI field values */
2568       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg.pdschTimeAlloc.rowIndex -1;
2569       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2570       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg.codeword[0].mcsIndex;
2571       redundancyVer    = sib1PdcchInfo->dci.pdschCfg.codeword[0].rvIndex;
2572       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2573       reserved         = 0;
2574
2575       /* Reversing bits in each DCI field */
2576       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2577       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2578       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2579       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2580       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2581       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2582
2583       /* Calulating total number of bytes in buffer */
2584       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2585                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2586                                   + sysInfoIndSize + reservedSize;
2587
2588       numBytes = dlDciPtr->payloadSizeBits / 8;
2589       if(dlDciPtr->payloadSizeBits % 8)
2590          numBytes += 1;
2591
2592       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2593       {
2594          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2595          return;
2596       }
2597
2598       /* Initialize buffer */
2599       for(bytePos = 0; bytePos < numBytes; bytePos++)
2600          dlDciPtr->payload[bytePos] = 0;
2601
2602       bytePos = numBytes - 1;
2603       bitPos = 0;
2604
2605       /* Packing DCI format fields */
2606       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2607             freqDomResAssign, freqDomResAssignSize);
2608       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2609             timeDomResAssign, timeDomResAssignSize);
2610       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2611             VRB2PRBMap, VRB2PRBMapSize);
2612       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2613             modNCodScheme, modNCodSchemeSize);
2614       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2615             redundancyVer, redundancyVerSize);
2616       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2617             sysInfoInd, sysInfoIndSize);
2618       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2619             reserved, reservedSize);
2620
2621    }
2622 } /* fillSib1DlDciPdu */
2623
2624
2625 /*******************************************************************
2626  *
2627  * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2628  *
2629  * @details
2630  *
2631  *    Function : fillPageDlDciPdu
2632  *
2633  *    Functionality:
2634  *         -Fills the Dl DCI PDU for Paging
2635  *
2636  * @params[in] Pointer to fapi_dl_dci_t
2637  *             Pointer to dlPageAlloc
2638  * @return ROK
2639  *
2640  ******************************************************************/
2641
2642 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCellCfg *macCellCfg)
2643 {
2644    if(dlDciPtr != NULLP)
2645    {
2646       uint8_t numBytes=0;
2647       uint8_t bytePos=0;
2648       uint8_t bitPos=0;
2649
2650       uint16_t coreset0Size     = 0;
2651       uint16_t rbStart          = 0;
2652       uint16_t rbLen            = 0;
2653       uint8_t  shortMsgInd      = 0;
2654       uint8_t  shortMsg         = 0;
2655       uint32_t freqDomResAssign = 0;
2656       uint32_t timeDomResAssign = 0;
2657       uint8_t  VRB2PRBMap       = 0;
2658       uint32_t modNCodScheme    = 0;
2659       uint8_t  tbScaling        = 0;
2660       uint32_t reserved         = 0;
2661
2662       /* Size(in bits) of each field in DCI format 1_0
2663        * as mentioned in spec 38.214 */
2664       uint8_t shortMsgIndSize      = 2;
2665       uint8_t shortMsgSize         = 8;
2666       uint8_t freqDomResAssignSize = 0;
2667       uint8_t timeDomResAssignSize = 4;
2668       uint8_t VRB2PRBMapSize       = 1;
2669       uint8_t modNCodSchemeSize    = 5;
2670       uint8_t tbScalingSize        = 2;
2671       uint8_t reservedSize         = 6;
2672
2673       dlDciPtr->rnti = P_RNTI;
2674       dlDciPtr->scramblingId = macCellCfg->cellCfg.phyCellId;
2675       dlDciPtr->scramblingRnti = 0;
2676       dlDciPtr->cceIndex = dlPageAlloc->pageDlDci.cceIndex;
2677       dlDciPtr->aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
2678       dlDciPtr->pc_and_bform.numPrgs = 1;
2679       dlDciPtr->pc_and_bform.prgSize = 1;
2680       dlDciPtr->pc_and_bform.digBfInterfaces = 0;
2681       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = 0;
2682       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
2683       dlDciPtr->beta_pdcch_1_0 = 0;
2684       dlDciPtr->powerControlOffsetSS = 0;
2685
2686       /* Calculating freq domain resource allocation field value and size
2687        * coreset0Size = Size of coreset 0
2688        * RBStart = Starting Virtual Rsource block
2689        * RBLen = length of contiguously allocted RBs
2690        * Spec 38.214 Sec 5.1.2.2.2
2691        */
2692       coreset0Size = dlPageAlloc->pageDlDci.coreSetSize;
2693       rbStart = dlPageAlloc->pageDlSch.freqAlloc.startPrb;
2694       rbLen = dlPageAlloc->pageDlSch.freqAlloc.numPrb;
2695
2696       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2697       {
2698          if((rbLen - 1) <= floor(coreset0Size / 2))
2699             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2700          else
2701             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2702                                + (coreset0Size - 1 - rbStart);
2703
2704          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2705       }
2706
2707       /*Fetching DCI field values */
2708
2709       /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2710       if(dlPageAlloc->shortMsgInd != TRUE)
2711       {
2712          /*When Short Msg is absent*/
2713          shortMsgInd = 1;
2714          shortMsg    = 0;
2715       }
2716       else
2717       {
2718          /*Short Msg is Present*/
2719          if(dlPageAlloc->pageDlSch.dlPagePduLen == 0 || dlPageAlloc->pageDlSch.dlPagePdu == NULLP)
2720          {
2721             /*When Paging Msg is absent*/
2722             shortMsgInd = 2;
2723          }
2724          else
2725          {
2726             /*Both Short and Paging is present*/
2727             shortMsgInd = 3;
2728          }
2729          shortMsg = dlPageAlloc->shortMsg;
2730       }
2731
2732       timeDomResAssign = 0;
2733       VRB2PRBMap       = dlPageAlloc->pageDlSch.vrbPrbMapping;
2734       modNCodScheme    = dlPageAlloc->pageDlSch.tbInfo.mcs;
2735       tbScaling        = 0;
2736       reserved         = 0;
2737
2738       /* Reversing bits in each DCI field */
2739       shortMsgInd      = reverseBits(shortMsgInd, shortMsgIndSize);
2740       shortMsg         = reverseBits(shortMsg, shortMsgSize);
2741       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2742       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2743       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2744       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2745       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2746       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2747
2748       /* Calulating total number of bytes in buffer */
2749       dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2750                                   + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2751                                   + tbScaling + reservedSize;
2752
2753       numBytes = dlDciPtr->payloadSizeBits / 8;
2754       if(dlDciPtr->payloadSizeBits % 8)
2755       {
2756          numBytes += 1;
2757       }
2758
2759       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2760       {
2761          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2762          return;
2763       }
2764
2765       /* Initialize buffer */
2766       for(bytePos = 0; bytePos < numBytes; bytePos++)
2767       {
2768          dlDciPtr->payload[bytePos] = 0;
2769       }
2770
2771       bytePos = numBytes - 1;
2772       bitPos = 0;
2773
2774       /* Packing DCI format fields */
2775       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2776             shortMsgInd, shortMsgIndSize);
2777       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2778             shortMsg, shortMsgSize);
2779       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2780             freqDomResAssign, freqDomResAssignSize);
2781       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2782             timeDomResAssign, timeDomResAssignSize);
2783       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2784             VRB2PRBMap, VRB2PRBMapSize);
2785       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2786             modNCodScheme, modNCodSchemeSize);
2787       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2788             tbScaling, tbScalingSize);
2789       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2790             reserved, reservedSize);
2791    }
2792 } /* fillPageDlDciPdu */
2793
2794 /*******************************************************************
2795  *
2796  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2797  *
2798  * @details
2799  *
2800  *    Function : fillRarDlDciPdu
2801  *
2802  *    Functionality:
2803  *         -Fills the Dl DCI PDU
2804  *
2805  * @params[in] Pointer to fapi_dl_dci_t
2806  *             Pointer to PdcchCfg
2807  * @return ROK
2808  *
2809  ******************************************************************/
2810
2811 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2812 {
2813    if(dlDciPtr != NULLP)
2814    {
2815       uint8_t numBytes =0;
2816       uint8_t bytePos =0;
2817       uint8_t bitPos =0;
2818
2819       uint16_t coreset0Size =0;
2820       uint16_t rbStart =0;
2821       uint16_t rbLen =0;
2822       uint32_t freqDomResAssign =0;
2823       uint8_t timeDomResAssign =0;
2824       uint8_t  VRB2PRBMap =0;
2825       uint8_t modNCodScheme =0;
2826       uint8_t tbScaling =0;
2827       uint32_t reserved =0;
2828
2829       /* Size(in bits) of each field in DCI format 1_0 */
2830       uint8_t freqDomResAssignSize = 0;
2831       uint8_t timeDomResAssignSize = 4;
2832       uint8_t VRB2PRBMapSize       = 1;
2833       uint8_t modNCodSchemeSize    = 5;
2834       uint8_t tbScalingSize        = 2;
2835       uint8_t reservedSize         = 16;
2836
2837       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2838       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2839       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2840       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2841       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2842       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2843       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2844       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2845       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2846       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2847       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2848       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2849
2850       /* Calculating freq domain resource allocation field value and size
2851        * coreset0Size = Size of coreset 0
2852        * RBStart = Starting Virtual Rsource block
2853        * RBLen = length of contiguously allocted RBs
2854        * Spec 38.214 Sec 5.1.2.2.2
2855        */
2856
2857       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2858       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2859       rbStart = rarPdcchInfo->dci.pdschCfg.pdschFreqAlloc.startPrb;
2860       rbLen = rarPdcchInfo->dci.pdschCfg.pdschFreqAlloc.numPrb;
2861
2862       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2863       {
2864          if((rbLen - 1) <= floor(coreset0Size / 2))
2865             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2866          else
2867             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2868                                + (coreset0Size - 1 - rbStart);
2869
2870          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2871       }
2872
2873       /* Fetching DCI field values */
2874       timeDomResAssign = rarPdcchInfo->dci.pdschCfg.pdschTimeAlloc.rowIndex;
2875       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2876       modNCodScheme    = rarPdcchInfo->dci.pdschCfg.codeword[0].mcsIndex;
2877       tbScaling        = 0; /* configured to 0 scaling */
2878       reserved         = 0;
2879
2880       /* Reversing bits in each DCI field */
2881       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2882       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2883       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2884       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2885       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2886
2887       /* Calulating total number of bytes in buffer */
2888       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2889                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2890
2891       numBytes = dlDciPtr->payloadSizeBits / 8;
2892       if(dlDciPtr->payloadSizeBits % 8)
2893          numBytes += 1;
2894
2895       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2896       {
2897          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2898          return;
2899       }
2900
2901       /* Initialize buffer */
2902       for(bytePos = 0; bytePos < numBytes; bytePos++)
2903          dlDciPtr->payload[bytePos] = 0;
2904
2905       bytePos = numBytes - 1;
2906       bitPos = 0;
2907
2908       /* Packing DCI format fields */
2909       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2910             freqDomResAssign, freqDomResAssignSize);
2911       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2912             timeDomResAssign, timeDomResAssignSize);
2913       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2914             VRB2PRBMap, VRB2PRBMapSize);
2915       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2916             modNCodScheme, modNCodSchemeSize);
2917       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2918             tbScaling, tbScalingSize);
2919       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2920             reserved, reservedSize);
2921    }
2922 } /* fillRarDlDciPdu */
2923
2924 /*******************************************************************
2925  *
2926  * @brief fills DL DCI PDU required for DL TTI info in MAC
2927  *
2928  * @details
2929  *
2930  *    Function : fillDlMsgDlDciPdu
2931  *
2932  *    Functionality:
2933  *         -Fills the Dl DCI PDU
2934  *
2935  * @params[in] Pointer to fapi_dl_dci_t
2936  *             Pointer to PdcchCfg
2937  * @return ROK
2938  *
2939  ******************************************************************/
2940 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2941       DlMsgSchInfo *dlMsgSchInfo)
2942 {
2943    if(dlDciPtr != NULLP)
2944    {
2945       uint8_t numBytes;
2946       uint8_t bytePos;
2947       uint8_t bitPos;
2948
2949       uint16_t coresetSize = 0;
2950       uint16_t rbStart = 0;
2951       uint16_t rbLen = 0;
2952       uint8_t  dciFormatId;
2953       uint32_t freqDomResAssign;
2954       uint8_t  timeDomResAssign;
2955       uint8_t  VRB2PRBMap;
2956       uint8_t  modNCodScheme;
2957       uint8_t  ndi = 0;
2958       uint8_t  redundancyVer = 0;
2959       uint8_t  harqProcessNum = 0;
2960       uint8_t  dlAssignmentIdx = 0;
2961       uint8_t  pucchTpc = 0;
2962       uint8_t  pucchResoInd = 0;
2963       uint8_t  harqFeedbackInd = 0;
2964
2965       /* Size(in bits) of each field in DCI format 1_0 */
2966       uint8_t dciFormatIdSize    = 1;
2967       uint8_t freqDomResAssignSize = 0;
2968       uint8_t timeDomResAssignSize = 4;
2969       uint8_t VRB2PRBMapSize       = 1;
2970       uint8_t modNCodSchemeSize    = 5;
2971       uint8_t ndiSize              = 1;
2972       uint8_t redundancyVerSize    = 2;
2973       uint8_t harqProcessNumSize   = 4;
2974       uint8_t dlAssignmentIdxSize  = 2;
2975       uint8_t pucchTpcSize         = 2;
2976       uint8_t pucchResoIndSize     = 3;
2977       uint8_t harqFeedbackIndSize  = 3;
2978
2979       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2980       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2981       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2982       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2983       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2984       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2985       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2986       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2987       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2988       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2989       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2990       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2991
2992       /* Calculating freq domain resource allocation field value and size
2993        * coreset0Size = Size of coreset 0
2994        * RBStart = Starting Virtual Rsource block
2995        * RBLen = length of contiguously allocted RBs
2996        * Spec 38.214 Sec 5.1.2.2.2
2997        */
2998       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2999       rbStart = pdcchInfo->dci.pdschCfg.pdschFreqAlloc.startPrb;
3000       rbLen = pdcchInfo->dci.pdschCfg.pdschFreqAlloc.numPrb;
3001
3002       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
3003       {
3004          if((rbLen - 1) <= floor(coresetSize / 2))
3005             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3006          else
3007             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3008                                + (coresetSize - 1 - rbStart);
3009
3010          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3011       }
3012
3013       /* Fetching DCI field values */
3014       dciFormatId      = dlMsgSchInfo->dciFormatId;     /* Always set to 1 for DL */
3015       timeDomResAssign = pdcchInfo->dci.pdschCfg.pdschTimeAlloc.rowIndex -1;
3016       VRB2PRBMap       = pdcchInfo->dci.pdschCfg.pdschFreqAlloc.vrbPrbMapping;
3017       modNCodScheme    = pdcchInfo->dci.pdschCfg.codeword[0].mcsIndex;
3018       ndi              = dlMsgSchInfo->transportBlock[0].ndi;
3019       redundancyVer    = pdcchInfo->dci.pdschCfg.codeword[0].rvIndex;
3020       harqProcessNum   = dlMsgSchInfo->harqProcNum;
3021       dlAssignmentIdx  = dlMsgSchInfo->dlAssignIdx;
3022       pucchTpc         = dlMsgSchInfo->pucchTpc;
3023       pucchResoInd     = dlMsgSchInfo->pucchResInd;
3024       harqFeedbackInd  = dlMsgSchInfo->harqFeedbackInd;
3025
3026       /* Reversing bits in each DCI field */
3027       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
3028       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3029       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3030       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3031       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
3032       ndi              = reverseBits(ndi, ndiSize);
3033       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
3034       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
3035       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3036       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
3037       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
3038       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3039
3040
3041       /* Calulating total number of bytes in buffer */
3042       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3043             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3044             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3045             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3046
3047       numBytes = dlDciPtr->payloadSizeBits / 8;
3048       if(dlDciPtr->payloadSizeBits % 8)
3049          numBytes += 1;
3050
3051       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3052       {
3053          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
3054          return;
3055       }
3056
3057       /* Initialize buffer */
3058       for(bytePos = 0; bytePos < numBytes; bytePos++)
3059          dlDciPtr->payload[bytePos] = 0;
3060
3061       bytePos = numBytes - 1;
3062       bitPos = 0;
3063
3064       /* Packing DCI format fields */
3065       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3066             dciFormatId, dciFormatIdSize);
3067       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3068             freqDomResAssign, freqDomResAssignSize);
3069       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3070             timeDomResAssign, timeDomResAssignSize);
3071       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3072             VRB2PRBMap, VRB2PRBMapSize);
3073       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3074             modNCodScheme, modNCodSchemeSize);
3075       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3076             ndi, ndiSize);
3077       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3078             redundancyVer, redundancyVerSize);
3079       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3080             redundancyVer, redundancyVerSize);
3081       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3082             harqProcessNum, harqProcessNumSize);
3083       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3084             dlAssignmentIdx, dlAssignmentIdxSize);
3085       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3086             pucchTpc, pucchTpcSize);
3087       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3088             pucchResoInd, pucchResoIndSize);
3089       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3090             harqFeedbackInd, harqFeedbackIndSize);
3091    }
3092 }
3093
3094 /*******************************************************************
3095  *
3096  * @brief fills Dl PDCCH Info from DL PageAlloc
3097  *
3098  * @details
3099  *
3100  *    Function : fillPdcchInfoFrmPageAlloc
3101  *
3102  *    Functionality:
3103  *         -Fills the PdcchInfo
3104  *
3105  * @params[in] Pointer to DlPageAlloc
3106  *             Pointer to PdcchCfg
3107  * @return ROK
3108  *
3109  ******************************************************************/
3110 void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc, MacCellCfg *macCellCfg)
3111 {
3112    if(dlTtiReqPdu != NULLP)
3113    {
3114       BwpCfg *bwp = NULLP;
3115
3116       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3117       bwp = &pageAlloc->bwp;
3118       fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg);
3119
3120       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3121
3122       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize           = bwp->freqAlloc.numPrb;
3123       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart          = bwp->freqAlloc.startPrb;
3124       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3125       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix      = bwp->cyclicPrefix;
3126
3127       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex    = pageAlloc->pageDlDci.ssStartSymbolIndex;
3128       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols     = pageAlloc->pageDlDci.durationSymbols;
3129       convertFreqDomRsrcMapToIAPIFormat(pageAlloc->pageDlDci.freqDomainResource, \
3130                                          dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3131       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType   = pageAlloc->pageDlDci.cceRegMappingType;
3132       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize       = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
3133       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize     = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
3134       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex          = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
3135       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity;
3136       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci            = 1;
3137       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType         = CORESET_TYPE0;
3138
3139       /* Calculating PDU length. Considering only one dl dci pdu for now */
3140       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3141
3142       /* Filling Vendor message PDU */
3143       dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3144       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3145       dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3146       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3147       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3148    }
3149 }
3150
3151 /*******************************************************************
3152  *
3153  * @brief fills PDCCH PDU required for DL TTI info in MAC
3154  *
3155  * @details
3156  *
3157  *    Function : fillPdcchPdu
3158  *
3159  *    Functionality:
3160  *         -Fills the Pdcch PDU info
3161  *          stored in MAC
3162  *
3163  * @params[in] Pointer to FAPI DL TTI Req
3164  *             Pointer to PdcchCfg
3165  * @return ROK
3166  *
3167  ******************************************************************/
3168 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3169       RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3170 {
3171    if(dlTtiReqPdu != NULLP)
3172    {
3173       PdcchCfg *pdcchInfo = NULLP;
3174       BwpCfg *bwp = NULLP;
3175
3176       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3177       if(rntiType == SI_RNTI_TYPE)
3178       {
3179          pdcchInfo = dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3180          bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3181          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3182       }
3183       else if(rntiType == RA_RNTI_TYPE)
3184       {
3185          pdcchInfo = dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3186          bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3187          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3188       }
3189       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3190       {
3191          pdcchInfo = dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg;
3192          bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp;
3193          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3194                dlSlot->dlInfo.dlMsgAlloc[ueIdx]);
3195       }
3196       else
3197       {
3198          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
3199          return RFAILED;
3200       }
3201
3202       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3203       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3204       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3205       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3206       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3207
3208       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3209       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3210       convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
3211                                          dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3212       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3213       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3214       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3215       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
3216       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3217       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3218       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3219
3220       /* Calculating PDU length. Considering only one dl dci pdu for now */
3221       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3222
3223       /* Filling Vendor message PDU */
3224       dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3225       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3226       dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3227       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3228       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3229    }
3230
3231    return ROK;
3232 }
3233
3234 /*******************************************************************
3235  *
3236  * @brief fills PDSCH PDU from PageAlloc required for DL TTI info in MAC
3237  *
3238  * @details
3239  *
3240  *    Function : fillPagePdschPdu
3241  *
3242  *    Functionality:
3243  *         -Fills the Pdsch PDU info
3244  *          stored in MAC
3245  *
3246  * @params[in] Pointer to FAPI DL TTI Req
3247  *             Pointer to PdschCfg
3248  *             Pointer to msgLen of DL TTI Info
3249  * @return ROK
3250  *
3251  ******************************************************************/
3252 void fillPagePdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc,
3253                        uint16_t pduIndex, MacCellCfg *macCellCfg)
3254 {
3255    uint8_t idx;
3256
3257    if(dlTtiReqPdu != NULLP)
3258    {
3259       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3260       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3261       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */
3262       dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI;
3263       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3264       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb;
3265       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb;
3266       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing;
3267       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix;
3268       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1;
3269       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3270       {
3271          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
3272          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2;
3273          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs;
3274          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0;
3275          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0;
3276          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize;
3277       }
3278       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
3279       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1;
3280       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0;
3281       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0;
3282       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
3283       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType;
3284       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
3285       dlTtiReqPdu->pdu.pdsch_pdu.scid = 0;
3286       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1;
3287       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
3288       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1;
3289       /* since we are using type-1, hence rbBitmap excluded */
3290       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
3291       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
3292       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping;
3293       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb;
3294       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb;
3295       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
3296       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
3297       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
3298       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
3299       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
3300       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0;
3301       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0;
3302       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pageAlloc->pageDlSch.timeAlloc.mappingType;
3303       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols;
3304       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos;
3305
3306       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3307
3308       /* DL TTI Request vendor message */
3309       dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3310       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3311       dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3312       for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3313       {
3314               dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3315       }
3316    }
3317 }
3318
3319 /*******************************************************************
3320  *
3321  * @brief fills PDSCH PDU required for DL TTI info in MAC
3322  *
3323  * @details
3324  *
3325  *    Function : fillPdschPdu
3326  *
3327  *    Functionality:
3328  *         -Fills the Pdsch PDU info
3329  *          stored in MAC
3330  *
3331  * @params[in] Pointer to FAPI DL TTI Req
3332  *             Pointer to PdschCfg
3333  *             Pointer to msgLen of DL TTI Info
3334  * @return ROK
3335  *
3336  ******************************************************************/
3337
3338 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3339       BwpCfg bwp, uint16_t pduIndex)
3340 {
3341    uint8_t idx;
3342
3343    if(dlTtiReqPdu != NULLP)
3344    {
3345       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3346       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3347       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3348       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3349       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3350       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3351       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3352       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3353       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3354       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3355       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3356       {
3357          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3358          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3359          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3360          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3361          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3362          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3363       }
3364       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3365       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3366       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3367       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3368       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3369       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3370       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3371       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3372       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3373       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3374       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3375       /* since we are using type-1, hence rbBitmap excluded */
3376       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
3377       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
3378       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3379       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
3380       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
3381       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3382       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3383       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3384       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3385          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3386       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3387          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3388       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3389       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3390       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3391       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3392       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3393
3394       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3395
3396       /* DL TTI Request vendor message */
3397       dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3398       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3399       dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3400       for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3401       {
3402               dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3403       }
3404    }
3405 }
3406
3407 /***********************************************************************
3408  *
3409  * @brief calculates the total size to be allocated for DL TTI Req
3410  *
3411  * @details
3412  *
3413  *    Function : calcDlTtiReqPduCount
3414  *
3415  *    Functionality:
3416  *         -calculates the total pdu count to be allocated for DL TTI Req
3417  *
3418  * @params[in]   MacDlSlot *dlSlot
3419  * @return count
3420  *
3421  * ********************************************************************/
3422 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3423 {
3424    uint8_t count = 0;
3425    uint8_t idx = 0, ueIdx=0;
3426
3427    if(dlSlot->dlInfo.isBroadcastPres)
3428    {
3429       if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3430       {
3431          for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3432          {
3433             /* SSB PDU is filled */
3434             count++;
3435          }
3436       }
3437       if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3438       {
3439          /* PDCCH and PDSCH PDU is filled */
3440          count += 2;
3441       }
3442    }
3443
3444    if(dlSlot->pageAllocInfo)
3445    {
3446       /* PDCCH and PDSCH PDU is filled */
3447       count += 2;
3448    }
3449
3450    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3451    {
3452       if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3453       {
3454          /* PDCCH and PDSCH PDU is filled */
3455          if(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg && dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3456             count += 2;
3457          else
3458             count += 1;
3459       }
3460
3461       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3462       {
3463          /* PDCCH and PDSCH PDU is filled */
3464          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)
3465             count += 1;
3466          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3467             count += 1;
3468       }
3469    }
3470    return count;
3471 }
3472
3473 /***********************************************************************
3474  *
3475  * @brief calculates the total size to be allocated for DL TTI Req
3476  *
3477  * @details
3478  *
3479  *    Function : calcTxDataReqPduCount
3480  *
3481  *    Functionality:
3482  *         -calculates the total pdu count to be allocated for DL TTI Req
3483  *
3484  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3485  * @return count
3486  *
3487  * ********************************************************************/
3488 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3489 {
3490    uint8_t count = 0, ueIdx=0;
3491
3492    if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3493    {
3494       count++;
3495    }
3496    if(dlSlot->pageAllocInfo)
3497    {
3498       count++;
3499    }
3500
3501    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3502    {
3503       if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) &&  (dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
3504          count++;
3505
3506       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3507       {
3508          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3509             count++;
3510       }
3511    }
3512    return count;
3513 }
3514
3515 /***********************************************************************
3516  *
3517  * @brief fills the SIB1 TX-DATA request message
3518  *
3519  * @details
3520  *
3521  *    Function : fillSib1TxDataReq
3522  *
3523  *    Functionality:
3524  *         - fills the SIB1 TX-DATA request message
3525  *
3526  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3527  * @params[in]    macCellCfg consist of SIB1 pdu
3528  * @params[in]    uint32_t *msgLen
3529  * @params[in]    uint16_t pduIndex
3530  * @return ROK
3531  *
3532  * ********************************************************************/
3533 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3534       PdschCfg *pdschCfg)
3535 {
3536    uint32_t payloadSize = 0;
3537    uint8_t *sib1Payload = NULLP;
3538    fapi_api_queue_elem_t *payloadElem = NULLP;
3539 #ifdef INTEL_WLS_MEM
3540    void * wlsHdlr = NULLP;
3541 #endif
3542
3543    pduDesc[pduIndex].pdu_index = pduIndex;
3544    pduDesc[pduIndex].num_tlvs = 1;
3545
3546    /* fill the TLV */
3547    payloadSize = pdschCfg->codeword[0].tbSize;
3548    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3549    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3550    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3551    if(sib1Payload == NULLP)
3552    {
3553       return RFAILED;
3554    }
3555    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3556    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3557       macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3558    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3559
3560 #ifdef INTEL_WLS_MEM
3561    mtGetWlsHdl(&wlsHdlr);
3562    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3563 #else
3564    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3565 #endif
3566    pduDesc[pduIndex].pdu_length = payloadSize;
3567
3568 #ifdef INTEL_WLS_MEM
3569    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3570 #else
3571    LWR_MAC_FREE(sib1Payload, payloadSize);
3572 #endif
3573
3574    return ROK;
3575 }
3576
3577 /***********************************************************************
3578  *
3579  * @brief fills the PAGE TX-DATA request message
3580  *
3581  * @details
3582  *
3583  *    Function : fillPageTxDataReq
3584  *
3585  *    Functionality:
3586  *         - fills the Page TX-DATA request message
3587  *
3588  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3589  * @params[in]    macCellCfg consist of SIB1 pdu
3590  * @params[in]    uint32_t *msgLen
3591  * @params[in]    uint16_t pduIndex
3592  * @return ROK
3593  *
3594  * ********************************************************************/
3595 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo)
3596 {
3597    uint32_t payloadSize = 0;
3598    uint8_t *pagePayload = NULLP;
3599    fapi_api_queue_elem_t *payloadElem = NULLP;
3600 #ifdef INTEL_WLS_MEM
3601    void * wlsHdlr = NULLP;
3602 #endif
3603
3604    pduDesc[pduIndex].pdu_index = pduIndex;
3605    pduDesc[pduIndex].num_tlvs = 1;
3606
3607    /* fill the TLV */
3608    payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
3609    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3610    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3611    LWR_MAC_ALLOC(pagePayload, payloadSize);
3612    if(pagePayload == NULLP)
3613    {
3614       return RFAILED;
3615    }
3616    payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3617    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3618          pageAllocInfo->pageDlSch.dlPagePduLen);
3619    memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen);
3620
3621 #ifdef INTEL_WLS_MEM
3622    mtGetWlsHdl(&wlsHdlr);
3623    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3624 #else
3625    pduDesc[pduIndex].tlvs[0].value = pagePayload;
3626 #endif
3627    pduDesc[pduIndex].pdu_length = payloadSize;
3628
3629 #ifdef INTEL_WLS_MEM
3630    addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3631 #else
3632    LWR_MAC_FREE(pagePayload, payloadSize);
3633 #endif
3634
3635    return ROK;
3636 }
3637
3638 /***********************************************************************
3639  *
3640  * @brief fills the RAR TX-DATA request message
3641  *
3642  * @details
3643  *
3644  *    Function : fillRarTxDataReq
3645  *
3646  *    Functionality:
3647  *         - fills the RAR TX-DATA request message
3648  *
3649  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3650  * @params[in]    RarInfo *rarInfo
3651  * @params[in]    uint32_t *msgLen
3652  * @params[in]    uint16_t pduIndex
3653  * @return ROK
3654  *
3655  * ********************************************************************/
3656 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
3657 {
3658    uint16_t payloadSize;
3659    uint8_t  *rarPayload = NULLP;
3660    fapi_api_queue_elem_t *payloadElem = NULLP;
3661 #ifdef INTEL_WLS_MEM
3662    void * wlsHdlr = NULLP;
3663 #endif
3664
3665    pduDesc[pduIndex].pdu_index = pduIndex;
3666    pduDesc[pduIndex].num_tlvs = 1;
3667
3668    /* fill the TLV */
3669    payloadSize = pdschCfg->codeword[0].tbSize;
3670    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3671    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3672    LWR_MAC_ALLOC(rarPayload, payloadSize);
3673    if(rarPayload == NULLP)
3674    {
3675       return RFAILED;
3676    }
3677    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3678    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3679    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3680
3681 #ifdef INTEL_WLS_MEM
3682    mtGetWlsHdl(&wlsHdlr);
3683    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3684 #else
3685    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3686 #endif
3687    pduDesc[pduIndex].pdu_length = payloadSize;
3688
3689 #ifdef INTEL_WLS_MEM
3690    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3691 #else
3692    LWR_MAC_FREE(rarPayload, payloadSize);
3693 #endif
3694    return ROK;
3695 }
3696
3697 /***********************************************************************
3698  *
3699  * @brief fills the DL dedicated Msg TX-DATA request message
3700  *
3701  * @details
3702  *
3703  *    Function : fillDlMsgTxDataReq
3704  *
3705  *    Functionality:
3706  *         - fills the Dl Dedicated Msg TX-DATA request message
3707  *
3708  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3709  * @params[in]    DlMsgInfo *dlMsgInfo
3710  * @params[in]    uint32_t *msgLen
3711  * @params[in]    uint16_t pduIndex
3712  * @return ROK
3713  *
3714  * ********************************************************************/
3715 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
3716 {
3717    uint16_t payloadSize;
3718    uint8_t  *dlMsgPayload = NULLP;
3719    fapi_api_queue_elem_t *payloadElem = NULLP;
3720 #ifdef INTEL_WLS_MEM
3721    void * wlsHdlr = NULLP;
3722 #endif
3723
3724    pduDesc[pduIndex].pdu_index = pduIndex;
3725    pduDesc[pduIndex].num_tlvs = 1;
3726
3727    /* fill the TLV */
3728    payloadSize = pdschCfg->codeword[0].tbSize;
3729    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3730    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3731    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3732    if(dlMsgPayload == NULLP)
3733    {
3734       return RFAILED;
3735    }
3736    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3737    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
3738    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
3739
3740 #ifdef INTEL_WLS_MEM
3741    mtGetWlsHdl(&wlsHdlr);
3742    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3743 #else
3744    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3745 #endif
3746    pduDesc[pduIndex].pdu_length = payloadSize;
3747
3748 #ifdef INTEL_WLS_MEM
3749    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3750 #else
3751    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3752 #endif
3753    return ROK;
3754 }
3755
3756 #endif /* FAPI */
3757
3758 /*******************************************************************
3759  *
3760  * @brief Sends DL TTI Request to PHY
3761  *
3762  * @details
3763  *
3764  *    Function : fillDlTtiReq
3765  *
3766  *    Functionality:
3767  *         -Sends FAPI DL TTI req to PHY
3768  *
3769  * @params[in]    timing info
3770  * @return ROK     - success
3771  *         RFAILED - failure
3772  *
3773  * ****************************************************************/
3774 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3775 {
3776 #ifdef CALL_FLOW_DEBUG_LOG
3777    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3778 #endif
3779
3780 #ifdef INTEL_FAPI
3781    uint8_t idx =0;
3782    uint8_t nPdu = 0;
3783    uint8_t numPduEncoded = 0;
3784    uint8_t  ueIdx;
3785    uint16_t cellIdx =0;
3786    uint16_t pduIndex = 0;
3787
3788    SlotTimingInfo dlTtiReqTimingInfo;
3789    MacDlSlot *currDlSlot = NULLP;
3790    MacCellCfg macCellCfg;
3791    RntiType rntiType;
3792    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3793    fapi_msg_header_t *msgHeader = NULLP;
3794    p_fapi_api_queue_elem_t dlTtiElem;
3795    p_fapi_api_queue_elem_t headerElem;
3796    p_fapi_api_queue_elem_t prevElem;
3797    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3798    {
3799            GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3800            /* consider phy delay */
3801            ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL, macCb.macCell[cellIdx]->numOfSlots);
3802            dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3803
3804            macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3805
3806            currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3807
3808            /* Vendor Message */
3809            fapi_vendor_msg_t *vendorMsg;
3810            p_fapi_api_queue_elem_t  vendorMsgQElem;
3811            /* Allocte And fill Vendor msg */
3812            LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3813            if(!vendorMsgQElem)
3814            {
3815                    DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
3816                    return RFAILED;
3817            }
3818            FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3819            vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3820            fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3821
3822            LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3823            if(dlTtiElem)
3824            {
3825                    FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3826                                    sizeof(fapi_dl_tti_req_t));
3827                    /* Fill message header */
3828                    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3829                    if(!headerElem)
3830                    {
3831                            DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3832                            LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3833                            return RFAILED;
3834                    }
3835
3836                    FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3837                                    sizeof(fapi_msg_header_t));
3838                    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3839                    msgHeader->num_msg = 2;
3840                    msgHeader->handle = 0;
3841
3842                    /* Fill Dl TTI Request */
3843                    dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3844                    memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3845                    fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3846
3847                    dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3848                    dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3849                    dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot);  /* get total Pdus */
3850                    nPdu = dlTtiReq->nPdus;
3851
3852                    vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3853                    vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3854
3855                    dlTtiReq->nGroup = 0;
3856                    if(dlTtiReq->nPdus > 0)
3857                    {
3858                            if(currDlSlot->dlInfo.isBroadcastPres)
3859                            {
3860                                    if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3861                                    {
3862                                            if(dlTtiReq->pdus != NULLP)
3863                                            {
3864                                                    for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3865                                                    {
3866                                                            fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3867                                                                            currDlSlot, idx, dlTtiReq->sfn);
3868                                                            numPduEncoded++;
3869                                                    }
3870                                            }
3871                                            DU_LOG("\033[1;31m");
3872                                            DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3873                                            DU_LOG("\033[0m");
3874                                    }
3875
3876                                    if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3877                                    {
3878                                            /* Filling SIB1 param */
3879                                            if(numPduEncoded != nPdu)
3880                                            {
3881                      if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
3882                         rntiType = SI_RNTI_TYPE;
3883
3884                                                    /* PDCCH PDU */
3885                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3886                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3887                                                    numPduEncoded++;
3888
3889                                                    /* PDSCH PDU */
3890                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3891                                                                    &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci.pdschCfg,
3892                                                                    currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3893                                                                    pduIndex);
3894                                                    dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3895                                                    pduIndex++;
3896                                                    numPduEncoded++;
3897                                            }
3898                                            DU_LOG("\033[1;34m");
3899                                            DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3900                                            DU_LOG("\033[0m");
3901                                    }
3902                            }
3903
3904                            if(currDlSlot->pageAllocInfo != NULLP)
3905                            {
3906                                    /* Filling DL Paging Alloc param */
3907                                    if(numPduEncoded != nPdu)
3908                                    {
3909                                            rntiType = P_RNTI_TYPE;
3910                                            fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3911                                    currDlSlot->pageAllocInfo, &macCellCfg);
3912                                            numPduEncoded++;
3913                                            fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3914                                                                        currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
3915                                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3916                                            pduIndex++;
3917                                            numPduEncoded++;
3918                                    }
3919                                    DU_LOG("\033[1;34m");
3920                                    DU_LOG("\nDEBUG  -->  LWR_MAC: PAGE sent...");
3921                                    DU_LOG("\033[0m");
3922                            }
3923
3924                            for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3925                            {
3926                                    if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3927                                    {
3928                                            /* Filling RAR param */
3929                                            rntiType = RA_RNTI_TYPE;
3930                   if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3931                   {
3932                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3933                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3934                                                    numPduEncoded++;
3935                      MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
3936                   }
3937                                            if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
3938                                            {
3939                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3940                                                                    currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3941                                                                    currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3942                                                                    pduIndex);
3943                                                    numPduEncoded++;
3944                                                    pduIndex++;
3945
3946                      DU_LOG("\033[1;32m");
3947                                                    DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3948                                                    DU_LOG("\033[0m");
3949                                            }
3950                                    }
3951
3952                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3953                                    {
3954                   if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)  \
3955                   {
3956                      rntiType = C_RNTI_TYPE;
3957                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3958                            currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
3959                      numPduEncoded++;
3960                   }
3961
3962                   if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
3963                   {
3964                      if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3965                      {
3966                         fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3967                               currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
3968                               currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
3969                         numPduEncoded++;
3970                         pduIndex++;
3971
3972                         DU_LOG("\033[1;32m");
3973                         if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status))
3974                         {
3975                            DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3976                            MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
3977                         }
3978                         else
3979                         {
3980                            DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3981                         }
3982                         DU_LOG("\033[0m");
3983                      }
3984
3985                   }
3986                   MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
3987                   /*   else
3988                        {
3989                        MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3990                        currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3991                        }
3992                        */
3993                                    }
3994                            }
3995
3996                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3997                            dlTtiReq->nGroup++;
3998
3999 #ifdef ODU_SLOT_IND_DEBUG_LOG
4000                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
4001 #endif
4002
4003                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4004                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4005                            msgHeader->num_msg++;
4006
4007                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4008                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4009                            msgHeader->num_msg++;
4010
4011                            /* send Tx-DATA req message */
4012                            sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
4013                            if(dlTtiElem->p_next->p_next->p_next)
4014                            {
4015                                    msgHeader->num_msg++;
4016                                    prevElem = dlTtiElem->p_next->p_next->p_next;
4017                            }
4018                            else
4019                                    prevElem = dlTtiElem->p_next->p_next;
4020                    }
4021                    else
4022                    {
4023 #ifdef ODU_SLOT_IND_DEBUG_LOG
4024                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
4025 #endif
4026                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4027                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4028                            msgHeader->num_msg++;
4029
4030                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4031                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4032                            msgHeader->num_msg++;
4033
4034                            prevElem = dlTtiElem->p_next->p_next;
4035                    }
4036
4037                    if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
4038                    {
4039                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4040                            lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
4041                            msgHeader->num_msg++;
4042                            macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
4043             prevElem = prevElem->p_next;
4044                    }
4045                    prevElem->p_next = vendorMsgQElem;
4046                    LwrMacSendToL1(headerElem);
4047                    memset(currDlSlot, 0, sizeof(MacDlSlot));
4048                    return ROK;
4049            }
4050            else
4051            {
4052                    DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
4053                    memset(currDlSlot, 0, sizeof(MacDlSlot));
4054                    return RFAILED;
4055            }
4056    }
4057    else
4058    {
4059            lwr_mac_procInvalidEvt(&currTimingInfo);
4060            return RFAILED;
4061    }
4062 #endif
4063    return ROK;
4064 }
4065
4066 /*******************************************************************
4067  *
4068  * @brief Sends TX data Request to PHY
4069  *
4070  * @details
4071  *
4072  *    Function : sendTxDataReq
4073  *
4074  *    Functionality:
4075  *         -Sends FAPI TX data req to PHY
4076  *
4077  * @params[in]    timing info
4078  * @return ROK     - success
4079  *         RFAILED - failure
4080  *
4081  * ****************************************************************/
4082 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
4083 {
4084 #ifdef INTEL_FAPI
4085 #ifdef CALL_FLOW_DEBUG_LOG
4086    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
4087 #endif
4088
4089    uint8_t  nPdu = 0;
4090    uint8_t  ueIdx=0;
4091    uint16_t cellIdx=0;
4092    uint16_t pduIndex = 0;
4093    fapi_tx_data_req_t       *txDataReq =NULLP;
4094    p_fapi_api_queue_elem_t  txDataElem = 0;
4095
4096    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4097
4098    /* send TX_Data request message */
4099    nPdu = calcTxDataReqPduCount(dlSlot);
4100    if(nPdu > 0)
4101    {
4102       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
4103       if(txDataElem == NULLP)
4104       {
4105          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
4106          return RFAILED;
4107       }
4108
4109       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
4110             sizeof(fapi_tx_data_req_t));
4111       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
4112       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
4113       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
4114
4115       vendorTxDataReq->sym = 0;
4116
4117       txDataReq->sfn  = currTimingInfo.sfn;
4118       txDataReq->slot = currTimingInfo.slot;
4119       if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4120       {
4121          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4122                &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci.pdschCfg);
4123          pduIndex++;
4124          MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
4125          txDataReq->num_pdus++;
4126       }
4127       if(dlSlot->pageAllocInfo != NULLP)
4128       {
4129          fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo);
4130          pduIndex++;
4131          txDataReq->num_pdus++;
4132          MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen));
4133          MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4134       }
4135
4136       for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4137       {
4138          if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4139          {
4140             if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
4141             {
4142                fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4143                      dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4144                pduIndex++;
4145                txDataReq->num_pdus++;
4146                MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
4147             }
4148             MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4149          }
4150
4151          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4152          {
4153             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
4154             {
4155                fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4156                      dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
4157                      dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
4158                pduIndex++;
4159                txDataReq->num_pdus++;
4160                MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
4161             }
4162             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
4163                   dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
4164             dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
4165             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
4166          }
4167       }
4168
4169       /* Fill message header */
4170       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
4171       prevElem->p_next = txDataElem;
4172    }
4173 #endif
4174    return ROK;
4175 }
4176
4177 /***********************************************************************
4178  *
4179  * @brief calculates the total size to be allocated for UL TTI Req
4180  *
4181  * @details
4182  *
4183  *    Function : getnPdus
4184  *
4185  *    Functionality:
4186  *         -calculates the total pdu count to be allocated for UL TTI Req
4187  *
4188  * @params[in] Pointer to fapi Ul TTI Req
4189  *             Pointer to CurrUlSlot
4190  * @return count
4191  * ********************************************************************/
4192 #ifdef INTEL_FAPI
4193 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4194 {
4195    uint8_t pduCount = 0;
4196
4197    if(ulTtiReq && currUlSlot)
4198    {
4199       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4200       {
4201          pduCount++;
4202          ulTtiReq->rachPresent++;
4203       }
4204       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4205       {
4206          pduCount++;
4207          ulTtiReq->nUlsch++;
4208       }
4209       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4210       {
4211          pduCount++;
4212          ulTtiReq->nUlsch++;
4213       }
4214       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4215       {
4216          pduCount++;
4217          ulTtiReq->nUlcch++;
4218       }
4219       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
4220       {
4221          pduCount++;
4222       }
4223    }
4224    return pduCount;
4225 }
4226 #endif
4227
4228 /***********************************************************************
4229  *
4230  * @brief Set the value of zero correlation config in PRACH PDU
4231  *
4232  * @details
4233  *
4234  *    Function : setNumCs
4235  *
4236  *    Functionality:
4237  *         -Set the value of zero correlation config in PRACH PDU
4238  *
4239  * @params[in] Pointer to zero correlation config
4240  *             Pointer to MacCellCfg
4241  * ********************************************************************/
4242
4243 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4244 {
4245 #ifdef INTEL_FAPI
4246    uint8_t idx;
4247    if(macCellCfg != NULLP)
4248    {
4249       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4250       *numCs = UnrestrictedSetNcsTable[idx];
4251    }
4252 #endif
4253 }
4254
4255 /***********************************************************************
4256  *
4257  * @brief Fills the PRACH PDU in UL TTI Request
4258  *
4259  * @details
4260  *
4261  *    Function : fillPrachPdu
4262  *
4263  *    Functionality:
4264  *         -Fills the PRACH PDU in UL TTI Request
4265  *
4266  * @params[in] Pointer to Prach Pdu
4267  *             Pointer to CurrUlSlot
4268  *             Pointer to macCellCfg
4269  *             Pointer to msgLen
4270  * ********************************************************************/
4271
4272 #ifdef INTEL_FAPI
4273 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4274 {
4275    if(ulTtiReqPdu != NULLP)
4276    {
4277       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4278       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
4279       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4280          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
4281       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4282          currUlSlot->ulInfo.prachSchInfo.prachFormat;
4283       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
4284       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4285          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
4286       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4287       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4288       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4289       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4290       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4291       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4292    }
4293 }
4294
4295 /*******************************************************************
4296  *
4297  * @brief Filling PUSCH PDU in UL TTI Request
4298  *
4299  * @details
4300  *
4301  *    Function : fillPuschPdu
4302  *
4303  *    Functionality: Filling PUSCH PDU in UL TTI Request
4304  *
4305  * @params[in]
4306  * @return ROK     - success
4307  *         RFAILED - failure
4308  *
4309  * ****************************************************************/
4310 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4311 {
4312    if(ulTtiReqPdu != NULLP)
4313    {
4314       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4315       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4316       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4317       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
4318       /* TODO : Fill handle in raCb when scheduling pusch and access here */
4319       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4320       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4321       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4322       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4323          macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4324       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4325          macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4326       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4327       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
4328       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
4329       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
4330       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4331       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
4332       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4333       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4334       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4335       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
4336       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4337       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4338       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4339       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4340          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAllocType;
4341       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4342          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.startPrb;
4343       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4344          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.numPrb;
4345       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4346       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4347       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4348       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4349       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4350          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
4351       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4352          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
4353 #ifdef INTEL_FAPI
4354       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4355          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
4356       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4357          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
4358       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4359          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
4360 #endif
4361       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4362          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
4363       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4364          currUlSlot->ulInfo.schPuschInfo.harqProcId;
4365       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4366          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
4367       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4368          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
4369       /* numCb is 0 for new transmission */
4370       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4371
4372       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4373
4374       /* UL TTI Vendor PDU */
4375       ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4376       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4377       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4378       for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4379       {
4380               ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4381       }
4382    }
4383 }
4384
4385 /*******************************************************************
4386  *
4387  * @brief Fill PUCCH PDU in Ul TTI Request
4388  *
4389  * @details
4390  *
4391  *    Function : fillPucchPdu
4392  *
4393  *    Functionality: Fill PUCCH PDU in Ul TTI Request
4394  *
4395  * @params[in]
4396  * @return ROK     - success
4397  *         RFAILED - failure
4398  *
4399  * ****************************************************************/
4400 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4401       MacUlSlot *currUlSlot)
4402 {
4403    if(ulTtiReqPdu != NULLP)
4404    {
4405       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
4406       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4407       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.crnti;
4408       /* TODO : Fill handle in raCb when scheduling pucch and access here */
4409       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
4410       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4411       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4412       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4413       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4414       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
4415       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4416
4417       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
4418       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
4419       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
4420       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
4421       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
4422       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
4423       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4424       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4425       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
4426
4427       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
4428
4429       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4430       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
4431       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
4432       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
4433       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.pi2BPSK;
4434       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.addDmrs;/* Valid for Format 3, 4 only */
4435       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4436       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
4437       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
4438       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.harqInfo.harqBitLength;
4439       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
4440       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
4441       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.numPrgs;
4442       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prgSize;
4443       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.digBfInterfaces;
4444       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prg[0].beamIdx[0];
4445
4446       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4447
4448       /* UL TTI Vendor PDU */
4449       ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4450       ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4451       ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4452       for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4453       {
4454               ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4455       }
4456    }
4457 }
4458
4459 #endif
4460
4461 /*******************************************************************
4462  *
4463  * @brief Sends UL TTI Request to PHY
4464  *
4465  * @details
4466  *
4467  *    Function : fillUlTtiReq
4468  *
4469  *    Functionality:
4470  *         -Sends FAPI Param req to PHY
4471  *
4472  * @params[in]  Pointer to CmLteTimingInfo
4473  * @return ROK     - success
4474  *         RFAILED - failure
4475  *
4476  ******************************************************************/
4477 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4478 {
4479 #ifdef CALL_FLOW_DEBUG_LOG
4480    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4481 #endif
4482
4483 #ifdef INTEL_FAPI
4484    uint16_t   cellIdx =0;
4485    uint8_t    pduIdx = -1;
4486    SlotTimingInfo ulTtiReqTimingInfo;
4487    MacUlSlot *currUlSlot = NULLP;
4488    MacCellCfg macCellCfg;
4489    fapi_ul_tti_req_t *ulTtiReq = NULLP;
4490    p_fapi_api_queue_elem_t ulTtiElem;
4491
4492    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4493    {
4494       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4495       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4496
4497       /* add PHY delta */
4498       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL, macCb.macCell[cellIdx]->numOfSlots);
4499       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4500
4501       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4502       if(ulTtiElem)
4503       {
4504               FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4505                               sizeof(fapi_ul_tti_req_t));
4506               ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4507               memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4508               fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4509               ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
4510               ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4511               ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4512               vendorUlTti->num_ul_pdu =  ulTtiReq->nPdus;
4513               vendorUlTti->sym = 0;
4514               ulTtiReq->nGroup = 0;
4515               if(ulTtiReq->nPdus > 0)
4516               {
4517                       /* Fill Prach Pdu */
4518                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4519                       {
4520                               pduIdx++;
4521                               fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4522                               ulTtiReq->rachPresent++;
4523                       }
4524
4525                       /* Fill PUSCH PDU */
4526                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4527                       {
4528                               pduIdx++;
4529                               fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4530                               ulTtiReq->nUlsch++;
4531                       }
4532                       /* Fill PUCCH PDU */
4533                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4534                       {
4535                               pduIdx++;
4536                               fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4537                               ulTtiReq->nUlcch++;
4538                       }
4539               }
4540
4541 #ifdef ODU_SLOT_IND_DEBUG_LOG
4542               DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
4543 #endif
4544               prevElem->p_next = ulTtiElem;
4545
4546               memset(currUlSlot, 0, sizeof(MacUlSlot));
4547               return ROK;
4548       }
4549       else
4550       {
4551               DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
4552               memset(currUlSlot, 0, sizeof(MacUlSlot));
4553               return RFAILED;
4554       }
4555    }
4556    else
4557    {
4558            lwr_mac_procInvalidEvt(&currTimingInfo);
4559    }
4560 #endif
4561    return ROK;
4562 }
4563
4564 #ifdef INTEL_FAPI
4565 /*******************************************************************
4566  *
4567  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4568  *
4569  * @details
4570  *
4571  *    Function : fillUlDciPdu
4572  *
4573  *    Functionality:
4574  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4575  *
4576  * @params[in] Pointer to fapi_dl_dci_t
4577  *             Pointer to DciInfo
4578  * @return ROK
4579  *
4580  ******************************************************************/
4581 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4582 {
4583 #ifdef CALL_FLOW_DEBUG_LOG
4584    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4585 #endif
4586    if(ulDciPtr != NULLP)
4587    {
4588       uint8_t numBytes =0;
4589       uint8_t bytePos =0;
4590       uint8_t bitPos =0;
4591
4592       uint8_t  coreset1Size = 0;
4593       uint16_t rbStart = 0;
4594       uint16_t rbLen = 0;
4595       uint8_t  dciFormatId = 0;
4596       uint32_t freqDomResAssign =0;
4597       uint8_t  timeDomResAssign =0;
4598       uint8_t  freqHopFlag =0;
4599       uint8_t  modNCodScheme =0;
4600       uint8_t  ndi =0;
4601       uint8_t  redundancyVer = 0;
4602       uint8_t  harqProcessNum = 0;
4603       uint8_t  puschTpc = 0;
4604       uint8_t  ul_SlInd = 0;
4605
4606       /* Size(in bits) of each field in DCI format 0_0 */
4607       uint8_t dciFormatIdSize      = 1;
4608       uint8_t freqDomResAssignSize = 0;
4609       uint8_t timeDomResAssignSize = 4;
4610       uint8_t freqHopFlagSize      = 1;
4611       uint8_t modNCodSchemeSize    = 5;
4612       uint8_t ndiSize              = 1;
4613       uint8_t redundancyVerSize    = 2;
4614       uint8_t harqProcessNumSize   = 4;
4615       uint8_t puschTpcSize         = 2;
4616       uint8_t ul_SlIndSize         = 1;
4617
4618       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4619       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4620       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4621       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4622       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4623       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4624       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4625       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4626       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4627       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4628       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
4629       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4630
4631       /* Calculating freq domain resource allocation field value and size
4632        * coreset1Size = Size of coreset 1
4633        * RBStart = Starting Virtual Rsource block
4634        * RBLen = length of contiguously allocted RBs
4635        * Spec 38.214 Sec 5.1.2.2.2
4636        */
4637       if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
4638       {
4639          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4640          rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
4641          rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
4642
4643          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4644          {
4645             if((rbLen - 1) <= floor(coreset1Size / 2))
4646                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4647             else
4648                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4649                                   + (coreset1Size - 1 - rbStart);
4650
4651             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4652          }
4653          /* Fetching DCI field values */
4654          dciFormatId      = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
4655          timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
4656          freqHopFlag      = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
4657          modNCodScheme    = schDciInfo->dciFormatInfo.format.format0_0.mcs;
4658          ndi              = schDciInfo->dciFormatInfo.format.format0_0.ndi;
4659          redundancyVer    = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
4660          harqProcessNum   = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
4661          puschTpc         = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
4662          ul_SlInd         = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
4663
4664          /* Reversing bits in each DCI field */
4665          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4666          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4667          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4668          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4669          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4670          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4671          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4672          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4673       }
4674       /* Calulating total number of bytes in buffer */
4675       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4676       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4677       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4678
4679       numBytes = ulDciPtr->payloadSizeBits / 8;
4680       if(ulDciPtr->payloadSizeBits % 8)
4681          numBytes += 1;
4682
4683       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4684       {
4685          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4686          return;
4687       }
4688
4689       /* Initialize buffer */
4690       for(bytePos = 0; bytePos < numBytes; bytePos++)
4691          ulDciPtr->payload[bytePos] = 0;
4692
4693       bytePos = numBytes - 1;
4694       bitPos = 0;
4695
4696       /* Packing DCI format fields */
4697       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4698             dciFormatId, dciFormatIdSize);
4699       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4700             freqDomResAssign, freqDomResAssignSize);
4701       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4702             timeDomResAssign, timeDomResAssignSize);
4703       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4704             freqHopFlag, freqHopFlagSize);
4705       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4706             modNCodScheme, modNCodSchemeSize);
4707       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4708             ndi, ndiSize);
4709       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4710             redundancyVer, redundancyVerSize);
4711       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4712             harqProcessNum, harqProcessNumSize);
4713       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4714             puschTpc, puschTpcSize);
4715       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4716             ul_SlInd, ul_SlIndSize);
4717    }
4718 } /* fillUlDciPdu */
4719
4720 /*******************************************************************
4721  *
4722  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4723  *
4724  * @details
4725  *
4726  *    Function : fillUlDciPdcchPdu
4727  *
4728  *    Functionality:
4729  *         -Fills the Pdcch PDU info
4730  *
4731  * @params[in] Pointer to FAPI DL TTI Req
4732  *             Pointer to PdcchCfg
4733  * @return ROK
4734  *
4735  ******************************************************************/
4736 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4737 {
4738    if(ulDciReqPdu != NULLP)
4739    {
4740       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4741       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4742       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4743       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4744       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4745       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4746       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4747       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4748       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4749       convertFreqDomRsrcMapToIAPIFormat(dlInfo->ulGrant->coresetCfg.freqDomainResource, \
4750                                            ulDciReqPdu->pdcchPduConfig.freqDomainResource);
4751       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4752       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4753       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4754       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4755       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4756       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4757       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4758
4759       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4760       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4761
4762       /* Vendor UL DCI PDU */
4763       vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4764       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4765       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4766    }
4767    return ROK;
4768 }
4769 #endif
4770 /*******************************************************************
4771  *
4772  * @brief Sends UL DCI Request to PHY
4773  *
4774  * @details
4775  *
4776  *    Function : fillUlDciReq
4777  *
4778  *    Functionality:
4779  *         -Sends FAPI Ul Dci req to PHY
4780  *
4781  * @params[in]  Pointer to CmLteTimingInfo
4782  * @return ROK     - success
4783  *         RFAILED - failure
4784  *
4785  ******************************************************************/
4786 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4787 {
4788 #ifdef INTEL_FAPI
4789    uint8_t      cellIdx =0;
4790    uint8_t      numPduEncoded = 0;
4791    SlotTimingInfo  ulDciReqTimingInfo ={0};
4792    MacDlSlot    *currDlSlot = NULLP;
4793    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4794    p_fapi_api_queue_elem_t  ulDciElem;
4795
4796    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4797    {
4798       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4799       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4800       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4801
4802          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4803          if(ulDciElem)
4804          {
4805             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4806                sizeof(fapi_ul_dci_req_t));
4807             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4808             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4809             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4810
4811             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4812             ulDciReq->slot = ulDciReqTimingInfo.slot;
4813           if(currDlSlot->dlInfo.ulGrant != NULLP)
4814           {
4815             vendorUlDciReq->sym = 0;
4816             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4817             vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4818             if(ulDciReq->numPdus > 0)
4819             {
4820                /* Fill PDCCH configuration Pdu */
4821                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4822                numPduEncoded++;
4823                /* free UL GRANT at SCH */
4824                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4825             }
4826 #ifdef ODU_SLOT_IND_DEBUG_LOG
4827                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4828 #endif
4829          }
4830                prevElem->p_next = ulDciElem;
4831       }
4832    }
4833    else
4834    {
4835        lwr_mac_procInvalidEvt(&currTimingInfo);
4836    }
4837 #endif
4838    return ROK;
4839 }
4840
4841 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4842 {
4843    {
4844       /* PHY_STATE_IDLE */
4845 #ifdef INTEL_TIMER_MODE
4846       lwr_mac_procIqSamplesReqEvt,
4847 #endif
4848       lwr_mac_procParamReqEvt,
4849       lwr_mac_procParamRspEvt,
4850       lwr_mac_procConfigReqEvt,
4851       lwr_mac_procConfigRspEvt,
4852       lwr_mac_procInvalidEvt,
4853       lwr_mac_procInvalidEvt,
4854    },
4855    {
4856       /* PHY_STATE_CONFIGURED */
4857 #ifdef INTEL_TIMER_MODE
4858       lwr_mac_procInvalidEvt,
4859 #endif
4860       lwr_mac_procParamReqEvt,
4861       lwr_mac_procParamRspEvt,
4862       lwr_mac_procConfigReqEvt,
4863       lwr_mac_procConfigRspEvt,
4864       lwr_mac_procStartReqEvt,
4865       lwr_mac_procInvalidEvt,
4866    },
4867    {
4868       /* PHY_STATE_RUNNING */
4869 #ifdef INTEL_TIMER_MODE
4870       lwr_mac_procInvalidEvt,
4871 #endif
4872       lwr_mac_procInvalidEvt,
4873       lwr_mac_procInvalidEvt,
4874       lwr_mac_procConfigReqEvt,
4875       lwr_mac_procConfigRspEvt,
4876       lwr_mac_procInvalidEvt,
4877       lwr_mac_procInvalidEvt,
4878    }
4879 };
4880
4881 /*******************************************************************
4882  *
4883  * @brief Sends message to LWR_MAC Fsm Event Handler
4884  *
4885  * @details
4886  *
4887  *    Function : sendToLowerMac
4888  *
4889  *    Functionality:
4890  *         -Sends message to LowerMac
4891  *
4892  * @params[in] Message Type
4893  *             Message Length
4894  *             Messaga Pointer
4895  *
4896  * @return void
4897  *
4898  ******************************************************************/
4899 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4900 {
4901    lwrMacCb.event = msgType;
4902    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4903 }
4904
4905 /**********************************************************************
4906   End of file
4907  **********************************************************************/