1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
30 #include "nr5g_fapi_internal.h"
31 #include "fapi_vendor_extension.h"
36 #include "lwr_mac_fsm.h"
37 #include "lwr_mac_phy.h"
38 #include "lwr_mac_utils.h"
39 #include "mac_utils.h"
40 #include "nfapi_interface.h"
42 #define MIB_SFN_BITMASK 0xFC
43 #define PDCCH_PDU_TYPE 0
44 #define PDSCH_PDU_TYPE 1
45 #define SSB_PDU_TYPE 3
46 #define PRACH_PDU_TYPE 0
47 #define PUSCH_PDU_TYPE 1
48 #define PUCCH_PDU_TYPE 2
50 #define SET_MSG_LEN(x, size) x += size
52 /* Global variables */
55 extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
56 void fapiMacConfigRsp(uint16_t cellId);
57 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
58 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
59 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
60 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
62 void lwrMacLayerInit(Region region, Pool pool)
68 memset(&lwrMacCb, 0, sizeof(LwrMacCb));
69 lwrMacCb.region = region;
71 lwrMacCb.clCfgDone = TRUE;
73 lwrMacCb.phyState = PHY_STATE_IDLE;
76 /* Initializing WLS free mem list */
77 lwrMacCb.phySlotIndCntr = 1;
78 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
80 cmLListInit(&wlsBlockToFreeList[idx]);
85 /*******************************************************************
87 * @brief Handles Invalid Request Event
91 * Function : lwr_mac_procInvalidEvt
94 * - Displays the PHY state when the invalid event occurs
97 * @return ROK - success
100 * ****************************************************************/
101 uint8_t lwr_mac_procInvalidEvt(void *msg)
103 #ifdef CALL_FLOW_DEBUG_LOG
104 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
106 DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
110 uint16_t reverseBytes16(uint16_t num) {
111 return (num >> 8) | (num << 8);
114 uint32_t reverseBytes32(uint32_t num) {
115 return ((num >> 24) & 0x000000FF) |
116 ((num >> 8) & 0x0000FF00) |
117 ((num << 8) & 0x00FF0000) |
118 ((num << 24) & 0xFF000000);
121 /*******************************************************************
123 * @brief Fills FAPI message header
127 * Function : fillMsgHeader
130 * -Fills FAPI message header
132 * @params[in] Pointer to header
138 * ****************************************************************/
139 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen)
141 memset(hdr, 0, sizeof(fapi_msg_t));
143 hdr->msg_id = reverseBytes16(msgType);
144 hdr->length = reverseBytes32(msgLen);
146 hdr->msg_id = (msgType);
147 hdr->length = (msgLen);
151 /*******************************************************************
153 * @brief Fills FAPI Config Request message header
157 * Function : fillTlvs
160 * -Fills FAPI Config Request message header
162 * @params[in] Pointer to TLV
169 * ****************************************************************/
170 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
171 uint32_t value, uint32_t *msgLen)
174 tlv->tl.tag = reverseBytes16(tag);
175 tlv->tl.length = reverseBytes16(length);
176 tlv->value = reverseBytes32(value);
179 tlv->tl.length = (length);
180 tlv->value = (value);
182 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
185 /*******************************************************************
187 * @brief fills the cyclic prefix by comparing the bitmask
191 * Function : fillCyclicPrefix
194 * -checks the value with the bitmask and
195 * fills the cellPtr's cyclic prefix.
197 * @params[in] Pointer to ClCellParam
198 * Value to be compared
201 ********************************************************************/
202 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
204 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
206 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
208 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
210 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
214 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
218 /*******************************************************************
220 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
224 * Function : fillSubcarrierSpaceDl
227 * -checks the value with the bitmask and
228 * fills the cellPtr's subcarrier spacing in DL
230 * @params[in] Pointer to ClCellParam
231 * Value to be compared
234 * ****************************************************************/
236 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
238 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
240 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
242 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
244 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
246 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
248 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
250 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
252 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
256 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
260 /*******************************************************************
262 * @brief fills the downlink bandwidth by comparing the bitmask
266 * Function : fillBandwidthDl
269 * -checks the value with the bitmask and
270 * -fills the cellPtr's DL Bandwidth
272 * @params[in] Pointer to ClCellParam
273 * Value to be compared
276 * ****************************************************************/
278 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
280 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
282 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
284 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
286 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
288 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
290 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
292 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
294 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
296 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
298 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
300 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
302 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
304 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
306 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
308 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
310 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
312 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
314 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
316 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
318 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
320 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
322 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
324 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
326 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
328 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
330 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
334 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
338 /*******************************************************************
340 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
344 * Function : fillSubcarrierSpaceUl
347 * -checks the value with the bitmask and
348 * -fills cellPtr's subcarrier spacing in UL
350 * @params[in] Pointer to ClCellParam
351 * Value to be compared
354 * ****************************************************************/
356 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
358 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
360 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
362 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
364 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
366 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
368 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
370 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
372 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
376 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
380 /*******************************************************************
382 * @brief fills the uplink bandwidth by comparing the bitmask
386 * Function : fillBandwidthUl
389 * -checks the value with the bitmask and
390 * fills the cellPtr's UL Bandwidth
394 * @params[in] Pointer to ClCellParam
395 * Value to be compared
399 * ****************************************************************/
401 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
403 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
405 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
407 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
409 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
411 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
413 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
415 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
417 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
419 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
421 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
423 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
425 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
427 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
429 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
431 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
433 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
435 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
437 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
439 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
441 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
443 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
445 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
447 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
449 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
451 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
453 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
457 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
460 /*******************************************************************
462 * @brief fills the CCE maping by comparing the bitmask
466 * Function : fillCCEmaping
469 * -checks the value with the bitmask and
470 * fills the cellPtr's CCE Mapping Type
473 * @params[in] Pointer to ClCellParam
474 * Value to be compared
477 * ****************************************************************/
479 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
481 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
483 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
485 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
487 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
491 (*cellPtr)->cceMappingType = INVALID_VALUE;
495 /*******************************************************************
497 * @brief fills the PUCCH format by comparing the bitmask
501 * Function : fillPucchFormat
504 * -checks the value with the bitmask and
505 * fills the cellPtr's pucch format
508 * @params[in] Pointer to ClCellParam
509 * Value to be compared
512 * ****************************************************************/
514 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
516 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
518 (*cellPtr)->pucchFormats = FORMAT_0;
520 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
522 (*cellPtr)->pucchFormats = FORMAT_1;
524 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
526 (*cellPtr)->pucchFormats = FORMAT_2;
528 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
530 (*cellPtr)->pucchFormats = FORMAT_3;
532 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
534 (*cellPtr)->pucchFormats = FORMAT_4;
538 (*cellPtr)->pucchFormats = INVALID_VALUE;
542 /*******************************************************************
544 * @brief fills the PDSCH Mapping Type by comparing the bitmask
548 * Function : fillPdschMappingType
551 * -checks the value with the bitmask and
552 * fills the cellPtr's PDSCH MappingType
554 * @params[in] Pointer to ClCellParam
555 * Value to be compared
558 * ****************************************************************/
560 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
562 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
564 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
566 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
568 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
572 (*cellPtr)->pdschMappingType = INVALID_VALUE;
576 /*******************************************************************
578 * @brief fills the PDSCH Allocation Type by comparing the bitmask
582 * Function : fillPdschAllocationType
585 * -checks the value with the bitmask and
586 * fills the cellPtr's PDSCH AllocationType
588 * @params[in] Pointer to ClCellParam
589 * Value to be compared
592 * ****************************************************************/
594 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
596 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
598 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
600 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
602 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
606 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
610 /*******************************************************************
612 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
616 * Function : fillPrbMappingType
619 * -checks the value with the bitmask and
620 * fills the cellPtr's PRB Mapping Type
622 * @params[in] Pointer to ClCellParam
623 * Value to be compared
626 ******************************************************************/
627 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
629 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
631 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
633 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
635 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
639 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
643 /*******************************************************************
645 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
649 * Function : fillPdschDmrsConfigType
652 * -checks the value with the bitmask and
653 * fills the cellPtr's DmrsConfig Type
655 * @params[in] Pointer to ClCellParam
656 * Value to be compared
659 ******************************************************************/
661 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
663 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
665 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
667 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
669 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
673 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
677 /*******************************************************************
679 * @brief fills the PDSCH DmrsLength by comparing the bitmask
683 * Function : fillPdschDmrsLength
686 * -checks the value with the bitmask and
687 * fills the cellPtr's PdschDmrsLength
689 * @params[in] Pointer to ClCellParam
690 * Value to be compared
693 ******************************************************************/
694 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
696 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
698 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
700 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
702 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
706 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
710 /*******************************************************************
712 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
716 * Function : fillPdschDmrsAddPos
719 * -checks the value with the bitmask and
720 * fills the cellPtr's Pdsch DmrsAddPos
722 * @params[in] Pointer to ClCellParam
723 * Value to be compared
726 ******************************************************************/
728 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
730 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
732 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
734 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
736 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
738 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
740 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
742 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
744 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
748 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
752 /*******************************************************************
754 * @brief fills the Modulation Order in DL by comparing the bitmask
758 * Function : fillModulationOrderDl
761 * -checks the value with the bitmask and
762 * fills the cellPtr's ModulationOrder in DL.
764 * @params[in] Pointer to ClCellParam
765 * Value to be compared
768 ******************************************************************/
769 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
773 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
777 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
781 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
785 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
789 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
793 /*******************************************************************
795 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
799 * Function : fillPuschDmrsConfigType
802 * -checks the value with the bitmask and
803 * fills the cellPtr's PUSCH DmrsConfigType
805 * @params[in] Pointer to ClCellParam
806 * Value to be compared
809 ******************************************************************/
811 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
813 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
815 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
817 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
819 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
823 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
827 /*******************************************************************
829 * @brief fills the PUSCH DmrsLength by comparing the bitmask
833 * Function : fillPuschDmrsLength
836 * -checks the value with the bitmask and
837 * fills the cellPtr's PUSCH DmrsLength
839 * @params[in] Pointer to ClCellParam
840 * Value to be compared
843 ******************************************************************/
845 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
847 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
849 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
851 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
853 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
857 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
861 /*******************************************************************
863 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
867 * Function : fillPuschDmrsAddPos
870 * -checks the value with the bitmask and
871 * fills the cellPtr's PUSCH DmrsAddPos
873 * @params[in] Pointer to ClCellParam
874 * Value to be compared
877 ******************************************************************/
879 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
881 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
883 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
885 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
887 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
889 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
891 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
893 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
895 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
899 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
903 /*******************************************************************
905 * @brief fills the PUSCH Mapping Type by comparing the bitmask
909 * Function : fillPuschMappingType
912 * -checks the value with the bitmask and
913 * fills the cellPtr's PUSCH MappingType
915 * @params[in] Pointer to ClCellParam
916 * Value to be compared
919 ******************************************************************/
921 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
923 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
925 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
927 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
929 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
933 (*cellPtr)->puschMappingType = INVALID_VALUE;
937 /*******************************************************************
939 * @brief fills the PUSCH Allocation Type by comparing the bitmask
943 * Function : fillPuschAllocationType
946 * -checks the value with the bitmask and
947 * fills the cellPtr's PUSCH AllocationType
949 * @params[in] Pointer to ClCellParam
950 * Value to be compared
953 ******************************************************************/
955 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
957 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
959 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
961 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
963 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
967 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
971 /*******************************************************************
973 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
977 * Function : fillPuschPrbMappingType
980 * -checks the value with the bitmask and
981 * fills the cellPtr's PUSCH PRB MApping Type
983 * @params[in] Pointer to ClCellParam
984 * Value to be compared
987 ******************************************************************/
989 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
991 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
993 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
995 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
997 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
1001 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
1005 /*******************************************************************
1007 * @brief fills the Modulation Order in Ul by comparing the bitmask
1011 * Function : fillModulationOrderUl
1014 * -checks the value with the bitmask and
1015 * fills the cellPtr's Modualtsion Order in UL.
1017 * @params[in] Pointer to ClCellParam
1018 * Value to be compared
1021 ******************************************************************/
1023 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1027 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1031 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1035 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1039 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1043 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1047 /*******************************************************************
1049 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1053 * Function : fillPuschAggregationFactor
1056 * -checks the value with the bitmask and
1057 * fills the cellPtr's PUSCH Aggregation Factor
1059 * @params[in] Pointer to ClCellParam
1060 * Value to be compared
1063 ******************************************************************/
1065 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1067 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1069 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1071 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1073 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1075 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1077 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1079 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1081 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1085 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1089 /*******************************************************************
1091 * @brief fills the PRACH Long Format by comparing the bitmask
1095 * Function : fillPrachLongFormat
1098 * -checks the value with the bitmask and
1099 * fills the cellPtr's PRACH Long Format
1101 * @params[in] Pointer to ClCellParam
1102 * Value to be compared
1105 ******************************************************************/
1107 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1109 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1111 (*cellPtr)->prachLongFormats = FORMAT_0;
1113 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1115 (*cellPtr)->prachLongFormats = FORMAT_1;
1117 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1119 (*cellPtr)->prachLongFormats = FORMAT_2;
1121 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1123 (*cellPtr)->prachLongFormats = FORMAT_3;
1127 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1131 /*******************************************************************
1133 * @brief fills the PRACH Short Format by comparing the bitmask
1137 * Function : fillPrachShortFormat
1140 * -checks the value with the bitmask and
1141 * fills the cellPtr's PRACH ShortFormat
1143 * @params[in] Pointer to ClCellParam
1144 * Value to be compared
1147 ******************************************************************/
1149 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1151 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1153 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1155 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1157 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1159 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1161 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1163 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1165 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1167 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1169 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1171 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1173 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1175 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1177 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1179 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1181 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1183 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1185 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1189 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1193 /*******************************************************************
1195 * @brief fills the Fd Occasions Type by comparing the bitmask
1199 * Function : fillFdOccasions
1202 * -checks the value with the bitmask and
1203 * fills the cellPtr's Fd Occasions
1205 * @params[in] Pointer to ClCellParam
1206 * Value to be compared
1209 ******************************************************************/
1211 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1215 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1219 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1223 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1227 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1231 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1235 /*******************************************************************
1237 * @brief fills the RSSI Measurement by comparing the bitmask
1241 * Function : fillRssiMeas
1244 * -checks the value with the bitmask and
1245 * fills the cellPtr's RSSI Measurement report
1247 * @params[in] Pointer to ClCellParam
1248 * Value to be compared
1251 ******************************************************************/
1253 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1255 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1257 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1259 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1261 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1265 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1269 /*******************************************************************
1271 * @brief Returns the TLVs value
1275 * Function : getParamValue
1278 * -return TLVs value
1281 * @return ROK - temp
1284 * ****************************************************************/
1286 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1289 posPtr = &tlv->tl.tag;
1290 posPtr += sizeof(tlv->tl.tag);
1291 posPtr += sizeof(tlv->tl.length);
1292 /*TO DO: malloc to SSI memory */
1293 if(type == FAPI_UINT_8)
1295 return(*(uint8_t *)posPtr);
1297 else if(type == FAPI_UINT_16)
1299 return(*(uint16_t *)posPtr);
1301 else if(type == FAPI_UINT_32)
1303 return(*(uint32_t *)posPtr);
1307 DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
1313 /*******************************************************************
1315 * @brief Modifes the received mibPdu to uint32 bit
1316 * and stores it in MacCellCfg
1320 * Function : setMibPdu
1325 * @params[in] Pointer to mibPdu
1326 * pointer to modified value
1327 ******************************************************************/
1328 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1330 *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1331 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1332 DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
1335 /*******************************************************************
1337 * @brief Sends FAPI Param req to PHY
1341 * Function : lwr_mac_procParamReqEvt
1344 * -Sends FAPI Param req to PHY
1347 * @return ROK - success
1350 * ****************************************************************/
1352 uint8_t lwr_mac_procParamReqEvt(void *msg)
1355 #ifdef CALL_FLOW_DEBUG_LOG
1356 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1359 /* startGuardTimer(); */
1360 fapi_param_req_t *paramReq = NULL;
1361 fapi_msg_header_t *msgHeader;
1362 p_fapi_api_queue_elem_t paramReqElem;
1363 p_fapi_api_queue_elem_t headerElem;
1365 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1366 if(paramReq != NULL)
1368 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1369 sizeof(fapi_tx_data_req_t));
1370 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1371 memset(paramReq, 0, sizeof(fapi_param_req_t));
1372 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1374 /* Fill message header */
1375 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1378 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
1379 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1382 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1383 sizeof(fapi_msg_header_t));
1384 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1385 msgHeader->num_msg = 1;
1386 msgHeader->handle = 0;
1388 DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
1389 LwrMacSendToL1(headerElem);
1393 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
1400 /*******************************************************************
1402 * @brief Sends FAPI Param Response to MAC via PHY
1406 * Function : lwr_mac_procParamRspEvt
1409 * -Sends FAPI Param rsp to MAC via PHY
1412 * @return ROK - success
1415 * ****************************************************************/
1417 uint8_t lwr_mac_procParamRspEvt(void *msg)
1420 /* stopGuardTimer(); */
1422 uint32_t encodedVal;
1423 fapi_param_resp_t *paramRsp;
1424 ClCellParam *cellParam = NULLP;
1426 paramRsp = (fapi_param_resp_t *)msg;
1427 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1429 if(paramRsp != NULLP)
1431 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1432 if(cellParam != NULLP)
1434 DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
1435 if(paramRsp->error_code == MSG_OK)
1437 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1439 switch(paramRsp->tlvs[index].tl.tag)
1441 case FAPI_RELEASE_CAPABILITY_TAG:
1442 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1443 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1445 cellParam->releaseCapability = RELEASE_15;
1449 case FAPI_PHY_STATE_TAG:
1450 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1451 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1453 DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1458 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1459 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1460 if(encodedVal != RFAILED && encodedVal != 0)
1462 cellParam->skipBlankDlConfig = SUPPORTED;
1466 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1470 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1471 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1472 if(encodedVal != RFAILED && encodedVal != 0)
1474 cellParam->skipBlankUlConfig = SUPPORTED;
1478 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1482 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1483 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1486 case FAPI_CYCLIC_PREFIX_TAG:
1487 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1488 if(encodedVal != RFAILED)
1490 fillCyclicPrefix(encodedVal, &cellParam);
1494 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1495 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1496 if(encodedVal != RFAILED)
1498 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1502 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1503 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1504 if(encodedVal != RFAILED)
1506 fillBandwidthDl(encodedVal, &cellParam);
1510 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1511 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1512 if(encodedVal != RFAILED)
1514 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1518 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1519 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1520 if(encodedVal != RFAILED)
1522 fillBandwidthUl(encodedVal, &cellParam);
1526 case FAPI_CCE_MAPPING_TYPE_TAG:
1527 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1528 if(encodedVal != RFAILED)
1530 fillCCEmaping(encodedVal, &cellParam);
1534 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1535 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1536 if(encodedVal != RFAILED && encodedVal != 0)
1538 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1542 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1546 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1547 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1548 if(encodedVal != RFAILED && encodedVal != 0)
1550 cellParam->precoderGranularityCoreset = SUPPORTED;
1554 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1558 case FAPI_PDCCH_MU_MIMO_TAG:
1559 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1560 if(encodedVal != RFAILED && encodedVal != 0)
1562 cellParam->pdcchMuMimo = SUPPORTED;
1566 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1570 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1571 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1572 if(encodedVal != RFAILED && encodedVal != 0)
1574 cellParam->pdcchPrecoderCycling = SUPPORTED;
1578 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1582 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1583 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1586 case FAPI_PUCCH_FORMATS_TAG:
1587 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1588 if(encodedVal != RFAILED)
1590 fillPucchFormat(encodedVal, &cellParam);
1594 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1595 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1598 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1599 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1600 if(encodedVal != RFAILED)
1602 fillPdschMappingType(encodedVal, &cellParam);
1606 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1607 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1608 if(encodedVal != RFAILED)
1610 fillPdschAllocationType(encodedVal, &cellParam);
1614 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1615 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1616 if(encodedVal != RFAILED)
1618 fillPrbMappingType(encodedVal, &cellParam);
1622 case FAPI_PDSCH_CBG_TAG:
1623 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1624 if(encodedVal != RFAILED && encodedVal != 0)
1626 cellParam->pdschCbg = SUPPORTED;
1630 cellParam->pdschCbg = NOT_SUPPORTED;
1634 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1635 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1636 if(encodedVal != RFAILED)
1638 fillPdschDmrsConfigType(encodedVal, &cellParam);
1642 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1643 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1644 if(encodedVal != RFAILED)
1646 fillPdschDmrsLength(encodedVal, &cellParam);
1650 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1651 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1652 if(encodedVal != RFAILED)
1654 fillPdschDmrsAddPos(encodedVal, &cellParam);
1658 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1659 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1662 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1663 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1664 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1666 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1670 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1671 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1672 if(encodedVal != RFAILED)
1674 fillModulationOrderDl(encodedVal, &cellParam);
1678 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1679 cellParam->maxMuMimoUsersDl = \
1680 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1683 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1684 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1685 if(encodedVal != RFAILED && encodedVal != 0)
1687 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1691 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1695 case FAPI_PREMPTIONSUPPORT_TAG:
1696 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1697 if(encodedVal != RFAILED && encodedVal != 0)
1699 cellParam->premptionSupport = SUPPORTED;
1703 cellParam->premptionSupport = NOT_SUPPORTED;
1707 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1708 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1709 if(encodedVal != RFAILED && encodedVal != 0)
1711 cellParam->pdschNonSlotSupport = SUPPORTED;
1715 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1719 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1720 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1721 if(encodedVal != RFAILED && encodedVal != 0)
1723 cellParam->uciMuxUlschInPusch = SUPPORTED;
1727 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1731 case FAPI_UCI_ONLY_PUSCH_TAG:
1732 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1733 if(encodedVal != RFAILED && encodedVal != 0)
1735 cellParam->uciOnlyPusch = SUPPORTED;
1739 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1743 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1744 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1745 if(encodedVal != RFAILED && encodedVal != 0)
1747 cellParam->puschFrequencyHopping = SUPPORTED;
1751 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1755 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1756 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1757 if(encodedVal != RFAILED)
1759 fillPuschDmrsConfig(encodedVal, &cellParam);
1763 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1764 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1765 if(encodedVal != RFAILED)
1767 fillPuschDmrsLength(encodedVal, &cellParam);
1771 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1772 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1773 if(encodedVal != RFAILED)
1775 fillPuschDmrsAddPos(encodedVal, &cellParam);
1779 case FAPI_PUSCH_CBG_TAG:
1780 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1781 if(encodedVal != RFAILED && encodedVal != 0)
1783 cellParam->puschCbg = SUPPORTED;
1787 cellParam->puschCbg = NOT_SUPPORTED;
1791 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1792 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1793 if(encodedVal != RFAILED)
1795 fillPuschMappingType(encodedVal, &cellParam);
1799 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1800 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1801 if(encodedVal != RFAILED)
1803 fillPuschAllocationType(encodedVal, &cellParam);
1807 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1808 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1809 if(encodedVal != RFAILED)
1811 fillPuschPrbMappingType(encodedVal, &cellParam);
1815 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1816 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1817 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1819 cellParam->puschMaxPtrsPorts = encodedVal;
1823 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1824 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1827 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1828 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1831 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1832 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1833 if(encodedVal != RFAILED)
1835 fillModulationOrderUl(encodedVal, &cellParam);
1839 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1840 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1843 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1844 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1845 if(encodedVal != RFAILED && encodedVal != 0)
1847 cellParam->dftsOfdmSupport = SUPPORTED;
1851 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1855 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1856 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1857 if(encodedVal != RFAILED)
1859 fillPuschAggregationFactor(encodedVal, &cellParam);
1863 case FAPI_PRACH_LONG_FORMATS_TAG:
1864 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1865 if(encodedVal != RFAILED)
1867 fillPrachLongFormat(encodedVal, &cellParam);
1871 case FAPI_PRACH_SHORT_FORMATS_TAG:
1872 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1873 if(encodedVal != RFAILED)
1875 fillPrachShortFormat(encodedVal, &cellParam);
1879 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1880 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1881 if(encodedVal != RFAILED && encodedVal != 0)
1883 cellParam->prachRestrictedSets = SUPPORTED;
1887 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1891 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1892 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1893 if(encodedVal != RFAILED)
1895 fillFdOccasions(encodedVal, &cellParam);
1899 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1900 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1901 if(encodedVal != RFAILED)
1903 fillRssiMeas(encodedVal, &cellParam);
1907 //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1911 MAC_FREE(cellParam, sizeof(ClCellParam));
1912 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1917 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
1923 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
1929 DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
1937 #ifdef INTEL_TIMER_MODE
1938 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1940 void * wlsHdlr = NULLP;
1941 fapi_msg_header_t *msgHeader;
1942 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1943 p_fapi_api_queue_elem_t headerElem;
1944 p_fapi_api_queue_elem_t iqSampleElem;
1945 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1947 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1949 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1951 /* Fill IQ sample req */
1952 mtGetWlsHdl(&wlsHdlr);
1953 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1954 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1955 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1958 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
1961 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1962 sizeof(fapi_vendor_ext_iq_samples_req_t));
1964 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1965 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1966 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1967 sizeof(fapi_vendor_ext_iq_samples_req_t));
1969 iqSampleReq->iq_samples_info.carrNum = 0;
1970 iqSampleReq->iq_samples_info.numSubframes = 40;
1971 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1972 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1973 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1974 iqSampleReq->iq_samples_info.startFrameNum = 0;
1975 iqSampleReq->iq_samples_info.startSlotNum = 0;
1976 iqSampleReq->iq_samples_info.startSymNum = 0;
1977 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1978 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1980 /* TODO : Fill remaining parameters */
1982 /* Fill message header */
1983 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1986 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1989 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1990 sizeof(fapi_msg_header_t));
1991 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1992 msgHeader->num_msg = 1;
1993 msgHeader->handle = 0;
1995 DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
1996 LwrMacSendToL1(headerElem);
2002 /*******************************************************************
2004 * @brief Build FAPI Config Req as per OAI code and send to PHY
2008 * Function : buildAndSendOAIConfigReqToL1
2011 * -Build FAPI Config Req as per OAI code and send to PHY
2013 * @params[in] void *msg
2014 * @return ROK - success
2017 * ****************************************************************/
2018 uint8_t buildAndSendOAIConfigReqToL1(void *msg)
2021 #ifdef CALL_FLOW_DEBUG_LOG
2022 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
2025 uint8_t slotIdx = 0;
2026 uint8_t symbolIdx =0;
2030 uint16_t *cellId =NULLP;
2031 uint16_t cellIdx =0;
2032 uint32_t msgLen = 0;
2033 uint32_t totalCfgReqMsgLen=0;
2035 uint32_t dlFreq = 0, ulFreq = 0;
2036 MacCellCfg macCfgParams;
2037 fapi_config_req_t *configReq;
2038 fapi_msg_header_t *msgHeader;
2039 p_fapi_api_queue_elem_t headerElem;
2040 p_fapi_api_queue_elem_t cfgReqQElem;
2042 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2045 cellId = (uint16_t *)msg;
2046 GET_CELL_IDX(*cellId, cellIdx);
2047 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2049 /* Fill Cell Configuration in lwrMacCb */
2050 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2051 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2052 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2054 uint16_t psize=sizeof(fapi_api_queue_elem_t)+(sizeof(fapi_config_req_t));
2059 //configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2060 totalTlv = 24 + 1+ MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2062 /* totalCfgReqMsgLen = size of config req's msg header + size of tlv supporting + size of tlv supporting *sizeof(fapi_uint32_tlv_t) */
2063 totalCfgReqMsgLen += sizeof(configReq->header) + sizeof( configReq->number_of_tlvs) + totalTlv*sizeof(fapi_uint32_tlv_t);
2065 /* Fill FAPI config req */
2066 LWR_MAC_ALLOC(cfgReqQElem,(sizeof(fapi_api_queue_elem_t)+totalCfgReqMsgLen));
2070 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2073 FILL_FAPI_LIST_ELEM(cfgReqQElem, NULLP, FAPI_CONFIG_REQUEST, 1, totalCfgReqMsgLen);
2074 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2075 memset(configReq, 0, sizeof(fapi_config_req_t));
2076 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, totalCfgReqMsgLen);
2077 configReq->number_of_tlvs = totalTlv;
2078 msgLen = sizeof(configReq->number_of_tlvs);
2080 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2081 sizeof(uint16_t), macCfgParams.carrCfg.dlBw, &msgLen);
2082 dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
2083 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2084 sizeof(uint32_t), dlFreq, &msgLen);
2085 /* Due to bug in Intel FT code, commenting TLVs that are are not
2086 * needed to avoid error. Must be uncommented when FT bug is fixed */
2087 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2088 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2089 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2090 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2091 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2092 sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2093 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2094 sizeof(uint16_t), macCfgParams.carrCfg.ulBw, &msgLen);
2095 ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
2096 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2097 sizeof(uint32_t), ulFreq, &msgLen);
2098 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2099 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2100 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2101 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2102 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2103 sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2104 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2105 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2107 /* fill cell config */
2108 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2109 sizeof(uint16_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2110 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2111 sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2113 /* fill SSB configuration */
2114 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2115 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2116 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2117 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2118 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2119 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2121 /* fill PRACH configuration */
2122 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2123 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2124 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2125 sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2126 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2127 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2128 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2129 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2130 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2131 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2132 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2133 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2134 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2135 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2136 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2137 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2138 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2139 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2140 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2141 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2142 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2144 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2145 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2146 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2151 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2154 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2155 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2156 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2157 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2159 /* fill SSB table */
2160 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2161 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2162 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2163 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2164 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2165 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2166 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2167 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2169 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2170 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2171 sizeof(uint32_t), mib, &msgLen);
2173 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2174 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2175 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2176 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2177 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2178 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2179 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2180 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2183 /* fill TDD table */
2184 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2185 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2186 for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2188 for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2190 /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2191 if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2192 (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2194 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2195 sizeof(uint8_t), DL_SYMBOL, &msgLen);
2198 /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2199 else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) || \
2200 (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2201 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2203 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2204 sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2206 /*Fill Partial UL symbols and Full-UL slot*/
2209 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2210 sizeof(uint8_t), UL_SYMBOL, &msgLen);
2216 /* fill measurement config */
2217 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2218 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2220 /* fill DMRS Type A Pos */
2221 // fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2222 sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2224 /* Fill message header */
2225 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2228 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2229 LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2232 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2233 sizeof(fapi_msg_header_t));
2234 msgHeader = (fapi_msg_header_t*)(headerElem+1);
2235 msgHeader->num_msg = 1; /* Config req msg */
2236 msgHeader->handle = 0;
2238 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2239 LwrMacSendToL1(headerElem);
2245 /*******************************************************************
2247 * @brief Sends FAPI Config req to PHY
2251 * Function : lwr_mac_procConfigReqEvt
2254 * -Sends FAPI Config Req to PHY
2257 * @return ROK - success
2260 * ****************************************************************/
2262 uint8_t lwr_mac_procConfigReqEvt(void *msg)
2266 #ifdef CALL_FLOW_DEBUG_LOG
2267 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
2270 uint8_t slotIdx = 0;
2271 uint8_t symbolIdx =0;
2274 uint16_t *cellId =NULLP;
2275 uint16_t cellIdx =0;
2276 uint32_t msgLen = 0;
2278 uint32_t dlFreq = 0, ulFreq = 0;
2279 MacCellCfg macCfgParams;
2280 fapi_vendor_msg_t *vendorMsg;
2281 fapi_config_req_t *configReq;
2282 fapi_msg_header_t *msgHeader;
2283 p_fapi_api_queue_elem_t headerElem;
2284 p_fapi_api_queue_elem_t vendorMsgQElem;
2285 p_fapi_api_queue_elem_t cfgReqQElem;
2287 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2290 cellId = (uint16_t *)msg;
2291 GET_CELL_IDX(*cellId, cellIdx);
2292 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2294 /* Fill Cell Configuration in lwrMacCb */
2295 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2296 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2297 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2300 /* Allocte And fill Vendor msg */
2301 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2304 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2307 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2308 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2309 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2310 vendorMsg->config_req_vendor.hopping_id = 0;
2311 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2312 vendorMsg->config_req_vendor.group_hop_flag = 0;
2313 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2314 vendorMsg->config_req_vendor.urllc_capable = 0;
2315 vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2316 vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2317 vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2318 vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2319 vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2320 vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2321 vendorMsg->start_req_vendor.sfn = 0;
2322 vendorMsg->start_req_vendor.slot = 0;
2323 vendorMsg->start_req_vendor.mode = 4;
2325 vendorMsg->start_req_vendor.count = 0;
2326 vendorMsg->start_req_vendor.period = 1;
2328 /* Fill FAPI config req */
2329 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2332 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2333 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2336 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2337 sizeof(fapi_config_req_t));
2339 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2340 memset(configReq, 0, sizeof(fapi_config_req_t));
2341 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2343 configReq->number_of_tlvs = 25;
2345 configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2348 msgLen = sizeof(configReq->number_of_tlvs);
2350 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2351 sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
2352 dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
2353 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2354 sizeof(uint32_t), dlFreq, &msgLen);
2355 /* Due to bug in Intel FT code, commenting TLVs that are are not
2356 * needed to avoid error. Must be uncommented when FT bug is fixed */
2357 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2358 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2359 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2360 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2361 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2362 sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2363 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2364 sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
2365 ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
2366 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2367 sizeof(uint32_t), ulFreq, &msgLen);
2368 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2369 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2370 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2371 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2372 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2373 sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2374 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2375 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2377 /* fill cell config */
2378 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2379 sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2380 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2381 sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2383 /* fill SSB configuration */
2384 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2385 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2386 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2387 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2388 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2389 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2391 /* fill PRACH configuration */
2392 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2393 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2394 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2395 sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2396 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2397 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2398 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2399 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2400 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2401 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2402 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2403 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2404 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2405 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2406 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2407 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2408 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2409 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2410 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2411 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2412 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2414 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2415 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2416 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2421 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2424 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2425 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2426 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2427 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2429 /* fill SSB table */
2430 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2431 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2432 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2433 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2434 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2435 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2436 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2437 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2439 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2440 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2441 sizeof(uint32_t), mib, &msgLen);
2443 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2444 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2445 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2446 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2447 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2448 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2449 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2450 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2453 /* fill TDD table */
2454 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2455 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2457 for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2459 for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2461 /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2462 if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2463 (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2465 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2466 sizeof(uint8_t), DL_SYMBOL, &msgLen);
2469 /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2470 else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) || \
2471 (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2472 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2474 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2475 sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2477 /*Fill Partial UL symbols and Full-UL slot*/
2480 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2481 sizeof(uint8_t), UL_SYMBOL, &msgLen);
2487 /* fill measurement config */
2488 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2489 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2491 /* fill DMRS Type A Pos */
2492 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2493 sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2495 /* Fill message header */
2496 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2499 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2500 LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2501 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2504 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2505 sizeof(fapi_msg_header_t));
2506 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2507 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2508 msgHeader->handle = 0;
2510 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2511 LwrMacSendToL1(headerElem);
2514 buildAndSendOAIConfigReqToL1(msg);
2517 } /* lwr_mac_handleConfigReqEvt */
2519 /*******************************************************************
2521 * @brief Processes config response from phy
2525 * Function : lwr_mac_procConfigRspEvt
2528 * Processes config response from phy
2530 * @params[in] FAPI message pointer
2531 * @return ROK - success
2534 * ****************************************************************/
2536 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2539 fapi_config_resp_t *configRsp;
2540 configRsp = (fapi_config_resp_t *)msg;
2542 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2545 if(configRsp != NULL)
2547 if(configRsp->error_code == MSG_OK)
2549 DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
2550 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2551 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2553 * Store config response into an intermediate struture and send to MAC
2554 * Support LC and LWLC for sending config rsp to MAC
2556 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2560 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
2566 DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
2572 } /* lwr_mac_procConfigRspEvt */
2574 /*******************************************************************
2576 * @brief Build and send start request to phy
2580 * Function : lwr_mac_procStartReqEvt
2583 * Build and send start request to phy
2585 * @params[in] FAPI message pointer
2586 * @return ROK - success
2589 * ****************************************************************/
2590 uint8_t lwr_mac_procStartReqEvt(void *msg)
2593 #ifdef CALL_FLOW_DEBUG_LOG
2594 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2596 fapi_msg_header_t *msgHeader;
2597 fapi_start_req_t *startReq;
2598 fapi_vendor_msg_t *vendorMsg;
2599 p_fapi_api_queue_elem_t headerElem;
2600 p_fapi_api_queue_elem_t startReqElem;
2601 p_fapi_api_queue_elem_t vendorMsgElem;
2603 /* Allocte And fill Vendor msg */
2604 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2607 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
2610 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2611 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2612 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2613 vendorMsg->start_req_vendor.sfn = 0;
2614 vendorMsg->start_req_vendor.slot = 0;
2615 vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2617 vendorMsg->start_req_vendor.count = 0;
2618 vendorMsg->start_req_vendor.period = 1;
2621 /* Fill FAPI config req */
2622 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2625 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
2626 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2629 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2630 sizeof(fapi_start_req_t));
2632 startReq = (fapi_start_req_t *)(startReqElem + 1);
2633 memset(startReq, 0, sizeof(fapi_start_req_t));
2634 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2636 /* Fill message header */
2637 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2640 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2641 LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2642 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2645 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2646 sizeof(fapi_msg_header_t));
2647 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2648 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2649 msgHeader->handle = 0;
2652 DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
2653 LwrMacSendToL1(headerElem);
2656 } /* lwr_mac_procStartReqEvt */
2658 /*******************************************************************
2660 * @brief Sends FAPI Stop Req to PHY
2664 * Function : lwr_mac_procStopReqEvt
2667 * -Sends FAPI Stop Req to PHY
2670 * @return ROK - success
2673 ********************************************************************/
2675 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2678 #ifdef CALL_FLOW_DEBUG_LOG
2679 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2682 fapi_stop_req_t *stopReq;
2683 p_fapi_api_queue_elem_t stopReqElem;
2685 vendorMsg->sfn = slotInfo.sfn;
2686 vendorMsg->slot = slotInfo.slot;
2688 /* Fill FAPI stop req */
2689 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2692 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
2695 FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2696 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2697 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2698 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2701 DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
2702 prevElem->p_next = stopReqElem;
2709 /*******************************************************************
2711 * @brief fills SSB PDU required for DL TTI info in MAC
2715 * Function : fillSsbPdu
2718 * -Fills the SSB PDU info
2721 * @params[in] Pointer to FAPI DL TTI Req
2722 * Pointer to RgCellCb
2723 * Pointer to msgLen of DL TTI Info
2726 ******************************************************************/
2728 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2729 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2731 uint32_t mibPayload = 0;
2732 if(dlTtiReqPdu != NULL)
2734 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2735 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
2736 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2737 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2738 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
2739 /* ssbOfPdufstA to be filled in ssbCfg */
2740 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
2741 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2742 /* Bit manipulation for SFN */
2743 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2744 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2745 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2746 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2747 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2748 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2749 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2750 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2751 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2757 /*******************************************************************
2759 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2763 * Function : fillSib1DlDciPdu
2766 * -Fills the Dl DCI PDU
2768 * @params[in] Pointer to fapi_dl_dci_t
2769 * Pointer to PdcchCfg
2772 ******************************************************************/
2774 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2776 if(dlDciPtr != NULLP)
2782 uint16_t coreset0Size=0;
2785 uint32_t freqDomResAssign=0;
2786 uint32_t timeDomResAssign=0;
2787 uint8_t VRB2PRBMap=0;
2788 uint32_t modNCodScheme=0;
2789 uint8_t redundancyVer=0;
2790 uint32_t sysInfoInd=0;
2791 uint32_t reserved=0;
2793 /* Size(in bits) of each field in DCI format 0_1
2794 * as mentioned in spec 38.214 */
2795 uint8_t freqDomResAssignSize = 0;
2796 uint8_t timeDomResAssignSize = 4;
2797 uint8_t VRB2PRBMapSize = 1;
2798 uint8_t modNCodSchemeSize = 5;
2799 uint8_t redundancyVerSize = 2;
2800 uint8_t sysInfoIndSize = 1;
2801 uint8_t reservedSize = 15;
2803 dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti;
2804 dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId;
2805 dlDciPtr[0].scramblingRnti = sib1PdcchInfo->dci[0].scramblingRnti;
2806 dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex;
2807 dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel;
2808 dlDciPtr[0].pc_and_bform.numPrgs = sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs;
2809 dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize;
2810 dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
2811 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
2812 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
2813 dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
2814 dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
2816 /* Calculating freq domain resource allocation field value and size
2817 * coreset0Size = Size of coreset 0
2818 * RBStart = Starting Virtual Rsource block
2819 * RBLen = length of contiguously allocted RBs
2820 * Spec 38.214 Sec 5.1.2.2.2
2822 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2823 rbStart = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
2824 rbLen = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
2826 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2828 if((rbLen - 1) <= floor(coreset0Size / 2))
2829 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2831 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2832 + (coreset0Size - 1 - rbStart);
2834 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2837 /* Fetching DCI field values */
2838 timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1;
2839 VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2840 modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
2841 redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex;
2842 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2845 /* Reversing bits in each DCI field */
2846 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2847 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2848 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2849 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2850 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2851 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2853 /* Calulating total number of bytes in buffer */
2854 dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2855 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2856 + sysInfoIndSize + reservedSize;
2858 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2859 if(dlDciPtr[0].payloadSizeBits % 8)
2862 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2864 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2868 /* Initialize buffer */
2869 for(bytePos = 0; bytePos < numBytes; bytePos++)
2870 dlDciPtr[0].payload[bytePos] = 0;
2872 bytePos = numBytes - 1;
2875 /* Packing DCI format fields */
2876 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2877 freqDomResAssign, freqDomResAssignSize);
2878 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2879 timeDomResAssign, timeDomResAssignSize);
2880 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2881 VRB2PRBMap, VRB2PRBMapSize);
2882 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2883 modNCodScheme, modNCodSchemeSize);
2884 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2885 redundancyVer, redundancyVerSize);
2886 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2887 sysInfoInd, sysInfoIndSize);
2888 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2889 reserved, reservedSize);
2892 } /* fillSib1DlDciPdu */
2895 /*******************************************************************
2897 * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2901 * Function : fillPageDlDciPdu
2904 * -Fills the Dl DCI PDU for Paging
2906 * @params[in] Pointer to fapi_dl_dci_t
2907 * Pointer to dlPageAlloc
2910 ******************************************************************/
2912 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCellCfg *macCellCfg)
2914 if(dlDciPtr != NULLP)
2920 uint16_t coreset0Size = 0;
2921 uint16_t rbStart = 0;
2923 uint8_t shortMsgInd = 0;
2924 uint8_t shortMsg = 0;
2925 uint32_t freqDomResAssign = 0;
2926 uint32_t timeDomResAssign = 0;
2927 uint8_t VRB2PRBMap = 0;
2928 uint32_t modNCodScheme = 0;
2929 uint8_t tbScaling = 0;
2930 uint32_t reserved = 0;
2932 /* Size(in bits) of each field in DCI format 1_0
2933 * as mentioned in spec 38.214 */
2934 uint8_t shortMsgIndSize = 2;
2935 uint8_t shortMsgSize = 8;
2936 uint8_t freqDomResAssignSize = 0;
2937 uint8_t timeDomResAssignSize = 4;
2938 uint8_t VRB2PRBMapSize = 1;
2939 uint8_t modNCodSchemeSize = 5;
2940 uint8_t tbScalingSize = 2;
2941 uint8_t reservedSize = 6;
2943 dlDciPtr[0].rnti = P_RNTI;
2944 dlDciPtr[0].scramblingId = macCellCfg->cellCfg.phyCellId;
2945 dlDciPtr[0].scramblingRnti = 0;
2946 dlDciPtr[0].cceIndex = dlPageAlloc->pageDlDci.cceIndex;
2947 dlDciPtr[0].aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
2948 dlDciPtr[0].pc_and_bform.numPrgs = 1;
2949 dlDciPtr[0].pc_and_bform.prgSize = 1;
2950 dlDciPtr[0].pc_and_bform.digBfInterfaces = 0;
2951 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = 0;
2952 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
2953 dlDciPtr[0].beta_pdcch_1_0 = 0;
2954 dlDciPtr[0].powerControlOffsetSS = 0;
2956 /* Calculating freq domain resource allocation field value and size
2957 * coreset0Size = Size of coreset 0
2958 * RBStart = Starting Virtual Rsource block
2959 * RBLen = length of contiguously allocted RBs
2960 * Spec 38.214 Sec 5.1.2.2.2
2962 coreset0Size = dlPageAlloc->pageDlDci.coreSetSize;
2963 rbStart = dlPageAlloc->pageDlSch.freqAlloc.startPrb;
2964 rbLen = dlPageAlloc->pageDlSch.freqAlloc.numPrb;
2966 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2968 if((rbLen - 1) <= floor(coreset0Size / 2))
2969 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2971 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2972 + (coreset0Size - 1 - rbStart);
2974 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2977 /*Fetching DCI field values */
2979 /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2980 if(dlPageAlloc->shortMsgInd != TRUE)
2982 /*When Short Msg is absent*/
2988 /*Short Msg is Present*/
2989 if(dlPageAlloc->pageDlSch.dlPagePduLen == 0 || dlPageAlloc->pageDlSch.dlPagePdu == NULLP)
2991 /*When Paging Msg is absent*/
2996 /*Both Short and Paging is present*/
2999 shortMsg = dlPageAlloc->shortMsg;
3002 timeDomResAssign = 0;
3003 VRB2PRBMap = dlPageAlloc->pageDlSch.vrbPrbMapping;
3004 modNCodScheme = dlPageAlloc->pageDlSch.tbInfo.mcs;
3008 /* Reversing bits in each DCI field */
3009 shortMsgInd = reverseBits(shortMsgInd, shortMsgIndSize);
3010 shortMsg = reverseBits(shortMsg, shortMsgSize);
3011 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3012 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3013 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3014 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3015 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3016 tbScaling = reverseBits(tbScaling, tbScalingSize);
3018 /* Calulating total number of bytes in buffer */
3019 dlDciPtr[0].payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
3020 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3021 + tbScaling + reservedSize;
3023 numBytes = dlDciPtr[0].payloadSizeBits / 8;
3024 if(dlDciPtr[0].payloadSizeBits % 8)
3029 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3031 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
3035 /* Initialize buffer */
3036 for(bytePos = 0; bytePos < numBytes; bytePos++)
3038 dlDciPtr[0].payload[bytePos] = 0;
3041 bytePos = numBytes - 1;
3044 /* Packing DCI format fields */
3045 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3046 shortMsgInd, shortMsgIndSize);
3047 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3048 shortMsg, shortMsgSize);
3049 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3050 freqDomResAssign, freqDomResAssignSize);
3051 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3052 timeDomResAssign, timeDomResAssignSize);
3053 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3054 VRB2PRBMap, VRB2PRBMapSize);
3055 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3056 modNCodScheme, modNCodSchemeSize);
3057 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3058 tbScaling, tbScalingSize);
3059 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3060 reserved, reservedSize);
3062 } /* fillPageDlDciPdu */
3064 /*******************************************************************
3066 * @brief fills Dl DCI PDU required for DL TTI info in MAC
3070 * Function : fillRarDlDciPdu
3073 * -Fills the Dl DCI PDU
3075 * @params[in] Pointer to fapi_dl_dci_t
3076 * Pointer to PdcchCfg
3079 ******************************************************************/
3081 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
3083 if(dlDciPtr != NULLP)
3085 uint8_t numBytes =0;
3089 uint16_t coreset0Size =0;
3090 uint16_t rbStart =0;
3092 uint32_t freqDomResAssign =0;
3093 uint8_t timeDomResAssign =0;
3094 uint8_t VRB2PRBMap =0;
3095 uint8_t modNCodScheme =0;
3096 uint8_t tbScaling =0;
3097 uint32_t reserved =0;
3099 /* Size(in bits) of each field in DCI format 1_0 */
3100 uint8_t freqDomResAssignSize = 0;
3101 uint8_t timeDomResAssignSize = 4;
3102 uint8_t VRB2PRBMapSize = 1;
3103 uint8_t modNCodSchemeSize = 5;
3104 uint8_t tbScalingSize = 2;
3105 uint8_t reservedSize = 16;
3107 dlDciPtr[0].rnti = rarPdcchInfo->dci[0].rnti;
3108 dlDciPtr[0].scramblingId = rarPdcchInfo->dci[0].scramblingId;
3109 dlDciPtr[0].scramblingRnti = rarPdcchInfo->dci[0].scramblingRnti;
3110 dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex;
3111 dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel;
3112 dlDciPtr[0].pc_and_bform.numPrgs = rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs;
3113 dlDciPtr[0].pc_and_bform.prgSize = rarPdcchInfo->dci[0].beamPdcchInfo.prgSize;
3114 dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
3115 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
3116 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
3117 dlDciPtr[0].beta_pdcch_1_0 = rarPdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
3118 dlDciPtr[0].powerControlOffsetSS = rarPdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
3120 /* Calculating freq domain resource allocation field value and size
3121 * coreset0Size = Size of coreset 0
3122 * RBStart = Starting Virtual Rsource block
3123 * RBLen = length of contiguously allocted RBs
3124 * Spec 38.214 Sec 5.1.2.2.2
3127 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
3128 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
3129 rbStart = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
3130 rbLen = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
3132 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
3134 if((rbLen - 1) <= floor(coreset0Size / 2))
3135 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
3137 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
3138 + (coreset0Size - 1 - rbStart);
3140 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
3143 /* Fetching DCI field values */
3144 timeDomResAssign = rarPdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex;
3145 VRB2PRBMap = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
3146 modNCodScheme = rarPdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
3147 tbScaling = 0; /* configured to 0 scaling */
3150 /* Reversing bits in each DCI field */
3151 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3152 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3153 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3154 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3155 tbScaling = reverseBits(tbScaling, tbScalingSize);
3157 /* Calulating total number of bytes in buffer */
3158 dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
3159 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
3161 numBytes = dlDciPtr[0].payloadSizeBits / 8;
3162 if(dlDciPtr[0].payloadSizeBits % 8)
3165 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3167 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
3171 /* Initialize buffer */
3172 for(bytePos = 0; bytePos < numBytes; bytePos++)
3173 dlDciPtr[0].payload[bytePos] = 0;
3175 bytePos = numBytes - 1;
3178 /* Packing DCI format fields */
3179 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3180 freqDomResAssign, freqDomResAssignSize);
3181 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3182 timeDomResAssign, timeDomResAssignSize);
3183 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3184 VRB2PRBMap, VRB2PRBMapSize);
3185 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3186 modNCodScheme, modNCodSchemeSize);
3187 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3188 tbScaling, tbScalingSize);
3189 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
3190 reserved, reservedSize);
3192 } /* fillRarDlDciPdu */
3194 /*******************************************************************
3196 * @brief fills DL DCI PDU required for DL TTI info in MAC
3200 * Function : fillDlMsgDlDciPdu
3203 * -Fills the Dl DCI PDU
3205 * @params[in] Pointer to fapi_dl_dci_t
3206 * Pointer to PdcchCfg
3209 ******************************************************************/
3210 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
3211 DlMsgSchInfo *dlMsgSchInfo)
3213 uint8_t dciIndex = 0;
3214 if(dlDciPtr != NULLP)
3220 uint16_t coresetSize = 0;
3221 uint16_t rbStart = 0;
3223 uint8_t dciFormatId;
3224 uint32_t freqDomResAssign;
3225 uint8_t timeDomResAssign;
3227 uint8_t modNCodScheme;
3229 uint8_t redundancyVer = 0;
3230 uint8_t harqProcessNum = 0;
3231 uint8_t dlAssignmentIdx = 0;
3232 uint8_t pucchTpc = 0;
3233 uint8_t pucchResoInd = 0;
3234 uint8_t harqFeedbackInd = 0;
3236 /* Size(in bits) of each field in DCI format 1_0 */
3237 uint8_t dciFormatIdSize = 1;
3238 uint8_t freqDomResAssignSize = 0;
3239 uint8_t timeDomResAssignSize = 4;
3240 uint8_t VRB2PRBMapSize = 1;
3241 uint8_t modNCodSchemeSize = 5;
3242 uint8_t ndiSize = 1;
3243 uint8_t redundancyVerSize = 2;
3244 uint8_t harqProcessNumSize = 4;
3245 uint8_t dlAssignmentIdxSize = 2;
3246 uint8_t pucchTpcSize = 2;
3247 uint8_t pucchResoIndSize = 3;
3248 uint8_t harqFeedbackIndSize = 3;
3250 for(dciIndex = 0; dciIndex < pdcchInfo->numDlDci; dciIndex++)
3252 dlDciPtr[dciIndex].rnti = pdcchInfo->dci[dciIndex].rnti;
3253 dlDciPtr[dciIndex].scramblingId = pdcchInfo->dci[dciIndex].scramblingId;
3254 dlDciPtr[dciIndex].scramblingRnti = pdcchInfo->dci[dciIndex].scramblingRnti;
3255 dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex;
3256 dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel;
3257 dlDciPtr[dciIndex].pc_and_bform.numPrgs = pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs;
3258 dlDciPtr[dciIndex].pc_and_bform.prgSize = pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize;
3259 dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces;
3260 dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx;
3261 dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0];
3262 dlDciPtr[dciIndex].beta_pdcch_1_0 = pdcchInfo->dci[dciIndex].txPdcchPower.beta_pdcch_1_0;
3263 dlDciPtr[dciIndex].powerControlOffsetSS = pdcchInfo->dci[dciIndex].txPdcchPower.powerControlOffsetSS;
3265 /* Calculating freq domain resource allocation field value and size
3266 * coreset0Size = Size of coreset 0
3267 * RBStart = Starting Virtual Rsource block
3268 * RBLen = length of contiguously allocted RBs
3269 * Spec 38.214 Sec 5.1.2.2.2
3271 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
3272 rbStart = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.startPrb;
3273 rbLen = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.numPrb;
3275 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
3277 if((rbLen - 1) <= floor(coresetSize / 2))
3278 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3280 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3281 + (coresetSize - 1 - rbStart);
3283 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3286 /* Fetching DCI field values */
3287 dciFormatId = dlMsgSchInfo->dciFormatId; /* Always set to 1 for DL */
3288 timeDomResAssign = pdcchInfo->dci[dciIndex].pdschCfg.pdschTimeAlloc.rowIndex -1;
3289 VRB2PRBMap = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
3290 modNCodScheme = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].mcsIndex;
3291 ndi = dlMsgSchInfo->transportBlock[0].ndi;
3292 redundancyVer = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].rvIndex;
3293 harqProcessNum = dlMsgSchInfo->harqProcNum;
3294 dlAssignmentIdx = dlMsgSchInfo->dlAssignIdx;
3295 pucchTpc = dlMsgSchInfo->pucchTpc;
3296 pucchResoInd = dlMsgSchInfo->pucchResInd;
3297 harqFeedbackInd = dlMsgSchInfo->harqFeedbackInd;
3299 /* Reversing bits in each DCI field */
3300 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3301 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3302 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3303 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3304 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3305 ndi = reverseBits(ndi, ndiSize);
3306 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3307 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3308 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3309 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
3310 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
3311 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3314 /* Calulating total number of bytes in buffer */
3315 dlDciPtr[dciIndex].payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3316 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3317 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3318 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3320 numBytes = dlDciPtr[dciIndex].payloadSizeBits / 8;
3321 if(dlDciPtr[dciIndex].payloadSizeBits % 8)
3324 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3326 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
3330 /* Initialize buffer */
3331 for(bytePos = 0; bytePos < numBytes; bytePos++)
3332 dlDciPtr[dciIndex].payload[bytePos] = 0;
3334 bytePos = numBytes - 1;
3337 /* Packing DCI format fields */
3338 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3339 dciFormatId, dciFormatIdSize);
3340 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3341 freqDomResAssign, freqDomResAssignSize);
3342 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3343 timeDomResAssign, timeDomResAssignSize);
3344 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3345 VRB2PRBMap, VRB2PRBMapSize);
3346 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3347 modNCodScheme, modNCodSchemeSize);
3348 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3350 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3351 redundancyVer, redundancyVerSize);
3352 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3353 redundancyVer, redundancyVerSize);
3354 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3355 harqProcessNum, harqProcessNumSize);
3356 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3357 dlAssignmentIdx, dlAssignmentIdxSize);
3358 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3359 pucchTpc, pucchTpcSize);
3360 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3361 pucchResoInd, pucchResoIndSize);
3362 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3363 harqFeedbackInd, harqFeedbackIndSize);
3368 /*******************************************************************
3370 * @brief fills Dl PDCCH Info from DL PageAlloc
3374 * Function : fillPdcchInfoFrmPageAlloc
3377 * -Fills the PdcchInfo
3379 * @params[in] Pointer to DlPageAlloc
3380 * Pointer to PdcchCfg
3383 ******************************************************************/
3384 void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc, MacCellCfg *macCellCfg)
3386 if(dlTtiReqPdu != NULLP)
3388 BwpCfg *bwp = NULLP;
3390 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3391 bwp = &pageAlloc->bwp;
3392 fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg);
3394 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3396 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3397 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3398 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3399 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3401 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pageAlloc->pageDlDci.ssStartSymbolIndex;
3402 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pageAlloc->pageDlDci.durationSymbols;
3403 convertFreqDomRsrcMapToIAPIFormat(pageAlloc->pageDlDci.freqDomainResource, \
3404 dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3405 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pageAlloc->pageDlDci.cceRegMappingType;
3406 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
3407 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
3408 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
3409 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity;
3410 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1;
3411 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = CORESET_TYPE0;
3413 /* Calculating PDU length. Considering only one dl dci pdu for now */
3414 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3416 /* Filling Vendor message PDU */
3417 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3418 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3419 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3420 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3421 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3425 /*******************************************************************
3427 * @brief fills PDCCH PDU required for DL TTI info in MAC
3431 * Function : fillPdcchPdu
3434 * -Fills the Pdcch PDU info
3437 * @params[in] Pointer to FAPI DL TTI Req
3438 * Pointer to PdcchCfg
3441 ******************************************************************/
3442 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3443 RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3445 uint8_t dciIndex = 0;
3447 if(dlTtiReqPdu != NULLP)
3449 PdcchCfg *pdcchInfo = NULLP;
3450 BwpCfg *bwp = NULLP;
3452 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3453 if(rntiType == SI_RNTI_TYPE)
3455 pdcchInfo = dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3456 bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3457 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3459 else if(rntiType == RA_RNTI_TYPE)
3461 pdcchInfo = dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3462 bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3463 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3465 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3467 pdcchInfo = dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg;
3468 bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp;
3469 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3470 dlSlot->dlInfo.dlMsgAlloc[ueIdx]);
3474 DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
3478 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3479 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3480 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3481 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3482 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3484 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3485 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3486 convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
3487 dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3488 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3489 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3490 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3491 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
3492 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3493 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3494 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3496 /* Calculating PDU length. Considering only one dl dci pdu for now */
3497 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3499 /* Filling Vendor message PDU */
3500 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3501 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3502 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3503 for(dciIndex = 0; dciIndex < dlTtiReqPdu->pdu.pdcch_pdu.numDlDci; dciIndex++)
3505 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_pdcch_to_ssb = 0;
3506 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_dmrs_to_ssb = 0;
3513 /*******************************************************************
3515 * @brief fills PDSCH PDU from PageAlloc required for DL TTI info in MAC
3519 * Function : fillPagePdschPdu
3522 * -Fills the Pdsch PDU info
3525 * @params[in] Pointer to FAPI DL TTI Req
3526 * Pointer to PdschCfg
3527 * Pointer to msgLen of DL TTI Info
3530 ******************************************************************/
3531 void fillPagePdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc,
3532 uint16_t pduIndex, MacCellCfg *macCellCfg)
3536 if(dlTtiReqPdu != NULLP)
3538 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3539 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3540 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */
3541 dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI;
3542 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3543 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb;
3544 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb;
3545 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing;
3546 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix;
3547 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1;
3548 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3550 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
3551 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2;
3552 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs;
3553 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0;
3554 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0;
3555 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize;
3557 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
3558 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1;
3559 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0;
3560 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0;
3561 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
3562 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType;
3563 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
3564 dlTtiReqPdu->pdu.pdsch_pdu.scid = 0;
3565 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1;
3566 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
3567 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1;
3568 /* since we are using type-1, hence rbBitmap excluded */
3569 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
3570 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
3571 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping;
3572 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb;
3573 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb;
3574 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
3575 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
3576 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
3577 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
3578 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
3579 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0;
3580 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0;
3581 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pageAlloc->pageDlSch.timeAlloc.mappingType;
3582 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols;
3583 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos;
3585 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3587 /* DL TTI Request vendor message */
3588 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3589 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3590 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3591 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3593 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3598 /*******************************************************************
3600 * @brief fills PDSCH PDU required for DL TTI info in MAC
3604 * Function : fillPdschPdu
3607 * -Fills the Pdsch PDU info
3610 * @params[in] Pointer to FAPI DL TTI Req
3611 * Pointer to PdschCfg
3612 * Pointer to msgLen of DL TTI Info
3615 ******************************************************************/
3617 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3618 BwpCfg bwp, uint16_t pduIndex)
3622 if(dlTtiReqPdu != NULLP)
3624 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3625 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3626 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3627 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3628 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3629 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3630 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3631 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3632 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3633 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3634 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3636 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3637 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3638 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3639 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3640 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3641 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3643 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3644 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3645 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3646 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3647 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3648 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3649 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3650 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3651 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3652 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3653 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3654 /* since we are using type-1, hence rbBitmap excluded */
3655 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
3656 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
3657 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3658 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
3659 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
3660 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3661 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3662 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3663 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3664 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3665 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3666 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3667 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3668 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3669 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3670 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3671 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3673 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3675 /* DL TTI Request vendor message */
3676 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3677 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3678 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3679 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3681 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3686 /***********************************************************************
3688 * @brief calculates the total size to be allocated for DL TTI Req
3692 * Function : calcDlTtiReqPduCount
3695 * -calculates the total pdu count to be allocated for DL TTI Req
3697 * @params[in] MacDlSlot *dlSlot
3700 * ********************************************************************/
3701 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3704 uint8_t idx = 0, ueIdx=0;
3706 if(dlSlot->dlInfo.isBroadcastPres)
3708 if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3710 for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3712 /* SSB PDU is filled */
3716 if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3718 /* PDCCH and PDSCH PDU is filled */
3723 if(dlSlot->pageAllocInfo)
3725 /* PDCCH and PDSCH PDU is filled */
3729 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3731 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3733 /* PDCCH and PDSCH PDU is filled */
3734 if(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg && dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3740 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3742 /* PDCCH and PDSCH PDU is filled */
3743 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)
3745 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3752 /***********************************************************************
3754 * @brief calculates the total size to be allocated for DL TTI Req
3758 * Function : calcTxDataReqPduCount
3761 * -calculates the total pdu count to be allocated for DL TTI Req
3763 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3766 * ********************************************************************/
3767 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3769 uint8_t count = 0, ueIdx=0;
3771 if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3775 if(dlSlot->pageAllocInfo)
3780 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3782 if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && (dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
3785 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3787 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3794 /***********************************************************************
3796 * @brief fills the SIB1 TX-DATA request message
3800 * Function : fillSib1TxDataReq
3803 * - fills the SIB1 TX-DATA request message
3805 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3806 * @params[in] macCellCfg consist of SIB1 pdu
3807 * @params[in] uint32_t *msgLen
3808 * @params[in] uint16_t pduIndex
3811 * ********************************************************************/
3812 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3815 uint32_t payloadSize = 0;
3816 uint8_t *sib1Payload = NULLP;
3817 fapi_api_queue_elem_t *payloadElem = NULLP;
3818 #ifdef INTEL_WLS_MEM
3819 void * wlsHdlr = NULLP;
3822 pduDesc[pduIndex].pdu_index = pduIndex;
3823 pduDesc[pduIndex].num_tlvs = 1;
3826 payloadSize = pdschCfg->codeword[0].tbSize;
3827 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3828 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3829 LWR_MAC_ALLOC(sib1Payload, payloadSize);
3830 if(sib1Payload == NULLP)
3834 payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3835 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3836 macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3837 memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3839 #ifdef INTEL_WLS_MEM
3840 mtGetWlsHdl(&wlsHdlr);
3841 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3843 pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3845 pduDesc[pduIndex].pdu_length = payloadSize;
3847 #ifdef INTEL_WLS_MEM
3848 addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3850 LWR_MAC_FREE(sib1Payload, payloadSize);
3856 /***********************************************************************
3858 * @brief fills the PAGE TX-DATA request message
3862 * Function : fillPageTxDataReq
3865 * - fills the Page TX-DATA request message
3867 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3868 * @params[in] macCellCfg consist of SIB1 pdu
3869 * @params[in] uint32_t *msgLen
3870 * @params[in] uint16_t pduIndex
3873 * ********************************************************************/
3874 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo)
3876 uint32_t payloadSize = 0;
3877 uint8_t *pagePayload = NULLP;
3878 fapi_api_queue_elem_t *payloadElem = NULLP;
3879 #ifdef INTEL_WLS_MEM
3880 void * wlsHdlr = NULLP;
3883 pduDesc[pduIndex].pdu_index = pduIndex;
3884 pduDesc[pduIndex].num_tlvs = 1;
3887 payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
3888 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3889 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3890 LWR_MAC_ALLOC(pagePayload, payloadSize);
3891 if(pagePayload == NULLP)
3895 payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3896 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3897 pageAllocInfo->pageDlSch.dlPagePduLen);
3898 memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen);
3900 #ifdef INTEL_WLS_MEM
3901 mtGetWlsHdl(&wlsHdlr);
3902 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3904 pduDesc[pduIndex].tlvs[0].value = pagePayload;
3906 pduDesc[pduIndex].pdu_length = payloadSize;
3908 #ifdef INTEL_WLS_MEM
3909 addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3911 LWR_MAC_FREE(pagePayload, payloadSize);
3917 /***********************************************************************
3919 * @brief fills the RAR TX-DATA request message
3923 * Function : fillRarTxDataReq
3926 * - fills the RAR TX-DATA request message
3928 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3929 * @params[in] RarInfo *rarInfo
3930 * @params[in] uint32_t *msgLen
3931 * @params[in] uint16_t pduIndex
3934 * ********************************************************************/
3935 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
3937 uint16_t payloadSize;
3938 uint8_t *rarPayload = NULLP;
3939 fapi_api_queue_elem_t *payloadElem = NULLP;
3940 #ifdef INTEL_WLS_MEM
3941 void * wlsHdlr = NULLP;
3944 pduDesc[pduIndex].pdu_index = pduIndex;
3945 pduDesc[pduIndex].num_tlvs = 1;
3948 payloadSize = pdschCfg->codeword[0].tbSize;
3949 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3950 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3951 LWR_MAC_ALLOC(rarPayload, payloadSize);
3952 if(rarPayload == NULLP)
3956 payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3957 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3958 memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3960 #ifdef INTEL_WLS_MEM
3961 mtGetWlsHdl(&wlsHdlr);
3962 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3964 pduDesc[pduIndex].tlvs[0].value = rarPayload;
3966 pduDesc[pduIndex].pdu_length = payloadSize;
3968 #ifdef INTEL_WLS_MEM
3969 addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3971 LWR_MAC_FREE(rarPayload, payloadSize);
3976 /***********************************************************************
3978 * @brief fills the DL dedicated Msg TX-DATA request message
3982 * Function : fillDlMsgTxDataReq
3985 * - fills the Dl Dedicated Msg TX-DATA request message
3987 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3988 * @params[in] DlMsgInfo *dlMsgInfo
3989 * @params[in] uint32_t *msgLen
3990 * @params[in] uint16_t pduIndex
3993 * ********************************************************************/
3994 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
3996 uint16_t payloadSize;
3997 uint8_t *dlMsgPayload = NULLP;
3998 fapi_api_queue_elem_t *payloadElem = NULLP;
3999 #ifdef INTEL_WLS_MEM
4000 void * wlsHdlr = NULLP;
4003 pduDesc[pduIndex].pdu_index = pduIndex;
4004 pduDesc[pduIndex].num_tlvs = 1;
4007 payloadSize = pdschCfg->codeword[0].tbSize;
4008 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
4009 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
4010 LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
4011 if(dlMsgPayload == NULLP)
4015 payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
4016 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
4017 memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
4019 #ifdef INTEL_WLS_MEM
4020 mtGetWlsHdl(&wlsHdlr);
4021 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
4023 pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
4025 pduDesc[pduIndex].pdu_length = payloadSize;
4027 #ifdef INTEL_WLS_MEM
4028 addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
4030 LWR_MAC_FREE(dlMsgPayload, payloadSize);
4037 /*******************************************************************
4039 * @brief Sends DL TTI Request to PHY
4043 * Function : fillDlTtiReq
4046 * -Sends FAPI DL TTI req to PHY
4048 * @params[in] timing info
4049 * @return ROK - success
4052 * ****************************************************************/
4053 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
4055 #ifdef CALL_FLOW_DEBUG_LOG
4056 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
4062 uint8_t numPduEncoded = 0;
4064 uint16_t cellIdx =0;
4065 uint16_t pduIndex = 0;
4067 SlotTimingInfo dlTtiReqTimingInfo;
4068 MacDlSlot *currDlSlot = NULLP;
4069 MacCellCfg macCellCfg;
4071 fapi_dl_tti_req_t *dlTtiReq = NULLP;
4072 fapi_msg_header_t *msgHeader = NULLP;
4073 p_fapi_api_queue_elem_t dlTtiElem;
4074 p_fapi_api_queue_elem_t headerElem;
4075 p_fapi_api_queue_elem_t prevElem;
4076 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4078 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4079 /* consider phy delay */
4080 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
4081 dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
4083 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4085 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
4087 /* Vendor Message */
4088 fapi_vendor_msg_t *vendorMsg;
4089 p_fapi_api_queue_elem_t vendorMsgQElem;
4090 /* Allocte And fill Vendor msg */
4091 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
4094 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
4097 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
4098 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
4099 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
4101 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
4104 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
4105 sizeof(fapi_dl_tti_req_t));
4106 /* Fill message header */
4107 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
4110 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
4111 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
4115 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
4116 sizeof(fapi_msg_header_t));
4117 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
4118 msgHeader->num_msg = 2;
4119 msgHeader->handle = 0;
4121 /* Fill Dl TTI Request */
4122 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
4123 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
4124 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
4126 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
4127 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
4128 dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
4129 nPdu = dlTtiReq->nPdus;
4131 vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
4132 vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
4134 dlTtiReq->nGroup = 0;
4135 if(dlTtiReq->nPdus > 0)
4137 if(currDlSlot->dlInfo.isBroadcastPres)
4139 if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
4141 if(dlTtiReq->pdus != NULLP)
4143 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
4145 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
4146 currDlSlot, idx, dlTtiReq->sfn);
4150 DU_LOG("\033[1;31m");
4151 DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
4155 if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4157 /* Filling SIB1 param */
4158 if(numPduEncoded != nPdu)
4160 if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
4161 rntiType = SI_RNTI_TYPE;
4164 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
4165 currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
4169 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
4170 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
4171 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
4173 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
4177 DU_LOG("\033[1;34m");
4178 DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
4183 if(currDlSlot->pageAllocInfo != NULLP)
4185 /* Filling DL Paging Alloc param */
4186 if(numPduEncoded != nPdu)
4188 rntiType = P_RNTI_TYPE;
4189 fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
4190 currDlSlot->pageAllocInfo, &macCellCfg);
4192 fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
4193 currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
4194 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
4198 DU_LOG("\033[1;34m");
4199 DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
4203 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4205 if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4207 /* Filling RAR param */
4208 rntiType = RA_RNTI_TYPE;
4209 if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
4211 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
4212 currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
4214 MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
4216 if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
4218 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
4219 currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
4220 currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
4225 DU_LOG("\033[1;32m");
4226 DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
4231 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4233 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \
4235 rntiType = C_RNTI_TYPE;
4236 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
4237 currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
4241 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
4243 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
4245 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
4246 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
4247 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
4251 DU_LOG("\033[1;32m");
4252 if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status))
4254 DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
4255 MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
4259 DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
4265 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
4268 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
4269 currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
4275 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
4278 #ifdef ODU_SLOT_IND_DEBUG_LOG
4279 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
4282 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4283 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4284 msgHeader->num_msg++;
4286 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4287 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4288 msgHeader->num_msg++;
4290 /* send Tx-DATA req message */
4291 sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
4292 if(dlTtiElem->p_next->p_next->p_next)
4294 msgHeader->num_msg++;
4295 prevElem = dlTtiElem->p_next->p_next->p_next;
4298 prevElem = dlTtiElem->p_next->p_next;
4302 #ifdef ODU_SLOT_IND_DEBUG_LOG
4303 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
4305 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4306 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4307 msgHeader->num_msg++;
4309 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4310 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4311 msgHeader->num_msg++;
4313 prevElem = dlTtiElem->p_next->p_next;
4316 if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
4318 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4319 lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
4320 msgHeader->num_msg++;
4321 macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
4322 prevElem = prevElem->p_next;
4324 prevElem->p_next = vendorMsgQElem;
4325 LwrMacSendToL1(headerElem);
4326 memset(currDlSlot, 0, sizeof(MacDlSlot));
4331 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
4332 memset(currDlSlot, 0, sizeof(MacDlSlot));
4338 lwr_mac_procInvalidEvt(&currTimingInfo);
4345 /*******************************************************************
4347 * @brief Sends TX data Request to PHY
4351 * Function : sendTxDataReq
4354 * -Sends FAPI TX data req to PHY
4356 * @params[in] timing info
4357 * @return ROK - success
4360 * ****************************************************************/
4361 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
4364 #ifdef CALL_FLOW_DEBUG_LOG
4365 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
4371 uint16_t pduIndex = 0;
4372 fapi_tx_data_req_t *txDataReq =NULLP;
4373 p_fapi_api_queue_elem_t txDataElem = 0;
4375 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4377 /* send TX_Data request message */
4378 nPdu = calcTxDataReqPduCount(dlSlot);
4381 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
4382 if(txDataElem == NULLP)
4384 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
4388 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
4389 sizeof(fapi_tx_data_req_t));
4390 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
4391 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
4392 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
4394 vendorTxDataReq->sym = 0;
4396 txDataReq->sfn = currTimingInfo.sfn;
4397 txDataReq->slot = currTimingInfo.slot;
4398 if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4400 fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4401 &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg);
4403 MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
4404 txDataReq->num_pdus++;
4406 if(dlSlot->pageAllocInfo != NULLP)
4408 fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo);
4410 txDataReq->num_pdus++;
4411 MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen));
4412 MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4415 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4417 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4419 if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
4421 fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4422 dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4424 txDataReq->num_pdus++;
4425 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
4427 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4430 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4432 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
4434 fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4435 dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
4436 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
4438 txDataReq->num_pdus++;
4439 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
4441 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
4442 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
4443 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
4444 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
4448 /* Fill message header */
4449 DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
4450 prevElem->p_next = txDataElem;
4456 /***********************************************************************
4458 * @brief calculates the total size to be allocated for UL TTI Req
4462 * Function : getnPdus
4465 * -calculates the total pdu count to be allocated for UL TTI Req
4467 * @params[in] Pointer to fapi Ul TTI Req
4468 * Pointer to CurrUlSlot
4470 * ********************************************************************/
4472 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4474 uint8_t pduCount = 0, ueIdx = 0;
4476 if(ulTtiReq && currUlSlot)
4478 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
4483 for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
4485 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
4487 if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
4492 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4494 if(currUlSlot->ulSchInfo.schPuschUci[ueIdx].crnti != 0)
4499 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
4501 if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
4507 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_SRS)
4516 /***********************************************************************
4518 * @brief Set the value of zero correlation config in PRACH PDU
4522 * Function : setNumCs
4525 * -Set the value of zero correlation config in PRACH PDU
4527 * @params[in] Pointer to zero correlation config
4528 * Pointer to MacCellCfg
4529 * ********************************************************************/
4531 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4535 if(macCellCfg != NULLP)
4537 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4538 *numCs = UnrestrictedSetNcsTable[idx];
4543 /***********************************************************************
4545 * @brief Fills the PRACH PDU in UL TTI Request
4549 * Function : fillPrachPdu
4552 * -Fills the PRACH PDU in UL TTI Request
4554 * @params[in] Pointer to Prach Pdu
4555 * Pointer to CurrUlSlot
4556 * Pointer to macCellCfg
4558 * ********************************************************************/
4561 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4563 if(ulTtiReqPdu != NULLP)
4565 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4566 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
4567 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4568 currUlSlot->ulSchInfo.prachSchInfo.numPrachOcas;
4569 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4570 currUlSlot->ulSchInfo.prachSchInfo.prachFormat;
4571 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulSchInfo.prachSchInfo.numRa;
4572 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4573 currUlSlot->ulSchInfo.prachSchInfo.prachStartSymb;
4574 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4575 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4576 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4577 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4578 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4579 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4583 /*******************************************************************
4585 * @brief Filling PUSCH PDU in UL TTI Request
4589 * Function : fillPuschPdu
4591 * Functionality: Filling PUSCH PDU in UL TTI Request
4594 * @return ROK - success
4597 * ****************************************************************/
4598 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4599 SchPuschInfo *puschInfo)
4601 if(ulTtiReqPdu != NULLP)
4603 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4604 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4605 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4606 ulTtiReqPdu->pdu.pusch_pdu.rnti = puschInfo->crnti;
4607 /* TODO : Fill handle in raCb when scheduling pusch and access here */
4608 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4609 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4610 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4611 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4612 macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4613 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4614 macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4615 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4616 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = puschInfo->tbInfo.qamOrder;
4617 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = puschInfo->tbInfo.mcs;
4618 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = puschInfo->tbInfo.mcsTable;
4619 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4620 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId;
4621 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4622 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4623 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4624 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId;
4625 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4626 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4627 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4628 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4629 puschInfo->fdAlloc.resAllocType;
4630 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4631 puschInfo->fdAlloc.resAlloc.type1.startPrb;
4632 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4633 puschInfo->fdAlloc.resAlloc.type1.numPrb;
4634 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4635 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4636 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4637 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4638 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4639 puschInfo->tdAlloc.startSymb;
4640 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4641 puschInfo->tdAlloc.numSymb;
4643 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4644 puschInfo->dmrsMappingType;
4645 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4646 puschInfo->nrOfDmrsSymbols;
4647 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4648 puschInfo->dmrsAddPos;
4650 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4651 puschInfo->tbInfo.rv;
4652 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4653 puschInfo->harqProcId;
4654 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4655 puschInfo->tbInfo.ndi;
4656 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4657 puschInfo->tbInfo.tbSize;
4658 /* numCb is 0 for new transmission */
4659 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4661 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4663 /* UL TTI Vendor PDU */
4664 ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4665 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4666 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4667 for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4669 ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4674 /*******************************************************************
4676 * @brief Fill PUCCH PDU in Ul TTI Request
4680 * Function : fillPucchPdu
4682 * Functionality: Fill PUCCH PDU in Ul TTI Request
4685 * @return ROK - success
4688 * ****************************************************************/
4689 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4690 SchPucchInfo *pucchInfo)
4692 if(ulTtiReqPdu != NULLP)
4694 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
4695 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4696 ulTtiReqPdu->pdu.pucch_pdu.rnti = pucchInfo->crnti;
4697 /* TODO : Fill handle in raCb when scheduling pucch and access here */
4698 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
4699 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4700 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4701 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4702 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4703 ulTtiReqPdu->pdu.pucch_pdu.formatType = pucchInfo->pucchFormat; /* Supporting PUCCH Format 0 */
4704 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4706 ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb;
4707 ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb;
4708 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = pucchInfo->tdAlloc.startSymb;
4709 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = pucchInfo->tdAlloc.numSymb;
4710 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = pucchInfo->intraFreqHop;
4711 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop;
4712 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4713 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4714 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
4716 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift;
4718 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4719 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = pucchInfo->timeDomOCC;
4720 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = pucchInfo->occIdx; /* Valid for Format 4 only */
4721 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = pucchInfo->occLen; /* Valid for Format 4 only */
4722 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = pucchInfo->pi2BPSK;
4723 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = pucchInfo->addDmrs;/* Valid for Format 3, 4 only */
4724 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4725 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
4726 ulTtiReqPdu->pdu.pucch_pdu.srFlag = pucchInfo->srFlag;
4727 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength;
4728 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
4729 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
4730 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs;
4731 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize;
4732 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = pucchInfo->beamPucchInfo.digBfInterfaces;
4733 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0];
4735 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4737 /* UL TTI Vendor PDU */
4738 ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4739 ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4740 ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4741 for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4743 ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4750 /*******************************************************************
4752 * @brief Sends UL TTI Request to PHY
4756 * Function : fillUlTtiReq
4759 * -Sends FAPI Param req to PHY
4761 * @params[in] Pointer to CmLteTimingInfo
4762 * @return ROK - success
4765 ******************************************************************/
4766 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4768 #ifdef CALL_FLOW_DEBUG_LOG
4769 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4773 uint16_t cellIdx =0;
4774 uint8_t pduIdx = -1;
4776 SlotTimingInfo ulTtiReqTimingInfo;
4777 MacUlSlot *currUlSlot = NULLP;
4778 MacCellCfg macCellCfg;
4779 fapi_ul_tti_req_t *ulTtiReq = NULLP;
4780 p_fapi_api_queue_elem_t ulTtiElem;
4782 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4784 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4785 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4788 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,gConfigInfo.gPhyDeltaUl, macCb.macCell[cellIdx]->numOfSlots);
4789 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4791 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4794 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4795 sizeof(fapi_ul_tti_req_t));
4796 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4797 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4798 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4799 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
4800 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4801 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4802 vendorUlTti->num_ul_pdu = ulTtiReq->nPdus;
4803 vendorUlTti->sym = 0;
4804 ulTtiReq->nGroup = 0;
4805 if(ulTtiReq->nPdus > 0)
4807 #ifdef ODU_SLOT_IND_DEBUG_LOG
4808 DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, datatype:%d, sfn/slot:%d/%d", currUlSlot->ulSchInfo.dataType, ulTtiReq->sfn, ulTtiReq->slot);
4810 /* Fill Prach Pdu */
4811 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
4814 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4815 ulTtiReq->rachPresent++;
4817 for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
4819 /* Fill PUSCH PDU */
4820 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
4822 if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
4824 #ifdef ODU_SLOT_IND_DEBUG_LOG
4825 DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, PUSCH PDU ueId:%d", ueIdx);
4828 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, &currUlSlot->ulSchInfo.schPuschInfo[ueIdx]);
4832 /* Fill PUCCH PDU */
4833 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
4835 if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
4838 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, &currUlSlot->ulSchInfo.schPucchInfo[ueIdx]);
4843 ulTtiReq->ueGrpInfo[ulTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
4847 #ifdef ODU_SLOT_IND_DEBUG_LOG
4848 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
4850 prevElem->p_next = ulTtiElem;
4852 memset(currUlSlot, 0, sizeof(MacUlSlot));
4857 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
4858 memset(currUlSlot, 0, sizeof(MacUlSlot));
4864 lwr_mac_procInvalidEvt(&currTimingInfo);
4871 /*******************************************************************
4873 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4877 * Function : fillUlDciPdu
4880 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4882 * @params[in] Pointer to fapi_dl_dci_t
4883 * Pointer to DciInfo
4886 ******************************************************************/
4887 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4889 #ifdef CALL_FLOW_DEBUG_LOG
4890 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4892 if(ulDciPtr != NULLP)
4894 uint8_t numBytes =0;
4898 uint8_t coreset1Size = 0;
4899 uint16_t rbStart = 0;
4901 uint8_t dciFormatId = 0;
4902 uint32_t freqDomResAssign =0;
4903 uint8_t timeDomResAssign =0;
4904 uint8_t freqHopFlag =0;
4905 uint8_t modNCodScheme =0;
4907 uint8_t redundancyVer = 0;
4908 uint8_t harqProcessNum = 0;
4909 uint8_t puschTpc = 0;
4910 uint8_t ul_SlInd = 0;
4912 /* Size(in bits) of each field in DCI format 0_0 */
4913 uint8_t dciFormatIdSize = 1;
4914 uint8_t freqDomResAssignSize = 0;
4915 uint8_t timeDomResAssignSize = 4;
4916 uint8_t freqHopFlagSize = 1;
4917 uint8_t modNCodSchemeSize = 5;
4918 uint8_t ndiSize = 1;
4919 uint8_t redundancyVerSize = 2;
4920 uint8_t harqProcessNumSize = 4;
4921 uint8_t puschTpcSize = 2;
4922 uint8_t ul_SlIndSize = 1;
4924 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4925 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4926 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4927 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4928 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4929 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4930 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4931 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4932 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4933 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4934 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
4935 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4937 /* Calculating freq domain resource allocation field value and size
4938 * coreset1Size = Size of coreset 1
4939 * RBStart = Starting Virtual Rsource block
4940 * RBLen = length of contiguously allocted RBs
4941 * Spec 38.214 Sec 5.1.2.2.2
4943 if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
4945 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4946 rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
4947 rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
4949 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4951 if((rbLen - 1) <= floor(coreset1Size / 2))
4952 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4954 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4955 + (coreset1Size - 1 - rbStart);
4957 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4959 /* Fetching DCI field values */
4960 dciFormatId = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
4961 timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
4962 freqHopFlag = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
4963 modNCodScheme = schDciInfo->dciFormatInfo.format.format0_0.mcs;
4964 ndi = schDciInfo->dciFormatInfo.format.format0_0.ndi;
4965 redundancyVer = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
4966 harqProcessNum = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
4967 puschTpc = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
4968 ul_SlInd = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
4970 /* Reversing bits in each DCI field */
4971 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4972 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4973 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4974 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4975 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4976 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4977 puschTpc = reverseBits(puschTpc, puschTpcSize);
4978 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4980 /* Calulating total number of bytes in buffer */
4981 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4982 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4983 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4985 numBytes = ulDciPtr->payloadSizeBits / 8;
4986 if(ulDciPtr->payloadSizeBits % 8)
4989 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4991 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
4995 /* Initialize buffer */
4996 for(bytePos = 0; bytePos < numBytes; bytePos++)
4997 ulDciPtr->payload[bytePos] = 0;
4999 bytePos = numBytes - 1;
5002 /* Packing DCI format fields */
5003 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5004 dciFormatId, dciFormatIdSize);
5005 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5006 freqDomResAssign, freqDomResAssignSize);
5007 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5008 timeDomResAssign, timeDomResAssignSize);
5009 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5010 freqHopFlag, freqHopFlagSize);
5011 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5012 modNCodScheme, modNCodSchemeSize);
5013 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5015 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5016 redundancyVer, redundancyVerSize);
5017 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5018 harqProcessNum, harqProcessNumSize);
5019 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5020 puschTpc, puschTpcSize);
5021 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
5022 ul_SlInd, ul_SlIndSize);
5024 } /* fillUlDciPdu */
5026 /*******************************************************************
5028 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
5032 * Function : fillUlDciPdcchPdu
5035 * -Fills the Pdcch PDU info
5037 * @params[in] Pointer to FAPI DL TTI Req
5038 * Pointer to PdcchCfg
5041 ******************************************************************/
5042 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
5044 if(ulDciReqPdu != NULLP)
5046 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
5047 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
5048 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
5049 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
5050 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
5051 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
5052 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
5053 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
5054 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
5055 convertFreqDomRsrcMapToIAPIFormat(dlInfo->ulGrant->coresetCfg.freqDomainResource, \
5056 ulDciReqPdu->pdcchPduConfig.freqDomainResource);
5057 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
5058 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
5059 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
5060 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
5061 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
5062 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
5063 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
5065 /* Calculating PDU length. Considering only one Ul dci pdu for now */
5066 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
5068 /* Vendor UL DCI PDU */
5069 vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
5070 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
5071 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
5076 /*******************************************************************
5078 * @brief Sends UL DCI Request to PHY
5082 * Function : fillUlDciReq
5085 * -Sends FAPI Ul Dci req to PHY
5087 * @params[in] Pointer to CmLteTimingInfo
5088 * @return ROK - success
5091 ******************************************************************/
5092 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
5096 uint8_t numPduEncoded = 0;
5097 SlotTimingInfo ulDciReqTimingInfo ={0};
5098 MacDlSlot *currDlSlot = NULLP;
5099 fapi_ul_dci_req_t *ulDciReq =NULLP;
5100 p_fapi_api_queue_elem_t ulDciElem;
5102 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
5104 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
5105 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
5106 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
5108 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
5111 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
5112 sizeof(fapi_ul_dci_req_t));
5113 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
5114 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
5115 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
5117 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
5118 ulDciReq->slot = ulDciReqTimingInfo.slot;
5119 if(currDlSlot->dlInfo.ulGrant != NULLP)
5121 vendorUlDciReq->sym = 0;
5122 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
5123 vendorUlDciReq->num_pdus = ulDciReq->numPdus;
5124 if(ulDciReq->numPdus > 0)
5126 /* Fill PDCCH configuration Pdu */
5127 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
5129 /* free UL GRANT at SCH */
5130 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
5132 #ifdef ODU_SLOT_IND_DEBUG_LOG
5133 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
5136 prevElem->p_next = ulDciElem;
5141 lwr_mac_procInvalidEvt(&currTimingInfo);
5147 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
5150 /* PHY_STATE_IDLE */
5151 #ifdef INTEL_TIMER_MODE
5152 lwr_mac_procIqSamplesReqEvt,
5154 lwr_mac_procParamReqEvt,
5155 lwr_mac_procParamRspEvt,
5156 lwr_mac_procConfigReqEvt,
5157 lwr_mac_procConfigRspEvt,
5158 lwr_mac_procInvalidEvt,
5159 lwr_mac_procInvalidEvt,
5162 /* PHY_STATE_CONFIGURED */
5163 #ifdef INTEL_TIMER_MODE
5164 lwr_mac_procInvalidEvt,
5166 lwr_mac_procParamReqEvt,
5167 lwr_mac_procParamRspEvt,
5168 lwr_mac_procConfigReqEvt,
5169 lwr_mac_procConfigRspEvt,
5170 lwr_mac_procStartReqEvt,
5171 lwr_mac_procInvalidEvt,
5174 /* PHY_STATE_RUNNING */
5175 #ifdef INTEL_TIMER_MODE
5176 lwr_mac_procInvalidEvt,
5178 lwr_mac_procInvalidEvt,
5179 lwr_mac_procInvalidEvt,
5180 lwr_mac_procConfigReqEvt,
5181 lwr_mac_procConfigRspEvt,
5182 lwr_mac_procInvalidEvt,
5183 lwr_mac_procInvalidEvt,
5187 /*******************************************************************
5189 * @brief Sends message to LWR_MAC Fsm Event Handler
5193 * Function : sendToLowerMac
5196 * -Sends message to LowerMac
5198 * @params[in] Message Type
5204 ******************************************************************/
5205 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
5207 lwrMacCb.event = msgType;
5208 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
5211 /**********************************************************************
5213 **********************************************************************/