src/5gnrmac/lwr_mac_fsm.c

   1  /*******************************************************************************
   2  ################################################################################
   3  #   Copyright (c) [2017-2019] [Radisys]                                        #
   4  #                                                                              #
   5  #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6  #   you may not use this file except in compliance with the License.           #
   7  #   You may obtain a copy of the License at                                    #
   8  #                                                                              #
   9  #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10  #                                                                              #
  11  #   Unless required by applicable law or agreed to in writing, software        #
  12  #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13  #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14  #   See the License for the specific language governing permissions and        #
  15  #   limitations under the License.                                             #
  16  ################################################################################
  17  *******************************************************************************/
  18
  19
  20 /* header include files -- defines (.h) */
  21 #include "common_def.h"
  22 #include "lrg.h"
  23 #include "lrg.x"
  24 #include "du_app_mac_inf.h"
  25 #include "mac_sch_interface.h"
  26 #include "lwr_mac_upr_inf.h"
  27 #include "mac.h"
  28 #include "lwr_mac.h"
  29 #ifdef INTEL_FAPI
  30 #include "nr5g_fapi_internal.h"
  31 #include "fapi_vendor_extension.h"
  32 #endif
  33 #ifdef INTEL_WLS_MEM
  34 #include "wls_lib.h"
  35 #endif
  36 #include "lwr_mac_fsm.h"
  37 #include "lwr_mac_phy.h"
  38 #include "mac_utils.h"
  39
  40 #define MIB_SFN_BITMASK 0xFC
  41 #define PDCCH_PDU_TYPE 0
  42 #define PDSCH_PDU_TYPE 1
  43 #define SSB_PDU_TYPE 3
  44 #define PRACH_PDU_TYPE 0
  45 #define PUSCH_PDU_TYPE 1
  46 #define PUCCH_PDU_TYPE 2
  47 #define PDU_PRESENT 1
  48 #define SET_MSG_LEN(x, size) x += size
  49
  50 /* Global variables */
  51 LwrMacCb lwrMacCb;
  52
  53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
  54 void fapiMacConfigRsp(uint16_t cellId);
  55 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
  56 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
  57 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
  58 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
  59
  60 void lwrMacLayerInit(Region region, Pool pool)
  61 {
  62 #ifdef INTEL_WLS_MEM
  63    uint8_t idx;
  64 #endif
  65
  66    memset(&lwrMacCb, 0, sizeof(LwrMacCb));
  67    lwrMacCb.region = region;
  68    lwrMacCb.pool = pool;
  69    lwrMacCb.clCfgDone = TRUE;
  70    lwrMacCb.numCell = 0;
  71    lwrMacCb.phyState = PHY_STATE_IDLE;
  72
  73 #ifdef INTEL_WLS_MEM
  74    /* Initializing WLS free mem list */
  75    lwrMacCb.phySlotIndCntr = 1;
  76    for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
  77    {
  78       cmLListInit(&wlsBlockToFreeList[idx]);
  79    }
  80 #endif
  81 }
  82
  83 /*******************************************************************
  84  *
  85  * @brief Handles Invalid Request Event
  86  *
  87  * @details
  88  *
  89  *    Function : lwr_mac_procInvalidEvt
  90  *
  91  *    Functionality:
  92  *         - Displays the PHY state when the invalid event occurs
  93  *
  94  * @params[in]
  95  * @return ROK     - success
  96  *         RFAILED - failure
  97  *
  98  * ****************************************************************/
  99 uint8_t lwr_mac_procInvalidEvt(void *msg)
 100 {
 101 #ifdef CALL_FLOW_DEBUG_LOG
 102    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
 103 #endif
 104    DU_LOG("\nERROR  -->  LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
 105    return ROK;
 106 }
 107
 108 #ifdef INTEL_FAPI
 109 /*******************************************************************
 110  *
 111  * @brief Fills FAPI message header
 112  *
 113  * @details
 114  *
 115  *    Function : fillMsgHeader
 116  *
 117  *    Functionality:
 118  *         -Fills FAPI message header
 119  *
 120  * @params[in] Pointer to header
 121  *             Number of messages
 122  *             Messae Type
 123  *             Length of message
 124  * @return void
 125  *
 126  * ****************************************************************/
 127 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
 128 {
 129    memset(hdr, 0, sizeof(fapi_msg_t));
 130    hdr->msg_id = msgType;
 131    hdr->length = msgLen;
 132 }
 133
 134 /*******************************************************************
 135  *
 136  * @brief Fills FAPI Config Request message header
 137  *
 138  * @details
 139  *
 140  *    Function : fillTlvs
 141  *
 142  *    Functionality:
 143  *         -Fills FAPI Config Request message header
 144  *
 145  * @params[in] Pointer to TLV
 146  *             Tag
 147  *             Length
 148  *             Value
 149  *             MsgLen
 150  * @return void
 151  *
 152  * ****************************************************************/
 153 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
 154       uint32_t value, uint32_t *msgLen)
 155 {
 156    tlv->tl.tag    = tag;
 157    tlv->tl.length = length;
 158    tlv->value     = value;
 159    *msgLen        = *msgLen + sizeof(tag) + sizeof(length) + length;
 160 }
 161 /*******************************************************************
 162  *
 163  * @brief fills the cyclic prefix by comparing the bitmask
 164  *
 165  * @details
 166  *
 167  *    Function : fillCyclicPrefix
 168  *
 169  *    Functionality:
 170  *         -checks the value with the bitmask and
 171  *          fills the cellPtr's cyclic prefix.
 172  *
 173  * @params[in] Pointer to ClCellParam
 174  *             Value to be compared
 175  * @return void
 176  *
 177  ********************************************************************/
 178 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
 179 {
 180    if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
 181    {
 182       (*cellPtr)->cyclicPrefix   = NORMAL_CYCLIC_PREFIX_MASK;
 183    }
 184    else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
 185    {
 186       (*cellPtr)->cyclicPrefix   = EXTENDED_CYCLIC_PREFIX_MASK;
 187    }
 188    else
 189    {
 190       (*cellPtr)->cyclicPrefix = INVALID_VALUE;
 191    }
 192 }
 193
 194 /*******************************************************************
 195  *
 196  * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
 197  *
 198  * @details
 199  *
 200  *    Function : fillSubcarrierSpaceDl
 201  *
 202  *    Functionality:
 203  *         -checks the value with the bitmask and
 204  *          fills the cellPtr's subcarrier spacing in DL
 205  *
 206  * @params[in] Pointer to ClCellParam
 207  *             Value to be compared
 208  * @return void
 209  *
 210  * ****************************************************************/
 211
 212 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
 213 {
 214    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 215    {
 216       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
 217    }
 218    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 219    {
 220       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
 221    }
 222    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 223    {
 224       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
 225    }
 226    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 227    {
 228       (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
 229    }
 230    else
 231    {
 232       (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
 233    }
 234 }
 235
 236 /*******************************************************************
 237  *
 238  * @brief fills the downlink bandwidth by comparing the bitmask
 239  *
 240  * @details
 241  *
 242  *    Function : fillBandwidthDl
 243  *
 244  *    Functionality:
 245  *         -checks the value with the bitmask and
 246  *         -fills the cellPtr's DL Bandwidth
 247  *
 248  * @params[in] Pointer to ClCellParam
 249  *             Value to be compared
 250  * @return void
 251  *
 252  * ****************************************************************/
 253
 254 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
 255 {
 256    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 257    {
 258       (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
 259    }
 260    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 261    {
 262       (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
 263    }
 264    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 265    {
 266       (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
 267    }
 268    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 269    {
 270       (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
 271    }
 272    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 273    {
 274       (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
 275    }
 276    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 277    {
 278       (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
 279    }
 280    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 281    {
 282       (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
 283    }
 284    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 285    {
 286       (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
 287    }
 288    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 289    {
 290       (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
 291    }
 292    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 293    {
 294       (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
 295    }
 296    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 297    {
 298       (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
 299    }
 300    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 301    {
 302       (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
 303    }
 304    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 305    {
 306       (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
 307    }
 308    else
 309    {
 310       (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
 311    }
 312 }
 313
 314 /*******************************************************************
 315  *
 316  * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
 317  *
 318  * @details
 319  *
 320  *    Function : fillSubcarrierSpaceUl
 321  *
 322  *    Functionality:
 323  *         -checks the value with the bitmask and
 324  *         -fills cellPtr's subcarrier spacing in UL
 325  *
 326  * @params[in] Pointer to ClCellParam
 327  *             Value to be compared
 328  * @return void
 329  *
 330  * ****************************************************************/
 331
 332 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
 333 {
 334    if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
 335    {
 336       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
 337    }
 338    else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
 339    {
 340       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
 341    }
 342    else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
 343    {
 344       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
 345    }
 346    else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
 347    {
 348       (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
 349    }
 350    else
 351    {
 352       (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
 353    }
 354 }
 355
 356 /*******************************************************************
 357  *
 358  * @brief fills the uplink bandwidth by comparing the bitmask
 359  *
 360  * @details
 361  *
 362  *    Function : fillBandwidthUl
 363  *
 364  *    Functionality:
 365  *         -checks the value with the bitmask and
 366  *          fills the cellPtr's UL Bandwidth
 367  *
 368  *
 369  *
 370  * @params[in] Pointer to ClCellParam
 371  *             Value to be compared
 372  * @return void
 373  *
 374  *
 375  * ****************************************************************/
 376
 377 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
 378 {
 379    if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
 380    {
 381       (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
 382    }
 383    else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
 384    {
 385       (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
 386    }
 387    else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
 388    {
 389       (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
 390    }
 391    else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
 392    {
 393       (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
 394    }
 395    else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
 396    {
 397       (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
 398    }
 399    else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
 400    {
 401       (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
 402    }
 403    else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
 404    {
 405       (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
 406    }
 407    else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
 408    {
 409       (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
 410    }
 411    else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
 412    {
 413       (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
 414    }
 415    else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
 416    {
 417       (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
 418    }
 419    else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
 420    {
 421       (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
 422    }
 423    else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
 424    {
 425       (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
 426    }
 427    else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
 428    {
 429       (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
 430    }
 431    else
 432    {
 433       (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
 434    }
 435 }
 436 /*******************************************************************
 437  *
 438  * @brief fills the CCE maping by comparing the bitmask
 439  *
 440  * @details
 441  *
 442  *    Function : fillCCEmaping
 443  *
 444  *    Functionality:
 445  *         -checks the value with the bitmask and
 446  *          fills the cellPtr's CCE Mapping Type
 447  *
 448  *
 449  * @params[in] Pointer to ClCellParam
 450  *             Value to be compared
 451  * @return void
 452  *
 453  * ****************************************************************/
 454
 455 void fillCCEmaping(uint8_t value,  ClCellParam **cellPtr)
 456 {
 457    if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
 458    {
 459       (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
 460    }
 461    else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
 462    {
 463       (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
 464    }
 465    else
 466    {
 467       (*cellPtr)->cceMappingType = INVALID_VALUE;
 468    }
 469 }
 470
 471 /*******************************************************************
 472  *
 473  * @brief fills the PUCCH format by comparing the bitmask
 474  *
 475  * @details
 476  *
 477  *    Function : fillPucchFormat
 478  *
 479  *    Functionality:
 480  *         -checks the value with the bitmask and
 481  *          fills the cellPtr's pucch format
 482  *
 483  *
 484  * @params[in] Pointer to ClCellParam
 485  *             Value to be compared
 486  * @return void
 487  *
 488  * ****************************************************************/
 489
 490 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
 491 {
 492    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
 493    {
 494       (*cellPtr)->pucchFormats    = FORMAT_0;
 495    }
 496    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
 497    {
 498       (*cellPtr)->pucchFormats    = FORMAT_1;
 499    }
 500    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
 501    {
 502       (*cellPtr)->pucchFormats    = FORMAT_2;
 503    }
 504    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
 505    {
 506       (*cellPtr)->pucchFormats    = FORMAT_3;
 507    }
 508    else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
 509    {
 510       (*cellPtr)->pucchFormats    = FORMAT_4;
 511    }
 512    else
 513    {
 514       (*cellPtr)->pucchFormats    = INVALID_VALUE;
 515    }
 516 }
 517
 518 /*******************************************************************
 519  *
 520  * @brief fills the PDSCH Mapping Type by comparing the bitmask
 521  *
 522  * @details
 523  *
 524  *    Function : fillPdschMappingType
 525  *
 526  *    Functionality:
 527  *         -checks the value with the bitmask and
 528  *          fills the cellPtr's PDSCH MappingType
 529  *
 530  * @params[in] Pointer to ClCellParam
 531  *             Value to be compared
 532  * @return void
 533  *
 534  * ****************************************************************/
 535
 536 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
 537 {
 538    if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
 539    {
 540       (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
 541    }
 542    else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
 543    {
 544       (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
 545    }
 546    else
 547    {
 548       (*cellPtr)->pdschMappingType = INVALID_VALUE;
 549    }
 550 }
 551
 552 /*******************************************************************
 553  *
 554  * @brief fills the PDSCH Allocation Type by comparing the bitmask
 555  *
 556  * @details
 557  *
 558  *    Function : fillPdschAllocationType
 559  *
 560  *    Functionality:
 561  *         -checks the value with the bitmask and
 562  *          fills the cellPtr's PDSCH AllocationType
 563  *
 564  * @params[in] Pointer to ClCellParam
 565  *             Value to be compared
 566  * @return void
 567  *
 568  * ****************************************************************/
 569
 570 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
 571 {
 572    if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
 573    {
 574       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
 575    }
 576    else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
 577    {
 578       (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
 579    }
 580    else
 581    {
 582       (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
 583    }
 584 }
 585
 586 /*******************************************************************
 587  *
 588  * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
 589  *
 590  * @details
 591  *
 592  *    Function : fillPrbMappingType
 593  *
 594  *    Functionality:
 595  *         -checks the value with the bitmask and
 596  *          fills the cellPtr's PRB Mapping Type
 597  *
 598  * @params[in] Pointer to ClCellParam
 599  *             Value to be compared
 600  * @return void
 601  *
 602  ******************************************************************/
 603 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 604 {
 605    if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 606    {
 607       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 608    }
 609    else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 610    {
 611       (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 612    }
 613    else
 614    {
 615       (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
 616    }
 617 }
 618
 619 /*******************************************************************
 620  *
 621  * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
 622  *
 623  * @details
 624  *
 625  *    Function : fillPdschDmrsConfigType
 626  *
 627  *    Functionality:
 628  *         -checks the value with the bitmask and
 629  *          fills the cellPtr's DmrsConfig Type
 630  *
 631  * @params[in] Pointer to ClCellParam
 632  *             Value to be compared
 633  * @return void
 634  *
 635  ******************************************************************/
 636
 637 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
 638 {
 639    if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
 640    {
 641       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 642    }
 643    else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
 644    {
 645       (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 646    }
 647    else
 648    {
 649       (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
 650    }
 651 }
 652
 653 /*******************************************************************
 654  *
 655  * @brief fills the PDSCH DmrsLength by comparing the bitmask
 656  *
 657  * @details
 658  *
 659  *    Function : fillPdschDmrsLength
 660  *
 661  *    Functionality:
 662  *         -checks the value with the bitmask and
 663  *          fills the cellPtr's PdschDmrsLength
 664  *
 665  * @params[in] Pointer to ClCellParam
 666  *             Value to be compared
 667  * @return void
 668  *
 669  ******************************************************************/
 670 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 671 {
 672    if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
 673    {
 674       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 675    }
 676    else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
 677    {
 678       (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 679    }
 680    else
 681    {
 682       (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
 683    }
 684 }
 685
 686 /*******************************************************************
 687  *
 688  * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
 689  *
 690  * @details
 691  *
 692  *    Function : fillPdschDmrsAddPos
 693  *
 694  *    Functionality:
 695  *         -checks the value with the bitmask and
 696  *          fills the cellPtr's Pdsch DmrsAddPos
 697  *
 698  * @params[in] Pointer to ClCellParam
 699  *             Value to be compared
 700  * @return void
 701  *
 702  ******************************************************************/
 703
 704 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 705 {
 706    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 707    {
 708       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 709    }
 710    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 711    {
 712       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 713    }
 714    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 715    {
 716       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 717    }
 718    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 719    {
 720       (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 721    }
 722    else
 723    {
 724       (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
 725    }
 726 }
 727
 728 /*******************************************************************
 729  *
 730  * @brief fills the Modulation Order in DL by comparing the bitmask
 731  *
 732  * @details
 733  *
 734  *    Function : fillModulationOrderDl
 735  *
 736  *    Functionality:
 737  *         -checks the value with the bitmask and
 738  *          fills the cellPtr's ModulationOrder in DL.
 739  *
 740  * @params[in] Pointer to ClCellParam
 741  *             Value to be compared
 742  * @return void
 743  *
 744  ******************************************************************/
 745 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
 746 {
 747    if(value == 0 )
 748    {
 749       (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
 750    }
 751    else if(value == 1)
 752    {
 753       (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
 754    }
 755    else if(value == 2)
 756    {
 757       (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
 758    }
 759    else if(value == 3)
 760    {
 761       (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
 762    }
 763    else
 764    {
 765       (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
 766    }
 767 }
 768
 769 /*******************************************************************
 770  *
 771  * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
 772  *
 773  * @details
 774  *
 775  *    Function : fillPuschDmrsConfigType
 776  *
 777  *    Functionality:
 778  *         -checks the value with the bitmask and
 779  *          fills the cellPtr's PUSCH DmrsConfigType
 780  *
 781  * @params[in] Pointer to ClCellParam
 782  *             Value to be compared
 783  * @return void
 784  *
 785  ******************************************************************/
 786
 787 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
 788 {
 789    if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
 790    {
 791       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
 792    }
 793    else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
 794    {
 795       (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
 796    }
 797    else
 798    {
 799       (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
 800    }
 801 }
 802
 803 /*******************************************************************
 804  *
 805  * @brief fills the PUSCH DmrsLength by comparing the bitmask
 806  *
 807  * @details
 808  *
 809  *    Function : fillPuschDmrsLength
 810  *
 811  *    Functionality:
 812  *         -checks the value with the bitmask and
 813  *          fills the cellPtr's PUSCH DmrsLength
 814  *
 815  * @params[in] Pointer to ClCellParam
 816  *             Value to be compared
 817  * @return void
 818  *
 819  ******************************************************************/
 820
 821 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
 822 {
 823    if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
 824    {
 825       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
 826    }
 827    else if(value  == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
 828    {
 829       (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
 830    }
 831    else
 832    {
 833       (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
 834    }
 835 }
 836
 837 /*******************************************************************
 838  *
 839  * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
 840  *
 841  * @details
 842  *
 843  *    Function : fillPuschDmrsAddPos
 844  *
 845  *    Functionality:
 846  *         -checks the value with the bitmask and
 847  *          fills the cellPtr's PUSCH DmrsAddPos
 848  *
 849  * @params[in] Pointer to ClCellParam
 850  *             Value to be compared
 851  * @return void
 852  *
 853  ******************************************************************/
 854
 855 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
 856 {
 857    if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
 858    {
 859       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
 860    }
 861    else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
 862    {
 863       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
 864    }
 865    else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
 866    {
 867       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
 868    }
 869    else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
 870    {
 871       (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
 872    }
 873    else
 874    {
 875       (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
 876    }
 877 }
 878
 879 /*******************************************************************
 880  *
 881  * @brief fills the PUSCH Mapping Type by comparing the bitmask
 882  *
 883  * @details
 884  *
 885  *    Function : fillPuschMappingType
 886  *
 887  *    Functionality:
 888  *         -checks the value with the bitmask and
 889  *          fills the cellPtr's PUSCH MappingType
 890  *
 891  * @params[in] Pointer to ClCellParam
 892  *             Value to be compared
 893  * @return void
 894  *
 895  ******************************************************************/
 896
 897 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
 898 {
 899    if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
 900    {
 901       (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
 902    }
 903    else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
 904    {
 905       (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
 906    }
 907    else
 908    {
 909       (*cellPtr)->puschMappingType = INVALID_VALUE;
 910    }
 911 }
 912
 913 /*******************************************************************
 914  *
 915  * @brief fills the PUSCH Allocation Type by comparing the bitmask
 916  *
 917  * @details
 918  *
 919  *    Function : fillPuschAllocationType
 920  *
 921  *    Functionality:
 922  *         -checks the value with the bitmask and
 923  *          fills the cellPtr's PUSCH AllocationType
 924  *
 925  * @params[in] Pointer to ClCellParam
 926  *             Value to be compared
 927  * @return void
 928  *
 929  ******************************************************************/
 930
 931 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
 932 {
 933    if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 934    {
 935       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
 936    }
 937    else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
 938    {
 939       (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
 940    }
 941    else
 942    {
 943       (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
 944    }
 945 }
 946
 947 /*******************************************************************
 948  *
 949  * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
 950  *
 951  * @details
 952  *
 953  *    Function : fillPuschPrbMappingType
 954  *
 955  *    Functionality:
 956  *         -checks the value with the bitmask and
 957  *          fills the cellPtr's PUSCH PRB MApping Type
 958  *
 959  * @params[in] Pointer to ClCellParam
 960  *             Value to be compared
 961  * @return void
 962  *
 963  ******************************************************************/
 964
 965 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
 966 {
 967    if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
 968    {
 969       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
 970    }
 971    else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
 972    {
 973       (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
 974    }
 975    else
 976    {
 977       (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
 978    }
 979 }
 980
 981 /*******************************************************************
 982  *
 983  * @brief fills the Modulation Order in Ul by comparing the bitmask
 984  *
 985  * @details
 986  *
 987  *    Function : fillModulationOrderUl
 988  *
 989  *    Functionality:
 990  *         -checks the value with the bitmask and
 991  *          fills the cellPtr's Modualtsion Order in UL.
 992  *
 993  * @params[in] Pointer to ClCellParam
 994  *             Value to be compared
 995  * @return void
 996  *
 997  ******************************************************************/
 998
 999 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1000 {
1001    if(value == 0)
1002    {
1003       (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1004    }
1005    else if(value == 1)
1006    {
1007       (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1008    }
1009    else if(value == 2)
1010    {
1011       (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1012    }
1013    else if(value == 3)
1014    {
1015       (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1016    }
1017    else
1018    {
1019       (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1020    }
1021 }
1022
1023 /*******************************************************************
1024  *
1025  * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1026  *
1027  * @details
1028  *
1029  *    Function : fillPuschAggregationFactor
1030  *
1031  *    Functionality:
1032  *         -checks the value with the bitmask and
1033  *          fills the cellPtr's PUSCH Aggregation Factor
1034  *
1035  * @params[in] Pointer to ClCellParam
1036  *             Value to be compared
1037  * @return void
1038  *
1039  ******************************************************************/
1040
1041 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1042 {
1043    if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1044    {
1045       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_1;
1046    }
1047    else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1048    {
1049       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_2;
1050    }
1051    else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1052    {
1053       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_4;
1054    }
1055    else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1056    {
1057       (*cellPtr)->puschAggregationFactor    = AGG_FACTOR_8;
1058    }
1059    else
1060    {
1061       (*cellPtr)->puschAggregationFactor    = INVALID_VALUE;
1062    }
1063 }
1064
1065 /*******************************************************************
1066  *
1067  * @brief fills the PRACH Long Format by comparing the bitmask
1068  *
1069  * @details
1070  *
1071  *    Function : fillPrachLongFormat
1072  *
1073  *    Functionality:
1074  *         -checks the value with the bitmask and
1075  *          fills the cellPtr's PRACH Long Format
1076  *
1077  * @params[in] Pointer to ClCellParam
1078  *             Value to be compared
1079  * @return void
1080  *
1081  ******************************************************************/
1082
1083 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1084 {
1085    if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1086    {
1087       (*cellPtr)->prachLongFormats    = FORMAT_0;
1088    }
1089    else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1090    {
1091       (*cellPtr)->prachLongFormats    = FORMAT_1;
1092    }
1093    else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1094    {
1095       (*cellPtr)->prachLongFormats    = FORMAT_2;
1096    }
1097    else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1098    {
1099       (*cellPtr)->prachLongFormats    = FORMAT_3;
1100    }
1101    else
1102    {
1103       (*cellPtr)->prachLongFormats    = INVALID_VALUE;
1104    }
1105 }
1106
1107 /*******************************************************************
1108  *
1109  * @brief fills the PRACH Short Format by comparing the bitmask
1110  *
1111  * @details
1112  *
1113  *    Function : fillPrachShortFormat
1114  *
1115  *    Functionality:
1116  *         -checks the value with the bitmask and
1117  *          fills the cellPtr's PRACH ShortFormat
1118  *
1119  * @params[in] Pointer to ClCellParam
1120  *             Value to be compared
1121  * @return void
1122  *
1123  ******************************************************************/
1124
1125 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1126 {
1127    if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1128    {
1129       (*cellPtr)->prachShortFormats    = SF_FORMAT_A1;
1130    }
1131    else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1132    {
1133       (*cellPtr)->prachShortFormats    = SF_FORMAT_A2;
1134    }
1135    else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1136    {
1137       (*cellPtr)->prachShortFormats    = SF_FORMAT_A3;
1138    }
1139    else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1140    {
1141       (*cellPtr)->prachShortFormats    = SF_FORMAT_B1;
1142    }
1143    else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1144    {
1145       (*cellPtr)->prachShortFormats    = SF_FORMAT_B2;
1146    }
1147    else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1148    {
1149       (*cellPtr)->prachShortFormats    = SF_FORMAT_B3;
1150    }
1151    else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1152    {
1153       (*cellPtr)->prachShortFormats    = SF_FORMAT_B4;
1154    }
1155    else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1156    {
1157       (*cellPtr)->prachShortFormats    = SF_FORMAT_C0;
1158    }
1159    else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1160    {
1161       (*cellPtr)->prachShortFormats    = SF_FORMAT_C2;
1162    }
1163    else
1164    {
1165       (*cellPtr)->prachShortFormats    = INVALID_VALUE;
1166    }
1167 }
1168
1169 /*******************************************************************
1170  *
1171  * @brief fills the Fd Occasions Type by comparing the bitmask
1172  *
1173  * @details
1174  *
1175  *    Function : fillFdOccasions
1176  *
1177  *    Functionality:
1178  *         -checks the value with the bitmask and
1179  *          fills the cellPtr's Fd Occasions
1180  *
1181  * @params[in] Pointer to ClCellParam
1182  *             Value to be compared
1183  * @return void
1184  *
1185  ******************************************************************/
1186
1187 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1188 {
1189    if(value == 0)
1190    {
1191       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1192    }
1193    else if(value == 1)
1194    {
1195       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1196    }
1197    else if(value == 3)
1198    {
1199       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1200    }
1201    else if(value == 4)
1202    {
1203       (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1204    }
1205    else
1206    {
1207       (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1208    }
1209 }
1210
1211 /*******************************************************************
1212  *
1213  * @brief fills the RSSI Measurement by comparing the bitmask
1214  *
1215  * @details
1216  *
1217  *    Function : fillRssiMeas
1218  *
1219  *    Functionality:
1220  *         -checks the value with the bitmask and
1221  *          fills the cellPtr's RSSI Measurement report
1222  *
1223  * @params[in] Pointer to ClCellParam
1224  *             Value to be compared
1225  * @return void
1226  *
1227  ******************************************************************/
1228
1229 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1230 {
1231    if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1232    {
1233       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBM;
1234    }
1235    else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1236    {
1237       (*cellPtr)->rssiMeasurementSupport    = RSSI_REPORT_DBFS;
1238    }
1239    else
1240    {
1241       (*cellPtr)->rssiMeasurementSupport    = INVALID_VALUE;
1242    }
1243 }
1244
1245 /*******************************************************************
1246  *
1247  * @brief Returns the TLVs value
1248  *
1249  * @details
1250  *
1251  *    Function : getParamValue
1252  *
1253  *    Functionality:
1254  *         -return TLVs value
1255  *
1256  * @params[in]
1257  * @return ROK     - temp
1258  *         RFAILED - failure
1259  *
1260  * ****************************************************************/
1261
1262 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1263 {
1264    void *posPtr;
1265    posPtr   = &tlv->tl.tag;
1266    posPtr   += sizeof(tlv->tl.tag);
1267    posPtr   += sizeof(tlv->tl.length);
1268    /*TO DO: malloc to SSI memory */
1269    if(type == FAPI_UINT_8)
1270    {
1271       return(*(uint8_t *)posPtr);
1272    }
1273    else if(type == FAPI_UINT_16)
1274    {
1275       return(*(uint16_t *)posPtr);
1276    }
1277    else if(type == FAPI_UINT_32)
1278    {
1279       return(*(uint32_t *)posPtr);
1280    }
1281    else
1282    {
1283       DU_LOG("\nERROR  -->  LWR_MAC: Value Extraction failed" );
1284       return RFAILED;
1285    }
1286 }
1287 #endif /* FAPI */
1288
1289 /*******************************************************************
1290  *
1291  * @brief Modifes the received mibPdu to uint32 bit
1292  *        and stores it in MacCellCfg
1293  *
1294  * @details
1295  *
1296  *    Function : setMibPdu
1297  *
1298  *    Functionality:
1299  *         -Sets the MibPdu
1300  *
1301  * @params[in] Pointer to mibPdu
1302  *             pointer to modified value
1303  ******************************************************************/
1304 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1305 {
1306    *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1307    *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1308    DU_LOG("\nDEBUG  -->  LWR_MAC: MIB PDU %x", *val);
1309 }
1310
1311 /*******************************************************************
1312  *
1313  * @brief Sends FAPI Param req to PHY
1314  *
1315  * @details
1316  *
1317  *    Function : lwr_mac_procParamReqEvt
1318  *
1319  *    Functionality:
1320  *         -Sends FAPI Param req to PHY
1321  *
1322  * @params[in]
1323  * @return ROK     - success
1324  *         RFAILED - failure
1325  *
1326  * ****************************************************************/
1327
1328 uint8_t lwr_mac_procParamReqEvt(void *msg)
1329 {
1330 #ifdef INTEL_FAPI
1331 #ifdef CALL_FLOW_DEBUG_LOG
1332    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1333 #endif
1334
1335    /* startGuardTimer(); */
1336    fapi_param_req_t         *paramReq = NULL;
1337    fapi_msg_header_t        *msgHeader;
1338    p_fapi_api_queue_elem_t  paramReqElem;
1339    p_fapi_api_queue_elem_t  headerElem;
1340
1341    LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1342    if(paramReq != NULL)
1343    {
1344       FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1345          sizeof(fapi_tx_data_req_t));
1346       paramReq = (fapi_param_req_t *)(paramReqElem +1);
1347       memset(paramReq, 0, sizeof(fapi_param_req_t));
1348       fillMsgHeader(&paramReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1349
1350       /* Fill message header */
1351       LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1352       if(!headerElem)
1353       {
1354          DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for param req header");
1355          LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1356          return RFAILED;
1357       }
1358       FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1359          sizeof(fapi_msg_header_t));
1360       msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1361       msgHeader->num_msg = 1;
1362       msgHeader->handle = 0;
1363
1364       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Param Request to Phy");
1365       LwrMacSendToL1(headerElem);
1366    }
1367    else
1368    {
1369       DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for Param Request");
1370       return RFAILED;
1371    }
1372 #endif
1373    return ROK;
1374 }
1375
1376 /*******************************************************************
1377  *
1378  * @brief Sends FAPI Param Response to MAC via PHY
1379  *
1380  * @details
1381  *
1382  *    Function : lwr_mac_procParamRspEvt
1383  *
1384  *    Functionality:
1385  *         -Sends FAPI Param rsp to MAC via PHY
1386  *
1387  * @params[in]
1388  * @return ROK     - success
1389  *         RFAILED - failure
1390  *
1391  * ****************************************************************/
1392
1393 uint8_t lwr_mac_procParamRspEvt(void *msg)
1394 {
1395 #ifdef INTEL_FAPI
1396    /* stopGuardTimer(); */
1397    uint8_t index;
1398    uint32_t encodedVal;
1399    fapi_param_resp_t *paramRsp;
1400    ClCellParam *cellParam = NULLP;
1401
1402    paramRsp = (fapi_param_resp_t *)msg;
1403    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1404
1405    if(paramRsp != NULLP)
1406    {
1407       MAC_ALLOC(cellParam, sizeof(ClCellParam));
1408       if(cellParam != NULLP)
1409       {
1410          DU_LOG("\nDEBUG  -->  LWR_MAC: Filling TLVS into MAC API");
1411          if(paramRsp->error_code == MSG_OK)
1412          {
1413             for(index = 0; index < paramRsp->number_of_tlvs; index++)
1414             {
1415                switch(paramRsp->tlvs[index].tl.tag)
1416                {
1417                   case FAPI_RELEASE_CAPABILITY_TAG:
1418                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1419                      if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1420                      {
1421                         cellParam->releaseCapability = RELEASE_15;
1422                      }
1423                      break;
1424
1425                   case FAPI_PHY_STATE_TAG:
1426                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1427                      if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1428                      {
1429                         DU_LOG("\nERROR  -->  PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1430                         return RFAILED;
1431                      }
1432                      break;
1433
1434                   case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1435                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1436                      if(encodedVal != RFAILED && encodedVal != 0)
1437                      {
1438                         cellParam->skipBlankDlConfig = SUPPORTED;
1439                      }
1440                      else
1441                      {
1442                         cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1443                      }
1444                      break;
1445
1446                   case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1447                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1448                      if(encodedVal != RFAILED && encodedVal != 0)
1449                      {
1450                         cellParam->skipBlankUlConfig = SUPPORTED;
1451                      }
1452                      else
1453                      {
1454                         cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1455                      }
1456                      break;
1457
1458                   case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1459                      cellParam->numTlvsToReport = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1460                      break;
1461
1462                   case FAPI_CYCLIC_PREFIX_TAG:
1463                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1464                      if(encodedVal != RFAILED)
1465                      {
1466                         fillCyclicPrefix(encodedVal, &cellParam);
1467                      }
1468                      break;
1469
1470                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1471                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1472                      if(encodedVal != RFAILED)
1473                      {
1474                         fillSubcarrierSpaceDl(encodedVal, &cellParam);
1475                      }
1476                      break;
1477
1478                   case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1479                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1480                      if(encodedVal != RFAILED)
1481                      {
1482                         fillBandwidthDl(encodedVal, &cellParam);
1483                      }
1484                      break;
1485
1486                   case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1487                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1488                      if(encodedVal != RFAILED)
1489                      {
1490                         fillSubcarrierSpaceUl(encodedVal, &cellParam);
1491                      }
1492                      break;
1493
1494                   case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1495                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_16);
1496                      if(encodedVal != RFAILED)
1497                      {
1498                         fillBandwidthUl(encodedVal, &cellParam);
1499                      }
1500                      break;
1501
1502                   case FAPI_CCE_MAPPING_TYPE_TAG:
1503                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1504                      if(encodedVal != RFAILED)
1505                      {
1506                         fillCCEmaping(encodedVal, &cellParam);
1507                      }
1508                      break;
1509
1510                   case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1511                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1512                      if(encodedVal != RFAILED && encodedVal != 0)
1513                      {
1514                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1515                      }
1516                      else
1517                      {
1518                         cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1519                      }
1520                      break;
1521
1522                   case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1523                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1524                      if(encodedVal != RFAILED && encodedVal != 0)
1525                      {
1526                         cellParam->precoderGranularityCoreset = SUPPORTED;
1527                      }
1528                      else
1529                      {
1530                         cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1531                      }
1532                      break;
1533
1534                   case FAPI_PDCCH_MU_MIMO_TAG:
1535                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1536                      if(encodedVal != RFAILED && encodedVal != 0)
1537                      {
1538                         cellParam->pdcchMuMimo = SUPPORTED;
1539                      }
1540                      else
1541                      {
1542                         cellParam->pdcchMuMimo = NOT_SUPPORTED;
1543                      }
1544                      break;
1545
1546                   case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1547                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1548                      if(encodedVal != RFAILED && encodedVal != 0)
1549                      {
1550                         cellParam->pdcchPrecoderCycling = SUPPORTED;
1551                      }
1552                      else
1553                      {
1554                         cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1555                      }
1556                      break;
1557
1558                   case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1559                      cellParam->maxPdcchsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1560                      break;
1561
1562                   case FAPI_PUCCH_FORMATS_TAG:
1563                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1564                      if(encodedVal != RFAILED)
1565                      {
1566                         fillPucchFormat(encodedVal, &cellParam);
1567                      }
1568                      break;
1569
1570                   case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1571                      cellParam->maxPucchsPerSlot   = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1572                      break;
1573
1574                   case FAPI_PDSCH_MAPPING_TYPE_TAG:
1575                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1576                      if(encodedVal != RFAILED)
1577                      {
1578                         fillPdschMappingType(encodedVal, &cellParam);
1579                      }
1580                      break;
1581
1582                   case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1583                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1584                      if(encodedVal != RFAILED)
1585                      {
1586                         fillPdschAllocationType(encodedVal, &cellParam);
1587                      }
1588                      break;
1589
1590                   case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1591                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1592                      if(encodedVal != RFAILED)
1593                      {
1594                         fillPrbMappingType(encodedVal, &cellParam);
1595                      }
1596                      break;
1597
1598                   case FAPI_PDSCH_CBG_TAG:
1599                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1600                      if(encodedVal != RFAILED && encodedVal != 0)
1601                      {
1602                         cellParam->pdschCbg = SUPPORTED;
1603                      }
1604                      else
1605                      {
1606                         cellParam->pdschCbg = NOT_SUPPORTED;
1607                      }
1608                      break;
1609
1610                   case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1611                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1612                      if(encodedVal != RFAILED)
1613                      {
1614                         fillPdschDmrsConfigType(encodedVal, &cellParam);
1615                      }
1616                      break;
1617
1618                   case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1619                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1620                      if(encodedVal != RFAILED)
1621                      {
1622                         fillPdschDmrsLength(encodedVal, &cellParam);
1623                      }
1624                      break;
1625
1626                   case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1627                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1628                      if(encodedVal != RFAILED)
1629                      {
1630                         fillPdschDmrsAddPos(encodedVal, &cellParam);
1631                      }
1632                      break;
1633
1634                   case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1635                      cellParam->maxPdschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1636                      break;
1637
1638                   case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1639                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1640                      if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1641                      {
1642                         cellParam->maxNumberMimoLayersPdsch   = encodedVal;
1643                      }
1644                      break;
1645
1646                   case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1647                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1648                      if(encodedVal != RFAILED)
1649                      {
1650                         fillModulationOrderDl(encodedVal, &cellParam);
1651                      }
1652                      break;
1653
1654                   case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1655                      cellParam->maxMuMimoUsersDl         = \
1656                         getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1657                      break;
1658
1659                   case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1660                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1661                      if(encodedVal != RFAILED && encodedVal != 0)
1662                      {
1663                         cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1664                      }
1665                      else
1666                      {
1667                         cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1668                      }
1669                      break;
1670
1671                   case FAPI_PREMPTIONSUPPORT_TAG:
1672                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1673                      if(encodedVal != RFAILED && encodedVal != 0)
1674                      {
1675                         cellParam->premptionSupport = SUPPORTED;
1676                      }
1677                      else
1678                      {
1679                         cellParam->premptionSupport = NOT_SUPPORTED;
1680                      }
1681                      break;
1682
1683                   case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1684                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1685                      if(encodedVal != RFAILED && encodedVal != 0)
1686                      {
1687                         cellParam->pdschNonSlotSupport = SUPPORTED;
1688                      }
1689                      else
1690                      {
1691                         cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1692                      }
1693                      break;
1694
1695                   case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1696                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1697                      if(encodedVal != RFAILED && encodedVal != 0)
1698                      {
1699                         cellParam->uciMuxUlschInPusch = SUPPORTED;
1700                      }
1701                      else
1702                      {
1703                         cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1704                      }
1705                      break;
1706
1707                   case FAPI_UCI_ONLY_PUSCH_TAG:
1708                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1709                      if(encodedVal != RFAILED && encodedVal != 0)
1710                      {
1711                         cellParam->uciOnlyPusch = SUPPORTED;
1712                      }
1713                      else
1714                      {
1715                         cellParam->uciOnlyPusch = NOT_SUPPORTED;
1716                      }
1717                      break;
1718
1719                   case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1720                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1721                      if(encodedVal != RFAILED && encodedVal != 0)
1722                      {
1723                         cellParam->puschFrequencyHopping = SUPPORTED;
1724                      }
1725                      else
1726                      {
1727                         cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1728                      }
1729                      break;
1730
1731                   case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1732                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1733                      if(encodedVal != RFAILED)
1734                      {
1735                         fillPuschDmrsConfig(encodedVal, &cellParam);
1736                      }
1737                      break;
1738
1739                   case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1740                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1741                      if(encodedVal != RFAILED)
1742                      {
1743                         fillPuschDmrsLength(encodedVal, &cellParam);
1744                      }
1745                      break;
1746
1747                   case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1748                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1749                      if(encodedVal != RFAILED)
1750                      {
1751                         fillPuschDmrsAddPos(encodedVal, &cellParam);
1752                      }
1753                      break;
1754
1755                   case FAPI_PUSCH_CBG_TAG:
1756                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1757                      if(encodedVal != RFAILED && encodedVal != 0)
1758                      {
1759                         cellParam->puschCbg = SUPPORTED;
1760                      }
1761                      else
1762                      {
1763                         cellParam->puschCbg = NOT_SUPPORTED;
1764                      }
1765                      break;
1766
1767                   case FAPI_PUSCH_MAPPING_TYPE_TAG:
1768                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1769                      if(encodedVal != RFAILED)
1770                      {
1771                         fillPuschMappingType(encodedVal, &cellParam);
1772                      }
1773                      break;
1774
1775                   case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1776                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1777                      if(encodedVal != RFAILED)
1778                      {
1779                         fillPuschAllocationType(encodedVal, &cellParam);
1780                      }
1781                      break;
1782
1783                   case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1784                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1785                      if(encodedVal != RFAILED)
1786                      {
1787                         fillPuschPrbMappingType(encodedVal, &cellParam);
1788                      }
1789                      break;
1790
1791                   case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1792                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1793                      if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1794                      {
1795                         cellParam->puschMaxPtrsPorts = encodedVal;
1796                      }
1797                      break;
1798
1799                   case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1800                      cellParam->maxPduschsTBsPerSlot = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1801                      break;
1802
1803                   case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1804                      cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1805                      break;
1806
1807                   case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1808                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1809                      if(encodedVal != RFAILED)
1810                      {
1811                         fillModulationOrderUl(encodedVal, &cellParam);
1812                      }
1813                      break;
1814
1815                   case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1816                      cellParam->maxMuMimoUsersUl = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1817                      break;
1818
1819                   case FAPI_DFTS_OFDM_SUPPORT_TAG:
1820                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1821                      if(encodedVal != RFAILED && encodedVal != 0)
1822                      {
1823                         cellParam->dftsOfdmSupport = SUPPORTED;
1824                      }
1825                      else
1826                      {
1827                         cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1828                      }
1829                      break;
1830
1831                   case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1832                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1833                      if(encodedVal != RFAILED)
1834                      {
1835                         fillPuschAggregationFactor(encodedVal, &cellParam);
1836                      }
1837                      break;
1838
1839                   case FAPI_PRACH_LONG_FORMATS_TAG:
1840                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1841                      if(encodedVal != RFAILED)
1842                      {
1843                         fillPrachLongFormat(encodedVal, &cellParam);
1844                      }
1845                      break;
1846
1847                   case FAPI_PRACH_SHORT_FORMATS_TAG:
1848                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1849                      if(encodedVal != RFAILED)
1850                      {
1851                         fillPrachShortFormat(encodedVal, &cellParam);
1852                      }
1853                      break;
1854
1855                   case FAPI_PRACH_RESTRICTED_SETS_TAG:
1856                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1857                      if(encodedVal != RFAILED && encodedVal != 0)
1858                      {
1859                         cellParam->prachRestrictedSets = SUPPORTED;
1860                      }
1861                      else
1862                      {
1863                         cellParam->prachRestrictedSets = NOT_SUPPORTED;
1864                      }
1865                      break;
1866
1867                   case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1868                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1869                      if(encodedVal != RFAILED)
1870                      {
1871                         fillFdOccasions(encodedVal, &cellParam);
1872                      }
1873                      break;
1874
1875                   case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1876                      encodedVal = getParamValue(&paramRsp->tlvs[index], FAPI_UINT_8);
1877                      if(encodedVal != RFAILED)
1878                      {
1879                         fillRssiMeas(encodedVal, &cellParam);
1880                      }
1881                      break;
1882                   default:
1883                      //DU_LOG("\nERROR  -->   Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1884                      break;
1885                }
1886             }
1887             MAC_FREE(cellParam, sizeof(ClCellParam));
1888             sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1889             return ROK;
1890          }
1891          else
1892          {
1893             DU_LOG("\nERROR  -->   LWR_MAC: Invalid error code %d", paramRsp->error_code);
1894             return RFAILED;
1895          }
1896       }
1897       else
1898       {
1899          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for cell param");
1900          return RFAILED;
1901       }
1902    }
1903    else
1904    {
1905       DU_LOG("\nERROR  -->  LWR_MAC:  Param Response received from PHY is NULL");
1906       return RFAILED;
1907    }
1908 #else
1909    return ROK;
1910 #endif
1911 }
1912
1913 #ifdef INTEL_TIMER_MODE
1914 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1915 {
1916    void * wlsHdlr = NULLP;
1917    fapi_msg_header_t *msgHeader;
1918    fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1919    p_fapi_api_queue_elem_t  headerElem;
1920    p_fapi_api_queue_elem_t  iqSampleElem;
1921    char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1922
1923    uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1924
1925    size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1926
1927    /* Fill IQ sample req */
1928    mtGetWlsHdl(&wlsHdlr);
1929    //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1930       (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1931    LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932    if(!iqSampleElem)
1933    {
1934       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for IQ sample req");
1935       return RFAILED;
1936    }
1937    FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1938       sizeof(fapi_vendor_ext_iq_samples_req_t));
1939
1940    iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1941    memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1942    fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1943       sizeof(fapi_vendor_ext_iq_samples_req_t));
1944
1945    iqSampleReq->iq_samples_info.carrNum = 0;
1946    iqSampleReq->iq_samples_info.numSubframes = 40;
1947    iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1948    iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1949    iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1950    iqSampleReq->iq_samples_info.startFrameNum = 0;
1951    iqSampleReq->iq_samples_info.startSlotNum = 0;
1952    iqSampleReq->iq_samples_info.startSymNum = 0;
1953    strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1954    memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1955
1956    /* TODO : Fill remaining parameters */
1957
1958    /* Fill message header */
1959    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1960    if(!headerElem)
1961    {
1962       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1963       return RFAILED;
1964    }
1965    FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1966      sizeof(fapi_msg_header_t));
1967    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1968    msgHeader->num_msg = 1;
1969    msgHeader->handle = 0;
1970
1971    DU_LOG("\nINFO   -->  LWR_MAC: Sending IQ Sample request to Phy");
1972    LwrMacSendToL1(headerElem);
1973    return ROK;
1974 }
1975 #endif
1976
1977 /*******************************************************************
1978  *
1979  * @brief Sends FAPI Config req to PHY
1980  *
1981  * @details
1982  *
1983  *    Function : lwr_mac_procConfigReqEvt
1984  *
1985  *    Functionality:
1986  *         -Sends FAPI Config Req to PHY
1987  *
1988  * @params[in]
1989  * @return ROK     - success
1990  *         RFAILED - failure
1991  *
1992  * ****************************************************************/
1993
1994 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1995 {
1996 #ifdef INTEL_FAPI
1997 #ifdef CALL_FLOW_DEBUG_LOG
1998    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
1999 #endif
2000 #ifdef NR_TDD
2001    uint8_t slotIdx = 0;
2002    uint8_t symbolIdx =0;
2003 #endif
2004    uint16_t index = 0;
2005    uint16_t *cellId =NULLP;
2006    uint16_t cellIdx =0;
2007    uint32_t msgLen = 0;
2008    uint32_t mib = 0;
2009    uint32_t dlFreq = 0, ulFreq = 0;
2010    MacCellCfg macCfgParams;
2011    fapi_vendor_msg_t *vendorMsg;
2012    fapi_config_req_t *configReq;
2013    fapi_msg_header_t *msgHeader;
2014    p_fapi_api_queue_elem_t  headerElem;
2015    p_fapi_api_queue_elem_t  vendorMsgQElem;
2016    p_fapi_api_queue_elem_t  cfgReqQElem;
2017
2018    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2019          lwrMacCb.phyState);
2020
2021    cellId = (uint16_t *)msg;
2022    GET_CELL_IDX(*cellId, cellIdx);
2023    macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2024
2025    /* Fill Cell Configuration in lwrMacCb */
2026    memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2027    lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2028    lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2029    lwrMacCb.numCell++;
2030
2031    /* Allocte And fill Vendor msg */
2032    LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2033    if(!vendorMsgQElem)
2034    {
2035       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2036       return RFAILED;
2037    }
2038    FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2039    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2040    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2041    vendorMsg->config_req_vendor.hopping_id = 0;
2042    vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2043    vendorMsg->config_req_vendor.group_hop_flag = 0;
2044    vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2045    vendorMsg->config_req_vendor.urllc_capable = 0;
2046    vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2047    vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2048    vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2049    vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2050    vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2051    vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2052    vendorMsg->start_req_vendor.sfn = 0;
2053    vendorMsg->start_req_vendor.slot = 0;
2054    vendorMsg->start_req_vendor.mode = 4;
2055 #ifdef DEBUG_MODE
2056    vendorMsg->start_req_vendor.count = 0;
2057    vendorMsg->start_req_vendor.period = 1;
2058 #endif
2059    /* Fill FAPI config req */
2060    LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2061    if(!cfgReqQElem)
2062    {
2063       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for config req");
2064       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2065       return RFAILED;
2066    }
2067    FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2068          sizeof(fapi_config_req_t));
2069
2070    configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2071    memset(configReq, 0, sizeof(fapi_config_req_t));
2072    fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2073 #ifndef NR_TDD
2074    configReq->number_of_tlvs = 25;
2075 #else
2076    configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2077 #endif
2078
2079    msgLen = sizeof(configReq->number_of_tlvs);
2080
2081    fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG,           \
2082          sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
2083    dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
2084    fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG,           \
2085          sizeof(uint32_t), dlFreq, &msgLen);
2086    /* Due to bug in Intel FT code, commenting TLVs that are are not
2087     * needed to avoid error. Must be uncommented when FT bug is fixed */
2088    //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG,                  \
2089    sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2090    //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG,            \
2091    sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2092    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG,             \
2093          sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2094    fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG,       \
2095          sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
2096    ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
2097    fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG,       \
2098          sizeof(uint32_t), ulFreq, &msgLen);
2099    //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG,                  \
2100    sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2101    //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG,           \
2102    sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2103    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG,             \
2104          sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2105    //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG,   \
2106    sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2107
2108    /* fill cell config */
2109    fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG,               \
2110          sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2111    fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG,         \
2112          sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2113
2114    /* fill SSB configuration */
2115    fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG,             \
2116          sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2117    //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG,               \
2118    sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2119    fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG,                \
2120          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2121
2122    /* fill PRACH configuration */
2123    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
2124    sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2125    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
2126          sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2127    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
2128          sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2129    fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2130          sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2131    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2132          sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2133    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2134          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2135    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG,        \
2136    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2137    fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG,                        \
2138          sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2139    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG ,     \
2140          sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2141    //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2142    sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2143    /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2144       {
2145       for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2146       fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG,   \
2147       sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2148       &msgLen);
2149       }
2150       else
2151       {
2152       macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2153       }*/
2154
2155    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG,              \
2156          sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2157    //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG,  \
2158    sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2159
2160    /* fill SSB table */
2161    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG,        \
2162          sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2163    //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG,                  \
2164    sizeof(uint8_t),  macCfgParams.ssbCfg.betaPss, &msgLen);
2165    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG,                \
2166          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2167    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG,     \
2168          sizeof(uint8_t),  macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2169
2170    setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2171    fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG ,                      \
2172          sizeof(uint32_t), mib, &msgLen);
2173
2174    fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG,                  \
2175          sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2176    fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG,                   \
2177          sizeof(uint8_t),  macCfgParams.ssbCfg.beamId[0], &msgLen);
2178    //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2179    sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2180    //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2181    sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2182
2183 #ifdef NR_TDD
2184    /* fill TDD table */
2185    fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG,                \
2186          sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2187
2188    for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2189    {
2190       for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2191       {
2192          /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2193          if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2194                (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2195          {
2196             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2197                   sizeof(uint8_t), DL_SYMBOL, &msgLen);
2198          }
2199
2200          /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2201          else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) ||  \
2202                (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2203                 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2204          {
2205             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2206                   sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2207          }
2208          /*Fill Partial UL symbols and Full-UL slot*/
2209          else
2210          {
2211             fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG,               \
2212                   sizeof(uint8_t), UL_SYMBOL, &msgLen);
2213          }
2214       }
2215    }
2216 #endif
2217
2218    /* fill measurement config */
2219    //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG,          \
2220    sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2221
2222    /* fill DMRS Type A Pos */
2223    fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG,           \
2224          sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2225
2226    /* Fill message header */
2227    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2228    if(!headerElem)
2229    {
2230       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2231       LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2232       LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2233       return RFAILED;
2234    }
2235    FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2236          sizeof(fapi_msg_header_t));
2237    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2238    msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2239    msgHeader->handle = 0;
2240
2241    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Config Request to Phy");
2242    LwrMacSendToL1(headerElem);
2243 #endif
2244
2245    return ROK;
2246 } /* lwr_mac_handleConfigReqEvt */
2247
2248 /*******************************************************************
2249  *
2250  * @brief Processes config response from phy
2251  *
2252  * @details
2253  *
2254  *    Function : lwr_mac_procConfigRspEvt
2255  *
2256  *    Functionality:
2257  *          Processes config response from phy
2258  *
2259  * @params[in] FAPI message pointer
2260  * @return ROK     - success
2261  *         RFAILED - failure
2262  *
2263  * ****************************************************************/
2264
2265 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2266 {
2267 #ifdef INTEL_FAPI
2268    fapi_config_resp_t *configRsp;
2269    configRsp = (fapi_config_resp_t *)msg;
2270
2271    DU_LOG("\nINFO  -->  LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2272          lwrMacCb.phyState);
2273
2274    if(configRsp != NULL)
2275    {
2276       if(configRsp->error_code == MSG_OK)
2277       {
2278          DU_LOG("\nDEBUG  -->  LWR_MAC: PHY has moved to Configured state \n");
2279          lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2280          lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2281          /* TODO :
2282           * Store config response into an intermediate struture and send to MAC
2283           * Support LC and LWLC for sending config rsp to MAC
2284           */
2285          fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2286       }
2287       else
2288       {
2289          DU_LOG("\nERROR  -->  LWR_MAC: Invalid error code %d", configRsp->error_code);
2290          return RFAILED;
2291       }
2292    }
2293    else
2294    {
2295       DU_LOG("\nERROR  -->  LWR_MAC: Config Response received from PHY is NULL");
2296       return RFAILED;
2297    }
2298 #endif
2299
2300    return ROK;
2301 } /* lwr_mac_procConfigRspEvt */
2302
2303 /*******************************************************************
2304  *
2305  * @brief Build and send start request to phy
2306  *
2307  * @details
2308  *
2309  *    Function : lwr_mac_procStartReqEvt
2310  *
2311  *    Functionality:
2312  *       Build and send start request to phy
2313  *
2314  * @params[in] FAPI message pointer
2315  * @return ROK     - success
2316  *         RFAILED - failure
2317  *
2318  * ****************************************************************/
2319 uint8_t lwr_mac_procStartReqEvt(void *msg)
2320 {
2321 #ifdef INTEL_FAPI
2322 #ifdef CALL_FLOW_DEBUG_LOG
2323    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2324 #endif
2325    fapi_msg_header_t *msgHeader;
2326    fapi_start_req_t *startReq;
2327    fapi_vendor_msg_t *vendorMsg;
2328    p_fapi_api_queue_elem_t  headerElem;
2329    p_fapi_api_queue_elem_t  startReqElem;
2330    p_fapi_api_queue_elem_t  vendorMsgElem;
2331
2332    /* Allocte And fill Vendor msg */
2333    LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2334    if(!vendorMsgElem)
2335    {
2336       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in start req");
2337       return RFAILED;
2338    }
2339    FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2340    vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2341    fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2342    vendorMsg->start_req_vendor.sfn = 0;
2343    vendorMsg->start_req_vendor.slot = 0;
2344    vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2345 #ifdef DEBUG_MODE
2346    vendorMsg->start_req_vendor.count = 0;
2347    vendorMsg->start_req_vendor.period = 1;
2348 #endif
2349
2350    /* Fill FAPI config req */
2351    LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2352    if(!startReqElem)
2353    {
2354       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for start req");
2355       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2356       return RFAILED;
2357    }
2358    FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2359       sizeof(fapi_start_req_t));
2360
2361    startReq = (fapi_start_req_t *)(startReqElem + 1);
2362    memset(startReq, 0, sizeof(fapi_start_req_t));
2363    fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2364
2365    /* Fill message header */
2366    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2367    if(!headerElem)
2368    {
2369       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
2370       LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2371       LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2372       return RFAILED;
2373    }
2374    FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2375       sizeof(fapi_msg_header_t));
2376    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2377    msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2378    msgHeader->handle = 0;
2379
2380    /* Send to PHY */
2381    DU_LOG("\nDEBUG  -->  LWR_MAC: Sending Start Request to Phy");
2382    LwrMacSendToL1(headerElem);
2383 #endif
2384    return ROK;
2385 } /* lwr_mac_procStartReqEvt */
2386
2387 /*******************************************************************
2388  *
2389  * @brief Sends FAPI Stop Req to PHY
2390  *
2391  * @details
2392  *
2393  *    Function : lwr_mac_procStopReqEvt
2394  *
2395  *    Functionality:
2396  *         -Sends FAPI Stop Req to PHY
2397  *
2398  * @params[in]
2399  * @return ROK     - success
2400  *         RFAILED - failure
2401  *
2402  ********************************************************************/
2403
2404 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t  prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2405 {
2406 #ifdef INTEL_FAPI
2407 #ifdef CALL_FLOW_DEBUG_LOG
2408    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2409 #endif
2410
2411    fapi_stop_req_t   *stopReq;
2412    p_fapi_api_queue_elem_t  stopReqElem;
2413
2414    vendorMsg->sfn = slotInfo.sfn;
2415    vendorMsg->slot = slotInfo.slot;
2416
2417    /* Fill FAPI stop req */
2418    LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2419    if(!stopReqElem)
2420    {
2421       DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for stop req");
2422       return RFAILED;
2423    }
2424    FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2425    stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2426    memset(stopReq, 0, sizeof(fapi_stop_req_t));
2427    fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2428
2429    /* Send to PHY */
2430    DU_LOG("\nINFO  -->  LWR_MAC: Sending Stop Request to Phy");
2431    prevElem->p_next = stopReqElem;
2432
2433 #endif
2434    return ROK;
2435 }
2436
2437 #ifdef INTEL_FAPI
2438 /*******************************************************************
2439  *
2440  * @brief fills SSB PDU required for DL TTI info in MAC
2441  *
2442  * @details
2443  *
2444  *    Function : fillSsbPdu
2445  *
2446  *    Functionality:
2447  *         -Fills the SSB PDU info
2448  *          stored in MAC
2449  *
2450  * @params[in] Pointer to FAPI DL TTI Req
2451  *             Pointer to RgCellCb
2452  *             Pointer to msgLen of DL TTI Info
2453  * @return ROK
2454  *
2455  ******************************************************************/
2456
2457 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2458       MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2459 {
2460    uint32_t mibPayload = 0;
2461    if(dlTtiReqPdu != NULL)
2462    {
2463       dlTtiReqPdu->pduType = SSB_PDU_TYPE;     /* SSB PDU */
2464       dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
2465       dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2466       dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2467       dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
2468       /* ssbOfPdufstA to be filled in ssbCfg */
2469       dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
2470       dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2471       /* Bit manipulation for SFN */
2472       setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2473       dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2474       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2475       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2476       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2477       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2478       dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2479          pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2480       dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t);  /* Size of SSB PDU */
2481       return ROK;
2482    }
2483    return RFAILED;
2484 }
2485
2486 /*******************************************************************
2487  *
2488  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2489  *
2490  * @details
2491  *
2492  *    Function : fillSib1DlDciPdu
2493  *
2494  *    Functionality:
2495  *         -Fills the Dl DCI PDU
2496  *
2497  * @params[in] Pointer to fapi_dl_dci_t
2498  *             Pointer to PdcchCfg
2499  * @return ROK
2500  *
2501  ******************************************************************/
2502
2503 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2504 {
2505    if(dlDciPtr != NULLP)
2506    {
2507       uint8_t numBytes=0;
2508       uint8_t bytePos=0;
2509       uint8_t bitPos=0;
2510
2511       uint16_t coreset0Size=0;
2512       uint16_t rbStart=0;
2513       uint16_t rbLen=0;
2514       uint32_t freqDomResAssign=0;
2515       uint32_t timeDomResAssign=0;
2516       uint8_t  VRB2PRBMap=0;
2517       uint32_t modNCodScheme=0;
2518       uint8_t  redundancyVer=0;
2519       uint32_t sysInfoInd=0;
2520       uint32_t reserved=0;
2521
2522       /* Size(in bits) of each field in DCI format 0_1
2523        * as mentioned in spec 38.214 */
2524       uint8_t freqDomResAssignSize = 0;
2525       uint8_t timeDomResAssignSize = 4;
2526       uint8_t VRB2PRBMapSize       = 1;
2527       uint8_t modNCodSchemeSize    = 5;
2528       uint8_t redundancyVerSize    = 2;
2529       uint8_t sysInfoIndSize       = 1;
2530       uint8_t reservedSize         = 15;
2531
2532       dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2533       dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2534       dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2535       dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2536       dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2537       dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2538       dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2539       dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2540       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2541       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2542       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2543       dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2544
2545       /* Calculating freq domain resource allocation field value and size
2546        * coreset0Size = Size of coreset 0
2547        * RBStart = Starting Virtual Rsource block
2548        * RBLen = length of contiguously allocted RBs
2549        * Spec 38.214 Sec 5.1.2.2.2
2550        */
2551       coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2552       rbStart = sib1PdcchInfo->dci.pdschCfg.pdschFreqAlloc.startPrb;
2553       rbLen = sib1PdcchInfo->dci.pdschCfg.pdschFreqAlloc.numPrb;
2554
2555       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2556       {
2557          if((rbLen - 1) <= floor(coreset0Size / 2))
2558             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2559          else
2560             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2561                                + (coreset0Size - 1 - rbStart);
2562
2563          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2564       }
2565
2566       /* Fetching DCI field values */
2567       timeDomResAssign = sib1PdcchInfo->dci.pdschCfg.pdschTimeAlloc.rowIndex -1;
2568       VRB2PRBMap       = sib1PdcchInfo->dci.pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2569       modNCodScheme    = sib1PdcchInfo->dci.pdschCfg.codeword[0].mcsIndex;
2570       redundancyVer    = sib1PdcchInfo->dci.pdschCfg.codeword[0].rvIndex;
2571       sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
2572       reserved         = 0;
2573
2574       /* Reversing bits in each DCI field */
2575       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2576       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2577       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2578       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2579       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
2580       sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
2581
2582       /* Calulating total number of bytes in buffer */
2583       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2584                                   + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2585                                   + sysInfoIndSize + reservedSize;
2586
2587       numBytes = dlDciPtr->payloadSizeBits / 8;
2588       if(dlDciPtr->payloadSizeBits % 8)
2589          numBytes += 1;
2590
2591       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2592       {
2593          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2594          return;
2595       }
2596
2597       /* Initialize buffer */
2598       for(bytePos = 0; bytePos < numBytes; bytePos++)
2599          dlDciPtr->payload[bytePos] = 0;
2600
2601       bytePos = numBytes - 1;
2602       bitPos = 0;
2603
2604       /* Packing DCI format fields */
2605       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2606             freqDomResAssign, freqDomResAssignSize);
2607       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2608             timeDomResAssign, timeDomResAssignSize);
2609       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2610             VRB2PRBMap, VRB2PRBMapSize);
2611       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2612             modNCodScheme, modNCodSchemeSize);
2613       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2614             redundancyVer, redundancyVerSize);
2615       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2616             sysInfoInd, sysInfoIndSize);
2617       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2618             reserved, reservedSize);
2619
2620    }
2621 } /* fillSib1DlDciPdu */
2622
2623
2624 /*******************************************************************
2625  *
2626  * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2627  *
2628  * @details
2629  *
2630  *    Function : fillPageDlDciPdu
2631  *
2632  *    Functionality:
2633  *         -Fills the Dl DCI PDU for Paging
2634  *
2635  * @params[in] Pointer to fapi_dl_dci_t
2636  *             Pointer to dlPageAlloc
2637  * @return ROK
2638  *
2639  ******************************************************************/
2640
2641 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCellCfg *macCellCfg)
2642 {
2643    if(dlDciPtr != NULLP)
2644    {
2645       uint8_t numBytes=0;
2646       uint8_t bytePos=0;
2647       uint8_t bitPos=0;
2648
2649       uint16_t coreset0Size     = 0;
2650       uint16_t rbStart          = 0;
2651       uint16_t rbLen            = 0;
2652       uint8_t  shortMsgInd      = 0;
2653       uint8_t  shortMsg         = 0;
2654       uint32_t freqDomResAssign = 0;
2655       uint32_t timeDomResAssign = 0;
2656       uint8_t  VRB2PRBMap       = 0;
2657       uint32_t modNCodScheme    = 0;
2658       uint8_t  tbScaling        = 0;
2659       uint32_t reserved         = 0;
2660
2661       /* Size(in bits) of each field in DCI format 1_0
2662        * as mentioned in spec 38.214 */
2663       uint8_t shortMsgIndSize      = 2;
2664       uint8_t shortMsgSize         = 8;
2665       uint8_t freqDomResAssignSize = 0;
2666       uint8_t timeDomResAssignSize = 4;
2667       uint8_t VRB2PRBMapSize       = 1;
2668       uint8_t modNCodSchemeSize    = 5;
2669       uint8_t tbScalingSize        = 2;
2670       uint8_t reservedSize         = 6;
2671
2672       dlDciPtr->rnti = P_RNTI;
2673       dlDciPtr->scramblingId = macCellCfg->cellCfg.phyCellId;
2674       dlDciPtr->scramblingRnti = 0;
2675       dlDciPtr->cceIndex = dlPageAlloc->pageDlDci.cceIndex;
2676       dlDciPtr->aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
2677       dlDciPtr->pc_and_bform.numPrgs = 1;
2678       dlDciPtr->pc_and_bform.prgSize = 1;
2679       dlDciPtr->pc_and_bform.digBfInterfaces = 0;
2680       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = 0;
2681       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
2682       dlDciPtr->beta_pdcch_1_0 = 0;
2683       dlDciPtr->powerControlOffsetSS = 0;
2684
2685       /* Calculating freq domain resource allocation field value and size
2686        * coreset0Size = Size of coreset 0
2687        * RBStart = Starting Virtual Rsource block
2688        * RBLen = length of contiguously allocted RBs
2689        * Spec 38.214 Sec 5.1.2.2.2
2690        */
2691       coreset0Size = dlPageAlloc->pageDlDci.coreSetSize;
2692       rbStart = dlPageAlloc->pageDlSch.freqAlloc.startPrb;
2693       rbLen = dlPageAlloc->pageDlSch.freqAlloc.numPrb;
2694
2695       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2696       {
2697          if((rbLen - 1) <= floor(coreset0Size / 2))
2698             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2699          else
2700             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2701                                + (coreset0Size - 1 - rbStart);
2702
2703          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2704       }
2705
2706       /*Fetching DCI field values */
2707
2708       /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2709       if(dlPageAlloc->shortMsgInd != TRUE)
2710       {
2711          /*When Short Msg is absent*/
2712          shortMsgInd = 1;
2713          shortMsg    = 0;
2714       }
2715       else
2716       {
2717          /*Short Msg is Present*/
2718          if(dlPageAlloc->pageDlSch.dlPagePduLen == 0 || dlPageAlloc->pageDlSch.dlPagePdu == NULLP)
2719          {
2720             /*When Paging Msg is absent*/
2721             shortMsgInd = 2;
2722          }
2723          else
2724          {
2725             /*Both Short and Paging is present*/
2726             shortMsgInd = 3;
2727          }
2728          shortMsg = dlPageAlloc->shortMsg;
2729       }
2730
2731       timeDomResAssign = 0;
2732       VRB2PRBMap       = dlPageAlloc->pageDlSch.vrbPrbMapping;
2733       modNCodScheme    = dlPageAlloc->pageDlSch.tbInfo.mcs;
2734       tbScaling        = 0;
2735       reserved         = 0;
2736
2737       /* Reversing bits in each DCI field */
2738       shortMsgInd      = reverseBits(shortMsgInd, shortMsgIndSize);
2739       shortMsg         = reverseBits(shortMsg, shortMsgSize);
2740       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2741       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2742       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2743       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2744       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2745       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2746
2747       /* Calulating total number of bytes in buffer */
2748       dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2749                                   + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2750                                   + tbScaling + reservedSize;
2751
2752       numBytes = dlDciPtr->payloadSizeBits / 8;
2753       if(dlDciPtr->payloadSizeBits % 8)
2754       {
2755          numBytes += 1;
2756       }
2757
2758       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2759       {
2760          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2761          return;
2762       }
2763
2764       /* Initialize buffer */
2765       for(bytePos = 0; bytePos < numBytes; bytePos++)
2766       {
2767          dlDciPtr->payload[bytePos] = 0;
2768       }
2769
2770       bytePos = numBytes - 1;
2771       bitPos = 0;
2772
2773       /* Packing DCI format fields */
2774       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2775             shortMsgInd, shortMsgIndSize);
2776       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2777             shortMsg, shortMsgSize);
2778       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2779             freqDomResAssign, freqDomResAssignSize);
2780       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2781             timeDomResAssign, timeDomResAssignSize);
2782       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2783             VRB2PRBMap, VRB2PRBMapSize);
2784       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2785             modNCodScheme, modNCodSchemeSize);
2786       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2787             tbScaling, tbScalingSize);
2788       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2789             reserved, reservedSize);
2790    }
2791 } /* fillPageDlDciPdu */
2792
2793 /*******************************************************************
2794  *
2795  * @brief fills Dl DCI PDU required for DL TTI info in MAC
2796  *
2797  * @details
2798  *
2799  *    Function : fillRarDlDciPdu
2800  *
2801  *    Functionality:
2802  *         -Fills the Dl DCI PDU
2803  *
2804  * @params[in] Pointer to fapi_dl_dci_t
2805  *             Pointer to PdcchCfg
2806  * @return ROK
2807  *
2808  ******************************************************************/
2809
2810 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2811 {
2812    if(dlDciPtr != NULLP)
2813    {
2814       uint8_t numBytes =0;
2815       uint8_t bytePos =0;
2816       uint8_t bitPos =0;
2817
2818       uint16_t coreset0Size =0;
2819       uint16_t rbStart =0;
2820       uint16_t rbLen =0;
2821       uint32_t freqDomResAssign =0;
2822       uint8_t timeDomResAssign =0;
2823       uint8_t  VRB2PRBMap =0;
2824       uint8_t modNCodScheme =0;
2825       uint8_t tbScaling =0;
2826       uint32_t reserved =0;
2827
2828       /* Size(in bits) of each field in DCI format 1_0 */
2829       uint8_t freqDomResAssignSize = 0;
2830       uint8_t timeDomResAssignSize = 4;
2831       uint8_t VRB2PRBMapSize       = 1;
2832       uint8_t modNCodSchemeSize    = 5;
2833       uint8_t tbScalingSize        = 2;
2834       uint8_t reservedSize         = 16;
2835
2836       dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2837       dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2838       dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2839       dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2840       dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2841       dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2842       dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2843       dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2844       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2845       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2846       dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2847       dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2848
2849       /* Calculating freq domain resource allocation field value and size
2850        * coreset0Size = Size of coreset 0
2851        * RBStart = Starting Virtual Rsource block
2852        * RBLen = length of contiguously allocted RBs
2853        * Spec 38.214 Sec 5.1.2.2.2
2854        */
2855
2856       /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2857       coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2858       rbStart = rarPdcchInfo->dci.pdschCfg.pdschFreqAlloc.startPrb;
2859       rbLen = rarPdcchInfo->dci.pdschCfg.pdschFreqAlloc.numPrb;
2860
2861       if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2862       {
2863          if((rbLen - 1) <= floor(coreset0Size / 2))
2864             freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2865          else
2866             freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2867                                + (coreset0Size - 1 - rbStart);
2868
2869          freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2870       }
2871
2872       /* Fetching DCI field values */
2873       timeDomResAssign = rarPdcchInfo->dci.pdschCfg.pdschTimeAlloc.rowIndex;
2874       VRB2PRBMap       = rarPdcchInfo->dci.pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2875       modNCodScheme    = rarPdcchInfo->dci.pdschCfg.codeword[0].mcsIndex;
2876       tbScaling        = 0; /* configured to 0 scaling */
2877       reserved         = 0;
2878
2879       /* Reversing bits in each DCI field */
2880       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2881       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2882       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2883       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
2884       tbScaling        = reverseBits(tbScaling, tbScalingSize);
2885
2886       /* Calulating total number of bytes in buffer */
2887       dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2888                                   + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2889
2890       numBytes = dlDciPtr->payloadSizeBits / 8;
2891       if(dlDciPtr->payloadSizeBits % 8)
2892          numBytes += 1;
2893
2894       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2895       {
2896          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
2897          return;
2898       }
2899
2900       /* Initialize buffer */
2901       for(bytePos = 0; bytePos < numBytes; bytePos++)
2902          dlDciPtr->payload[bytePos] = 0;
2903
2904       bytePos = numBytes - 1;
2905       bitPos = 0;
2906
2907       /* Packing DCI format fields */
2908       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2909             freqDomResAssign, freqDomResAssignSize);
2910       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2911             timeDomResAssign, timeDomResAssignSize);
2912       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2913             VRB2PRBMap, VRB2PRBMapSize);
2914       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2915             modNCodScheme, modNCodSchemeSize);
2916       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2917             tbScaling, tbScalingSize);
2918       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2919             reserved, reservedSize);
2920    }
2921 } /* fillRarDlDciPdu */
2922
2923 /*******************************************************************
2924  *
2925  * @brief fills DL DCI PDU required for DL TTI info in MAC
2926  *
2927  * @details
2928  *
2929  *    Function : fillDlMsgDlDciPdu
2930  *
2931  *    Functionality:
2932  *         -Fills the Dl DCI PDU
2933  *
2934  * @params[in] Pointer to fapi_dl_dci_t
2935  *             Pointer to PdcchCfg
2936  * @return ROK
2937  *
2938  ******************************************************************/
2939 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2940       DlMsgSchInfo *dlMsgSchInfo)
2941 {
2942    if(dlDciPtr != NULLP)
2943    {
2944       uint8_t numBytes;
2945       uint8_t bytePos;
2946       uint8_t bitPos;
2947
2948       uint16_t coresetSize = 0;
2949       uint16_t rbStart = 0;
2950       uint16_t rbLen = 0;
2951       uint8_t  dciFormatId;
2952       uint32_t freqDomResAssign;
2953       uint8_t  timeDomResAssign;
2954       uint8_t  VRB2PRBMap;
2955       uint8_t  modNCodScheme;
2956       uint8_t  ndi = 0;
2957       uint8_t  redundancyVer = 0;
2958       uint8_t  harqProcessNum = 0;
2959       uint8_t  dlAssignmentIdx = 0;
2960       uint8_t  pucchTpc = 0;
2961       uint8_t  pucchResoInd = 0;
2962       uint8_t  harqFeedbackInd = 0;
2963
2964       /* Size(in bits) of each field in DCI format 1_0 */
2965       uint8_t dciFormatIdSize    = 1;
2966       uint8_t freqDomResAssignSize = 0;
2967       uint8_t timeDomResAssignSize = 4;
2968       uint8_t VRB2PRBMapSize       = 1;
2969       uint8_t modNCodSchemeSize    = 5;
2970       uint8_t ndiSize              = 1;
2971       uint8_t redundancyVerSize    = 2;
2972       uint8_t harqProcessNumSize   = 4;
2973       uint8_t dlAssignmentIdxSize  = 2;
2974       uint8_t pucchTpcSize         = 2;
2975       uint8_t pucchResoIndSize     = 3;
2976       uint8_t harqFeedbackIndSize  = 3;
2977
2978       dlDciPtr->rnti = pdcchInfo->dci.rnti;
2979       dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2980       dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2981       dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2982       dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2983       dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2984       dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2985       dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2986       dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2987       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2988       dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
2989       dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2990
2991       /* Calculating freq domain resource allocation field value and size
2992        * coreset0Size = Size of coreset 0
2993        * RBStart = Starting Virtual Rsource block
2994        * RBLen = length of contiguously allocted RBs
2995        * Spec 38.214 Sec 5.1.2.2.2
2996        */
2997       coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2998       rbStart = pdcchInfo->dci.pdschCfg.pdschFreqAlloc.startPrb;
2999       rbLen = pdcchInfo->dci.pdschCfg.pdschFreqAlloc.numPrb;
3000
3001       if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
3002       {
3003          if((rbLen - 1) <= floor(coresetSize / 2))
3004             freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3005          else
3006             freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3007                                + (coresetSize - 1 - rbStart);
3008
3009          freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3010       }
3011
3012       /* Fetching DCI field values */
3013       dciFormatId      = dlMsgSchInfo->dciFormatId;     /* Always set to 1 for DL */
3014       timeDomResAssign = pdcchInfo->dci.pdschCfg.pdschTimeAlloc.rowIndex -1;
3015       VRB2PRBMap       = pdcchInfo->dci.pdschCfg.pdschFreqAlloc.vrbPrbMapping;
3016       modNCodScheme    = pdcchInfo->dci.pdschCfg.codeword[0].mcsIndex;
3017       ndi              = dlMsgSchInfo->transportBlock[0].ndi;
3018       redundancyVer    = pdcchInfo->dci.pdschCfg.codeword[0].rvIndex;
3019       harqProcessNum   = dlMsgSchInfo->harqProcNum;
3020       dlAssignmentIdx  = dlMsgSchInfo->dlAssignIdx;
3021       pucchTpc         = dlMsgSchInfo->pucchTpc;
3022       pucchResoInd     = dlMsgSchInfo->pucchResInd;
3023       harqFeedbackInd  = dlMsgSchInfo->harqFeedbackInd;
3024
3025       /* Reversing bits in each DCI field */
3026       dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
3027       freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3028       timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3029       VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3030       modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
3031       ndi              = reverseBits(ndi, ndiSize);
3032       redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
3033       harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
3034       dlAssignmentIdx  = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3035       pucchTpc         = reverseBits(pucchTpc, pucchTpcSize);
3036       pucchResoInd     = reverseBits(pucchResoInd, pucchResoIndSize);
3037       harqFeedbackInd  = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3038
3039
3040       /* Calulating total number of bytes in buffer */
3041       dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3042             + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3043             + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3044             + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3045
3046       numBytes = dlDciPtr->payloadSizeBits / 8;
3047       if(dlDciPtr->payloadSizeBits % 8)
3048          numBytes += 1;
3049
3050       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3051       {
3052          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
3053          return;
3054       }
3055
3056       /* Initialize buffer */
3057       for(bytePos = 0; bytePos < numBytes; bytePos++)
3058          dlDciPtr->payload[bytePos] = 0;
3059
3060       bytePos = numBytes - 1;
3061       bitPos = 0;
3062
3063       /* Packing DCI format fields */
3064       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3065             dciFormatId, dciFormatIdSize);
3066       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3067             freqDomResAssign, freqDomResAssignSize);
3068       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3069             timeDomResAssign, timeDomResAssignSize);
3070       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3071             VRB2PRBMap, VRB2PRBMapSize);
3072       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3073             modNCodScheme, modNCodSchemeSize);
3074       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3075             ndi, ndiSize);
3076       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3077             redundancyVer, redundancyVerSize);
3078       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3079             redundancyVer, redundancyVerSize);
3080       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3081             harqProcessNum, harqProcessNumSize);
3082       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3083             dlAssignmentIdx, dlAssignmentIdxSize);
3084       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3085             pucchTpc, pucchTpcSize);
3086       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3087             pucchResoInd, pucchResoIndSize);
3088       fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3089             harqFeedbackInd, harqFeedbackIndSize);
3090    }
3091 }
3092
3093 /*******************************************************************
3094  *
3095  * @brief fills Dl PDCCH Info from DL PageAlloc
3096  *
3097  * @details
3098  *
3099  *    Function : fillPdcchInfoFrmPageAlloc
3100  *
3101  *    Functionality:
3102  *         -Fills the PdcchInfo
3103  *
3104  * @params[in] Pointer to DlPageAlloc
3105  *             Pointer to PdcchCfg
3106  * @return ROK
3107  *
3108  ******************************************************************/
3109 void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc, MacCellCfg *macCellCfg)
3110 {
3111    if(dlTtiReqPdu != NULLP)
3112    {
3113       BwpCfg *bwp = NULLP;
3114
3115       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3116       bwp = &pageAlloc->bwp;
3117       fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg);
3118
3119       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3120
3121       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize           = bwp->freqAlloc.numPrb;
3122       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart          = bwp->freqAlloc.startPrb;
3123       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3124       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix      = bwp->cyclicPrefix;
3125
3126       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex    = pageAlloc->pageDlDci.ssStartSymbolIndex;
3127       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols     = pageAlloc->pageDlDci.durationSymbols;
3128       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pageAlloc->pageDlDci.freqDomainResource, 6*sizeof(uint8_t));
3129       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType   = pageAlloc->pageDlDci.cceRegMappingType;
3130       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize       = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
3131       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize     = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
3132       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex          = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
3133       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity;
3134       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci            = 1;
3135       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType         = CORESET_TYPE0;
3136
3137       /* Calculating PDU length. Considering only one dl dci pdu for now */
3138       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3139
3140       /* Filling Vendor message PDU */
3141       dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3142       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3143       dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3144       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3145       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3146    }
3147 }
3148
3149 /*******************************************************************
3150  *
3151  * @brief fills PDCCH PDU required for DL TTI info in MAC
3152  *
3153  * @details
3154  *
3155  *    Function : fillPdcchPdu
3156  *
3157  *    Functionality:
3158  *         -Fills the Pdcch PDU info
3159  *          stored in MAC
3160  *
3161  * @params[in] Pointer to FAPI DL TTI Req
3162  *             Pointer to PdcchCfg
3163  * @return ROK
3164  *
3165  ******************************************************************/
3166 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3167       RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3168 {
3169    if(dlTtiReqPdu != NULLP)
3170    {
3171       PdcchCfg *pdcchInfo = NULLP;
3172       BwpCfg *bwp = NULLP;
3173
3174       memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3175       if(rntiType == SI_RNTI_TYPE)
3176       {
3177          pdcchInfo = dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3178          bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3179          fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3180       }
3181       else if(rntiType == RA_RNTI_TYPE)
3182       {
3183          pdcchInfo = dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3184          bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3185          fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3186       }
3187       else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3188       {
3189          pdcchInfo = dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg;
3190          bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp;
3191          fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3192                dlSlot->dlInfo.dlMsgAlloc[ueIdx]);
3193       }
3194       else
3195       {
3196          DU_LOG("\nERROR  -->  LWR_MAC: Failed filling PDCCH Pdu");
3197          return RFAILED;
3198       }
3199
3200       dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3201       dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3202       dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3203       dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3204       dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3205
3206       dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3207       dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3208       memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
3209       dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3210       dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3211       dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3212       dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex =  pdcchInfo->coresetCfg.shiftIndex;
3213       dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3214       dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3215       dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3216
3217       /* Calculating PDU length. Considering only one dl dci pdu for now */
3218       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3219
3220       /* Filling Vendor message PDU */
3221       dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3222       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3223       dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3224       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3225       dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3226    }
3227
3228    return ROK;
3229 }
3230
3231 /*******************************************************************
3232  *
3233  * @brief fills PDSCH PDU from PageAlloc required for DL TTI info in MAC
3234  *
3235  * @details
3236  *
3237  *    Function : fillPagePdschPdu
3238  *
3239  *    Functionality:
3240  *         -Fills the Pdsch PDU info
3241  *          stored in MAC
3242  *
3243  * @params[in] Pointer to FAPI DL TTI Req
3244  *             Pointer to PdschCfg
3245  *             Pointer to msgLen of DL TTI Info
3246  * @return ROK
3247  *
3248  ******************************************************************/
3249 void fillPagePdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc,
3250                        uint16_t pduIndex, MacCellCfg *macCellCfg)
3251 {
3252    uint8_t idx;
3253
3254    if(dlTtiReqPdu != NULLP)
3255    {
3256       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3257       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3258       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */
3259       dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI;
3260       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3261       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb;
3262       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb;
3263       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing;
3264       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix;
3265       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1;
3266       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3267       {
3268          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
3269          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2;
3270          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs;
3271          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0;
3272          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0;
3273          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize;
3274       }
3275       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
3276       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1;
3277       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0;
3278       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0;
3279       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
3280       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType;
3281       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
3282       dlTtiReqPdu->pdu.pdsch_pdu.scid = 0;
3283       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1;
3284       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
3285       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1;
3286       /* since we are using type-1, hence rbBitmap excluded */
3287       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
3288       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
3289       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping;
3290       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb;
3291       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb;
3292       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
3293       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
3294       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
3295       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
3296       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
3297       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0;
3298       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0;
3299       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pageAlloc->pageDlSch.timeAlloc.mappingType;
3300       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols;
3301       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos;
3302
3303       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3304
3305       /* DL TTI Request vendor message */
3306       dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3307       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3308       dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3309       for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3310       {
3311               dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3312       }
3313    }
3314 }
3315
3316 /*******************************************************************
3317  *
3318  * @brief fills PDSCH PDU required for DL TTI info in MAC
3319  *
3320  * @details
3321  *
3322  *    Function : fillPdschPdu
3323  *
3324  *    Functionality:
3325  *         -Fills the Pdsch PDU info
3326  *          stored in MAC
3327  *
3328  * @params[in] Pointer to FAPI DL TTI Req
3329  *             Pointer to PdschCfg
3330  *             Pointer to msgLen of DL TTI Info
3331  * @return ROK
3332  *
3333  ******************************************************************/
3334
3335 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3336       BwpCfg bwp, uint16_t pduIndex)
3337 {
3338    uint8_t idx;
3339
3340    if(dlTtiReqPdu != NULLP)
3341    {
3342       dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3343       memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3344       dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3345       dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3346       dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3347       dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3348       dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3349       dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3350       dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3351       dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3352       for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3353       {
3354          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3355          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3356          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3357          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3358          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3359          dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3360       }
3361       dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3362       dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3363       dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3364       dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3365       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3366       dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3367       dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3368       dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3369       dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3370       dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3371       dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3372       /* since we are using type-1, hence rbBitmap excluded */
3373       dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
3374       dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
3375       dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3376       dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
3377       dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
3378       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3379       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3380       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3381       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3382          pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3383       dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3384          beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3385       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3386       dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3387       dlTtiReqPdu->pdu.pdsch_pdu.mappingType =   pdschInfo->dmrs.mappingType;
3388       dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3389       dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3390
3391       dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3392
3393       /* DL TTI Request vendor message */
3394       dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3395       dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3396       dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3397       for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3398       {
3399               dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3400       }
3401    }
3402 }
3403
3404 /***********************************************************************
3405  *
3406  * @brief calculates the total size to be allocated for DL TTI Req
3407  *
3408  * @details
3409  *
3410  *    Function : calcDlTtiReqPduCount
3411  *
3412  *    Functionality:
3413  *         -calculates the total pdu count to be allocated for DL TTI Req
3414  *
3415  * @params[in]   MacDlSlot *dlSlot
3416  * @return count
3417  *
3418  * ********************************************************************/
3419 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3420 {
3421    uint8_t count = 0;
3422    uint8_t idx = 0, ueIdx=0;
3423
3424    if(dlSlot->dlInfo.isBroadcastPres)
3425    {
3426       if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3427       {
3428          for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3429          {
3430             /* SSB PDU is filled */
3431             count++;
3432          }
3433       }
3434       if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3435       {
3436          /* PDCCH and PDSCH PDU is filled */
3437          count += 2;
3438       }
3439    }
3440
3441    if(dlSlot->pageAllocInfo)
3442    {
3443       /* PDCCH and PDSCH PDU is filled */
3444       count += 2;
3445    }
3446
3447    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3448    {
3449       if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3450       {
3451          /* PDCCH and PDSCH PDU is filled */
3452          if(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg && dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3453             count += 2;
3454          else
3455             count += 1;
3456       }
3457
3458       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3459       {
3460          /* PDCCH and PDSCH PDU is filled */
3461          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)
3462             count += 1;
3463          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3464             count += 1;
3465       }
3466    }
3467    return count;
3468 }
3469
3470 /***********************************************************************
3471  *
3472  * @brief calculates the total size to be allocated for DL TTI Req
3473  *
3474  * @details
3475  *
3476  *    Function : calcTxDataReqPduCount
3477  *
3478  *    Functionality:
3479  *         -calculates the total pdu count to be allocated for DL TTI Req
3480  *
3481  * @params[in]    DlBrdcstAlloc *cellBroadcastInfo
3482  * @return count
3483  *
3484  * ********************************************************************/
3485 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3486 {
3487    uint8_t count = 0, ueIdx=0;
3488
3489    if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3490    {
3491       count++;
3492    }
3493    if(dlSlot->pageAllocInfo)
3494    {
3495       count++;
3496    }
3497
3498    for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3499    {
3500       if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) &&  (dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
3501          count++;
3502
3503       if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3504       {
3505          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3506             count++;
3507       }
3508    }
3509    return count;
3510 }
3511
3512 /***********************************************************************
3513  *
3514  * @brief fills the SIB1 TX-DATA request message
3515  *
3516  * @details
3517  *
3518  *    Function : fillSib1TxDataReq
3519  *
3520  *    Functionality:
3521  *         - fills the SIB1 TX-DATA request message
3522  *
3523  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3524  * @params[in]    macCellCfg consist of SIB1 pdu
3525  * @params[in]    uint32_t *msgLen
3526  * @params[in]    uint16_t pduIndex
3527  * @return ROK
3528  *
3529  * ********************************************************************/
3530 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3531       PdschCfg *pdschCfg)
3532 {
3533    uint32_t payloadSize = 0;
3534    uint8_t *sib1Payload = NULLP;
3535    fapi_api_queue_elem_t *payloadElem = NULLP;
3536 #ifdef INTEL_WLS_MEM
3537    void * wlsHdlr = NULLP;
3538 #endif
3539
3540    pduDesc[pduIndex].pdu_index = pduIndex;
3541    pduDesc[pduIndex].num_tlvs = 1;
3542
3543    /* fill the TLV */
3544    payloadSize = pdschCfg->codeword[0].tbSize;
3545    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3546    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3547    LWR_MAC_ALLOC(sib1Payload, payloadSize);
3548    if(sib1Payload == NULLP)
3549    {
3550       return RFAILED;
3551    }
3552    payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3553    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3554       macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3555    memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3556
3557 #ifdef INTEL_WLS_MEM
3558    mtGetWlsHdl(&wlsHdlr);
3559    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3560 #else
3561    pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3562 #endif
3563    pduDesc[pduIndex].pdu_length = payloadSize;
3564
3565 #ifdef INTEL_WLS_MEM
3566    addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3567 #else
3568    LWR_MAC_FREE(sib1Payload, payloadSize);
3569 #endif
3570
3571    return ROK;
3572 }
3573
3574 /***********************************************************************
3575  *
3576  * @brief fills the PAGE TX-DATA request message
3577  *
3578  * @details
3579  *
3580  *    Function : fillPageTxDataReq
3581  *
3582  *    Functionality:
3583  *         - fills the Page TX-DATA request message
3584  *
3585  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3586  * @params[in]    macCellCfg consist of SIB1 pdu
3587  * @params[in]    uint32_t *msgLen
3588  * @params[in]    uint16_t pduIndex
3589  * @return ROK
3590  *
3591  * ********************************************************************/
3592 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo)
3593 {
3594    uint32_t payloadSize = 0;
3595    uint8_t *pagePayload = NULLP;
3596    fapi_api_queue_elem_t *payloadElem = NULLP;
3597 #ifdef INTEL_WLS_MEM
3598    void * wlsHdlr = NULLP;
3599 #endif
3600
3601    pduDesc[pduIndex].pdu_index = pduIndex;
3602    pduDesc[pduIndex].num_tlvs = 1;
3603
3604    /* fill the TLV */
3605    payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
3606    pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3607    pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3608    LWR_MAC_ALLOC(pagePayload, payloadSize);
3609    if(pagePayload == NULLP)
3610    {
3611       return RFAILED;
3612    }
3613    payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3614    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3615          pageAllocInfo->pageDlSch.dlPagePduLen);
3616    memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen);
3617
3618 #ifdef INTEL_WLS_MEM
3619    mtGetWlsHdl(&wlsHdlr);
3620    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3621 #else
3622    pduDesc[pduIndex].tlvs[0].value = pagePayload;
3623 #endif
3624    pduDesc[pduIndex].pdu_length = payloadSize;
3625
3626 #ifdef INTEL_WLS_MEM
3627    addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3628 #else
3629    LWR_MAC_FREE(pagePayload, payloadSize);
3630 #endif
3631
3632    return ROK;
3633 }
3634
3635 /***********************************************************************
3636  *
3637  * @brief fills the RAR TX-DATA request message
3638  *
3639  * @details
3640  *
3641  *    Function : fillRarTxDataReq
3642  *
3643  *    Functionality:
3644  *         - fills the RAR TX-DATA request message
3645  *
3646  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3647  * @params[in]    RarInfo *rarInfo
3648  * @params[in]    uint32_t *msgLen
3649  * @params[in]    uint16_t pduIndex
3650  * @return ROK
3651  *
3652  * ********************************************************************/
3653 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
3654 {
3655    uint16_t payloadSize;
3656    uint8_t  *rarPayload = NULLP;
3657    fapi_api_queue_elem_t *payloadElem = NULLP;
3658 #ifdef INTEL_WLS_MEM
3659    void * wlsHdlr = NULLP;
3660 #endif
3661
3662    pduDesc[pduIndex].pdu_index = pduIndex;
3663    pduDesc[pduIndex].num_tlvs = 1;
3664
3665    /* fill the TLV */
3666    payloadSize = pdschCfg->codeword[0].tbSize;
3667    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3668    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3669    LWR_MAC_ALLOC(rarPayload, payloadSize);
3670    if(rarPayload == NULLP)
3671    {
3672       return RFAILED;
3673    }
3674    payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3675    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3676    memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3677
3678 #ifdef INTEL_WLS_MEM
3679    mtGetWlsHdl(&wlsHdlr);
3680    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3681 #else
3682    pduDesc[pduIndex].tlvs[0].value = rarPayload;
3683 #endif
3684    pduDesc[pduIndex].pdu_length = payloadSize;
3685
3686 #ifdef INTEL_WLS_MEM
3687    addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3688 #else
3689    LWR_MAC_FREE(rarPayload, payloadSize);
3690 #endif
3691    return ROK;
3692 }
3693
3694 /***********************************************************************
3695  *
3696  * @brief fills the DL dedicated Msg TX-DATA request message
3697  *
3698  * @details
3699  *
3700  *    Function : fillDlMsgTxDataReq
3701  *
3702  *    Functionality:
3703  *         - fills the Dl Dedicated Msg TX-DATA request message
3704  *
3705  * @params[in]    fapi_tx_pdu_desc_t *pduDesc
3706  * @params[in]    DlMsgInfo *dlMsgInfo
3707  * @params[in]    uint32_t *msgLen
3708  * @params[in]    uint16_t pduIndex
3709  * @return ROK
3710  *
3711  * ********************************************************************/
3712 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
3713 {
3714    uint16_t payloadSize;
3715    uint8_t  *dlMsgPayload = NULLP;
3716    fapi_api_queue_elem_t *payloadElem = NULLP;
3717 #ifdef INTEL_WLS_MEM
3718    void * wlsHdlr = NULLP;
3719 #endif
3720
3721    pduDesc[pduIndex].pdu_index = pduIndex;
3722    pduDesc[pduIndex].num_tlvs = 1;
3723
3724    /* fill the TLV */
3725    payloadSize = pdschCfg->codeword[0].tbSize;
3726    pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3727    pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3728    LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3729    if(dlMsgPayload == NULLP)
3730    {
3731       return RFAILED;
3732    }
3733    payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3734    FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
3735    memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
3736
3737 #ifdef INTEL_WLS_MEM
3738    mtGetWlsHdl(&wlsHdlr);
3739    pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3740 #else
3741    pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3742 #endif
3743    pduDesc[pduIndex].pdu_length = payloadSize;
3744
3745 #ifdef INTEL_WLS_MEM
3746    addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3747 #else
3748    LWR_MAC_FREE(dlMsgPayload, payloadSize);
3749 #endif
3750    return ROK;
3751 }
3752
3753 #endif /* FAPI */
3754
3755 /*******************************************************************
3756  *
3757  * @brief Sends DL TTI Request to PHY
3758  *
3759  * @details
3760  *
3761  *    Function : fillDlTtiReq
3762  *
3763  *    Functionality:
3764  *         -Sends FAPI DL TTI req to PHY
3765  *
3766  * @params[in]    timing info
3767  * @return ROK     - success
3768  *         RFAILED - failure
3769  *
3770  * ****************************************************************/
3771 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3772 {
3773 #ifdef CALL_FLOW_DEBUG_LOG
3774    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3775 #endif
3776
3777 #ifdef INTEL_FAPI
3778    uint8_t idx =0;
3779    uint8_t nPdu = 0;
3780    uint8_t numPduEncoded = 0;
3781    uint8_t  ueIdx;
3782    uint16_t cellIdx =0;
3783    uint16_t pduIndex = 0;
3784
3785    SlotTimingInfo dlTtiReqTimingInfo;
3786    MacDlSlot *currDlSlot = NULLP;
3787    MacCellCfg macCellCfg;
3788    RntiType rntiType;
3789    fapi_dl_tti_req_t *dlTtiReq = NULLP;
3790    fapi_msg_header_t *msgHeader = NULLP;
3791    p_fapi_api_queue_elem_t dlTtiElem;
3792    p_fapi_api_queue_elem_t headerElem;
3793    p_fapi_api_queue_elem_t prevElem;
3794    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3795    {
3796            GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3797            /* consider phy delay */
3798            ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL, macCb.macCell[cellIdx]->numOfSlots);
3799            dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3800
3801            macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3802
3803            currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3804
3805            /* Vendor Message */
3806            fapi_vendor_msg_t *vendorMsg;
3807            p_fapi_api_queue_elem_t  vendorMsgQElem;
3808            /* Allocte And fill Vendor msg */
3809            LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3810            if(!vendorMsgQElem)
3811            {
3812                    DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for vendor msg in config req");
3813                    return RFAILED;
3814            }
3815            FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3816            vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3817            fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3818
3819            LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3820            if(dlTtiElem)
3821            {
3822                    FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3823                                    sizeof(fapi_dl_tti_req_t));
3824                    /* Fill message header */
3825                    LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3826                    if(!headerElem)
3827                    {
3828                            DU_LOG("\nERROR  -->  LWR_MAC: Memory allocation failed for header in DL TTI req");
3829                            LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3830                            return RFAILED;
3831                    }
3832
3833                    FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3834                                    sizeof(fapi_msg_header_t));
3835                    msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3836                    msgHeader->num_msg = 2;
3837                    msgHeader->handle = 0;
3838
3839                    /* Fill Dl TTI Request */
3840                    dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3841                    memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3842                    fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3843
3844                    dlTtiReq->sfn  = dlTtiReqTimingInfo.sfn;
3845                    dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3846                    dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot);  /* get total Pdus */
3847                    nPdu = dlTtiReq->nPdus;
3848
3849                    vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3850                    vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3851
3852                    dlTtiReq->nGroup = 0;
3853                    if(dlTtiReq->nPdus > 0)
3854                    {
3855                            if(currDlSlot->dlInfo.isBroadcastPres)
3856                            {
3857                                    if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3858                                    {
3859                                            if(dlTtiReq->pdus != NULLP)
3860                                            {
3861                                                    for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3862                                                    {
3863                                                            fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3864                                                                            currDlSlot, idx, dlTtiReq->sfn);
3865                                                            numPduEncoded++;
3866                                                    }
3867                                            }
3868                                            DU_LOG("\033[1;31m");
3869                                            DU_LOG("\nDEBUG  -->  LWR_MAC: MIB sent..");
3870                                            DU_LOG("\033[0m");
3871                                    }
3872
3873                                    if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3874                                    {
3875                                            /* Filling SIB1 param */
3876                                            if(numPduEncoded != nPdu)
3877                                            {
3878                      if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
3879                         rntiType = SI_RNTI_TYPE;
3880
3881                                                    /* PDCCH PDU */
3882                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3883                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3884                                                    numPduEncoded++;
3885
3886                                                    /* PDSCH PDU */
3887                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3888                                                                    &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci.pdschCfg,
3889                                                                    currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3890                                                                    pduIndex);
3891                                                    dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3892                                                    pduIndex++;
3893                                                    numPduEncoded++;
3894                                            }
3895                                            DU_LOG("\033[1;34m");
3896                                            DU_LOG("\nDEBUG  -->  LWR_MAC: SIB1 sent...");
3897                                            DU_LOG("\033[0m");
3898                                    }
3899                            }
3900
3901                            if(currDlSlot->pageAllocInfo != NULLP)
3902                            {
3903                                    /* Filling DL Paging Alloc param */
3904                                    if(numPduEncoded != nPdu)
3905                                    {
3906                                            rntiType = P_RNTI_TYPE;
3907                                            fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3908                                    currDlSlot->pageAllocInfo, &macCellCfg);
3909                                            numPduEncoded++;
3910                                            fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3911                                                                        currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
3912                                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3913                                            pduIndex++;
3914                                            numPduEncoded++;
3915                                    }
3916                                    DU_LOG("\033[1;34m");
3917                                    DU_LOG("\nDEBUG  -->  LWR_MAC: PAGE sent...");
3918                                    DU_LOG("\033[0m");
3919                            }
3920
3921                            for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3922                            {
3923                                    if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3924                                    {
3925                                            /* Filling RAR param */
3926                                            rntiType = RA_RNTI_TYPE;
3927                   if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3928                   {
3929                                                    fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3930                                                                    currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3931                                                    numPduEncoded++;
3932                      MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
3933                   }
3934                                            if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
3935                                            {
3936                                                    fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3937                                                                    currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3938                                                                    currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3939                                                                    pduIndex);
3940                                                    numPduEncoded++;
3941                                                    pduIndex++;
3942
3943                      DU_LOG("\033[1;32m");
3944                                                    DU_LOG("\nDEBUG  -->  LWR_MAC: RAR sent...");
3945                                                    DU_LOG("\033[0m");
3946                                            }
3947                                    }
3948
3949                                    if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3950                                    {
3951                   if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)  \
3952                   {
3953                      rntiType = C_RNTI_TYPE;
3954                      fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3955                            currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
3956                      numPduEncoded++;
3957                   }
3958
3959                   if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
3960                   {
3961                      if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3962                      {
3963                         fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3964                               currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
3965                               currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
3966                         numPduEncoded++;
3967                         pduIndex++;
3968
3969                         DU_LOG("\033[1;32m");
3970                         if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status))
3971                         {
3972                            DU_LOG("\nDEBUG  -->  LWR_MAC: MSG4 sent...");
3973                            MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
3974                         }
3975                         else
3976                         {
3977                            DU_LOG("\nDEBUG  -->  LWR_MAC: DL MSG sent...");
3978                         }
3979                         DU_LOG("\033[0m");
3980                      }
3981
3982                   }
3983                   MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
3984                   /*   else
3985                        {
3986                        MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3987                        currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3988                        }
3989                        */
3990                                    }
3991                            }
3992
3993                            dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3994                            dlTtiReq->nGroup++;
3995
3996 #ifdef ODU_SLOT_IND_DEBUG_LOG
3997                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
3998 #endif
3999
4000                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4001                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4002                            msgHeader->num_msg++;
4003
4004                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4005                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4006                            msgHeader->num_msg++;
4007
4008                            /* send Tx-DATA req message */
4009                            sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
4010                            if(dlTtiElem->p_next->p_next->p_next)
4011                            {
4012                                    msgHeader->num_msg++;
4013                                    prevElem = dlTtiElem->p_next->p_next->p_next;
4014                            }
4015                            else
4016                                    prevElem = dlTtiElem->p_next->p_next;
4017                    }
4018                    else
4019                    {
4020 #ifdef ODU_SLOT_IND_DEBUG_LOG
4021                            DU_LOG("\nDEBUG  -->  LWR_MAC: Sending DL TTI Request");
4022 #endif
4023                            /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4024                            fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4025                            msgHeader->num_msg++;
4026
4027                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4028                            fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4029                            msgHeader->num_msg++;
4030
4031                            prevElem = dlTtiElem->p_next->p_next;
4032                    }
4033
4034                    if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
4035                    {
4036                            /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4037                            lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
4038                            msgHeader->num_msg++;
4039                            macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
4040             prevElem = prevElem->p_next;
4041                    }
4042                    prevElem->p_next = vendorMsgQElem;
4043                    LwrMacSendToL1(headerElem);
4044                    memset(currDlSlot, 0, sizeof(MacDlSlot));
4045                    return ROK;
4046            }
4047            else
4048            {
4049                    DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for DL TTI Request");
4050                    memset(currDlSlot, 0, sizeof(MacDlSlot));
4051                    return RFAILED;
4052            }
4053    }
4054    else
4055    {
4056            lwr_mac_procInvalidEvt(&currTimingInfo);
4057            return RFAILED;
4058    }
4059 #endif
4060    return ROK;
4061 }
4062
4063 /*******************************************************************
4064  *
4065  * @brief Sends TX data Request to PHY
4066  *
4067  * @details
4068  *
4069  *    Function : sendTxDataReq
4070  *
4071  *    Functionality:
4072  *         -Sends FAPI TX data req to PHY
4073  *
4074  * @params[in]    timing info
4075  * @return ROK     - success
4076  *         RFAILED - failure
4077  *
4078  * ****************************************************************/
4079 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
4080 {
4081 #ifdef INTEL_FAPI
4082 #ifdef CALL_FLOW_DEBUG_LOG
4083    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
4084 #endif
4085
4086    uint8_t  nPdu = 0;
4087    uint8_t  ueIdx=0;
4088    uint16_t cellIdx=0;
4089    uint16_t pduIndex = 0;
4090    fapi_tx_data_req_t       *txDataReq =NULLP;
4091    p_fapi_api_queue_elem_t  txDataElem = 0;
4092
4093    GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4094
4095    /* send TX_Data request message */
4096    nPdu = calcTxDataReqPduCount(dlSlot);
4097    if(nPdu > 0)
4098    {
4099       LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
4100       if(txDataElem == NULLP)
4101       {
4102          DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for TX data Request");
4103          return RFAILED;
4104       }
4105
4106       FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
4107             sizeof(fapi_tx_data_req_t));
4108       txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
4109       memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
4110       fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
4111
4112       vendorTxDataReq->sym = 0;
4113
4114       txDataReq->sfn  = currTimingInfo.sfn;
4115       txDataReq->slot = currTimingInfo.slot;
4116       if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4117       {
4118          fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4119                &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci.pdschCfg);
4120          pduIndex++;
4121          MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
4122          txDataReq->num_pdus++;
4123       }
4124       if(dlSlot->pageAllocInfo != NULLP)
4125       {
4126          fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo);
4127          pduIndex++;
4128          txDataReq->num_pdus++;
4129          MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen));
4130          MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4131       }
4132
4133       for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4134       {
4135          if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4136          {
4137             if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
4138             {
4139                fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4140                      dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4141                pduIndex++;
4142                txDataReq->num_pdus++;
4143                MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
4144             }
4145             MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4146          }
4147
4148          if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4149          {
4150             if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
4151             {
4152                fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4153                      dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
4154                      dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
4155                pduIndex++;
4156                txDataReq->num_pdus++;
4157                MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
4158             }
4159             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
4160                   dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
4161             dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
4162             MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
4163          }
4164       }
4165
4166       /* Fill message header */
4167       DU_LOG("\nDEBUG  -->  LWR_MAC: Sending TX DATA Request");
4168       prevElem->p_next = txDataElem;
4169    }
4170 #endif
4171    return ROK;
4172 }
4173
4174 /***********************************************************************
4175  *
4176  * @brief calculates the total size to be allocated for UL TTI Req
4177  *
4178  * @details
4179  *
4180  *    Function : getnPdus
4181  *
4182  *    Functionality:
4183  *         -calculates the total pdu count to be allocated for UL TTI Req
4184  *
4185  * @params[in] Pointer to fapi Ul TTI Req
4186  *             Pointer to CurrUlSlot
4187  * @return count
4188  * ********************************************************************/
4189 #ifdef INTEL_FAPI
4190 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4191 {
4192    uint8_t pduCount = 0;
4193
4194    if(ulTtiReq && currUlSlot)
4195    {
4196       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4197       {
4198          pduCount++;
4199          ulTtiReq->rachPresent++;
4200       }
4201       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4202       {
4203          pduCount++;
4204          ulTtiReq->nUlsch++;
4205       }
4206       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4207       {
4208          pduCount++;
4209          ulTtiReq->nUlsch++;
4210       }
4211       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4212       {
4213          pduCount++;
4214          ulTtiReq->nUlcch++;
4215       }
4216       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
4217       {
4218          pduCount++;
4219       }
4220    }
4221    return pduCount;
4222 }
4223 #endif
4224
4225 /***********************************************************************
4226  *
4227  * @brief Set the value of zero correlation config in PRACH PDU
4228  *
4229  * @details
4230  *
4231  *    Function : setNumCs
4232  *
4233  *    Functionality:
4234  *         -Set the value of zero correlation config in PRACH PDU
4235  *
4236  * @params[in] Pointer to zero correlation config
4237  *             Pointer to MacCellCfg
4238  * ********************************************************************/
4239
4240 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4241 {
4242 #ifdef INTEL_FAPI
4243    uint8_t idx;
4244    if(macCellCfg != NULLP)
4245    {
4246       idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4247       *numCs = UnrestrictedSetNcsTable[idx];
4248    }
4249 #endif
4250 }
4251
4252 /***********************************************************************
4253  *
4254  * @brief Fills the PRACH PDU in UL TTI Request
4255  *
4256  * @details
4257  *
4258  *    Function : fillPrachPdu
4259  *
4260  *    Functionality:
4261  *         -Fills the PRACH PDU in UL TTI Request
4262  *
4263  * @params[in] Pointer to Prach Pdu
4264  *             Pointer to CurrUlSlot
4265  *             Pointer to macCellCfg
4266  *             Pointer to msgLen
4267  * ********************************************************************/
4268
4269 #ifdef INTEL_FAPI
4270 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4271 {
4272    if(ulTtiReqPdu != NULLP)
4273    {
4274       ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4275       ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
4276       ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4277          currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
4278       ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4279          currUlSlot->ulInfo.prachSchInfo.prachFormat;
4280       ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
4281       ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4282          currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
4283       setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4284       ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4285       ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4286       ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4287       ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4288       ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4289    }
4290 }
4291
4292 /*******************************************************************
4293  *
4294  * @brief Filling PUSCH PDU in UL TTI Request
4295  *
4296  * @details
4297  *
4298  *    Function : fillPuschPdu
4299  *
4300  *    Functionality: Filling PUSCH PDU in UL TTI Request
4301  *
4302  * @params[in]
4303  * @return ROK     - success
4304  *         RFAILED - failure
4305  *
4306  * ****************************************************************/
4307 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4308 {
4309    if(ulTtiReqPdu != NULLP)
4310    {
4311       ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4312       memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4313       ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4314       ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
4315       /* TODO : Fill handle in raCb when scheduling pusch and access here */
4316       ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4317       ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4318       ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4319       ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4320          macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4321       ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4322          macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4323       ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4324       ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
4325       ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
4326       ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
4327       ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4328       ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
4329       ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4330       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4331       ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4332       ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
4333       ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4334       ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4335       ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4336       ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4337          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAllocType;
4338       ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4339          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.startPrb;
4340       ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4341          currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.numPrb;
4342       ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4343       ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4344       ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4345       ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4346       ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4347          currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
4348       ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4349          currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
4350 #ifdef INTEL_FAPI
4351       ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4352          currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
4353       ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4354          currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
4355       ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4356          currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
4357 #endif
4358       ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4359          currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
4360       ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4361          currUlSlot->ulInfo.schPuschInfo.harqProcId;
4362       ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4363          currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
4364       ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4365          currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
4366       /* numCb is 0 for new transmission */
4367       ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4368
4369       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4370
4371       /* UL TTI Vendor PDU */
4372       ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4373       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4374       ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4375       for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4376       {
4377               ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4378       }
4379    }
4380 }
4381
4382 /*******************************************************************
4383  *
4384  * @brief Fill PUCCH PDU in Ul TTI Request
4385  *
4386  * @details
4387  *
4388  *    Function : fillPucchPdu
4389  *
4390  *    Functionality: Fill PUCCH PDU in Ul TTI Request
4391  *
4392  * @params[in]
4393  * @return ROK     - success
4394  *         RFAILED - failure
4395  *
4396  * ****************************************************************/
4397 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4398       MacUlSlot *currUlSlot)
4399 {
4400    if(ulTtiReqPdu != NULLP)
4401    {
4402       ulTtiReqPdu->pduType                  = PUCCH_PDU_TYPE;
4403       memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4404       ulTtiReqPdu->pdu.pucch_pdu.rnti         = currUlSlot->ulInfo.crnti;
4405       /* TODO : Fill handle in raCb when scheduling pucch and access here */
4406       ulTtiReqPdu->pdu.pucch_pdu.handle       = 100;
4407       ulTtiReqPdu->pdu.pucch_pdu.bwpSize      = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4408       ulTtiReqPdu->pdu.pucch_pdu.bwpStart     = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4409       ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4410       ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4411       ulTtiReqPdu->pdu.pucch_pdu.formatType   = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
4412       ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4413
4414       ulTtiReqPdu->pdu.pucch_pdu.prbStart     = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
4415       ulTtiReqPdu->pdu.pucch_pdu.prbSize      = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
4416       ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
4417       ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols  = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
4418       ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag  = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
4419       ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
4420       ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4421       ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4422       ulTtiReqPdu->pdu.pucch_pdu.hoppingId    = 0;
4423
4424       ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
4425
4426       ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4427       ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
4428       ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
4429       ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
4430       ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.pi2BPSK;
4431       ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.addDmrs;/* Valid for Format 3, 4 only */
4432       ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4433       ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift  = 0; /* Valid for Format 4 */
4434       ulTtiReqPdu->pdu.pucch_pdu.srFlag           = currUlSlot->ulInfo.schPucchInfo.srFlag;
4435       ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq       = currUlSlot->ulInfo.schPucchInfo.harqInfo.harqBitLength;
4436       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1   = 0; /* Valid for Format 2, 3, 4 */
4437       ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2   = 0; /* Valid for Format 2, 3, 4 */
4438       ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.numPrgs;
4439       ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prgSize;
4440       ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.digBfInterfaces;
4441       ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prg[0].beamIdx[0];
4442
4443       ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4444
4445       /* UL TTI Vendor PDU */
4446       ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4447       ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4448       ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4449       for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4450       {
4451               ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4452       }
4453    }
4454 }
4455
4456 #endif
4457
4458 /*******************************************************************
4459  *
4460  * @brief Sends UL TTI Request to PHY
4461  *
4462  * @details
4463  *
4464  *    Function : fillUlTtiReq
4465  *
4466  *    Functionality:
4467  *         -Sends FAPI Param req to PHY
4468  *
4469  * @params[in]  Pointer to CmLteTimingInfo
4470  * @return ROK     - success
4471  *         RFAILED - failure
4472  *
4473  ******************************************************************/
4474 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4475 {
4476 #ifdef CALL_FLOW_DEBUG_LOG
4477    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4478 #endif
4479
4480 #ifdef INTEL_FAPI
4481    uint16_t   cellIdx =0;
4482    uint8_t    pduIdx = -1;
4483    SlotTimingInfo ulTtiReqTimingInfo;
4484    MacUlSlot *currUlSlot = NULLP;
4485    MacCellCfg macCellCfg;
4486    fapi_ul_tti_req_t *ulTtiReq = NULLP;
4487    p_fapi_api_queue_elem_t ulTtiElem;
4488
4489    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4490    {
4491       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4492       macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4493
4494       /* add PHY delta */
4495       ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL, macCb.macCell[cellIdx]->numOfSlots);
4496       currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4497
4498       LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4499       if(ulTtiElem)
4500       {
4501               FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4502                               sizeof(fapi_ul_tti_req_t));
4503               ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4504               memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4505               fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4506               ulTtiReq->sfn  = ulTtiReqTimingInfo.sfn;
4507               ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4508               ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4509               vendorUlTti->num_ul_pdu =  ulTtiReq->nPdus;
4510               vendorUlTti->sym = 0;
4511               ulTtiReq->nGroup = 0;
4512               if(ulTtiReq->nPdus > 0)
4513               {
4514                       /* Fill Prach Pdu */
4515                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4516                       {
4517                               pduIdx++;
4518                               fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4519                               ulTtiReq->rachPresent++;
4520                       }
4521
4522                       /* Fill PUSCH PDU */
4523                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4524                       {
4525                               pduIdx++;
4526                               fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4527                               ulTtiReq->nUlsch++;
4528                       }
4529                       /* Fill PUCCH PDU */
4530                       if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4531                       {
4532                               pduIdx++;
4533                               fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4534                               ulTtiReq->nUlcch++;
4535                       }
4536               }
4537
4538 #ifdef ODU_SLOT_IND_DEBUG_LOG
4539               DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL TTI Request");
4540 #endif
4541               prevElem->p_next = ulTtiElem;
4542
4543               memset(currUlSlot, 0, sizeof(MacUlSlot));
4544               return ROK;
4545       }
4546       else
4547       {
4548               DU_LOG("\nERROR  -->  LWR_MAC: Failed to allocate memory for UL TTI Request");
4549               memset(currUlSlot, 0, sizeof(MacUlSlot));
4550               return RFAILED;
4551       }
4552    }
4553    else
4554    {
4555            lwr_mac_procInvalidEvt(&currTimingInfo);
4556    }
4557 #endif
4558    return ROK;
4559 }
4560
4561 #ifdef INTEL_FAPI
4562 /*******************************************************************
4563  *
4564  * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4565  *
4566  * @details
4567  *
4568  *    Function : fillUlDciPdu
4569  *
4570  *    Functionality:
4571  *         -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4572  *
4573  * @params[in] Pointer to fapi_dl_dci_t
4574  *             Pointer to DciInfo
4575  * @return ROK
4576  *
4577  ******************************************************************/
4578 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4579 {
4580 #ifdef CALL_FLOW_DEBUG_LOG
4581    DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4582 #endif
4583    if(ulDciPtr != NULLP)
4584    {
4585       uint8_t numBytes =0;
4586       uint8_t bytePos =0;
4587       uint8_t bitPos =0;
4588
4589       uint8_t  coreset1Size = 0;
4590       uint16_t rbStart = 0;
4591       uint16_t rbLen = 0;
4592       uint8_t  dciFormatId = 0;
4593       uint32_t freqDomResAssign =0;
4594       uint8_t  timeDomResAssign =0;
4595       uint8_t  freqHopFlag =0;
4596       uint8_t  modNCodScheme =0;
4597       uint8_t  ndi =0;
4598       uint8_t  redundancyVer = 0;
4599       uint8_t  harqProcessNum = 0;
4600       uint8_t  puschTpc = 0;
4601       uint8_t  ul_SlInd = 0;
4602
4603       /* Size(in bits) of each field in DCI format 0_0 */
4604       uint8_t dciFormatIdSize      = 1;
4605       uint8_t freqDomResAssignSize = 0;
4606       uint8_t timeDomResAssignSize = 4;
4607       uint8_t freqHopFlagSize      = 1;
4608       uint8_t modNCodSchemeSize    = 5;
4609       uint8_t ndiSize              = 1;
4610       uint8_t redundancyVerSize    = 2;
4611       uint8_t harqProcessNumSize   = 4;
4612       uint8_t puschTpcSize         = 2;
4613       uint8_t ul_SlIndSize         = 1;
4614
4615       ulDciPtr->rnti                          = schDciInfo->dciInfo.rnti;
4616       ulDciPtr->scramblingId                  = schDciInfo->dciInfo.scramblingId;
4617       ulDciPtr->scramblingRnti                = schDciInfo->dciInfo.scramblingRnti;
4618       ulDciPtr->cceIndex                      = schDciInfo->dciInfo.cceIndex;
4619       ulDciPtr->aggregationLevel              = schDciInfo->dciInfo.aggregLevel;
4620       ulDciPtr->pc_and_bform.numPrgs          = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4621       ulDciPtr->pc_and_bform.prgSize          = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4622       ulDciPtr->pc_and_bform.digBfInterfaces  = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4623       ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4624       ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4625       ulDciPtr->beta_pdcch_1_0                = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
4626       ulDciPtr->powerControlOffsetSS          = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4627
4628       /* Calculating freq domain resource allocation field value and size
4629        * coreset1Size = Size of coreset 1
4630        * RBStart = Starting Virtual Rsource block
4631        * RBLen = length of contiguously allocted RBs
4632        * Spec 38.214 Sec 5.1.2.2.2
4633        */
4634       if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
4635       {
4636          coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4637          rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
4638          rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
4639
4640          if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4641          {
4642             if((rbLen - 1) <= floor(coreset1Size / 2))
4643                freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4644             else
4645                freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4646                                   + (coreset1Size - 1 - rbStart);
4647
4648             freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4649          }
4650          /* Fetching DCI field values */
4651          dciFormatId      = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
4652          timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
4653          freqHopFlag      = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
4654          modNCodScheme    = schDciInfo->dciFormatInfo.format.format0_0.mcs;
4655          ndi              = schDciInfo->dciFormatInfo.format.format0_0.ndi;
4656          redundancyVer    = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
4657          harqProcessNum   = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
4658          puschTpc         = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
4659          ul_SlInd         = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
4660
4661          /* Reversing bits in each DCI field */
4662          dciFormatId      = reverseBits(dciFormatId, dciFormatIdSize);
4663          freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4664          timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4665          modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
4666          redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
4667          harqProcessNum   = reverseBits(harqProcessNum, harqProcessNumSize);
4668          puschTpc         = reverseBits(puschTpc, puschTpcSize);
4669          ul_SlInd         = reverseBits(ul_SlInd, ul_SlIndSize);
4670       }
4671       /* Calulating total number of bytes in buffer */
4672       ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4673       + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4674       + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4675
4676       numBytes = ulDciPtr->payloadSizeBits / 8;
4677       if(ulDciPtr->payloadSizeBits % 8)
4678          numBytes += 1;
4679
4680       if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4681       {
4682          DU_LOG("\nERROR  -->  LWR_MAC : Total bytes for DCI is more than expected");
4683          return;
4684       }
4685
4686       /* Initialize buffer */
4687       for(bytePos = 0; bytePos < numBytes; bytePos++)
4688          ulDciPtr->payload[bytePos] = 0;
4689
4690       bytePos = numBytes - 1;
4691       bitPos = 0;
4692
4693       /* Packing DCI format fields */
4694       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4695             dciFormatId, dciFormatIdSize);
4696       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4697             freqDomResAssign, freqDomResAssignSize);
4698       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4699             timeDomResAssign, timeDomResAssignSize);
4700       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4701             freqHopFlag, freqHopFlagSize);
4702       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4703             modNCodScheme, modNCodSchemeSize);
4704       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4705             ndi, ndiSize);
4706       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4707             redundancyVer, redundancyVerSize);
4708       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4709             harqProcessNum, harqProcessNumSize);
4710       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4711             puschTpc, puschTpcSize);
4712       fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4713             ul_SlInd, ul_SlIndSize);
4714    }
4715 } /* fillUlDciPdu */
4716
4717 /*******************************************************************
4718  *
4719  * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4720  *
4721  * @details
4722  *
4723  *    Function : fillUlDciPdcchPdu
4724  *
4725  *    Functionality:
4726  *         -Fills the Pdcch PDU info
4727  *
4728  * @params[in] Pointer to FAPI DL TTI Req
4729  *             Pointer to PdcchCfg
4730  * @return ROK
4731  *
4732  ******************************************************************/
4733 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4734 {
4735    if(ulDciReqPdu != NULLP)
4736    {
4737       memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4738       fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4739       ulDciReqPdu->pduType                          = PDCCH_PDU_TYPE;
4740       ulDciReqPdu->pdcchPduConfig.bwpSize           = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4741       ulDciReqPdu->pdcchPduConfig.bwpStart          = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4742       ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4743       ulDciReqPdu->pdcchPduConfig.cyclicPrefix      = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4744       ulDciReqPdu->pdcchPduConfig.startSymbolIndex  = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4745       ulDciReqPdu->pdcchPduConfig.durationSymbols   = dlInfo->ulGrant->coresetCfg.durationSymbols;
4746       memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4747       ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4748       ulDciReqPdu->pdcchPduConfig.regBundleSize     = dlInfo->ulGrant->coresetCfg.regBundleSize;
4749       ulDciReqPdu->pdcchPduConfig.interleaverSize   = dlInfo->ulGrant->coresetCfg.interleaverSize;
4750       ulDciReqPdu->pdcchPduConfig.shiftIndex        = dlInfo->ulGrant->coresetCfg.shiftIndex;
4751       ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4752       ulDciReqPdu->pdcchPduConfig.numDlDci          = 1;
4753       ulDciReqPdu->pdcchPduConfig.coreSetType       = coreSetType;
4754
4755       /* Calculating PDU length. Considering only one Ul dci pdu for now */
4756       ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4757
4758       /* Vendor UL DCI PDU */
4759       vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4760       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4761       vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4762    }
4763    return ROK;
4764 }
4765 #endif
4766 /*******************************************************************
4767  *
4768  * @brief Sends UL DCI Request to PHY
4769  *
4770  * @details
4771  *
4772  *    Function : fillUlDciReq
4773  *
4774  *    Functionality:
4775  *         -Sends FAPI Ul Dci req to PHY
4776  *
4777  * @params[in]  Pointer to CmLteTimingInfo
4778  * @return ROK     - success
4779  *         RFAILED - failure
4780  *
4781  ******************************************************************/
4782 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4783 {
4784 #ifdef INTEL_FAPI
4785    uint8_t      cellIdx =0;
4786    uint8_t      numPduEncoded = 0;
4787    SlotTimingInfo  ulDciReqTimingInfo ={0};
4788    MacDlSlot    *currDlSlot = NULLP;
4789    fapi_ul_dci_req_t        *ulDciReq =NULLP;
4790    p_fapi_api_queue_elem_t  ulDciElem;
4791
4792    if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4793    {
4794       GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4795       memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4796       currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4797
4798          LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4799          if(ulDciElem)
4800          {
4801             FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4802                sizeof(fapi_ul_dci_req_t));
4803             ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4804             memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4805             fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4806
4807             ulDciReq->sfn  = ulDciReqTimingInfo.sfn;
4808             ulDciReq->slot = ulDciReqTimingInfo.slot;
4809           if(currDlSlot->dlInfo.ulGrant != NULLP)
4810           {
4811             vendorUlDciReq->sym = 0;
4812             ulDciReq->numPdus = 1;  // No. of PDCCH PDUs
4813             vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4814             if(ulDciReq->numPdus > 0)
4815             {
4816                /* Fill PDCCH configuration Pdu */
4817                fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4818                numPduEncoded++;
4819                /* free UL GRANT at SCH */
4820                MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4821             }
4822 #ifdef ODU_SLOT_IND_DEBUG_LOG
4823                DU_LOG("\nDEBUG  -->  LWR_MAC: Sending UL DCI Request");
4824 #endif
4825          }
4826                prevElem->p_next = ulDciElem;
4827       }
4828    }
4829    else
4830    {
4831        lwr_mac_procInvalidEvt(&currTimingInfo);
4832    }
4833 #endif
4834    return ROK;
4835 }
4836
4837 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4838 {
4839    {
4840       /* PHY_STATE_IDLE */
4841 #ifdef INTEL_TIMER_MODE
4842       lwr_mac_procIqSamplesReqEvt,
4843 #endif
4844       lwr_mac_procParamReqEvt,
4845       lwr_mac_procParamRspEvt,
4846       lwr_mac_procConfigReqEvt,
4847       lwr_mac_procConfigRspEvt,
4848       lwr_mac_procInvalidEvt,
4849       lwr_mac_procInvalidEvt,
4850    },
4851    {
4852       /* PHY_STATE_CONFIGURED */
4853 #ifdef INTEL_TIMER_MODE
4854       lwr_mac_procInvalidEvt,
4855 #endif
4856       lwr_mac_procParamReqEvt,
4857       lwr_mac_procParamRspEvt,
4858       lwr_mac_procConfigReqEvt,
4859       lwr_mac_procConfigRspEvt,
4860       lwr_mac_procStartReqEvt,
4861       lwr_mac_procInvalidEvt,
4862    },
4863    {
4864       /* PHY_STATE_RUNNING */
4865 #ifdef INTEL_TIMER_MODE
4866       lwr_mac_procInvalidEvt,
4867 #endif
4868       lwr_mac_procInvalidEvt,
4869       lwr_mac_procInvalidEvt,
4870       lwr_mac_procConfigReqEvt,
4871       lwr_mac_procConfigRspEvt,
4872       lwr_mac_procInvalidEvt,
4873       lwr_mac_procInvalidEvt,
4874    }
4875 };
4876
4877 /*******************************************************************
4878  *
4879  * @brief Sends message to LWR_MAC Fsm Event Handler
4880  *
4881  * @details
4882  *
4883  *    Function : sendToLowerMac
4884  *
4885  *    Functionality:
4886  *         -Sends message to LowerMac
4887  *
4888  * @params[in] Message Type
4889  *             Message Length
4890  *             Messaga Pointer
4891  *
4892  * @return void
4893  *
4894  ******************************************************************/
4895 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4896 {
4897    lwrMacCb.event = msgType;
4898    fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4899 }
4900
4901 /**********************************************************************
4902   End of file
4903  **********************************************************************/