1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
31 #include "fapi_vendor_extension.h"
36 #include "lwr_mac_fsm.h"
37 #include "lwr_mac_phy.h"
38 #include "mac_utils.h"
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
48 #define SET_MSG_LEN(x, size) x += size
50 /* Global variables */
53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
54 void fapiMacConfigRsp(uint16_t cellId);
55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t headerElem);
56 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t headerElem);
58 void lwrMacLayerInit(Region region, Pool pool)
64 memset(&lwrMacCb, 0, sizeof(LwrMacCb));
65 lwrMacCb.region = region;
67 lwrMacCb.clCfgDone = TRUE;
69 lwrMacCb.phyState = PHY_STATE_IDLE;
72 /* Initializing WLS free mem list */
73 lwrMacCb.phySlotIndCntr = 1;
74 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
76 cmLListInit(&wlsBlockToFreeList[idx]);
81 /*******************************************************************
83 * @brief Handles Invalid Request Event
87 * Function : lwr_mac_procInvalidEvt
90 * - Displays the PHY state when the invalid event occurs
93 * @return ROK - success
96 * ****************************************************************/
97 uint8_t lwr_mac_procInvalidEvt(void *msg)
99 DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
104 /*******************************************************************
106 * @brief Fills FAPI message header
110 * Function : fillMsgHeader
113 * -Fills FAPI message header
115 * @params[in] Pointer to header
121 * ****************************************************************/
122 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
124 memset(hdr, 0, sizeof(fapi_msg_t));
125 hdr->msg_id = msgType;
126 hdr->length = msgLen;
129 /*******************************************************************
131 * @brief Fills FAPI Config Request message header
135 * Function : fillTlvs
138 * -Fills FAPI Config Request message header
140 * @params[in] Pointer to TLV
147 * ****************************************************************/
148 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
149 uint32_t value, uint32_t *msgLen)
152 tlv->tl.length = length;
154 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
156 /*******************************************************************
158 * @brief fills the cyclic prefix by comparing the bitmask
162 * Function : fillCyclicPrefix
165 * -checks the value with the bitmask and
166 * fills the cellPtr's cyclic prefix.
168 * @params[in] Pointer to ClCellParam
169 * Value to be compared
172 ********************************************************************/
173 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
175 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
177 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
179 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
181 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
185 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
189 /*******************************************************************
191 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
195 * Function : fillSubcarrierSpaceDl
198 * -checks the value with the bitmask and
199 * fills the cellPtr's subcarrier spacing in DL
201 * @params[in] Pointer to ClCellParam
202 * Value to be compared
205 * ****************************************************************/
207 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
209 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
211 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
213 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
215 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
217 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
219 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
221 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
223 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
227 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
231 /*******************************************************************
233 * @brief fills the downlink bandwidth by comparing the bitmask
237 * Function : fillBandwidthDl
240 * -checks the value with the bitmask and
241 * -fills the cellPtr's DL Bandwidth
243 * @params[in] Pointer to ClCellParam
244 * Value to be compared
247 * ****************************************************************/
249 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
251 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
253 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
255 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
257 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
259 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
261 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
263 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
265 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
267 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
269 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
271 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
273 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
275 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
277 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
279 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
281 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
283 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
285 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
287 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
289 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
291 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
293 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
295 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
297 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
299 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
301 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
305 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
309 /*******************************************************************
311 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
315 * Function : fillSubcarrierSpaceUl
318 * -checks the value with the bitmask and
319 * -fills cellPtr's subcarrier spacing in UL
321 * @params[in] Pointer to ClCellParam
322 * Value to be compared
325 * ****************************************************************/
327 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
329 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
331 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
333 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
335 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
337 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
339 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
341 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
343 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
347 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
351 /*******************************************************************
353 * @brief fills the uplink bandwidth by comparing the bitmask
357 * Function : fillBandwidthUl
360 * -checks the value with the bitmask and
361 * fills the cellPtr's UL Bandwidth
365 * @params[in] Pointer to ClCellParam
366 * Value to be compared
370 * ****************************************************************/
372 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
374 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
376 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
378 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
380 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
382 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
384 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
386 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
388 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
390 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
392 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
394 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
396 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
398 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
400 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
402 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
404 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
406 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
408 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
410 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
412 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
414 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
416 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
418 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
420 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
422 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
424 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
428 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
431 /*******************************************************************
433 * @brief fills the CCE maping by comparing the bitmask
437 * Function : fillCCEmaping
440 * -checks the value with the bitmask and
441 * fills the cellPtr's CCE Mapping Type
444 * @params[in] Pointer to ClCellParam
445 * Value to be compared
448 * ****************************************************************/
450 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
452 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
454 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
456 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
458 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
462 (*cellPtr)->cceMappingType = INVALID_VALUE;
466 /*******************************************************************
468 * @brief fills the PUCCH format by comparing the bitmask
472 * Function : fillPucchFormat
475 * -checks the value with the bitmask and
476 * fills the cellPtr's pucch format
479 * @params[in] Pointer to ClCellParam
480 * Value to be compared
483 * ****************************************************************/
485 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
487 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
489 (*cellPtr)->pucchFormats = FORMAT_0;
491 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
493 (*cellPtr)->pucchFormats = FORMAT_1;
495 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
497 (*cellPtr)->pucchFormats = FORMAT_2;
499 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
501 (*cellPtr)->pucchFormats = FORMAT_3;
503 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
505 (*cellPtr)->pucchFormats = FORMAT_4;
509 (*cellPtr)->pucchFormats = INVALID_VALUE;
513 /*******************************************************************
515 * @brief fills the PDSCH Mapping Type by comparing the bitmask
519 * Function : fillPdschMappingType
522 * -checks the value with the bitmask and
523 * fills the cellPtr's PDSCH MappingType
525 * @params[in] Pointer to ClCellParam
526 * Value to be compared
529 * ****************************************************************/
531 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
533 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
535 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
537 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
539 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
543 (*cellPtr)->pdschMappingType = INVALID_VALUE;
547 /*******************************************************************
549 * @brief fills the PDSCH Allocation Type by comparing the bitmask
553 * Function : fillPdschAllocationType
556 * -checks the value with the bitmask and
557 * fills the cellPtr's PDSCH AllocationType
559 * @params[in] Pointer to ClCellParam
560 * Value to be compared
563 * ****************************************************************/
565 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
567 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
569 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
571 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
573 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
577 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
581 /*******************************************************************
583 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
587 * Function : fillPrbMappingType
590 * -checks the value with the bitmask and
591 * fills the cellPtr's PRB Mapping Type
593 * @params[in] Pointer to ClCellParam
594 * Value to be compared
597 ******************************************************************/
598 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
600 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
602 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
604 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
606 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
610 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
614 /*******************************************************************
616 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
620 * Function : fillPdschDmrsConfigType
623 * -checks the value with the bitmask and
624 * fills the cellPtr's DmrsConfig Type
626 * @params[in] Pointer to ClCellParam
627 * Value to be compared
630 ******************************************************************/
632 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
634 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
636 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
638 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
640 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
644 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
648 /*******************************************************************
650 * @brief fills the PDSCH DmrsLength by comparing the bitmask
654 * Function : fillPdschDmrsLength
657 * -checks the value with the bitmask and
658 * fills the cellPtr's PdschDmrsLength
660 * @params[in] Pointer to ClCellParam
661 * Value to be compared
664 ******************************************************************/
665 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
667 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
669 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
671 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
673 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
677 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
681 /*******************************************************************
683 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
687 * Function : fillPdschDmrsAddPos
690 * -checks the value with the bitmask and
691 * fills the cellPtr's Pdsch DmrsAddPos
693 * @params[in] Pointer to ClCellParam
694 * Value to be compared
697 ******************************************************************/
699 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
701 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
703 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
705 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
707 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
709 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
711 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
713 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
715 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
719 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
723 /*******************************************************************
725 * @brief fills the Modulation Order in DL by comparing the bitmask
729 * Function : fillModulationOrderDl
732 * -checks the value with the bitmask and
733 * fills the cellPtr's ModulationOrder in DL.
735 * @params[in] Pointer to ClCellParam
736 * Value to be compared
739 ******************************************************************/
740 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
744 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
748 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
752 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
756 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
760 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
764 /*******************************************************************
766 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
770 * Function : fillPuschDmrsConfigType
773 * -checks the value with the bitmask and
774 * fills the cellPtr's PUSCH DmrsConfigType
776 * @params[in] Pointer to ClCellParam
777 * Value to be compared
780 ******************************************************************/
782 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
784 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
786 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
788 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
790 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
794 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
798 /*******************************************************************
800 * @brief fills the PUSCH DmrsLength by comparing the bitmask
804 * Function : fillPuschDmrsLength
807 * -checks the value with the bitmask and
808 * fills the cellPtr's PUSCH DmrsLength
810 * @params[in] Pointer to ClCellParam
811 * Value to be compared
814 ******************************************************************/
816 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
818 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
820 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
822 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
824 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
828 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
832 /*******************************************************************
834 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
838 * Function : fillPuschDmrsAddPos
841 * -checks the value with the bitmask and
842 * fills the cellPtr's PUSCH DmrsAddPos
844 * @params[in] Pointer to ClCellParam
845 * Value to be compared
848 ******************************************************************/
850 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
852 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
854 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
856 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
858 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
860 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
862 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
864 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
866 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
870 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
874 /*******************************************************************
876 * @brief fills the PUSCH Mapping Type by comparing the bitmask
880 * Function : fillPuschMappingType
883 * -checks the value with the bitmask and
884 * fills the cellPtr's PUSCH MappingType
886 * @params[in] Pointer to ClCellParam
887 * Value to be compared
890 ******************************************************************/
892 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
894 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
896 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
898 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
900 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
904 (*cellPtr)->puschMappingType = INVALID_VALUE;
908 /*******************************************************************
910 * @brief fills the PUSCH Allocation Type by comparing the bitmask
914 * Function : fillPuschAllocationType
917 * -checks the value with the bitmask and
918 * fills the cellPtr's PUSCH AllocationType
920 * @params[in] Pointer to ClCellParam
921 * Value to be compared
924 ******************************************************************/
926 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
928 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
930 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
932 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
934 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
938 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
942 /*******************************************************************
944 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
948 * Function : fillPuschPrbMappingType
951 * -checks the value with the bitmask and
952 * fills the cellPtr's PUSCH PRB MApping Type
954 * @params[in] Pointer to ClCellParam
955 * Value to be compared
958 ******************************************************************/
960 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
962 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
964 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
966 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
968 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
972 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
976 /*******************************************************************
978 * @brief fills the Modulation Order in Ul by comparing the bitmask
982 * Function : fillModulationOrderUl
985 * -checks the value with the bitmask and
986 * fills the cellPtr's Modualtsion Order in UL.
988 * @params[in] Pointer to ClCellParam
989 * Value to be compared
992 ******************************************************************/
994 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
998 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1002 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1006 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1010 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1014 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1018 /*******************************************************************
1020 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1024 * Function : fillPuschAggregationFactor
1027 * -checks the value with the bitmask and
1028 * fills the cellPtr's PUSCH Aggregation Factor
1030 * @params[in] Pointer to ClCellParam
1031 * Value to be compared
1034 ******************************************************************/
1036 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1038 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1040 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1042 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1044 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1046 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1048 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1050 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1052 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1056 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1060 /*******************************************************************
1062 * @brief fills the PRACH Long Format by comparing the bitmask
1066 * Function : fillPrachLongFormat
1069 * -checks the value with the bitmask and
1070 * fills the cellPtr's PRACH Long Format
1072 * @params[in] Pointer to ClCellParam
1073 * Value to be compared
1076 ******************************************************************/
1078 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1080 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1082 (*cellPtr)->prachLongFormats = FORMAT_0;
1084 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1086 (*cellPtr)->prachLongFormats = FORMAT_1;
1088 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1090 (*cellPtr)->prachLongFormats = FORMAT_2;
1092 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1094 (*cellPtr)->prachLongFormats = FORMAT_3;
1098 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1102 /*******************************************************************
1104 * @brief fills the PRACH Short Format by comparing the bitmask
1108 * Function : fillPrachShortFormat
1111 * -checks the value with the bitmask and
1112 * fills the cellPtr's PRACH ShortFormat
1114 * @params[in] Pointer to ClCellParam
1115 * Value to be compared
1118 ******************************************************************/
1120 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1122 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1124 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1126 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1128 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1130 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1132 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1134 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1136 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1138 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1140 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1142 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1144 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1146 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1148 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1150 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1152 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1154 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1156 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1160 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1164 /*******************************************************************
1166 * @brief fills the Fd Occasions Type by comparing the bitmask
1170 * Function : fillFdOccasions
1173 * -checks the value with the bitmask and
1174 * fills the cellPtr's Fd Occasions
1176 * @params[in] Pointer to ClCellParam
1177 * Value to be compared
1180 ******************************************************************/
1182 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1186 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1190 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1194 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1198 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1202 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1206 /*******************************************************************
1208 * @brief fills the RSSI Measurement by comparing the bitmask
1212 * Function : fillRssiMeas
1215 * -checks the value with the bitmask and
1216 * fills the cellPtr's RSSI Measurement report
1218 * @params[in] Pointer to ClCellParam
1219 * Value to be compared
1222 ******************************************************************/
1224 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1226 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1228 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1230 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1232 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1236 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1240 /*******************************************************************
1242 * @brief Returns the TLVs value
1246 * Function : getParamValue
1249 * -return TLVs value
1252 * @return ROK - temp
1255 * ****************************************************************/
1257 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1260 posPtr = &tlv->tl.tag;
1261 posPtr += sizeof(tlv->tl.tag);
1262 posPtr += sizeof(tlv->tl.length);
1263 /*TO DO: malloc to SSI memory */
1264 if(type == FAPI_UINT_8)
1266 return(*(uint8_t *)posPtr);
1268 else if(type == FAPI_UINT_16)
1270 return(*(uint16_t *)posPtr);
1272 else if(type == FAPI_UINT_32)
1274 return(*(uint32_t *)posPtr);
1278 DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
1284 /*******************************************************************
1286 * @brief Modifes the received mibPdu to uint32 bit
1287 * and stores it in MacCellCfg
1291 * Function : setMibPdu
1296 * @params[in] Pointer to mibPdu
1297 * pointer to modified value
1298 ******************************************************************/
1299 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1301 *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1302 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1303 DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
1306 /*******************************************************************
1308 * @brief Sends FAPI Param req to PHY
1312 * Function : lwr_mac_procParamReqEvt
1315 * -Sends FAPI Param req to PHY
1318 * @return ROK - success
1321 * ****************************************************************/
1323 uint8_t lwr_mac_procParamReqEvt(void *msg)
1326 /* startGuardTimer(); */
1327 fapi_param_req_t *paramReq = NULL;
1328 fapi_msg_header_t *msgHeader;
1329 p_fapi_api_queue_elem_t paramReqElem;
1330 p_fapi_api_queue_elem_t headerElem;
1332 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1333 if(paramReq != NULL)
1335 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1336 sizeof(fapi_tx_data_req_t));
1337 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1338 memset(paramReq, 0, sizeof(fapi_param_req_t));
1339 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1341 /* Fill message header */
1342 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1345 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
1346 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1349 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1350 sizeof(fapi_msg_header_t));
1351 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1352 msgHeader->num_msg = 1;
1353 msgHeader->handle = 0;
1355 DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
1356 LwrMacSendToL1(headerElem);
1360 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
1367 /*******************************************************************
1369 * @brief Sends FAPI Param Response to MAC via PHY
1373 * Function : lwr_mac_procParamRspEvt
1376 * -Sends FAPI Param rsp to MAC via PHY
1379 * @return ROK - success
1382 * ****************************************************************/
1384 uint8_t lwr_mac_procParamRspEvt(void *msg)
1387 /* stopGuardTimer(); */
1389 uint32_t encodedVal;
1390 fapi_param_resp_t *paramRsp;
1391 ClCellParam *cellParam = NULLP;
1393 paramRsp = (fapi_param_resp_t *)msg;
1394 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1396 if(paramRsp != NULLP)
1398 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1399 if(cellParam != NULLP)
1401 DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
1402 if(paramRsp->error_code == MSG_OK)
1404 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1406 switch(paramRsp->tlvs[index].tl.tag)
1408 case FAPI_RELEASE_CAPABILITY_TAG:
1409 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1410 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1412 cellParam->releaseCapability = RELEASE_15;
1416 case FAPI_PHY_STATE_TAG:
1417 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1418 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1420 DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1425 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1426 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1427 if(encodedVal != RFAILED && encodedVal != 0)
1429 cellParam->skipBlankDlConfig = SUPPORTED;
1433 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1437 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1438 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1439 if(encodedVal != RFAILED && encodedVal != 0)
1441 cellParam->skipBlankUlConfig = SUPPORTED;
1445 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1449 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1450 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1453 case FAPI_CYCLIC_PREFIX_TAG:
1454 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1455 if(encodedVal != RFAILED)
1457 fillCyclicPrefix(encodedVal, &cellParam);
1461 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1462 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1463 if(encodedVal != RFAILED)
1465 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1469 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1470 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1471 if(encodedVal != RFAILED)
1473 fillBandwidthDl(encodedVal, &cellParam);
1477 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1478 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1479 if(encodedVal != RFAILED)
1481 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1485 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1486 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1487 if(encodedVal != RFAILED)
1489 fillBandwidthUl(encodedVal, &cellParam);
1493 case FAPI_CCE_MAPPING_TYPE_TAG:
1494 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1495 if(encodedVal != RFAILED)
1497 fillCCEmaping(encodedVal, &cellParam);
1501 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1502 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1503 if(encodedVal != RFAILED && encodedVal != 0)
1505 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1509 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1513 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1514 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1515 if(encodedVal != RFAILED && encodedVal != 0)
1517 cellParam->precoderGranularityCoreset = SUPPORTED;
1521 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1525 case FAPI_PDCCH_MU_MIMO_TAG:
1526 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1527 if(encodedVal != RFAILED && encodedVal != 0)
1529 cellParam->pdcchMuMimo = SUPPORTED;
1533 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1537 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1538 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1539 if(encodedVal != RFAILED && encodedVal != 0)
1541 cellParam->pdcchPrecoderCycling = SUPPORTED;
1545 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1549 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1550 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1553 case FAPI_PUCCH_FORMATS_TAG:
1554 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1555 if(encodedVal != RFAILED)
1557 fillPucchFormat(encodedVal, &cellParam);
1561 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1562 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1565 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1566 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1567 if(encodedVal != RFAILED)
1569 fillPdschMappingType(encodedVal, &cellParam);
1573 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1574 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1575 if(encodedVal != RFAILED)
1577 fillPdschAllocationType(encodedVal, &cellParam);
1581 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1582 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1583 if(encodedVal != RFAILED)
1585 fillPrbMappingType(encodedVal, &cellParam);
1589 case FAPI_PDSCH_CBG_TAG:
1590 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1591 if(encodedVal != RFAILED && encodedVal != 0)
1593 cellParam->pdschCbg = SUPPORTED;
1597 cellParam->pdschCbg = NOT_SUPPORTED;
1601 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1602 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1603 if(encodedVal != RFAILED)
1605 fillPdschDmrsConfigType(encodedVal, &cellParam);
1609 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1610 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1611 if(encodedVal != RFAILED)
1613 fillPdschDmrsLength(encodedVal, &cellParam);
1617 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1618 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1619 if(encodedVal != RFAILED)
1621 fillPdschDmrsAddPos(encodedVal, &cellParam);
1625 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1626 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1629 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1630 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1631 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1633 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1637 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1638 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1639 if(encodedVal != RFAILED)
1641 fillModulationOrderDl(encodedVal, &cellParam);
1645 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1646 cellParam->maxMuMimoUsersDl = \
1647 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1650 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1651 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1652 if(encodedVal != RFAILED && encodedVal != 0)
1654 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1658 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1662 case FAPI_PREMPTIONSUPPORT_TAG:
1663 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1664 if(encodedVal != RFAILED && encodedVal != 0)
1666 cellParam->premptionSupport = SUPPORTED;
1670 cellParam->premptionSupport = NOT_SUPPORTED;
1674 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1675 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1676 if(encodedVal != RFAILED && encodedVal != 0)
1678 cellParam->pdschNonSlotSupport = SUPPORTED;
1682 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1686 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1687 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1688 if(encodedVal != RFAILED && encodedVal != 0)
1690 cellParam->uciMuxUlschInPusch = SUPPORTED;
1694 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1698 case FAPI_UCI_ONLY_PUSCH_TAG:
1699 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1700 if(encodedVal != RFAILED && encodedVal != 0)
1702 cellParam->uciOnlyPusch = SUPPORTED;
1706 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1710 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1711 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1712 if(encodedVal != RFAILED && encodedVal != 0)
1714 cellParam->puschFrequencyHopping = SUPPORTED;
1718 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1722 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1723 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1724 if(encodedVal != RFAILED)
1726 fillPuschDmrsConfig(encodedVal, &cellParam);
1730 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1731 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1732 if(encodedVal != RFAILED)
1734 fillPuschDmrsLength(encodedVal, &cellParam);
1738 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1739 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1740 if(encodedVal != RFAILED)
1742 fillPuschDmrsAddPos(encodedVal, &cellParam);
1746 case FAPI_PUSCH_CBG_TAG:
1747 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1748 if(encodedVal != RFAILED && encodedVal != 0)
1750 cellParam->puschCbg = SUPPORTED;
1754 cellParam->puschCbg = NOT_SUPPORTED;
1758 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1759 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1760 if(encodedVal != RFAILED)
1762 fillPuschMappingType(encodedVal, &cellParam);
1766 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1767 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1768 if(encodedVal != RFAILED)
1770 fillPuschAllocationType(encodedVal, &cellParam);
1774 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1775 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1776 if(encodedVal != RFAILED)
1778 fillPuschPrbMappingType(encodedVal, &cellParam);
1782 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1783 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1784 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1786 cellParam->puschMaxPtrsPorts = encodedVal;
1790 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1791 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1794 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1795 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1798 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1799 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1800 if(encodedVal != RFAILED)
1802 fillModulationOrderUl(encodedVal, &cellParam);
1806 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1807 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1810 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1811 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1812 if(encodedVal != RFAILED && encodedVal != 0)
1814 cellParam->dftsOfdmSupport = SUPPORTED;
1818 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1822 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1823 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1824 if(encodedVal != RFAILED)
1826 fillPuschAggregationFactor(encodedVal, &cellParam);
1830 case FAPI_PRACH_LONG_FORMATS_TAG:
1831 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1832 if(encodedVal != RFAILED)
1834 fillPrachLongFormat(encodedVal, &cellParam);
1838 case FAPI_PRACH_SHORT_FORMATS_TAG:
1839 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1840 if(encodedVal != RFAILED)
1842 fillPrachShortFormat(encodedVal, &cellParam);
1846 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1847 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1848 if(encodedVal != RFAILED && encodedVal != 0)
1850 cellParam->prachRestrictedSets = SUPPORTED;
1854 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1858 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1859 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1860 if(encodedVal != RFAILED)
1862 fillFdOccasions(encodedVal, &cellParam);
1866 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1867 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1868 if(encodedVal != RFAILED)
1870 fillRssiMeas(encodedVal, &cellParam);
1874 //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1878 MAC_FREE(cellParam, sizeof(ClCellParam));
1879 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1884 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
1890 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
1896 DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
1904 #ifdef INTEL_TIMER_MODE
1905 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1907 void * wlsHdlr = NULLP;
1908 fapi_msg_header_t *msgHeader;
1909 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1910 p_fapi_api_queue_elem_t headerElem;
1911 p_fapi_api_queue_elem_t iqSampleElem;
1912 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1914 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1916 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1918 /* Fill IQ sample req */
1919 mtGetWlsHdl(&wlsHdlr);
1920 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1921 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1922 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1925 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
1928 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1929 sizeof(fapi_vendor_ext_iq_samples_req_t));
1931 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1932 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1933 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1934 sizeof(fapi_vendor_ext_iq_samples_req_t));
1936 iqSampleReq->iq_samples_info.carrNum = 0;
1937 iqSampleReq->iq_samples_info.numSubframes = 40;
1938 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1939 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1940 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1941 iqSampleReq->iq_samples_info.startFrameNum = 0;
1942 iqSampleReq->iq_samples_info.startSlotNum = 0;
1943 iqSampleReq->iq_samples_info.startSymNum = 0;
1944 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1945 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1947 /* TODO : Fill remaining parameters */
1949 /* Fill message header */
1950 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1953 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1956 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1957 sizeof(fapi_msg_header_t));
1958 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1959 msgHeader->num_msg = 1;
1960 msgHeader->handle = 0;
1962 DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
1963 LwrMacSendToL1(headerElem);
1968 /*******************************************************************
1970 * @brief Sends FAPI Config req to PHY
1974 * Function : lwr_mac_procConfigReqEvt
1977 * -Sends FAPI Config Req to PHY
1980 * @return ROK - success
1983 * ****************************************************************/
1985 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1989 uint8_t slotIdx = 0;
1990 uint8_t symbolIdx =0;
1993 uint16_t *cellId =NULLP;
1994 uint16_t cellIdx =0;
1995 uint32_t msgLen = 0;
1997 MacCellCfg macCfgParams;
1998 fapi_vendor_msg_t *vendorMsg;
1999 fapi_config_req_t *configReq;
2000 fapi_msg_header_t *msgHeader;
2001 p_fapi_api_queue_elem_t headerElem;
2002 p_fapi_api_queue_elem_t vendorMsgQElem;
2003 p_fapi_api_queue_elem_t cfgReqQElem;
2005 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2008 cellId = (uint16_t *)msg;
2009 GET_CELL_IDX(*cellId, cellIdx);
2010 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2012 /* Fill Cell Configuration in lwrMacCb */
2013 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2014 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2015 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2018 /* Allocte And fill Vendor msg */
2019 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2022 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2025 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2026 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2027 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2028 vendorMsg->config_req_vendor.hopping_id = 0;
2029 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2030 vendorMsg->config_req_vendor.group_hop_flag = 0;
2031 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2032 vendorMsg->start_req_vendor.sfn = 0;
2033 vendorMsg->start_req_vendor.slot = 0;
2034 vendorMsg->start_req_vendor.mode = 4;
2036 vendorMsg->start_req_vendor.count = 0;
2037 vendorMsg->start_req_vendor.period = 1;
2039 /* Fill FAPI config req */
2040 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2043 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2044 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2047 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2048 sizeof(fapi_config_req_t));
2050 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2051 memset(configReq, 0, sizeof(fapi_config_req_t));
2052 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2053 configReq->number_of_tlvs = 25;
2054 msgLen = sizeof(configReq->number_of_tlvs);
2056 if(macCfgParams.dlCarrCfg.pres)
2058 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2059 sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2060 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2061 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2062 /* Due to bug in Intel FT code, commenting TLVs that are are not
2063 * needed to avoid error. Must be uncommented when FT bug is fixed */
2064 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2065 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2066 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2067 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2068 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2069 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2071 if(macCfgParams.ulCarrCfg.pres)
2073 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2074 sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2075 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2076 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2077 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2078 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2079 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2080 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2081 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2082 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2084 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2085 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2087 /* fill cell config */
2088 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2089 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2090 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2091 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2093 /* fill SSB configuration */
2094 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2095 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2096 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2097 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2098 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2099 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2101 /* fill PRACH configuration */
2102 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2103 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2104 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2105 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2106 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2107 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2108 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2109 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2110 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2111 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2112 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2113 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2114 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2115 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2116 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2117 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2118 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2119 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2120 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2121 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2122 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2124 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2125 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2126 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2131 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2134 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2135 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2136 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2137 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2139 /* fill SSB table */
2140 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2141 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2142 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2143 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2144 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2145 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2146 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2147 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2149 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2150 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2151 sizeof(uint32_t), mib, &msgLen);
2153 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2154 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2155 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2156 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2157 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2158 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2159 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2160 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2163 /* fill TDD table */
2164 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2165 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2166 for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2168 for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2170 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2171 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2176 /* fill measurement config */
2177 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2178 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2180 /* fill DMRS Type A Pos */
2181 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2182 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2184 /* Fill message header */
2185 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2188 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2189 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2190 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2193 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2194 sizeof(fapi_msg_header_t));
2195 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2196 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2197 msgHeader->handle = 0;
2199 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2200 LwrMacSendToL1(headerElem);
2204 } /* lwr_mac_handleConfigReqEvt */
2206 /*******************************************************************
2208 * @brief Processes config response from phy
2212 * Function : lwr_mac_procConfigRspEvt
2215 * Processes config response from phy
2217 * @params[in] FAPI message pointer
2218 * @return ROK - success
2221 * ****************************************************************/
2223 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2226 fapi_config_resp_t *configRsp;
2227 configRsp = (fapi_config_resp_t *)msg;
2229 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2232 if(configRsp != NULL)
2234 if(configRsp->error_code == MSG_OK)
2236 DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
2237 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2238 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2240 * Store config response into an intermediate struture and send to MAC
2241 * Support LC and LWLC for sending config rsp to MAC
2243 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2247 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
2253 DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
2259 } /* lwr_mac_procConfigRspEvt */
2261 /*******************************************************************
2263 * @brief Build and send start request to phy
2267 * Function : lwr_mac_procStartReqEvt
2270 * Build and send start request to phy
2272 * @params[in] FAPI message pointer
2273 * @return ROK - success
2276 * ****************************************************************/
2277 uint8_t lwr_mac_procStartReqEvt(void *msg)
2280 fapi_msg_header_t *msgHeader;
2281 fapi_start_req_t *startReq;
2282 fapi_vendor_msg_t *vendorMsg;
2283 p_fapi_api_queue_elem_t headerElem;
2284 p_fapi_api_queue_elem_t startReqElem;
2285 p_fapi_api_queue_elem_t vendorMsgElem;
2287 /* Allocte And fill Vendor msg */
2288 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2291 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
2294 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2295 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2296 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2297 vendorMsg->start_req_vendor.sfn = 0;
2298 vendorMsg->start_req_vendor.slot = 0;
2299 vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2301 vendorMsg->start_req_vendor.count = 0;
2302 vendorMsg->start_req_vendor.period = 1;
2305 /* Fill FAPI config req */
2306 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2309 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
2310 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2313 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2314 sizeof(fapi_start_req_t));
2316 startReq = (fapi_start_req_t *)(startReqElem + 1);
2317 memset(startReq, 0, sizeof(fapi_start_req_t));
2318 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2320 /* Fill message header */
2321 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2324 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2325 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2326 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2329 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2330 sizeof(fapi_msg_header_t));
2331 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2332 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2333 msgHeader->handle = 0;
2336 DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
2337 LwrMacSendToL1(headerElem);
2340 } /* lwr_mac_procStartReqEvt */
2342 /*******************************************************************
2344 * @brief Sends FAPI Stop Req to PHY
2348 * Function : lwr_mac_procStopReqEvt
2351 * -Sends FAPI Stop Req to PHY
2354 * @return ROK - success
2357 ********************************************************************/
2359 uint8_t lwr_mac_procStopReqEvt(void *msg)
2362 SlotIndInfo *slotInfo;
2363 fapi_msg_header_t *msgHeader;
2364 fapi_stop_req_t *stopReq;
2365 fapi_vendor_msg_t *vendorMsg;
2366 p_fapi_api_queue_elem_t headerElem;
2367 p_fapi_api_queue_elem_t stopReqElem;
2368 p_fapi_api_queue_elem_t vendorMsgElem;
2370 slotInfo = (SlotIndInfo *)msg;
2372 /* Allocte And fill Vendor msg */
2373 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2376 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in stop req");
2379 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2380 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2381 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2382 vendorMsg->stop_req_vendor.sfn = slotInfo->sfn;
2383 vendorMsg->stop_req_vendor.slot = slotInfo->slot;
2385 /* Fill FAPI stop req */
2386 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2389 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
2390 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2393 FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2394 sizeof(fapi_stop_req_t));
2395 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2396 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2397 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2399 /* Fill message header */
2400 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2403 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in stop req");
2404 LWR_MAC_FREE(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2405 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2408 FILL_FAPI_LIST_ELEM(headerElem, stopReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2409 sizeof(fapi_msg_header_t));
2410 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2411 msgHeader->num_msg = 2; /* Stop req msg and vendor specific msg */
2412 msgHeader->handle = 0;
2415 DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
2416 LwrMacSendToL1(headerElem);
2423 /*******************************************************************
2425 * @brief fills SSB PDU required for DL TTI info in MAC
2429 * Function : fillSsbPdu
2432 * -Fills the SSB PDU info
2435 * @params[in] Pointer to FAPI DL TTI Req
2436 * Pointer to RgCellCb
2437 * Pointer to msgLen of DL TTI Info
2440 ******************************************************************/
2442 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2443 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2445 uint32_t mibPayload = 0;
2446 if(dlTtiReqPdu != NULL)
2448 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2449 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2450 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2451 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2452 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2453 /* ssbOfPdufstA to be filled in ssbCfg */
2454 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2455 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2456 /* Bit manipulation for SFN */
2457 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2458 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2459 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2460 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2461 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2462 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2463 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2464 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2465 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2472 /*******************************************************************
2474 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2478 * Function : fillSib1DlDciPdu
2481 * -Fills the Dl DCI PDU
2483 * @params[in] Pointer to fapi_dl_dci_t
2484 * Pointer to PdcchCfg
2487 ******************************************************************/
2489 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2491 if(dlDciPtr != NULLP)
2497 uint16_t coreset0Size=0;
2500 uint32_t freqDomResAssign=0;
2501 uint32_t timeDomResAssign=0;
2502 uint8_t VRB2PRBMap=0;
2503 uint32_t modNCodScheme=0;
2504 uint8_t redundancyVer=0;
2505 uint32_t sysInfoInd=0;
2506 uint32_t reserved=0;
2508 /* Size(in bits) of each field in DCI format 0_1
2509 * as mentioned in spec 38.214 */
2510 uint8_t freqDomResAssignSize = 0;
2511 uint8_t timeDomResAssignSize = 4;
2512 uint8_t VRB2PRBMapSize = 1;
2513 uint8_t modNCodSchemeSize = 5;
2514 uint8_t redundancyVerSize = 2;
2515 uint8_t sysInfoIndSize = 1;
2516 uint8_t reservedSize = 15;
2518 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2519 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2520 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2521 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2522 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2523 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2524 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2525 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2526 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2527 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2528 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2529 dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2531 /* Calculating freq domain resource allocation field value and size
2532 * coreset0Size = Size of coreset 0
2533 * RBStart = Starting Virtual Rsource block
2534 * RBLen = length of contiguously allocted RBs
2535 * Spec 38.214 Sec 5.1.2.2.2
2537 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2538 rbStart = 0; /* For SIB1 */
2539 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2540 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2542 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2544 if((rbLen - 1) <= floor(coreset0Size / 2))
2545 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2547 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2548 + (coreset0Size - 1 - rbStart);
2550 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2553 /* Fetching DCI field values */
2554 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2556 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2558 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2559 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2560 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2563 /* Reversing bits in each DCI field */
2564 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2565 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2566 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2567 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2568 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2569 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2571 /* Calulating total number of bytes in buffer */
2572 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2573 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2574 + sysInfoIndSize + reservedSize;
2576 numBytes = dlDciPtr->payloadSizeBits / 8;
2577 if(dlDciPtr->payloadSizeBits % 8)
2580 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2582 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2586 /* Initialize buffer */
2587 for(bytePos = 0; bytePos < numBytes; bytePos++)
2588 dlDciPtr->payload[bytePos] = 0;
2590 bytePos = numBytes - 1;
2593 /* Packing DCI format fields */
2594 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2595 freqDomResAssign, freqDomResAssignSize);
2596 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2597 timeDomResAssign, timeDomResAssignSize);
2598 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2599 VRB2PRBMap, VRB2PRBMapSize);
2600 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2601 modNCodScheme, modNCodSchemeSize);
2602 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2603 redundancyVer, redundancyVerSize);
2604 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2605 sysInfoInd, sysInfoIndSize);
2606 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2607 reserved, reservedSize);
2610 } /* fillSib1DlDciPdu */
2612 /*******************************************************************
2614 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2618 * Function : fillRarDlDciPdu
2621 * -Fills the Dl DCI PDU
2623 * @params[in] Pointer to fapi_dl_dci_t
2624 * Pointer to PdcchCfg
2627 ******************************************************************/
2629 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2631 if(dlDciPtr != NULLP)
2633 uint8_t numBytes =0;
2637 uint16_t coreset0Size =0;
2638 uint16_t rbStart =0;
2640 uint32_t freqDomResAssign =0;
2641 uint8_t timeDomResAssign =0;
2642 uint8_t VRB2PRBMap =0;
2643 uint8_t modNCodScheme =0;
2644 uint8_t tbScaling =0;
2645 uint32_t reserved =0;
2647 /* Size(in bits) of each field in DCI format 1_0 */
2648 uint8_t freqDomResAssignSize = 0;
2649 uint8_t timeDomResAssignSize = 4;
2650 uint8_t VRB2PRBMapSize = 1;
2651 uint8_t modNCodSchemeSize = 5;
2652 uint8_t tbScalingSize = 2;
2653 uint8_t reservedSize = 16;
2655 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2656 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2657 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2658 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2659 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2660 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2661 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2662 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2663 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2664 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2665 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2666 dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2668 /* Calculating freq domain resource allocation field value and size
2669 * coreset0Size = Size of coreset 0
2670 * RBStart = Starting Virtual Rsource block
2671 * RBLen = length of contiguously allocted RBs
2672 * Spec 38.214 Sec 5.1.2.2.2
2675 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2676 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2677 rbStart = 0; /* For SIB1 */
2678 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2679 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2681 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2683 if((rbLen - 1) <= floor(coreset0Size / 2))
2684 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2686 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2687 + (coreset0Size - 1 - rbStart);
2689 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2692 /* Fetching DCI field values */
2693 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2694 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2695 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2696 tbScaling = 0; /* configured to 0 scaling */
2699 /* Reversing bits in each DCI field */
2700 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2701 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2702 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2703 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2704 tbScaling = reverseBits(tbScaling, tbScalingSize);
2706 /* Calulating total number of bytes in buffer */
2707 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2708 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2710 numBytes = dlDciPtr->payloadSizeBits / 8;
2711 if(dlDciPtr->payloadSizeBits % 8)
2714 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2716 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2720 /* Initialize buffer */
2721 for(bytePos = 0; bytePos < numBytes; bytePos++)
2722 dlDciPtr->payload[bytePos] = 0;
2724 bytePos = numBytes - 1;
2727 /* Packing DCI format fields */
2728 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2729 freqDomResAssign, freqDomResAssignSize);
2730 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2731 timeDomResAssign, timeDomResAssignSize);
2732 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2733 VRB2PRBMap, VRB2PRBMapSize);
2734 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2735 modNCodScheme, modNCodSchemeSize);
2736 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2737 tbScaling, tbScalingSize);
2738 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2739 reserved, reservedSize);
2741 } /* fillRarDlDciPdu */
2743 /*******************************************************************
2745 * @brief fills DL DCI PDU required for DL TTI info in MAC
2749 * Function : fillDlMsgDlDciPdu
2752 * -Fills the Dl DCI PDU
2754 * @params[in] Pointer to fapi_dl_dci_t
2755 * Pointer to PdcchCfg
2758 ******************************************************************/
2759 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2760 DlMsgInfo *dlMsgInfo)
2762 if(dlDciPtr != NULLP)
2768 uint16_t coresetSize = 0;
2769 uint16_t rbStart = 0;
2771 uint8_t dciFormatId;
2772 uint32_t freqDomResAssign;
2773 uint8_t timeDomResAssign;
2775 uint8_t modNCodScheme;
2777 uint8_t redundancyVer = 0;
2778 uint8_t harqProcessNum = 0;
2779 uint8_t dlAssignmentIdx = 0;
2780 uint8_t pucchTpc = 0;
2781 uint8_t pucchResoInd = 0;
2782 uint8_t harqFeedbackInd = 0;
2784 /* Size(in bits) of each field in DCI format 1_0 */
2785 uint8_t dciFormatIdSize = 1;
2786 uint8_t freqDomResAssignSize = 0;
2787 uint8_t timeDomResAssignSize = 4;
2788 uint8_t VRB2PRBMapSize = 1;
2789 uint8_t modNCodSchemeSize = 5;
2790 uint8_t ndiSize = 1;
2791 uint8_t redundancyVerSize = 2;
2792 uint8_t harqProcessNumSize = 4;
2793 uint8_t dlAssignmentIdxSize = 2;
2794 uint8_t pucchTpcSize = 2;
2795 uint8_t pucchResoIndSize = 3;
2796 uint8_t harqFeedbackIndSize = 3;
2798 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2799 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2800 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2801 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2802 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2803 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2804 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2805 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2806 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2807 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2808 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2809 dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2811 /* Calculating freq domain resource allocation field value and size
2812 * coreset0Size = Size of coreset 0
2813 * RBStart = Starting Virtual Rsource block
2814 * RBLen = length of contiguously allocted RBs
2815 * Spec 38.214 Sec 5.1.2.2.2
2817 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2818 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2819 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2821 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2823 if((rbLen - 1) <= floor(coresetSize / 2))
2824 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2826 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2827 + (coresetSize - 1 - rbStart);
2829 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2832 /* Fetching DCI field values */
2833 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
2834 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2835 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2836 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2837 ndi = dlMsgInfo->ndi;
2838 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2839 harqProcessNum = dlMsgInfo->harqProcNum;
2840 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
2841 pucchTpc = dlMsgInfo->pucchTpc;
2842 pucchResoInd = dlMsgInfo->pucchResInd;
2843 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
2845 /* Reversing bits in each DCI field */
2846 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2847 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2848 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2849 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2850 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2851 ndi = reverseBits(ndi, ndiSize);
2852 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2853 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2854 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2855 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2856 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2857 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2860 /* Calulating total number of bytes in buffer */
2861 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2862 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2863 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2864 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2866 numBytes = dlDciPtr->payloadSizeBits / 8;
2867 if(dlDciPtr->payloadSizeBits % 8)
2870 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2872 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2876 /* Initialize buffer */
2877 for(bytePos = 0; bytePos < numBytes; bytePos++)
2878 dlDciPtr->payload[bytePos] = 0;
2880 bytePos = numBytes - 1;
2883 /* Packing DCI format fields */
2884 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2885 dciFormatId, dciFormatIdSize);
2886 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2887 freqDomResAssign, freqDomResAssignSize);
2888 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2889 timeDomResAssign, timeDomResAssignSize);
2890 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2891 VRB2PRBMap, VRB2PRBMapSize);
2892 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2893 modNCodScheme, modNCodSchemeSize);
2894 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2896 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2897 redundancyVer, redundancyVerSize);
2898 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2899 redundancyVer, redundancyVerSize);
2900 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2901 harqProcessNum, harqProcessNumSize);
2902 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2903 dlAssignmentIdx, dlAssignmentIdxSize);
2904 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2905 pucchTpc, pucchTpcSize);
2906 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2907 pucchResoInd, pucchResoIndSize);
2908 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2909 harqFeedbackInd, harqFeedbackIndSize);
2913 /*******************************************************************
2915 * @brief fills PDCCH PDU required for DL TTI info in MAC
2919 * Function : fillPdcchPdu
2922 * -Fills the Pdcch PDU info
2925 * @params[in] Pointer to FAPI DL TTI Req
2926 * Pointer to PdcchCfg
2929 ******************************************************************/
2930 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2931 RntiType rntiType, uint8_t coreSetType)
2933 if(dlTtiReqPdu != NULLP)
2935 PdcchCfg *pdcchInfo = NULLP;
2936 BwpCfg *bwp = NULLP;
2938 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2939 if(rntiType == SI_RNTI_TYPE)
2941 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2942 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2943 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2945 else if(rntiType == RA_RNTI_TYPE)
2947 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2948 bwp = &dlInfo->rarAlloc->bwp;
2949 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2951 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2953 pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2954 bwp = &dlInfo->dlMsgAlloc->bwp;
2955 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2956 &dlInfo->dlMsgAlloc->dlMsgInfo);
2960 DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
2963 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2964 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2965 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2966 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2967 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2968 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2969 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2970 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2971 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2972 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2973 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2974 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
2975 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2976 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2977 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2979 /* Calculating PDU length. Considering only one dl dci pdu for now */
2980 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2986 /*******************************************************************
2988 * @brief fills PDSCH PDU required for DL TTI info in MAC
2992 * Function : fillPdschPdu
2995 * -Fills the Pdsch PDU info
2998 * @params[in] Pointer to FAPI DL TTI Req
2999 * Pointer to PdschCfg
3000 * Pointer to msgLen of DL TTI Info
3003 ******************************************************************/
3005 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
3006 BwpCfg bwp, uint16_t pduIndex)
3010 if(dlTtiReqPdu != NULLP)
3012 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3013 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3014 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3015 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3016 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3017 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3018 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3019 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3020 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3021 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3022 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3024 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3025 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3026 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3027 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3028 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3029 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3031 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3032 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3033 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3034 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3035 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3036 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3037 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3038 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3039 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3040 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3041 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3042 /* since we are using type-1, hence rbBitmap excluded */
3043 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3044 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3045 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3046 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3047 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3048 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3049 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3050 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3051 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3052 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3053 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3054 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3055 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3056 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3057 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3058 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3059 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3061 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3065 /***********************************************************************
3067 * @brief calculates the total size to be allocated for DL TTI Req
3071 * Function : calcDlTtiReqPduCount
3074 * -calculates the total pdu count to be allocated for DL TTI Req
3076 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3079 * ********************************************************************/
3080 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3085 if(dlInfo->isBroadcastPres)
3087 if(dlInfo->brdcstAlloc.ssbTrans)
3089 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3091 /* SSB PDU is filled */
3095 if(dlInfo->brdcstAlloc.sib1Trans)
3097 /* PDCCH and PDSCH PDU is filled */
3101 if(dlInfo->rarAlloc != NULLP)
3103 /* PDCCH and PDSCH PDU is filled */
3106 if(dlInfo->dlMsgAlloc != NULLP)
3108 /* PDCCH and PDSCH PDU is filled */
3114 /***********************************************************************
3116 * @brief calculates the total size to be allocated for DL TTI Req
3120 * Function : calcTxDataReqPduCount
3123 * -calculates the total pdu count to be allocated for DL TTI Req
3125 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3128 * ********************************************************************/
3129 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3133 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3137 if(dlInfo->rarAlloc != NULLP)
3141 if(dlInfo->dlMsgAlloc != NULLP)
3147 /***********************************************************************
3149 * @brief fills the SIB1 TX-DATA request message
3153 * Function : fillSib1TxDataReq
3156 * - fills the SIB1 TX-DATA request message
3158 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3159 * @params[in] macCellCfg consist of SIB1 pdu
3160 * @params[in] uint32_t *msgLen
3161 * @params[in] uint16_t pduIndex
3164 * ********************************************************************/
3165 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
3168 uint32_t pduLen = 0;
3169 uint8_t *sib1TxdataValue = NULLP;
3171 pduDesc[pduIndex].pdu_index = pduIndex;
3172 pduDesc[pduIndex].num_tlvs = 1;
3175 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3176 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3177 pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
3178 LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3179 if(sib1TxdataValue == NULLP)
3183 memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
3184 macCellCfg->sib1Cfg.sib1PduLen);
3185 pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
3187 /* The total length of the PDU description and PDU data */
3188 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3189 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3190 pduDesc[pduIndex].pdu_length = pduLen;
3192 #ifdef INTEL_WLS_MEM
3193 addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (lwrMacCb.phySlotIndCntr-1));
3195 LWR_MAC_FREE(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen);
3201 /***********************************************************************
3203 * @brief fills the RAR TX-DATA request message
3207 * Function : fillRarTxDataReq
3210 * - fills the RAR TX-DATA request message
3212 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3213 * @params[in] RarInfo *rarInfo
3214 * @params[in] uint32_t *msgLen
3215 * @params[in] uint16_t pduIndex
3218 * ********************************************************************/
3219 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
3222 uint32_t pduLen = 0;
3223 uint8_t *rarTxdataValue = NULLP;
3225 pduDesc[pduIndex].pdu_index = pduIndex;
3226 pduDesc[pduIndex].num_tlvs = 1;
3229 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3230 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3231 pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3232 LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3233 if(rarTxdataValue == NULLP)
3237 memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3238 pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3240 /* The total length of the PDU description and PDU data */
3241 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3242 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3243 pduDesc[pduIndex].pdu_length = pduLen;
3245 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3246 * But since we did not implement WLS, this has to be done here
3248 #ifdef INTEL_WLS_MEM
3249 addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (lwrMacCb.phySlotIndCntr-1));
3251 LWR_MAC_FREE(rarTxdataValue, rarInfo->rarPduLen);
3257 /***********************************************************************
3259 * @brief fills the DL dedicated Msg TX-DATA request message
3263 * Function : fillDlMsgTxDataReq
3266 * - fills the Dl Dedicated Msg TX-DATA request message
3268 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3269 * @params[in] DlMsgInfo *dlMsgInfo
3270 * @params[in] uint32_t *msgLen
3271 * @params[in] uint16_t pduIndex
3274 * ********************************************************************/
3275 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3278 uint32_t pduLen = 0;
3279 uint8_t *dedMsgTxDataValue = NULLP;
3281 pduDesc[pduIndex].pdu_index = pduIndex;
3282 pduDesc[pduIndex].num_tlvs = 1;
3285 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3286 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3287 pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3288 LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3289 if(dedMsgTxDataValue == NULLP)
3293 memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3294 pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3296 /* The total length of the PDU description and PDU data */
3297 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3298 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3299 pduDesc[pduIndex].pdu_length = pduLen;
3301 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3302 * But since we did not implement WLS, this has to be done here
3304 #ifdef INTEL_WLS_MEM
3305 addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (lwrMacCb.phySlotIndCntr-1));
3307 LWR_MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3315 /*******************************************************************
3317 * @brief Sends DL TTI Request to PHY
3321 * Function : fillDlTtiReq
3324 * -Sends FAPI DL TTI req to PHY
3326 * @params[in] timing info
3327 * @return ROK - success
3330 * ****************************************************************/
3331 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3336 uint8_t numPduEncoded = 0;
3337 uint16_t cellIdx =0;
3338 uint16_t pduIndex = 0;
3340 SlotIndInfo dlTtiReqTimingInfo;
3341 MacDlSlot *currDlSlot = NULLP;
3342 MacCellCfg macCellCfg;
3344 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3345 fapi_msg_header_t *msgHeader = NULLP;
3346 p_fapi_api_queue_elem_t dlTtiElem;
3347 p_fapi_api_queue_elem_t headerElem;
3349 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3351 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3352 /* consider phy delay */
3353 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
3354 dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3356 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3358 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3360 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3363 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3364 sizeof(fapi_dl_tti_req_t));
3366 /* Fill message header */
3367 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3370 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
3371 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3374 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3375 sizeof(fapi_msg_header_t));
3376 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3377 msgHeader->num_msg = 1;
3378 msgHeader->handle = 0;
3380 /* Fill Dl TTI Request */
3381 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3382 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3383 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3385 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3386 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3387 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3388 nPdu = dlTtiReq->nPdus;
3389 dlTtiReq->nGroup = 0;
3390 if(dlTtiReq->nPdus > 0)
3392 if(currDlSlot->dlInfo.isBroadcastPres)
3394 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3396 if(dlTtiReq->pdus != NULLP)
3398 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3400 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3401 currDlSlot, idx, dlTtiReq->sfn);
3405 DU_LOG("\033[1;31m");
3406 DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
3409 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3411 /* Filling SIB1 param */
3412 if(numPduEncoded != nPdu)
3414 rntiType = SI_RNTI_TYPE;
3415 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3416 rntiType, CORESET_TYPE0);
3418 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3419 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3420 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3425 DU_LOG("\033[1;34m");
3426 DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
3430 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3432 /* Filling RAR param */
3433 rntiType = RA_RNTI_TYPE;
3434 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3435 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3437 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3438 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3439 currDlSlot->dlInfo.rarAlloc->bwp,
3444 DU_LOG("\033[1;32m");
3445 DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
3448 if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3450 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3452 /* Filling Msg4 param */
3453 DU_LOG("\033[1;32m");
3454 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3456 rntiType = TC_RNTI_TYPE;
3457 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3458 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3459 DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
3463 /* Filling other DL msg params */
3464 rntiType = C_RNTI_TYPE;
3465 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3466 &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3467 DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
3472 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3473 &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3474 currDlSlot->dlInfo.dlMsgAlloc->bwp,
3481 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3482 currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3486 #ifdef ODU_SLOT_IND_DEBUG_LOG
3487 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
3489 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3490 fillUlTtiReq(currTimingInfo, headerElem);
3491 /* send Tx-DATA req message */
3492 sendTxDataReq(dlTtiReqTimingInfo, &currDlSlot->dlInfo, headerElem);
3493 LwrMacSendToL1(headerElem);
3497 #ifdef ODU_SLOT_IND_DEBUG_LOG
3498 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
3501 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3502 fillUlTtiReq(currTimingInfo, headerElem);
3503 LwrMacSendToL1(headerElem);
3505 memset(currDlSlot, 0, sizeof(MacDlSlot));
3510 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
3511 memset(currDlSlot, 0, sizeof(MacDlSlot));
3517 lwr_mac_procInvalidEvt(&currTimingInfo);
3524 /*******************************************************************
3526 * @brief Sends TX data Request to PHY
3530 * Function : sendTxDataReq
3533 * -Sends FAPI TX data req to PHY
3535 * @params[in] timing info
3536 * @return ROK - success
3539 * ****************************************************************/
3540 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t headerElem)
3545 uint16_t pduIndex = 0;
3546 fapi_tx_data_req_t *txDataReq =NULLP;
3547 fapi_msg_header_t *msgHeader =NULLP;
3548 p_fapi_api_queue_elem_t txDataElem = 0;
3550 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3552 /* send TX_Data request message */
3553 nPdu = calcTxDataReqPduCount(dlInfo);
3556 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3557 if(txDataElem == NULLP)
3559 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
3563 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3564 sizeof(fapi_tx_data_req_t));
3565 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3566 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3567 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3569 txDataReq->sfn = currTimingInfo.sfn;
3570 txDataReq->slot = currTimingInfo.slot;
3571 if(dlInfo->brdcstAlloc.sib1Trans)
3573 fillSib1TxDataReq(txDataReq->pdu_desc,
3574 &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3576 txDataReq->num_pdus++;
3578 if(dlInfo->rarAlloc != NULLP)
3580 fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3582 txDataReq->num_pdus++;
3584 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3585 dlInfo->rarAlloc = NULLP;
3587 if(dlInfo->dlMsgAlloc != NULLP)
3589 fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3590 &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3592 txDataReq->num_pdus++;
3594 MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3595 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3596 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3597 MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3598 dlInfo->dlMsgAlloc = NULLP;
3601 /* Fill message header */
3602 DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
3603 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3604 msgHeader->num_msg++;
3605 headerElem->p_next->p_next->p_next = txDataElem;
3611 /***********************************************************************
3613 * @brief calculates the total size to be allocated for UL TTI Req
3617 * Function : getnPdus
3620 * -calculates the total pdu count to be allocated for UL TTI Req
3622 * @params[in] Pointer to fapi Ul TTI Req
3623 * Pointer to CurrUlSlot
3625 * ********************************************************************/
3627 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3629 uint8_t pduCount = 0;
3631 if(ulTtiReq && currUlSlot)
3633 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3636 ulTtiReq->rachPresent++;
3638 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3643 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3648 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3653 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3662 /***********************************************************************
3664 * @brief Set the value of zero correlation config in PRACH PDU
3668 * Function : setNumCs
3671 * -Set the value of zero correlation config in PRACH PDU
3673 * @params[in] Pointer to zero correlation config
3674 * Pointer to MacCellCfg
3675 * ********************************************************************/
3677 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3681 if(macCellCfg != NULLP)
3683 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3684 *numCs = UnrestrictedSetNcsTable[idx];
3689 /***********************************************************************
3691 * @brief Fills the PRACH PDU in UL TTI Request
3695 * Function : fillPrachPdu
3698 * -Fills the PRACH PDU in UL TTI Request
3700 * @params[in] Pointer to Prach Pdu
3701 * Pointer to CurrUlSlot
3702 * Pointer to macCellCfg
3704 * ********************************************************************/
3707 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3709 if(ulTtiReqPdu != NULLP)
3711 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3712 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3713 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3714 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3715 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3716 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3717 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3718 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3719 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3720 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3721 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3722 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3723 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3724 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3725 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3729 /*******************************************************************
3731 * @brief Filling PUSCH PDU in UL TTI Request
3735 * Function : fillPuschPdu
3737 * Functionality: Filling PUSCH PDU in UL TTI Request
3740 * @return ROK - success
3743 * ****************************************************************/
3744 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3746 if(ulTtiReqPdu != NULLP)
3748 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3749 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3750 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3751 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3752 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3753 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3754 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3755 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3756 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3757 macCellCfg->initialUlBwp.bwp.scs;
3758 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3759 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3760 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3761 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3762 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3763 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3764 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3765 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3766 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3767 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3768 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3769 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3770 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3771 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3772 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3773 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3774 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3775 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3776 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3777 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3778 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3779 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3780 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3781 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3782 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3783 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3784 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3785 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3786 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3787 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3788 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3789 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3790 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3791 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3792 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3793 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3794 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3795 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3796 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3797 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3798 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3799 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3800 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3801 /* numCb is 0 for new transmission */
3802 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3804 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3808 /*******************************************************************
3810 * @brief Fill PUCCH PDU in Ul TTI Request
3814 * Function : fillPucchPdu
3816 * Functionality: Fill PUCCH PDU in Ul TTI Request
3819 * @return ROK - success
3822 * ****************************************************************/
3823 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3824 MacUlSlot *currUlSlot)
3826 if(ulTtiReqPdu != NULLP)
3828 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3829 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3830 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3831 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3832 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3833 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3834 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3835 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3836 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3837 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3838 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3840 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3841 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3842 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3843 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3844 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
3845 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
3846 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3847 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3848 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3850 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
3852 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3853 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
3854 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
3855 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
3856 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
3857 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
3858 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3859 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3860 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3861 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3862 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3863 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3864 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3865 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3866 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3867 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3869 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3875 /*******************************************************************
3877 * @brief Sends UL TTI Request to PHY
3881 * Function : fillUlTtiReq
3884 * -Sends FAPI Param req to PHY
3886 * @params[in] Pointer to CmLteTimingInfo
3887 * @return ROK - success
3890 ******************************************************************/
3891 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t headerElem)
3894 uint16_t cellIdx =0;
3895 uint8_t pduIdx = -1;
3896 SlotIndInfo ulTtiReqTimingInfo;
3897 MacUlSlot *currUlSlot = NULLP;
3898 MacCellCfg macCellCfg;
3899 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3900 fapi_msg_header_t *msgHeader = NULLP;
3901 p_fapi_api_queue_elem_t ulTtiElem;
3903 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3905 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3906 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3909 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
3910 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
3912 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3915 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3916 sizeof(fapi_ul_tti_req_t));
3917 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3918 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3919 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3920 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3921 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3922 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3923 ulTtiReq->nGroup = 0;
3924 if(ulTtiReq->nPdus > 0)
3926 /* Fill Prach Pdu */
3927 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3930 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3933 /* Fill PUSCH PDU */
3934 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3937 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3939 /* Fill PUCCH PDU */
3940 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3943 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3947 #ifdef ODU_SLOT_IND_DEBUG_LOG
3948 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
3951 /* Fill message header */
3952 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3953 msgHeader->num_msg++;
3954 headerElem->p_next->p_next = ulTtiElem;
3956 memset(currUlSlot, 0, sizeof(MacUlSlot));
3961 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
3962 memset(currUlSlot, 0, sizeof(MacUlSlot));
3968 lwr_mac_procInvalidEvt(&currTimingInfo);
3975 /*******************************************************************
3977 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3981 * Function : fillUlDciPdu
3984 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3986 * @params[in] Pointer to fapi_dl_dci_t
3987 * Pointer to DciInfo
3990 ******************************************************************/
3991 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3993 if(ulDciPtr != NULLP)
3995 uint8_t numBytes =0;
3999 uint8_t coreset1Size = 0;
4000 uint16_t rbStart = 0;
4002 uint8_t dciFormatId = 0;
4003 uint32_t freqDomResAssign =0;
4004 uint8_t timeDomResAssign =0;
4005 uint8_t freqHopFlag =0;
4006 uint8_t modNCodScheme =0;
4008 uint8_t redundancyVer = 0;
4009 uint8_t harqProcessNum = 0;
4010 uint8_t puschTpc = 0;
4011 uint8_t ul_SlInd = 0;
4013 /* Size(in bits) of each field in DCI format 0_0 */
4014 uint8_t dciFormatIdSize = 1;
4015 uint8_t freqDomResAssignSize = 0;
4016 uint8_t timeDomResAssignSize = 4;
4017 uint8_t freqHopFlagSize = 1;
4018 uint8_t modNCodSchemeSize = 5;
4019 uint8_t ndiSize = 1;
4020 uint8_t redundancyVerSize = 2;
4021 uint8_t harqProcessNumSize = 4;
4022 uint8_t puschTpcSize = 2;
4023 uint8_t ul_SlIndSize = 1;
4025 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4026 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4027 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4028 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4029 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4030 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4031 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4032 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4033 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4034 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4035 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
4036 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4038 /* Calculating freq domain resource allocation field value and size
4039 * coreset1Size = Size of coreset 1
4040 * RBStart = Starting Virtual Rsource block
4041 * RBLen = length of contiguously allocted RBs
4042 * Spec 38.214 Sec 5.1.2.2.2
4044 if(schDciInfo->formatType == FORMAT0_0)
4046 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4047 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4048 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4050 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4052 if((rbLen - 1) <= floor(coreset1Size / 2))
4053 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4055 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4056 + (coreset1Size - 1 - rbStart);
4058 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4060 /* Fetching DCI field values */
4061 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4062 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4063 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
4064 modNCodScheme = schDciInfo->format.format0_0.mcs;
4065 ndi = schDciInfo->format.format0_0.ndi;
4066 redundancyVer = schDciInfo->format.format0_0.rv;
4067 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
4068 puschTpc = schDciInfo->format.format0_0.tpcCmd;
4069 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
4071 /* Reversing bits in each DCI field */
4072 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4073 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4074 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4075 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4076 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4077 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4078 puschTpc = reverseBits(puschTpc, puschTpcSize);
4079 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4081 /* Calulating total number of bytes in buffer */
4082 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4083 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4084 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4086 numBytes = ulDciPtr->payloadSizeBits / 8;
4087 if(ulDciPtr->payloadSizeBits % 8)
4090 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4092 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
4096 /* Initialize buffer */
4097 for(bytePos = 0; bytePos < numBytes; bytePos++)
4098 ulDciPtr->payload[bytePos] = 0;
4100 bytePos = numBytes - 1;
4103 /* Packing DCI format fields */
4104 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4105 dciFormatId, dciFormatIdSize);
4106 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4107 freqDomResAssign, freqDomResAssignSize);
4108 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4109 timeDomResAssign, timeDomResAssignSize);
4110 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4111 freqHopFlag, freqHopFlagSize);
4112 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4113 modNCodScheme, modNCodSchemeSize);
4114 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4116 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4117 redundancyVer, redundancyVerSize);
4118 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4119 harqProcessNum, harqProcessNumSize);
4120 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4121 puschTpc, puschTpcSize);
4122 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4123 ul_SlInd, ul_SlIndSize);
4125 } /* fillUlDciPdu */
4127 /*******************************************************************
4129 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4133 * Function : fillUlDciPdcchPdu
4136 * -Fills the Pdcch PDU info
4138 * @params[in] Pointer to FAPI DL TTI Req
4139 * Pointer to PdcchCfg
4142 ******************************************************************/
4143 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4145 if(ulDciReqPdu != NULLP)
4147 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4148 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4149 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4150 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4151 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4152 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4153 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4154 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4155 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4156 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4157 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4158 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4159 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4160 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4161 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4162 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4163 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4165 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4166 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4171 /*******************************************************************
4173 * @brief Sends UL DCI Request to PHY
4177 * Function : fillUlDciReq
4180 * -Sends FAPI Ul Dci req to PHY
4182 * @params[in] Pointer to CmLteTimingInfo
4183 * @return ROK - success
4186 ******************************************************************/
4187 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
4191 uint8_t numPduEncoded = 0;
4192 SlotIndInfo ulDciReqTimingInfo ={0};
4193 MacDlSlot *currDlSlot = NULLP;
4194 fapi_ul_dci_req_t *ulDciReq =NULLP;
4195 fapi_msg_header_t *msgHeader =NULLP;
4196 p_fapi_api_queue_elem_t ulDciElem;
4197 p_fapi_api_queue_elem_t headerElem;
4199 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4201 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4202 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4203 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4205 if(currDlSlot->dlInfo.ulGrant != NULLP)
4207 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4210 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4211 sizeof(fapi_ul_dci_req_t));
4212 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4213 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4214 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4216 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4217 ulDciReq->slot = ulDciReqTimingInfo.slot;
4218 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4219 if(ulDciReq->numPdus > 0)
4221 /* Fill PDCCH configuration Pdu */
4222 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4224 /* free UL GRANT at SCH */
4225 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4226 currDlSlot->dlInfo.ulGrant = NULLP;
4228 /* Fill message header */
4229 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
4232 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for UL DCI req header");
4233 LWR_MAC_FREE(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4236 FILL_FAPI_LIST_ELEM(headerElem, ulDciElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
4237 sizeof(fapi_msg_header_t));
4238 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
4239 msgHeader->num_msg = 1;
4240 msgHeader->handle = 0;
4241 #ifdef ODU_SLOT_IND_DEBUG_LOG
4242 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
4244 LwrMacSendToL1(headerElem);
4249 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL DCI Request");
4250 memset(currDlSlot, 0, sizeof(MacDlSlot));
4257 lwr_mac_procInvalidEvt(&currTimingInfo);
4263 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4266 /* PHY_STATE_IDLE */
4267 #ifdef INTEL_TIMER_MODE
4268 lwr_mac_procIqSamplesReqEvt,
4270 lwr_mac_procParamReqEvt,
4271 lwr_mac_procParamRspEvt,
4272 lwr_mac_procConfigReqEvt,
4273 lwr_mac_procConfigRspEvt,
4274 lwr_mac_procInvalidEvt,
4275 lwr_mac_procInvalidEvt,
4278 /* PHY_STATE_CONFIGURED */
4279 #ifdef INTEL_TIMER_MODE
4280 lwr_mac_procInvalidEvt,
4282 lwr_mac_procParamReqEvt,
4283 lwr_mac_procParamRspEvt,
4284 lwr_mac_procConfigReqEvt,
4285 lwr_mac_procConfigRspEvt,
4286 lwr_mac_procStartReqEvt,
4287 lwr_mac_procInvalidEvt,
4290 /* PHY_STATE_RUNNING */
4291 #ifdef INTEL_TIMER_MODE
4292 lwr_mac_procInvalidEvt,
4294 lwr_mac_procInvalidEvt,
4295 lwr_mac_procInvalidEvt,
4296 lwr_mac_procConfigReqEvt,
4297 lwr_mac_procConfigRspEvt,
4298 lwr_mac_procInvalidEvt,
4299 lwr_mac_procStopReqEvt,
4303 /*******************************************************************
4305 * @brief Sends message to LWR_MAC Fsm Event Handler
4309 * Function : sendToLowerMac
4312 * -Sends message to LowerMac
4314 * @params[in] Message Type
4320 ******************************************************************/
4321 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4323 lwrMacCb.event = msgType;
4324 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4326 /**********************************************************************
4328 **********************************************************************/