1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
30 #include "nr5g_fapi_internal.h"
31 #include "fapi_vendor_extension.h"
36 #include "lwr_mac_fsm.h"
37 #include "lwr_mac_phy.h"
38 #include "lwr_mac_utils.h"
39 #include "mac_utils.h"
41 #define MIB_SFN_BITMASK 0xFC
42 #define PDCCH_PDU_TYPE 0
43 #define PDSCH_PDU_TYPE 1
44 #define SSB_PDU_TYPE 3
45 #define PRACH_PDU_TYPE 0
46 #define PUSCH_PDU_TYPE 1
47 #define PUCCH_PDU_TYPE 2
49 #define SET_MSG_LEN(x, size) x += size
51 /* Global variables */
54 extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
55 void fapiMacConfigRsp(uint16_t cellId);
56 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
57 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
58 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
59 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
61 void lwrMacLayerInit(Region region, Pool pool)
67 memset(&lwrMacCb, 0, sizeof(LwrMacCb));
68 lwrMacCb.region = region;
70 lwrMacCb.clCfgDone = TRUE;
72 lwrMacCb.phyState = PHY_STATE_IDLE;
75 /* Initializing WLS free mem list */
76 lwrMacCb.phySlotIndCntr = 1;
77 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
79 cmLListInit(&wlsBlockToFreeList[idx]);
84 /*******************************************************************
86 * @brief Handles Invalid Request Event
90 * Function : lwr_mac_procInvalidEvt
93 * - Displays the PHY state when the invalid event occurs
96 * @return ROK - success
99 * ****************************************************************/
100 uint8_t lwr_mac_procInvalidEvt(void *msg)
102 #ifdef CALL_FLOW_DEBUG_LOG
103 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
105 DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
110 /*******************************************************************
112 * @brief Fills FAPI message header
116 * Function : fillMsgHeader
119 * -Fills FAPI message header
121 * @params[in] Pointer to header
127 * ****************************************************************/
128 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen)
130 memset(hdr, 0, sizeof(fapi_msg_t));
131 hdr->msg_id = msgType;
132 hdr->length = msgLen;
135 /*******************************************************************
137 * @brief Fills FAPI Config Request message header
141 * Function : fillTlvs
144 * -Fills FAPI Config Request message header
146 * @params[in] Pointer to TLV
153 * ****************************************************************/
154 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
155 uint32_t value, uint32_t *msgLen)
158 tlv->tl.length = length;
160 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
162 /*******************************************************************
164 * @brief fills the cyclic prefix by comparing the bitmask
168 * Function : fillCyclicPrefix
171 * -checks the value with the bitmask and
172 * fills the cellPtr's cyclic prefix.
174 * @params[in] Pointer to ClCellParam
175 * Value to be compared
178 ********************************************************************/
179 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
181 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
183 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
185 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
187 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
191 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
195 /*******************************************************************
197 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
201 * Function : fillSubcarrierSpaceDl
204 * -checks the value with the bitmask and
205 * fills the cellPtr's subcarrier spacing in DL
207 * @params[in] Pointer to ClCellParam
208 * Value to be compared
211 * ****************************************************************/
213 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
215 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
217 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
219 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
221 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
223 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
225 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
227 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
229 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
233 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
237 /*******************************************************************
239 * @brief fills the downlink bandwidth by comparing the bitmask
243 * Function : fillBandwidthDl
246 * -checks the value with the bitmask and
247 * -fills the cellPtr's DL Bandwidth
249 * @params[in] Pointer to ClCellParam
250 * Value to be compared
253 * ****************************************************************/
255 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
257 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
261 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
265 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
269 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
273 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
277 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
281 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
285 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
289 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
291 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
293 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
295 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
297 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
299 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
301 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
303 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
305 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
307 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
311 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
315 /*******************************************************************
317 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
321 * Function : fillSubcarrierSpaceUl
324 * -checks the value with the bitmask and
325 * -fills cellPtr's subcarrier spacing in UL
327 * @params[in] Pointer to ClCellParam
328 * Value to be compared
331 * ****************************************************************/
333 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
335 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
337 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
339 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
341 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
343 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
345 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
347 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
349 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
353 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
357 /*******************************************************************
359 * @brief fills the uplink bandwidth by comparing the bitmask
363 * Function : fillBandwidthUl
366 * -checks the value with the bitmask and
367 * fills the cellPtr's UL Bandwidth
371 * @params[in] Pointer to ClCellParam
372 * Value to be compared
376 * ****************************************************************/
378 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
380 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
384 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
388 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
392 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
396 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
400 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
404 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
408 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
412 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
414 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
416 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
418 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
420 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
422 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
424 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
426 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
428 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
430 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
434 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
437 /*******************************************************************
439 * @brief fills the CCE maping by comparing the bitmask
443 * Function : fillCCEmaping
446 * -checks the value with the bitmask and
447 * fills the cellPtr's CCE Mapping Type
450 * @params[in] Pointer to ClCellParam
451 * Value to be compared
454 * ****************************************************************/
456 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
458 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
460 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
462 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
464 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
468 (*cellPtr)->cceMappingType = INVALID_VALUE;
472 /*******************************************************************
474 * @brief fills the PUCCH format by comparing the bitmask
478 * Function : fillPucchFormat
481 * -checks the value with the bitmask and
482 * fills the cellPtr's pucch format
485 * @params[in] Pointer to ClCellParam
486 * Value to be compared
489 * ****************************************************************/
491 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
493 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
495 (*cellPtr)->pucchFormats = FORMAT_0;
497 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
499 (*cellPtr)->pucchFormats = FORMAT_1;
501 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
503 (*cellPtr)->pucchFormats = FORMAT_2;
505 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
507 (*cellPtr)->pucchFormats = FORMAT_3;
509 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
511 (*cellPtr)->pucchFormats = FORMAT_4;
515 (*cellPtr)->pucchFormats = INVALID_VALUE;
519 /*******************************************************************
521 * @brief fills the PDSCH Mapping Type by comparing the bitmask
525 * Function : fillPdschMappingType
528 * -checks the value with the bitmask and
529 * fills the cellPtr's PDSCH MappingType
531 * @params[in] Pointer to ClCellParam
532 * Value to be compared
535 * ****************************************************************/
537 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
539 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
541 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
543 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
545 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
549 (*cellPtr)->pdschMappingType = INVALID_VALUE;
553 /*******************************************************************
555 * @brief fills the PDSCH Allocation Type by comparing the bitmask
559 * Function : fillPdschAllocationType
562 * -checks the value with the bitmask and
563 * fills the cellPtr's PDSCH AllocationType
565 * @params[in] Pointer to ClCellParam
566 * Value to be compared
569 * ****************************************************************/
571 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
573 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
575 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
577 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
579 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
583 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
587 /*******************************************************************
589 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
593 * Function : fillPrbMappingType
596 * -checks the value with the bitmask and
597 * fills the cellPtr's PRB Mapping Type
599 * @params[in] Pointer to ClCellParam
600 * Value to be compared
603 ******************************************************************/
604 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
606 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
608 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
610 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
612 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
616 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
620 /*******************************************************************
622 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
626 * Function : fillPdschDmrsConfigType
629 * -checks the value with the bitmask and
630 * fills the cellPtr's DmrsConfig Type
632 * @params[in] Pointer to ClCellParam
633 * Value to be compared
636 ******************************************************************/
638 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
640 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
642 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
644 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
646 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
650 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
654 /*******************************************************************
656 * @brief fills the PDSCH DmrsLength by comparing the bitmask
660 * Function : fillPdschDmrsLength
663 * -checks the value with the bitmask and
664 * fills the cellPtr's PdschDmrsLength
666 * @params[in] Pointer to ClCellParam
667 * Value to be compared
670 ******************************************************************/
671 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
673 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
675 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
677 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
679 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
683 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
687 /*******************************************************************
689 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
693 * Function : fillPdschDmrsAddPos
696 * -checks the value with the bitmask and
697 * fills the cellPtr's Pdsch DmrsAddPos
699 * @params[in] Pointer to ClCellParam
700 * Value to be compared
703 ******************************************************************/
705 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
707 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
709 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
711 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
713 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
715 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
717 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
719 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
721 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
725 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
729 /*******************************************************************
731 * @brief fills the Modulation Order in DL by comparing the bitmask
735 * Function : fillModulationOrderDl
738 * -checks the value with the bitmask and
739 * fills the cellPtr's ModulationOrder in DL.
741 * @params[in] Pointer to ClCellParam
742 * Value to be compared
745 ******************************************************************/
746 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
750 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
754 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
758 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
762 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
766 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
770 /*******************************************************************
772 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
776 * Function : fillPuschDmrsConfigType
779 * -checks the value with the bitmask and
780 * fills the cellPtr's PUSCH DmrsConfigType
782 * @params[in] Pointer to ClCellParam
783 * Value to be compared
786 ******************************************************************/
788 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
790 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
792 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
794 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
796 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
800 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
804 /*******************************************************************
806 * @brief fills the PUSCH DmrsLength by comparing the bitmask
810 * Function : fillPuschDmrsLength
813 * -checks the value with the bitmask and
814 * fills the cellPtr's PUSCH DmrsLength
816 * @params[in] Pointer to ClCellParam
817 * Value to be compared
820 ******************************************************************/
822 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
824 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
826 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
828 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
830 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
834 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
838 /*******************************************************************
840 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
844 * Function : fillPuschDmrsAddPos
847 * -checks the value with the bitmask and
848 * fills the cellPtr's PUSCH DmrsAddPos
850 * @params[in] Pointer to ClCellParam
851 * Value to be compared
854 ******************************************************************/
856 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
858 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
860 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
862 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
864 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
866 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
868 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
870 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
872 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
876 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
880 /*******************************************************************
882 * @brief fills the PUSCH Mapping Type by comparing the bitmask
886 * Function : fillPuschMappingType
889 * -checks the value with the bitmask and
890 * fills the cellPtr's PUSCH MappingType
892 * @params[in] Pointer to ClCellParam
893 * Value to be compared
896 ******************************************************************/
898 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
900 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
902 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
904 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
906 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
910 (*cellPtr)->puschMappingType = INVALID_VALUE;
914 /*******************************************************************
916 * @brief fills the PUSCH Allocation Type by comparing the bitmask
920 * Function : fillPuschAllocationType
923 * -checks the value with the bitmask and
924 * fills the cellPtr's PUSCH AllocationType
926 * @params[in] Pointer to ClCellParam
927 * Value to be compared
930 ******************************************************************/
932 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
934 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
936 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
938 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
940 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
944 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
948 /*******************************************************************
950 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
954 * Function : fillPuschPrbMappingType
957 * -checks the value with the bitmask and
958 * fills the cellPtr's PUSCH PRB MApping Type
960 * @params[in] Pointer to ClCellParam
961 * Value to be compared
964 ******************************************************************/
966 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
968 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
970 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
972 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
974 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
978 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
982 /*******************************************************************
984 * @brief fills the Modulation Order in Ul by comparing the bitmask
988 * Function : fillModulationOrderUl
991 * -checks the value with the bitmask and
992 * fills the cellPtr's Modualtsion Order in UL.
994 * @params[in] Pointer to ClCellParam
995 * Value to be compared
998 ******************************************************************/
1000 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1004 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1008 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1012 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1016 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1020 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1024 /*******************************************************************
1026 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1030 * Function : fillPuschAggregationFactor
1033 * -checks the value with the bitmask and
1034 * fills the cellPtr's PUSCH Aggregation Factor
1036 * @params[in] Pointer to ClCellParam
1037 * Value to be compared
1040 ******************************************************************/
1042 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1044 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1046 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1048 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1050 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1052 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1054 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1056 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1058 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1062 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1066 /*******************************************************************
1068 * @brief fills the PRACH Long Format by comparing the bitmask
1072 * Function : fillPrachLongFormat
1075 * -checks the value with the bitmask and
1076 * fills the cellPtr's PRACH Long Format
1078 * @params[in] Pointer to ClCellParam
1079 * Value to be compared
1082 ******************************************************************/
1084 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1086 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1088 (*cellPtr)->prachLongFormats = FORMAT_0;
1090 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1092 (*cellPtr)->prachLongFormats = FORMAT_1;
1094 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1096 (*cellPtr)->prachLongFormats = FORMAT_2;
1098 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1100 (*cellPtr)->prachLongFormats = FORMAT_3;
1104 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1108 /*******************************************************************
1110 * @brief fills the PRACH Short Format by comparing the bitmask
1114 * Function : fillPrachShortFormat
1117 * -checks the value with the bitmask and
1118 * fills the cellPtr's PRACH ShortFormat
1120 * @params[in] Pointer to ClCellParam
1121 * Value to be compared
1124 ******************************************************************/
1126 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1128 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1132 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1136 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1140 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1144 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1146 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1148 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1150 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1152 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1154 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1156 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1158 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1160 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1162 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1166 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1170 /*******************************************************************
1172 * @brief fills the Fd Occasions Type by comparing the bitmask
1176 * Function : fillFdOccasions
1179 * -checks the value with the bitmask and
1180 * fills the cellPtr's Fd Occasions
1182 * @params[in] Pointer to ClCellParam
1183 * Value to be compared
1186 ******************************************************************/
1188 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1192 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1196 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1200 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1204 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1208 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1212 /*******************************************************************
1214 * @brief fills the RSSI Measurement by comparing the bitmask
1218 * Function : fillRssiMeas
1221 * -checks the value with the bitmask and
1222 * fills the cellPtr's RSSI Measurement report
1224 * @params[in] Pointer to ClCellParam
1225 * Value to be compared
1228 ******************************************************************/
1230 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1232 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1234 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1236 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1238 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1242 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1246 /*******************************************************************
1248 * @brief Returns the TLVs value
1252 * Function : getParamValue
1255 * -return TLVs value
1258 * @return ROK - temp
1261 * ****************************************************************/
1263 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1266 posPtr = &tlv->tl.tag;
1267 posPtr += sizeof(tlv->tl.tag);
1268 posPtr += sizeof(tlv->tl.length);
1269 /*TO DO: malloc to SSI memory */
1270 if(type == FAPI_UINT_8)
1272 return(*(uint8_t *)posPtr);
1274 else if(type == FAPI_UINT_16)
1276 return(*(uint16_t *)posPtr);
1278 else if(type == FAPI_UINT_32)
1280 return(*(uint32_t *)posPtr);
1284 DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
1290 /*******************************************************************
1292 * @brief Modifes the received mibPdu to uint32 bit
1293 * and stores it in MacCellCfg
1297 * Function : setMibPdu
1302 * @params[in] Pointer to mibPdu
1303 * pointer to modified value
1304 ******************************************************************/
1305 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1307 *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1308 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1309 DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
1312 /*******************************************************************
1314 * @brief Sends FAPI Param req to PHY
1318 * Function : lwr_mac_procParamReqEvt
1321 * -Sends FAPI Param req to PHY
1324 * @return ROK - success
1327 * ****************************************************************/
1329 uint8_t lwr_mac_procParamReqEvt(void *msg)
1332 #ifdef CALL_FLOW_DEBUG_LOG
1333 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1336 /* startGuardTimer(); */
1337 fapi_param_req_t *paramReq = NULL;
1338 fapi_msg_header_t *msgHeader;
1339 p_fapi_api_queue_elem_t paramReqElem;
1340 p_fapi_api_queue_elem_t headerElem;
1342 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1343 if(paramReq != NULL)
1345 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1346 sizeof(fapi_tx_data_req_t));
1347 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1348 memset(paramReq, 0, sizeof(fapi_param_req_t));
1349 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1351 /* Fill message header */
1352 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1355 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
1356 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1359 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1360 sizeof(fapi_msg_header_t));
1361 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1362 msgHeader->num_msg = 1;
1363 msgHeader->handle = 0;
1365 DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
1366 LwrMacSendToL1(headerElem);
1370 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
1377 /*******************************************************************
1379 * @brief Sends FAPI Param Response to MAC via PHY
1383 * Function : lwr_mac_procParamRspEvt
1386 * -Sends FAPI Param rsp to MAC via PHY
1389 * @return ROK - success
1392 * ****************************************************************/
1394 uint8_t lwr_mac_procParamRspEvt(void *msg)
1397 /* stopGuardTimer(); */
1399 uint32_t encodedVal;
1400 fapi_param_resp_t *paramRsp;
1401 ClCellParam *cellParam = NULLP;
1403 paramRsp = (fapi_param_resp_t *)msg;
1404 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1406 if(paramRsp != NULLP)
1408 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1409 if(cellParam != NULLP)
1411 DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
1412 if(paramRsp->error_code == MSG_OK)
1414 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1416 switch(paramRsp->tlvs[index].tl.tag)
1418 case FAPI_RELEASE_CAPABILITY_TAG:
1419 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1420 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1422 cellParam->releaseCapability = RELEASE_15;
1426 case FAPI_PHY_STATE_TAG:
1427 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1428 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1430 DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1435 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1436 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1437 if(encodedVal != RFAILED && encodedVal != 0)
1439 cellParam->skipBlankDlConfig = SUPPORTED;
1443 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1447 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1448 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1449 if(encodedVal != RFAILED && encodedVal != 0)
1451 cellParam->skipBlankUlConfig = SUPPORTED;
1455 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1459 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1460 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1463 case FAPI_CYCLIC_PREFIX_TAG:
1464 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1465 if(encodedVal != RFAILED)
1467 fillCyclicPrefix(encodedVal, &cellParam);
1471 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1472 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1473 if(encodedVal != RFAILED)
1475 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1479 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1480 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1481 if(encodedVal != RFAILED)
1483 fillBandwidthDl(encodedVal, &cellParam);
1487 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1488 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1489 if(encodedVal != RFAILED)
1491 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1495 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1496 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1497 if(encodedVal != RFAILED)
1499 fillBandwidthUl(encodedVal, &cellParam);
1503 case FAPI_CCE_MAPPING_TYPE_TAG:
1504 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1505 if(encodedVal != RFAILED)
1507 fillCCEmaping(encodedVal, &cellParam);
1511 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1512 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1513 if(encodedVal != RFAILED && encodedVal != 0)
1515 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1519 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1523 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1524 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1525 if(encodedVal != RFAILED && encodedVal != 0)
1527 cellParam->precoderGranularityCoreset = SUPPORTED;
1531 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1535 case FAPI_PDCCH_MU_MIMO_TAG:
1536 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1537 if(encodedVal != RFAILED && encodedVal != 0)
1539 cellParam->pdcchMuMimo = SUPPORTED;
1543 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1547 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1548 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1549 if(encodedVal != RFAILED && encodedVal != 0)
1551 cellParam->pdcchPrecoderCycling = SUPPORTED;
1555 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1559 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1560 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1563 case FAPI_PUCCH_FORMATS_TAG:
1564 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1565 if(encodedVal != RFAILED)
1567 fillPucchFormat(encodedVal, &cellParam);
1571 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1572 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1575 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1576 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1577 if(encodedVal != RFAILED)
1579 fillPdschMappingType(encodedVal, &cellParam);
1583 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1584 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1585 if(encodedVal != RFAILED)
1587 fillPdschAllocationType(encodedVal, &cellParam);
1591 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1592 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1593 if(encodedVal != RFAILED)
1595 fillPrbMappingType(encodedVal, &cellParam);
1599 case FAPI_PDSCH_CBG_TAG:
1600 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1601 if(encodedVal != RFAILED && encodedVal != 0)
1603 cellParam->pdschCbg = SUPPORTED;
1607 cellParam->pdschCbg = NOT_SUPPORTED;
1611 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1612 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1613 if(encodedVal != RFAILED)
1615 fillPdschDmrsConfigType(encodedVal, &cellParam);
1619 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1620 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1621 if(encodedVal != RFAILED)
1623 fillPdschDmrsLength(encodedVal, &cellParam);
1627 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1628 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1629 if(encodedVal != RFAILED)
1631 fillPdschDmrsAddPos(encodedVal, &cellParam);
1635 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1636 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1639 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1640 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1641 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1643 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1647 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1648 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1649 if(encodedVal != RFAILED)
1651 fillModulationOrderDl(encodedVal, &cellParam);
1655 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1656 cellParam->maxMuMimoUsersDl = \
1657 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1660 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1661 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1662 if(encodedVal != RFAILED && encodedVal != 0)
1664 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1668 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1672 case FAPI_PREMPTIONSUPPORT_TAG:
1673 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1674 if(encodedVal != RFAILED && encodedVal != 0)
1676 cellParam->premptionSupport = SUPPORTED;
1680 cellParam->premptionSupport = NOT_SUPPORTED;
1684 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1685 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1686 if(encodedVal != RFAILED && encodedVal != 0)
1688 cellParam->pdschNonSlotSupport = SUPPORTED;
1692 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1696 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1697 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1698 if(encodedVal != RFAILED && encodedVal != 0)
1700 cellParam->uciMuxUlschInPusch = SUPPORTED;
1704 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1708 case FAPI_UCI_ONLY_PUSCH_TAG:
1709 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1710 if(encodedVal != RFAILED && encodedVal != 0)
1712 cellParam->uciOnlyPusch = SUPPORTED;
1716 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1720 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1721 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1722 if(encodedVal != RFAILED && encodedVal != 0)
1724 cellParam->puschFrequencyHopping = SUPPORTED;
1728 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1732 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1733 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1734 if(encodedVal != RFAILED)
1736 fillPuschDmrsConfig(encodedVal, &cellParam);
1740 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1741 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1742 if(encodedVal != RFAILED)
1744 fillPuschDmrsLength(encodedVal, &cellParam);
1748 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1749 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1750 if(encodedVal != RFAILED)
1752 fillPuschDmrsAddPos(encodedVal, &cellParam);
1756 case FAPI_PUSCH_CBG_TAG:
1757 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1758 if(encodedVal != RFAILED && encodedVal != 0)
1760 cellParam->puschCbg = SUPPORTED;
1764 cellParam->puschCbg = NOT_SUPPORTED;
1768 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1769 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1770 if(encodedVal != RFAILED)
1772 fillPuschMappingType(encodedVal, &cellParam);
1776 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1777 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1778 if(encodedVal != RFAILED)
1780 fillPuschAllocationType(encodedVal, &cellParam);
1784 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1785 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1786 if(encodedVal != RFAILED)
1788 fillPuschPrbMappingType(encodedVal, &cellParam);
1792 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1793 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1794 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1796 cellParam->puschMaxPtrsPorts = encodedVal;
1800 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1801 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1804 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1805 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1808 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1809 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1810 if(encodedVal != RFAILED)
1812 fillModulationOrderUl(encodedVal, &cellParam);
1816 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1817 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1820 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1821 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1822 if(encodedVal != RFAILED && encodedVal != 0)
1824 cellParam->dftsOfdmSupport = SUPPORTED;
1828 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1832 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1833 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1834 if(encodedVal != RFAILED)
1836 fillPuschAggregationFactor(encodedVal, &cellParam);
1840 case FAPI_PRACH_LONG_FORMATS_TAG:
1841 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1842 if(encodedVal != RFAILED)
1844 fillPrachLongFormat(encodedVal, &cellParam);
1848 case FAPI_PRACH_SHORT_FORMATS_TAG:
1849 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1850 if(encodedVal != RFAILED)
1852 fillPrachShortFormat(encodedVal, &cellParam);
1856 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1857 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1858 if(encodedVal != RFAILED && encodedVal != 0)
1860 cellParam->prachRestrictedSets = SUPPORTED;
1864 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1868 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1869 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1870 if(encodedVal != RFAILED)
1872 fillFdOccasions(encodedVal, &cellParam);
1876 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1877 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1878 if(encodedVal != RFAILED)
1880 fillRssiMeas(encodedVal, &cellParam);
1884 //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1888 MAC_FREE(cellParam, sizeof(ClCellParam));
1889 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1894 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
1900 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
1906 DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
1914 #ifdef INTEL_TIMER_MODE
1915 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1917 void * wlsHdlr = NULLP;
1918 fapi_msg_header_t *msgHeader;
1919 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1920 p_fapi_api_queue_elem_t headerElem;
1921 p_fapi_api_queue_elem_t iqSampleElem;
1922 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1924 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1926 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1928 /* Fill IQ sample req */
1929 mtGetWlsHdl(&wlsHdlr);
1930 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1931 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1932 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1935 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
1938 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1939 sizeof(fapi_vendor_ext_iq_samples_req_t));
1941 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1942 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1943 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1944 sizeof(fapi_vendor_ext_iq_samples_req_t));
1946 iqSampleReq->iq_samples_info.carrNum = 0;
1947 iqSampleReq->iq_samples_info.numSubframes = 40;
1948 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1949 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1950 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1951 iqSampleReq->iq_samples_info.startFrameNum = 0;
1952 iqSampleReq->iq_samples_info.startSlotNum = 0;
1953 iqSampleReq->iq_samples_info.startSymNum = 0;
1954 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1955 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1957 /* TODO : Fill remaining parameters */
1959 /* Fill message header */
1960 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1963 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1966 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1967 sizeof(fapi_msg_header_t));
1968 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1969 msgHeader->num_msg = 1;
1970 msgHeader->handle = 0;
1972 DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
1973 LwrMacSendToL1(headerElem);
1978 /*******************************************************************
1980 * @brief Sends FAPI Config req to PHY
1984 * Function : lwr_mac_procConfigReqEvt
1987 * -Sends FAPI Config Req to PHY
1990 * @return ROK - success
1993 * ****************************************************************/
1995 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1998 #ifdef CALL_FLOW_DEBUG_LOG
1999 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
2002 uint8_t slotIdx = 0;
2003 uint8_t symbolIdx =0;
2006 uint16_t *cellId =NULLP;
2007 uint16_t cellIdx =0;
2008 uint32_t msgLen = 0;
2010 uint32_t dlFreq = 0, ulFreq = 0;
2011 MacCellCfg macCfgParams;
2012 fapi_vendor_msg_t *vendorMsg;
2013 fapi_config_req_t *configReq;
2014 fapi_msg_header_t *msgHeader;
2015 p_fapi_api_queue_elem_t headerElem;
2016 p_fapi_api_queue_elem_t vendorMsgQElem;
2017 p_fapi_api_queue_elem_t cfgReqQElem;
2019 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2022 cellId = (uint16_t *)msg;
2023 GET_CELL_IDX(*cellId, cellIdx);
2024 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2026 /* Fill Cell Configuration in lwrMacCb */
2027 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2028 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2029 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2032 /* Allocte And fill Vendor msg */
2033 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2036 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2039 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2040 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2041 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2042 vendorMsg->config_req_vendor.hopping_id = 0;
2043 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2044 vendorMsg->config_req_vendor.group_hop_flag = 0;
2045 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2046 vendorMsg->config_req_vendor.urllc_capable = 0;
2047 vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2048 vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2049 vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2050 vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2051 vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2052 vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2053 vendorMsg->start_req_vendor.sfn = 0;
2054 vendorMsg->start_req_vendor.slot = 0;
2055 vendorMsg->start_req_vendor.mode = 4;
2057 vendorMsg->start_req_vendor.count = 0;
2058 vendorMsg->start_req_vendor.period = 1;
2060 /* Fill FAPI config req */
2061 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2064 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2065 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2068 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2069 sizeof(fapi_config_req_t));
2071 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2072 memset(configReq, 0, sizeof(fapi_config_req_t));
2073 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2075 configReq->number_of_tlvs = 25;
2077 configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2080 msgLen = sizeof(configReq->number_of_tlvs);
2082 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2083 sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
2084 dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
2085 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2086 sizeof(uint32_t), dlFreq, &msgLen);
2087 /* Due to bug in Intel FT code, commenting TLVs that are are not
2088 * needed to avoid error. Must be uncommented when FT bug is fixed */
2089 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2090 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2091 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2092 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2093 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2094 sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2095 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2096 sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
2097 ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
2098 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2099 sizeof(uint32_t), ulFreq, &msgLen);
2100 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2101 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2102 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2103 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2104 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2105 sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2106 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2107 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2109 /* fill cell config */
2110 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2111 sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2112 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2113 sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2115 /* fill SSB configuration */
2116 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2117 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2118 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2119 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2120 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2121 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2123 /* fill PRACH configuration */
2124 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2125 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2126 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2127 sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2128 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2129 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2130 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2131 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2132 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2133 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2134 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2135 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2136 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2137 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2138 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2139 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2140 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2141 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2142 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2143 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2144 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2146 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2147 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2148 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2153 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2156 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2157 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2158 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2159 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2161 /* fill SSB table */
2162 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2163 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2164 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2165 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2166 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2167 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2168 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2169 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2171 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2172 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2173 sizeof(uint32_t), mib, &msgLen);
2175 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2176 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2177 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2178 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2179 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2180 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2181 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2182 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2185 /* fill TDD table */
2186 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2187 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2189 for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2191 for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2193 /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2194 if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2195 (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2197 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2198 sizeof(uint8_t), DL_SYMBOL, &msgLen);
2201 /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2202 else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) || \
2203 (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2204 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2206 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2207 sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2209 /*Fill Partial UL symbols and Full-UL slot*/
2212 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2213 sizeof(uint8_t), UL_SYMBOL, &msgLen);
2219 /* fill measurement config */
2220 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2221 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2223 /* fill DMRS Type A Pos */
2224 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2225 sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2227 /* Fill message header */
2228 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2231 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2232 LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2233 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2236 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2237 sizeof(fapi_msg_header_t));
2238 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2239 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2240 msgHeader->handle = 0;
2242 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2243 LwrMacSendToL1(headerElem);
2247 } /* lwr_mac_handleConfigReqEvt */
2249 /*******************************************************************
2251 * @brief Processes config response from phy
2255 * Function : lwr_mac_procConfigRspEvt
2258 * Processes config response from phy
2260 * @params[in] FAPI message pointer
2261 * @return ROK - success
2264 * ****************************************************************/
2266 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2269 fapi_config_resp_t *configRsp;
2270 configRsp = (fapi_config_resp_t *)msg;
2272 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2275 if(configRsp != NULL)
2277 if(configRsp->error_code == MSG_OK)
2279 DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
2280 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2281 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2283 * Store config response into an intermediate struture and send to MAC
2284 * Support LC and LWLC for sending config rsp to MAC
2286 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2290 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
2296 DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
2302 } /* lwr_mac_procConfigRspEvt */
2304 /*******************************************************************
2306 * @brief Build and send start request to phy
2310 * Function : lwr_mac_procStartReqEvt
2313 * Build and send start request to phy
2315 * @params[in] FAPI message pointer
2316 * @return ROK - success
2319 * ****************************************************************/
2320 uint8_t lwr_mac_procStartReqEvt(void *msg)
2323 #ifdef CALL_FLOW_DEBUG_LOG
2324 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2326 fapi_msg_header_t *msgHeader;
2327 fapi_start_req_t *startReq;
2328 fapi_vendor_msg_t *vendorMsg;
2329 p_fapi_api_queue_elem_t headerElem;
2330 p_fapi_api_queue_elem_t startReqElem;
2331 p_fapi_api_queue_elem_t vendorMsgElem;
2333 /* Allocte And fill Vendor msg */
2334 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2337 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
2340 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2341 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2342 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2343 vendorMsg->start_req_vendor.sfn = 0;
2344 vendorMsg->start_req_vendor.slot = 0;
2345 vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2347 vendorMsg->start_req_vendor.count = 0;
2348 vendorMsg->start_req_vendor.period = 1;
2351 /* Fill FAPI config req */
2352 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2355 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
2356 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2359 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2360 sizeof(fapi_start_req_t));
2362 startReq = (fapi_start_req_t *)(startReqElem + 1);
2363 memset(startReq, 0, sizeof(fapi_start_req_t));
2364 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2366 /* Fill message header */
2367 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2370 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2371 LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2372 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2375 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2376 sizeof(fapi_msg_header_t));
2377 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2378 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2379 msgHeader->handle = 0;
2382 DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
2383 LwrMacSendToL1(headerElem);
2386 } /* lwr_mac_procStartReqEvt */
2388 /*******************************************************************
2390 * @brief Sends FAPI Stop Req to PHY
2394 * Function : lwr_mac_procStopReqEvt
2397 * -Sends FAPI Stop Req to PHY
2400 * @return ROK - success
2403 ********************************************************************/
2405 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2408 #ifdef CALL_FLOW_DEBUG_LOG
2409 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2412 fapi_stop_req_t *stopReq;
2413 p_fapi_api_queue_elem_t stopReqElem;
2415 vendorMsg->sfn = slotInfo.sfn;
2416 vendorMsg->slot = slotInfo.slot;
2418 /* Fill FAPI stop req */
2419 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2422 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
2425 FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2426 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2427 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2428 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2431 DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
2432 prevElem->p_next = stopReqElem;
2439 /*******************************************************************
2441 * @brief fills SSB PDU required for DL TTI info in MAC
2445 * Function : fillSsbPdu
2448 * -Fills the SSB PDU info
2451 * @params[in] Pointer to FAPI DL TTI Req
2452 * Pointer to RgCellCb
2453 * Pointer to msgLen of DL TTI Info
2456 ******************************************************************/
2458 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2459 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2461 uint32_t mibPayload = 0;
2462 if(dlTtiReqPdu != NULL)
2464 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2465 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
2466 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2467 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2468 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
2469 /* ssbOfPdufstA to be filled in ssbCfg */
2470 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
2471 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2472 /* Bit manipulation for SFN */
2473 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2474 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2475 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2476 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2477 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2478 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2479 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2480 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2481 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2487 /*******************************************************************
2489 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2493 * Function : fillSib1DlDciPdu
2496 * -Fills the Dl DCI PDU
2498 * @params[in] Pointer to fapi_dl_dci_t
2499 * Pointer to PdcchCfg
2502 ******************************************************************/
2504 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2506 if(dlDciPtr != NULLP)
2512 uint16_t coreset0Size=0;
2515 uint32_t freqDomResAssign=0;
2516 uint32_t timeDomResAssign=0;
2517 uint8_t VRB2PRBMap=0;
2518 uint32_t modNCodScheme=0;
2519 uint8_t redundancyVer=0;
2520 uint32_t sysInfoInd=0;
2521 uint32_t reserved=0;
2523 /* Size(in bits) of each field in DCI format 0_1
2524 * as mentioned in spec 38.214 */
2525 uint8_t freqDomResAssignSize = 0;
2526 uint8_t timeDomResAssignSize = 4;
2527 uint8_t VRB2PRBMapSize = 1;
2528 uint8_t modNCodSchemeSize = 5;
2529 uint8_t redundancyVerSize = 2;
2530 uint8_t sysInfoIndSize = 1;
2531 uint8_t reservedSize = 15;
2533 dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti;
2534 dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId;
2535 dlDciPtr[0].scramblingRnti = sib1PdcchInfo->dci[0].scramblingRnti;
2536 dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex;
2537 dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel;
2538 dlDciPtr[0].pc_and_bform.numPrgs = sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs;
2539 dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize;
2540 dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
2541 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
2542 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
2543 dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
2544 dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
2546 /* Calculating freq domain resource allocation field value and size
2547 * coreset0Size = Size of coreset 0
2548 * RBStart = Starting Virtual Rsource block
2549 * RBLen = length of contiguously allocted RBs
2550 * Spec 38.214 Sec 5.1.2.2.2
2552 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2553 rbStart = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
2554 rbLen = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
2556 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2558 if((rbLen - 1) <= floor(coreset0Size / 2))
2559 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2561 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2562 + (coreset0Size - 1 - rbStart);
2564 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2567 /* Fetching DCI field values */
2568 timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1;
2569 VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2570 modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
2571 redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex;
2572 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2575 /* Reversing bits in each DCI field */
2576 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2577 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2578 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2579 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2580 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2581 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2583 /* Calulating total number of bytes in buffer */
2584 dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2585 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2586 + sysInfoIndSize + reservedSize;
2588 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2589 if(dlDciPtr[0].payloadSizeBits % 8)
2592 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2594 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2598 /* Initialize buffer */
2599 for(bytePos = 0; bytePos < numBytes; bytePos++)
2600 dlDciPtr[0].payload[bytePos] = 0;
2602 bytePos = numBytes - 1;
2605 /* Packing DCI format fields */
2606 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2607 freqDomResAssign, freqDomResAssignSize);
2608 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2609 timeDomResAssign, timeDomResAssignSize);
2610 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2611 VRB2PRBMap, VRB2PRBMapSize);
2612 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2613 modNCodScheme, modNCodSchemeSize);
2614 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2615 redundancyVer, redundancyVerSize);
2616 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2617 sysInfoInd, sysInfoIndSize);
2618 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2619 reserved, reservedSize);
2622 } /* fillSib1DlDciPdu */
2625 /*******************************************************************
2627 * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2631 * Function : fillPageDlDciPdu
2634 * -Fills the Dl DCI PDU for Paging
2636 * @params[in] Pointer to fapi_dl_dci_t
2637 * Pointer to dlPageAlloc
2640 ******************************************************************/
2642 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCellCfg *macCellCfg)
2644 if(dlDciPtr != NULLP)
2650 uint16_t coreset0Size = 0;
2651 uint16_t rbStart = 0;
2653 uint8_t shortMsgInd = 0;
2654 uint8_t shortMsg = 0;
2655 uint32_t freqDomResAssign = 0;
2656 uint32_t timeDomResAssign = 0;
2657 uint8_t VRB2PRBMap = 0;
2658 uint32_t modNCodScheme = 0;
2659 uint8_t tbScaling = 0;
2660 uint32_t reserved = 0;
2662 /* Size(in bits) of each field in DCI format 1_0
2663 * as mentioned in spec 38.214 */
2664 uint8_t shortMsgIndSize = 2;
2665 uint8_t shortMsgSize = 8;
2666 uint8_t freqDomResAssignSize = 0;
2667 uint8_t timeDomResAssignSize = 4;
2668 uint8_t VRB2PRBMapSize = 1;
2669 uint8_t modNCodSchemeSize = 5;
2670 uint8_t tbScalingSize = 2;
2671 uint8_t reservedSize = 6;
2673 dlDciPtr[0].rnti = P_RNTI;
2674 dlDciPtr[0].scramblingId = macCellCfg->cellCfg.phyCellId;
2675 dlDciPtr[0].scramblingRnti = 0;
2676 dlDciPtr[0].cceIndex = dlPageAlloc->pageDlDci.cceIndex;
2677 dlDciPtr[0].aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
2678 dlDciPtr[0].pc_and_bform.numPrgs = 1;
2679 dlDciPtr[0].pc_and_bform.prgSize = 1;
2680 dlDciPtr[0].pc_and_bform.digBfInterfaces = 0;
2681 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = 0;
2682 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
2683 dlDciPtr[0].beta_pdcch_1_0 = 0;
2684 dlDciPtr[0].powerControlOffsetSS = 0;
2686 /* Calculating freq domain resource allocation field value and size
2687 * coreset0Size = Size of coreset 0
2688 * RBStart = Starting Virtual Rsource block
2689 * RBLen = length of contiguously allocted RBs
2690 * Spec 38.214 Sec 5.1.2.2.2
2692 coreset0Size = dlPageAlloc->pageDlDci.coreSetSize;
2693 rbStart = dlPageAlloc->pageDlSch.freqAlloc.startPrb;
2694 rbLen = dlPageAlloc->pageDlSch.freqAlloc.numPrb;
2696 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2698 if((rbLen - 1) <= floor(coreset0Size / 2))
2699 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2701 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2702 + (coreset0Size - 1 - rbStart);
2704 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2707 /*Fetching DCI field values */
2709 /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2710 if(dlPageAlloc->shortMsgInd != TRUE)
2712 /*When Short Msg is absent*/
2718 /*Short Msg is Present*/
2719 if(dlPageAlloc->pageDlSch.dlPagePduLen == 0 || dlPageAlloc->pageDlSch.dlPagePdu == NULLP)
2721 /*When Paging Msg is absent*/
2726 /*Both Short and Paging is present*/
2729 shortMsg = dlPageAlloc->shortMsg;
2732 timeDomResAssign = 0;
2733 VRB2PRBMap = dlPageAlloc->pageDlSch.vrbPrbMapping;
2734 modNCodScheme = dlPageAlloc->pageDlSch.tbInfo.mcs;
2738 /* Reversing bits in each DCI field */
2739 shortMsgInd = reverseBits(shortMsgInd, shortMsgIndSize);
2740 shortMsg = reverseBits(shortMsg, shortMsgSize);
2741 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2742 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2743 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2744 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2745 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2746 tbScaling = reverseBits(tbScaling, tbScalingSize);
2748 /* Calulating total number of bytes in buffer */
2749 dlDciPtr[0].payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2750 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2751 + tbScaling + reservedSize;
2753 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2754 if(dlDciPtr[0].payloadSizeBits % 8)
2759 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2761 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2765 /* Initialize buffer */
2766 for(bytePos = 0; bytePos < numBytes; bytePos++)
2768 dlDciPtr[0].payload[bytePos] = 0;
2771 bytePos = numBytes - 1;
2774 /* Packing DCI format fields */
2775 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2776 shortMsgInd, shortMsgIndSize);
2777 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2778 shortMsg, shortMsgSize);
2779 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2780 freqDomResAssign, freqDomResAssignSize);
2781 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2782 timeDomResAssign, timeDomResAssignSize);
2783 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2784 VRB2PRBMap, VRB2PRBMapSize);
2785 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2786 modNCodScheme, modNCodSchemeSize);
2787 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2788 tbScaling, tbScalingSize);
2789 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2790 reserved, reservedSize);
2792 } /* fillPageDlDciPdu */
2794 /*******************************************************************
2796 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2800 * Function : fillRarDlDciPdu
2803 * -Fills the Dl DCI PDU
2805 * @params[in] Pointer to fapi_dl_dci_t
2806 * Pointer to PdcchCfg
2809 ******************************************************************/
2811 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2813 if(dlDciPtr != NULLP)
2815 uint8_t numBytes =0;
2819 uint16_t coreset0Size =0;
2820 uint16_t rbStart =0;
2822 uint32_t freqDomResAssign =0;
2823 uint8_t timeDomResAssign =0;
2824 uint8_t VRB2PRBMap =0;
2825 uint8_t modNCodScheme =0;
2826 uint8_t tbScaling =0;
2827 uint32_t reserved =0;
2829 /* Size(in bits) of each field in DCI format 1_0 */
2830 uint8_t freqDomResAssignSize = 0;
2831 uint8_t timeDomResAssignSize = 4;
2832 uint8_t VRB2PRBMapSize = 1;
2833 uint8_t modNCodSchemeSize = 5;
2834 uint8_t tbScalingSize = 2;
2835 uint8_t reservedSize = 16;
2837 dlDciPtr[0].rnti = rarPdcchInfo->dci[0].rnti;
2838 dlDciPtr[0].scramblingId = rarPdcchInfo->dci[0].scramblingId;
2839 dlDciPtr[0].scramblingRnti = rarPdcchInfo->dci[0].scramblingRnti;
2840 dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex;
2841 dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel;
2842 dlDciPtr[0].pc_and_bform.numPrgs = rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs;
2843 dlDciPtr[0].pc_and_bform.prgSize = rarPdcchInfo->dci[0].beamPdcchInfo.prgSize;
2844 dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
2845 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
2846 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
2847 dlDciPtr[0].beta_pdcch_1_0 = rarPdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
2848 dlDciPtr[0].powerControlOffsetSS = rarPdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
2850 /* Calculating freq domain resource allocation field value and size
2851 * coreset0Size = Size of coreset 0
2852 * RBStart = Starting Virtual Rsource block
2853 * RBLen = length of contiguously allocted RBs
2854 * Spec 38.214 Sec 5.1.2.2.2
2857 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2858 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2859 rbStart = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
2860 rbLen = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
2862 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2864 if((rbLen - 1) <= floor(coreset0Size / 2))
2865 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2867 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2868 + (coreset0Size - 1 - rbStart);
2870 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2873 /* Fetching DCI field values */
2874 timeDomResAssign = rarPdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex;
2875 VRB2PRBMap = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2876 modNCodScheme = rarPdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
2877 tbScaling = 0; /* configured to 0 scaling */
2880 /* Reversing bits in each DCI field */
2881 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2882 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2883 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2884 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2885 tbScaling = reverseBits(tbScaling, tbScalingSize);
2887 /* Calulating total number of bytes in buffer */
2888 dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2889 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2891 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2892 if(dlDciPtr[0].payloadSizeBits % 8)
2895 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2897 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2901 /* Initialize buffer */
2902 for(bytePos = 0; bytePos < numBytes; bytePos++)
2903 dlDciPtr[0].payload[bytePos] = 0;
2905 bytePos = numBytes - 1;
2908 /* Packing DCI format fields */
2909 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2910 freqDomResAssign, freqDomResAssignSize);
2911 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2912 timeDomResAssign, timeDomResAssignSize);
2913 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2914 VRB2PRBMap, VRB2PRBMapSize);
2915 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2916 modNCodScheme, modNCodSchemeSize);
2917 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2918 tbScaling, tbScalingSize);
2919 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2920 reserved, reservedSize);
2922 } /* fillRarDlDciPdu */
2924 /*******************************************************************
2926 * @brief fills DL DCI PDU required for DL TTI info in MAC
2930 * Function : fillDlMsgDlDciPdu
2933 * -Fills the Dl DCI PDU
2935 * @params[in] Pointer to fapi_dl_dci_t
2936 * Pointer to PdcchCfg
2939 ******************************************************************/
2940 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2941 DlMsgSchInfo *dlMsgSchInfo)
2943 uint8_t dciIndex = 0;
2944 if(dlDciPtr != NULLP)
2950 uint16_t coresetSize = 0;
2951 uint16_t rbStart = 0;
2953 uint8_t dciFormatId;
2954 uint32_t freqDomResAssign;
2955 uint8_t timeDomResAssign;
2957 uint8_t modNCodScheme;
2959 uint8_t redundancyVer = 0;
2960 uint8_t harqProcessNum = 0;
2961 uint8_t dlAssignmentIdx = 0;
2962 uint8_t pucchTpc = 0;
2963 uint8_t pucchResoInd = 0;
2964 uint8_t harqFeedbackInd = 0;
2966 /* Size(in bits) of each field in DCI format 1_0 */
2967 uint8_t dciFormatIdSize = 1;
2968 uint8_t freqDomResAssignSize = 0;
2969 uint8_t timeDomResAssignSize = 4;
2970 uint8_t VRB2PRBMapSize = 1;
2971 uint8_t modNCodSchemeSize = 5;
2972 uint8_t ndiSize = 1;
2973 uint8_t redundancyVerSize = 2;
2974 uint8_t harqProcessNumSize = 4;
2975 uint8_t dlAssignmentIdxSize = 2;
2976 uint8_t pucchTpcSize = 2;
2977 uint8_t pucchResoIndSize = 3;
2978 uint8_t harqFeedbackIndSize = 3;
2980 for(dciIndex = 0; dciIndex < pdcchInfo->numDlDci; dciIndex++)
2982 dlDciPtr[dciIndex].rnti = pdcchInfo->dci[dciIndex].rnti;
2983 dlDciPtr[dciIndex].scramblingId = pdcchInfo->dci[dciIndex].scramblingId;
2984 dlDciPtr[dciIndex].scramblingRnti = pdcchInfo->dci[dciIndex].scramblingRnti;
2985 dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex;
2986 dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel;
2987 dlDciPtr[dciIndex].pc_and_bform.numPrgs = pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs;
2988 dlDciPtr[dciIndex].pc_and_bform.prgSize = pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize;
2989 dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces;
2990 dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx;
2991 dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0];
2992 dlDciPtr[dciIndex].beta_pdcch_1_0 = pdcchInfo->dci[dciIndex].txPdcchPower.beta_pdcch_1_0;
2993 dlDciPtr[dciIndex].powerControlOffsetSS = pdcchInfo->dci[dciIndex].txPdcchPower.powerControlOffsetSS;
2995 /* Calculating freq domain resource allocation field value and size
2996 * coreset0Size = Size of coreset 0
2997 * RBStart = Starting Virtual Rsource block
2998 * RBLen = length of contiguously allocted RBs
2999 * Spec 38.214 Sec 5.1.2.2.2
3001 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
3002 rbStart = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.startPrb;
3003 rbLen = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.numPrb;
3005 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
3007 if((rbLen - 1) <= floor(coresetSize / 2))
3008 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3010 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3011 + (coresetSize - 1 - rbStart);
3013 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3016 /* Fetching DCI field values */
3017 dciFormatId = dlMsgSchInfo->dciFormatId; /* Always set to 1 for DL */
3018 timeDomResAssign = pdcchInfo->dci[dciIndex].pdschCfg.pdschTimeAlloc.rowIndex -1;
3019 VRB2PRBMap = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
3020 modNCodScheme = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].mcsIndex;
3021 ndi = dlMsgSchInfo->transportBlock[0].ndi;
3022 redundancyVer = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].rvIndex;
3023 harqProcessNum = dlMsgSchInfo->harqProcNum;
3024 dlAssignmentIdx = dlMsgSchInfo->dlAssignIdx;
3025 pucchTpc = dlMsgSchInfo->pucchTpc;
3026 pucchResoInd = dlMsgSchInfo->pucchResInd;
3027 harqFeedbackInd = dlMsgSchInfo->harqFeedbackInd;
3029 /* Reversing bits in each DCI field */
3030 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3031 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3032 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3033 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3034 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3035 ndi = reverseBits(ndi, ndiSize);
3036 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3037 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3038 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3039 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
3040 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
3041 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3044 /* Calulating total number of bytes in buffer */
3045 dlDciPtr[dciIndex].payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3046 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3047 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3048 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3050 numBytes = dlDciPtr[dciIndex].payloadSizeBits / 8;
3051 if(dlDciPtr[dciIndex].payloadSizeBits % 8)
3054 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3056 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
3060 /* Initialize buffer */
3061 for(bytePos = 0; bytePos < numBytes; bytePos++)
3062 dlDciPtr[dciIndex].payload[bytePos] = 0;
3064 bytePos = numBytes - 1;
3067 /* Packing DCI format fields */
3068 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3069 dciFormatId, dciFormatIdSize);
3070 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3071 freqDomResAssign, freqDomResAssignSize);
3072 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3073 timeDomResAssign, timeDomResAssignSize);
3074 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3075 VRB2PRBMap, VRB2PRBMapSize);
3076 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3077 modNCodScheme, modNCodSchemeSize);
3078 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3080 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3081 redundancyVer, redundancyVerSize);
3082 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3083 redundancyVer, redundancyVerSize);
3084 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3085 harqProcessNum, harqProcessNumSize);
3086 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3087 dlAssignmentIdx, dlAssignmentIdxSize);
3088 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3089 pucchTpc, pucchTpcSize);
3090 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3091 pucchResoInd, pucchResoIndSize);
3092 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3093 harqFeedbackInd, harqFeedbackIndSize);
3098 /*******************************************************************
3100 * @brief fills Dl PDCCH Info from DL PageAlloc
3104 * Function : fillPdcchInfoFrmPageAlloc
3107 * -Fills the PdcchInfo
3109 * @params[in] Pointer to DlPageAlloc
3110 * Pointer to PdcchCfg
3113 ******************************************************************/
3114 void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc, MacCellCfg *macCellCfg)
3116 if(dlTtiReqPdu != NULLP)
3118 BwpCfg *bwp = NULLP;
3120 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3121 bwp = &pageAlloc->bwp;
3122 fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg);
3124 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3126 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3127 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3128 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3129 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3131 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pageAlloc->pageDlDci.ssStartSymbolIndex;
3132 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pageAlloc->pageDlDci.durationSymbols;
3133 convertFreqDomRsrcMapToIAPIFormat(pageAlloc->pageDlDci.freqDomainResource, \
3134 dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3135 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pageAlloc->pageDlDci.cceRegMappingType;
3136 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
3137 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
3138 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
3139 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity;
3140 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1;
3141 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = CORESET_TYPE0;
3143 /* Calculating PDU length. Considering only one dl dci pdu for now */
3144 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3146 /* Filling Vendor message PDU */
3147 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3148 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3149 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3150 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3151 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3155 /*******************************************************************
3157 * @brief fills PDCCH PDU required for DL TTI info in MAC
3161 * Function : fillPdcchPdu
3164 * -Fills the Pdcch PDU info
3167 * @params[in] Pointer to FAPI DL TTI Req
3168 * Pointer to PdcchCfg
3171 ******************************************************************/
3172 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3173 RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3175 uint8_t dciIndex = 0;
3177 if(dlTtiReqPdu != NULLP)
3179 PdcchCfg *pdcchInfo = NULLP;
3180 BwpCfg *bwp = NULLP;
3182 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3183 if(rntiType == SI_RNTI_TYPE)
3185 pdcchInfo = dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3186 bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3187 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3189 else if(rntiType == RA_RNTI_TYPE)
3191 pdcchInfo = dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3192 bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3193 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3195 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3197 pdcchInfo = dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg;
3198 bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp;
3199 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3200 dlSlot->dlInfo.dlMsgAlloc[ueIdx]);
3204 DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
3208 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3209 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3210 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3211 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3212 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3214 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3215 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3216 convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
3217 dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3218 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3219 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3220 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3221 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
3222 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3223 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3224 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3226 /* Calculating PDU length. Considering only one dl dci pdu for now */
3227 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3229 /* Filling Vendor message PDU */
3230 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3231 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3232 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3233 for(dciIndex = 0; dciIndex < dlTtiReqPdu->pdu.pdcch_pdu.numDlDci; dciIndex++)
3235 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_pdcch_to_ssb = 0;
3236 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_dmrs_to_ssb = 0;
3243 /*******************************************************************
3245 * @brief fills PDSCH PDU from PageAlloc required for DL TTI info in MAC
3249 * Function : fillPagePdschPdu
3252 * -Fills the Pdsch PDU info
3255 * @params[in] Pointer to FAPI DL TTI Req
3256 * Pointer to PdschCfg
3257 * Pointer to msgLen of DL TTI Info
3260 ******************************************************************/
3261 void fillPagePdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc,
3262 uint16_t pduIndex, MacCellCfg *macCellCfg)
3266 if(dlTtiReqPdu != NULLP)
3268 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3269 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3270 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */
3271 dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI;
3272 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3273 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb;
3274 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb;
3275 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing;
3276 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix;
3277 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1;
3278 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3280 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
3281 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2;
3282 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs;
3283 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0;
3284 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0;
3285 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize;
3287 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
3288 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1;
3289 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0;
3290 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0;
3291 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
3292 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType;
3293 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
3294 dlTtiReqPdu->pdu.pdsch_pdu.scid = 0;
3295 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1;
3296 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
3297 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1;
3298 /* since we are using type-1, hence rbBitmap excluded */
3299 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
3300 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
3301 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping;
3302 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb;
3303 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb;
3304 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
3305 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
3306 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
3307 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
3308 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
3309 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0;
3310 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0;
3311 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pageAlloc->pageDlSch.timeAlloc.mappingType;
3312 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols;
3313 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos;
3315 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3317 /* DL TTI Request vendor message */
3318 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3319 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3320 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3321 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3323 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3328 /*******************************************************************
3330 * @brief fills PDSCH PDU required for DL TTI info in MAC
3334 * Function : fillPdschPdu
3337 * -Fills the Pdsch PDU info
3340 * @params[in] Pointer to FAPI DL TTI Req
3341 * Pointer to PdschCfg
3342 * Pointer to msgLen of DL TTI Info
3345 ******************************************************************/
3347 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3348 BwpCfg bwp, uint16_t pduIndex)
3352 if(dlTtiReqPdu != NULLP)
3354 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3355 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3356 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3357 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3358 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3359 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3360 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3361 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3362 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3363 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3364 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3366 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3367 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3368 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3369 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3370 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3371 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3373 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3374 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3375 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3376 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3377 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3378 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3379 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3380 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3381 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3382 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3383 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3384 /* since we are using type-1, hence rbBitmap excluded */
3385 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
3386 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
3387 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3388 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
3389 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
3390 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3391 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3392 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3393 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3394 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3395 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3396 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3397 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3398 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3399 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3400 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3401 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3403 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3405 /* DL TTI Request vendor message */
3406 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3407 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3408 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3409 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3411 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3416 /***********************************************************************
3418 * @brief calculates the total size to be allocated for DL TTI Req
3422 * Function : calcDlTtiReqPduCount
3425 * -calculates the total pdu count to be allocated for DL TTI Req
3427 * @params[in] MacDlSlot *dlSlot
3430 * ********************************************************************/
3431 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3434 uint8_t idx = 0, ueIdx=0;
3436 if(dlSlot->dlInfo.isBroadcastPres)
3438 if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3440 for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3442 /* SSB PDU is filled */
3446 if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3448 /* PDCCH and PDSCH PDU is filled */
3453 if(dlSlot->pageAllocInfo)
3455 /* PDCCH and PDSCH PDU is filled */
3459 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3461 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3463 /* PDCCH and PDSCH PDU is filled */
3464 if(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg && dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3470 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3472 /* PDCCH and PDSCH PDU is filled */
3473 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)
3475 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3482 /***********************************************************************
3484 * @brief calculates the total size to be allocated for DL TTI Req
3488 * Function : calcTxDataReqPduCount
3491 * -calculates the total pdu count to be allocated for DL TTI Req
3493 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3496 * ********************************************************************/
3497 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3499 uint8_t count = 0, ueIdx=0;
3501 if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3505 if(dlSlot->pageAllocInfo)
3510 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3512 if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && (dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
3515 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3517 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3524 /***********************************************************************
3526 * @brief fills the SIB1 TX-DATA request message
3530 * Function : fillSib1TxDataReq
3533 * - fills the SIB1 TX-DATA request message
3535 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3536 * @params[in] macCellCfg consist of SIB1 pdu
3537 * @params[in] uint32_t *msgLen
3538 * @params[in] uint16_t pduIndex
3541 * ********************************************************************/
3542 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3545 uint32_t payloadSize = 0;
3546 uint8_t *sib1Payload = NULLP;
3547 fapi_api_queue_elem_t *payloadElem = NULLP;
3548 #ifdef INTEL_WLS_MEM
3549 void * wlsHdlr = NULLP;
3552 pduDesc[pduIndex].pdu_index = pduIndex;
3553 pduDesc[pduIndex].num_tlvs = 1;
3556 payloadSize = pdschCfg->codeword[0].tbSize;
3557 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3558 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3559 LWR_MAC_ALLOC(sib1Payload, payloadSize);
3560 if(sib1Payload == NULLP)
3564 payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3565 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3566 macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3567 memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3569 #ifdef INTEL_WLS_MEM
3570 mtGetWlsHdl(&wlsHdlr);
3571 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3573 pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3575 pduDesc[pduIndex].pdu_length = payloadSize;
3577 #ifdef INTEL_WLS_MEM
3578 addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3580 LWR_MAC_FREE(sib1Payload, payloadSize);
3586 /***********************************************************************
3588 * @brief fills the PAGE TX-DATA request message
3592 * Function : fillPageTxDataReq
3595 * - fills the Page TX-DATA request message
3597 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3598 * @params[in] macCellCfg consist of SIB1 pdu
3599 * @params[in] uint32_t *msgLen
3600 * @params[in] uint16_t pduIndex
3603 * ********************************************************************/
3604 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo)
3606 uint32_t payloadSize = 0;
3607 uint8_t *pagePayload = NULLP;
3608 fapi_api_queue_elem_t *payloadElem = NULLP;
3609 #ifdef INTEL_WLS_MEM
3610 void * wlsHdlr = NULLP;
3613 pduDesc[pduIndex].pdu_index = pduIndex;
3614 pduDesc[pduIndex].num_tlvs = 1;
3617 payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
3618 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3619 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3620 LWR_MAC_ALLOC(pagePayload, payloadSize);
3621 if(pagePayload == NULLP)
3625 payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3626 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3627 pageAllocInfo->pageDlSch.dlPagePduLen);
3628 memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen);
3630 #ifdef INTEL_WLS_MEM
3631 mtGetWlsHdl(&wlsHdlr);
3632 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3634 pduDesc[pduIndex].tlvs[0].value = pagePayload;
3636 pduDesc[pduIndex].pdu_length = payloadSize;
3638 #ifdef INTEL_WLS_MEM
3639 addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3641 LWR_MAC_FREE(pagePayload, payloadSize);
3647 /***********************************************************************
3649 * @brief fills the RAR TX-DATA request message
3653 * Function : fillRarTxDataReq
3656 * - fills the RAR TX-DATA request message
3658 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3659 * @params[in] RarInfo *rarInfo
3660 * @params[in] uint32_t *msgLen
3661 * @params[in] uint16_t pduIndex
3664 * ********************************************************************/
3665 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
3667 uint16_t payloadSize;
3668 uint8_t *rarPayload = NULLP;
3669 fapi_api_queue_elem_t *payloadElem = NULLP;
3670 #ifdef INTEL_WLS_MEM
3671 void * wlsHdlr = NULLP;
3674 pduDesc[pduIndex].pdu_index = pduIndex;
3675 pduDesc[pduIndex].num_tlvs = 1;
3678 payloadSize = pdschCfg->codeword[0].tbSize;
3679 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3680 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3681 LWR_MAC_ALLOC(rarPayload, payloadSize);
3682 if(rarPayload == NULLP)
3686 payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3687 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3688 memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3690 #ifdef INTEL_WLS_MEM
3691 mtGetWlsHdl(&wlsHdlr);
3692 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3694 pduDesc[pduIndex].tlvs[0].value = rarPayload;
3696 pduDesc[pduIndex].pdu_length = payloadSize;
3698 #ifdef INTEL_WLS_MEM
3699 addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3701 LWR_MAC_FREE(rarPayload, payloadSize);
3706 /***********************************************************************
3708 * @brief fills the DL dedicated Msg TX-DATA request message
3712 * Function : fillDlMsgTxDataReq
3715 * - fills the Dl Dedicated Msg TX-DATA request message
3717 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3718 * @params[in] DlMsgInfo *dlMsgInfo
3719 * @params[in] uint32_t *msgLen
3720 * @params[in] uint16_t pduIndex
3723 * ********************************************************************/
3724 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
3726 uint16_t payloadSize;
3727 uint8_t *dlMsgPayload = NULLP;
3728 fapi_api_queue_elem_t *payloadElem = NULLP;
3729 #ifdef INTEL_WLS_MEM
3730 void * wlsHdlr = NULLP;
3733 pduDesc[pduIndex].pdu_index = pduIndex;
3734 pduDesc[pduIndex].num_tlvs = 1;
3737 payloadSize = pdschCfg->codeword[0].tbSize;
3738 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3739 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3740 LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3741 if(dlMsgPayload == NULLP)
3745 payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3746 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
3747 memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
3749 #ifdef INTEL_WLS_MEM
3750 mtGetWlsHdl(&wlsHdlr);
3751 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3753 pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3755 pduDesc[pduIndex].pdu_length = payloadSize;
3757 #ifdef INTEL_WLS_MEM
3758 addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3760 LWR_MAC_FREE(dlMsgPayload, payloadSize);
3767 /*******************************************************************
3769 * @brief Sends DL TTI Request to PHY
3773 * Function : fillDlTtiReq
3776 * -Sends FAPI DL TTI req to PHY
3778 * @params[in] timing info
3779 * @return ROK - success
3782 * ****************************************************************/
3783 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3785 #ifdef CALL_FLOW_DEBUG_LOG
3786 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3792 uint8_t numPduEncoded = 0;
3794 uint16_t cellIdx =0;
3795 uint16_t pduIndex = 0;
3797 SlotTimingInfo dlTtiReqTimingInfo;
3798 MacDlSlot *currDlSlot = NULLP;
3799 MacCellCfg macCellCfg;
3801 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3802 fapi_msg_header_t *msgHeader = NULLP;
3803 p_fapi_api_queue_elem_t dlTtiElem;
3804 p_fapi_api_queue_elem_t headerElem;
3805 p_fapi_api_queue_elem_t prevElem;
3806 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3808 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3809 /* consider phy delay */
3810 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
3811 dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3813 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3815 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3817 /* Vendor Message */
3818 fapi_vendor_msg_t *vendorMsg;
3819 p_fapi_api_queue_elem_t vendorMsgQElem;
3820 /* Allocte And fill Vendor msg */
3821 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3824 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
3827 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3828 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3829 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3831 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3834 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3835 sizeof(fapi_dl_tti_req_t));
3836 /* Fill message header */
3837 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3840 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
3841 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3845 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3846 sizeof(fapi_msg_header_t));
3847 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3848 msgHeader->num_msg = 2;
3849 msgHeader->handle = 0;
3851 /* Fill Dl TTI Request */
3852 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3853 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3854 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3856 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3857 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3858 dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
3859 nPdu = dlTtiReq->nPdus;
3861 vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3862 vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3864 dlTtiReq->nGroup = 0;
3865 if(dlTtiReq->nPdus > 0)
3867 if(currDlSlot->dlInfo.isBroadcastPres)
3869 if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3871 if(dlTtiReq->pdus != NULLP)
3873 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3875 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3876 currDlSlot, idx, dlTtiReq->sfn);
3880 DU_LOG("\033[1;31m");
3881 DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
3885 if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3887 /* Filling SIB1 param */
3888 if(numPduEncoded != nPdu)
3890 if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
3891 rntiType = SI_RNTI_TYPE;
3894 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3895 currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3899 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3900 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
3901 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3903 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3907 DU_LOG("\033[1;34m");
3908 DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
3913 if(currDlSlot->pageAllocInfo != NULLP)
3915 /* Filling DL Paging Alloc param */
3916 if(numPduEncoded != nPdu)
3918 rntiType = P_RNTI_TYPE;
3919 fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3920 currDlSlot->pageAllocInfo, &macCellCfg);
3922 fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3923 currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
3924 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3928 DU_LOG("\033[1;34m");
3929 DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
3933 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3935 if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3937 /* Filling RAR param */
3938 rntiType = RA_RNTI_TYPE;
3939 if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3941 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3942 currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3944 MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
3946 if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
3948 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3949 currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3950 currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3955 DU_LOG("\033[1;32m");
3956 DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
3961 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3963 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \
3965 rntiType = C_RNTI_TYPE;
3966 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3967 currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
3971 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
3973 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3975 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3976 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
3977 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
3981 DU_LOG("\033[1;32m");
3982 if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status))
3984 DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
3985 MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
3989 DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
3995 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
3998 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3999 currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
4005 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
4008 #ifdef ODU_SLOT_IND_DEBUG_LOG
4009 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
4012 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4013 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4014 msgHeader->num_msg++;
4016 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4017 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4018 msgHeader->num_msg++;
4020 /* send Tx-DATA req message */
4021 sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
4022 if(dlTtiElem->p_next->p_next->p_next)
4024 msgHeader->num_msg++;
4025 prevElem = dlTtiElem->p_next->p_next->p_next;
4028 prevElem = dlTtiElem->p_next->p_next;
4032 #ifdef ODU_SLOT_IND_DEBUG_LOG
4033 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
4035 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4036 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4037 msgHeader->num_msg++;
4039 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4040 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4041 msgHeader->num_msg++;
4043 prevElem = dlTtiElem->p_next->p_next;
4046 if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
4048 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4049 lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
4050 msgHeader->num_msg++;
4051 macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
4052 prevElem = prevElem->p_next;
4054 prevElem->p_next = vendorMsgQElem;
4055 LwrMacSendToL1(headerElem);
4056 memset(currDlSlot, 0, sizeof(MacDlSlot));
4061 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
4062 memset(currDlSlot, 0, sizeof(MacDlSlot));
4068 lwr_mac_procInvalidEvt(&currTimingInfo);
4075 /*******************************************************************
4077 * @brief Sends TX data Request to PHY
4081 * Function : sendTxDataReq
4084 * -Sends FAPI TX data req to PHY
4086 * @params[in] timing info
4087 * @return ROK - success
4090 * ****************************************************************/
4091 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
4094 #ifdef CALL_FLOW_DEBUG_LOG
4095 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
4101 uint16_t pduIndex = 0;
4102 fapi_tx_data_req_t *txDataReq =NULLP;
4103 p_fapi_api_queue_elem_t txDataElem = 0;
4105 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4107 /* send TX_Data request message */
4108 nPdu = calcTxDataReqPduCount(dlSlot);
4111 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
4112 if(txDataElem == NULLP)
4114 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
4118 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
4119 sizeof(fapi_tx_data_req_t));
4120 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
4121 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
4122 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
4124 vendorTxDataReq->sym = 0;
4126 txDataReq->sfn = currTimingInfo.sfn;
4127 txDataReq->slot = currTimingInfo.slot;
4128 if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4130 fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4131 &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg);
4133 MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
4134 txDataReq->num_pdus++;
4136 if(dlSlot->pageAllocInfo != NULLP)
4138 fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo);
4140 txDataReq->num_pdus++;
4141 MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen));
4142 MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4145 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4147 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4149 if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
4151 fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4152 dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4154 txDataReq->num_pdus++;
4155 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
4157 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4160 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4162 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
4164 fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4165 dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
4166 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
4168 txDataReq->num_pdus++;
4169 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
4171 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
4172 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
4173 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
4174 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
4178 /* Fill message header */
4179 DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
4180 prevElem->p_next = txDataElem;
4186 /***********************************************************************
4188 * @brief calculates the total size to be allocated for UL TTI Req
4192 * Function : getnPdus
4195 * -calculates the total pdu count to be allocated for UL TTI Req
4197 * @params[in] Pointer to fapi Ul TTI Req
4198 * Pointer to CurrUlSlot
4200 * ********************************************************************/
4202 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4204 uint8_t pduCount = 0, ueIdx = 0;
4206 if(ulTtiReq && currUlSlot)
4208 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
4213 for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
4215 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
4217 if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
4222 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4224 if(currUlSlot->ulSchInfo.schPuschUci[ueIdx].crnti != 0)
4229 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
4231 if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
4237 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_SRS)
4246 /***********************************************************************
4248 * @brief Set the value of zero correlation config in PRACH PDU
4252 * Function : setNumCs
4255 * -Set the value of zero correlation config in PRACH PDU
4257 * @params[in] Pointer to zero correlation config
4258 * Pointer to MacCellCfg
4259 * ********************************************************************/
4261 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4265 if(macCellCfg != NULLP)
4267 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4268 *numCs = UnrestrictedSetNcsTable[idx];
4273 /***********************************************************************
4275 * @brief Fills the PRACH PDU in UL TTI Request
4279 * Function : fillPrachPdu
4282 * -Fills the PRACH PDU in UL TTI Request
4284 * @params[in] Pointer to Prach Pdu
4285 * Pointer to CurrUlSlot
4286 * Pointer to macCellCfg
4288 * ********************************************************************/
4291 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4293 if(ulTtiReqPdu != NULLP)
4295 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4296 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
4297 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4298 currUlSlot->ulSchInfo.prachSchInfo.numPrachOcas;
4299 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4300 currUlSlot->ulSchInfo.prachSchInfo.prachFormat;
4301 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulSchInfo.prachSchInfo.numRa;
4302 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4303 currUlSlot->ulSchInfo.prachSchInfo.prachStartSymb;
4304 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4305 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4306 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4307 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4308 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4309 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4313 /*******************************************************************
4315 * @brief Filling PUSCH PDU in UL TTI Request
4319 * Function : fillPuschPdu
4321 * Functionality: Filling PUSCH PDU in UL TTI Request
4324 * @return ROK - success
4327 * ****************************************************************/
4328 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4329 SchPuschInfo *puschInfo)
4331 if(ulTtiReqPdu != NULLP)
4333 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4334 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4335 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4336 ulTtiReqPdu->pdu.pusch_pdu.rnti = puschInfo->crnti;
4337 /* TODO : Fill handle in raCb when scheduling pusch and access here */
4338 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4339 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4340 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4341 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4342 macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4343 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4344 macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4345 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4346 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = puschInfo->tbInfo.qamOrder;
4347 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = puschInfo->tbInfo.mcs;
4348 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = puschInfo->tbInfo.mcsTable;
4349 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4350 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId;
4351 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4352 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4353 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4354 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId;
4355 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4356 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4357 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4358 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4359 puschInfo->fdAlloc.resAllocType;
4360 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4361 puschInfo->fdAlloc.resAlloc.type1.startPrb;
4362 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4363 puschInfo->fdAlloc.resAlloc.type1.numPrb;
4364 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4365 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4366 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4367 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4368 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4369 puschInfo->tdAlloc.startSymb;
4370 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4371 puschInfo->tdAlloc.numSymb;
4373 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4374 puschInfo->dmrsMappingType;
4375 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4376 puschInfo->nrOfDmrsSymbols;
4377 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4378 puschInfo->dmrsAddPos;
4380 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4381 puschInfo->tbInfo.rv;
4382 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4383 puschInfo->harqProcId;
4384 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4385 puschInfo->tbInfo.ndi;
4386 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4387 puschInfo->tbInfo.tbSize;
4388 /* numCb is 0 for new transmission */
4389 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4391 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4393 /* UL TTI Vendor PDU */
4394 ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4395 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4396 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4397 for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4399 ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4404 /*******************************************************************
4406 * @brief Fill PUCCH PDU in Ul TTI Request
4410 * Function : fillPucchPdu
4412 * Functionality: Fill PUCCH PDU in Ul TTI Request
4415 * @return ROK - success
4418 * ****************************************************************/
4419 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4420 SchPucchInfo *pucchInfo)
4422 if(ulTtiReqPdu != NULLP)
4424 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
4425 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4426 ulTtiReqPdu->pdu.pucch_pdu.rnti = pucchInfo->crnti;
4427 /* TODO : Fill handle in raCb when scheduling pucch and access here */
4428 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
4429 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4430 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4431 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4432 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4433 ulTtiReqPdu->pdu.pucch_pdu.formatType = pucchInfo->pucchFormat; /* Supporting PUCCH Format 0 */
4434 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4436 ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb;
4437 ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb;
4438 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = pucchInfo->tdAlloc.startSymb;
4439 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = pucchInfo->tdAlloc.numSymb;
4440 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = pucchInfo->intraFreqHop;
4441 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop;
4442 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4443 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4444 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
4446 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift;
4448 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4449 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = pucchInfo->timeDomOCC;
4450 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = pucchInfo->occIdx; /* Valid for Format 4 only */
4451 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = pucchInfo->occLen; /* Valid for Format 4 only */
4452 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = pucchInfo->pi2BPSK;
4453 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = pucchInfo->addDmrs;/* Valid for Format 3, 4 only */
4454 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4455 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
4456 ulTtiReqPdu->pdu.pucch_pdu.srFlag = pucchInfo->srFlag;
4457 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength;
4458 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
4459 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
4460 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs;
4461 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize;
4462 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = pucchInfo->beamPucchInfo.digBfInterfaces;
4463 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0];
4465 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4467 /* UL TTI Vendor PDU */
4468 ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4469 ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4470 ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4471 for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4473 ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4480 /*******************************************************************
4482 * @brief Sends UL TTI Request to PHY
4486 * Function : fillUlTtiReq
4489 * -Sends FAPI Param req to PHY
4491 * @params[in] Pointer to CmLteTimingInfo
4492 * @return ROK - success
4495 ******************************************************************/
4496 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4498 #ifdef CALL_FLOW_DEBUG_LOG
4499 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4503 uint16_t cellIdx =0;
4504 uint8_t pduIdx = -1;
4506 SlotTimingInfo ulTtiReqTimingInfo;
4507 MacUlSlot *currUlSlot = NULLP;
4508 MacCellCfg macCellCfg;
4509 fapi_ul_tti_req_t *ulTtiReq = NULLP;
4510 p_fapi_api_queue_elem_t ulTtiElem;
4512 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4514 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4515 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4518 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,gConfigInfo.gPhyDeltaUl, macCb.macCell[cellIdx]->numOfSlots);
4519 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4521 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4524 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4525 sizeof(fapi_ul_tti_req_t));
4526 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4527 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4528 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4529 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
4530 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4531 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4532 vendorUlTti->num_ul_pdu = ulTtiReq->nPdus;
4533 vendorUlTti->sym = 0;
4534 ulTtiReq->nGroup = 0;
4535 if(ulTtiReq->nPdus > 0)
4537 /* Fill Prach Pdu */
4538 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
4541 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4542 ulTtiReq->rachPresent++;
4544 for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
4546 /* Fill PUSCH PDU */
4547 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
4549 if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
4552 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, &currUlSlot->ulSchInfo.schPuschInfo[ueIdx]);
4556 /* Fill PUCCH PDU */
4557 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
4559 if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
4562 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, &currUlSlot->ulSchInfo.schPucchInfo[ueIdx]);
4567 ulTtiReq->ueGrpInfo[ulTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
4571 #ifdef ODU_SLOT_IND_DEBUG_LOG
4572 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
4574 prevElem->p_next = ulTtiElem;
4576 memset(currUlSlot, 0, sizeof(MacUlSlot));
4581 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
4582 memset(currUlSlot, 0, sizeof(MacUlSlot));
4588 lwr_mac_procInvalidEvt(&currTimingInfo);
4595 /*******************************************************************
4597 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4601 * Function : fillUlDciPdu
4604 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4606 * @params[in] Pointer to fapi_dl_dci_t
4607 * Pointer to DciInfo
4610 ******************************************************************/
4611 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4613 #ifdef CALL_FLOW_DEBUG_LOG
4614 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4616 if(ulDciPtr != NULLP)
4618 uint8_t numBytes =0;
4622 uint8_t coreset1Size = 0;
4623 uint16_t rbStart = 0;
4625 uint8_t dciFormatId = 0;
4626 uint32_t freqDomResAssign =0;
4627 uint8_t timeDomResAssign =0;
4628 uint8_t freqHopFlag =0;
4629 uint8_t modNCodScheme =0;
4631 uint8_t redundancyVer = 0;
4632 uint8_t harqProcessNum = 0;
4633 uint8_t puschTpc = 0;
4634 uint8_t ul_SlInd = 0;
4636 /* Size(in bits) of each field in DCI format 0_0 */
4637 uint8_t dciFormatIdSize = 1;
4638 uint8_t freqDomResAssignSize = 0;
4639 uint8_t timeDomResAssignSize = 4;
4640 uint8_t freqHopFlagSize = 1;
4641 uint8_t modNCodSchemeSize = 5;
4642 uint8_t ndiSize = 1;
4643 uint8_t redundancyVerSize = 2;
4644 uint8_t harqProcessNumSize = 4;
4645 uint8_t puschTpcSize = 2;
4646 uint8_t ul_SlIndSize = 1;
4648 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4649 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4650 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4651 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4652 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4653 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4654 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4655 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4656 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4657 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4658 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
4659 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4661 /* Calculating freq domain resource allocation field value and size
4662 * coreset1Size = Size of coreset 1
4663 * RBStart = Starting Virtual Rsource block
4664 * RBLen = length of contiguously allocted RBs
4665 * Spec 38.214 Sec 5.1.2.2.2
4667 if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
4669 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4670 rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
4671 rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
4673 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4675 if((rbLen - 1) <= floor(coreset1Size / 2))
4676 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4678 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4679 + (coreset1Size - 1 - rbStart);
4681 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4683 /* Fetching DCI field values */
4684 dciFormatId = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
4685 timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
4686 freqHopFlag = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
4687 modNCodScheme = schDciInfo->dciFormatInfo.format.format0_0.mcs;
4688 ndi = schDciInfo->dciFormatInfo.format.format0_0.ndi;
4689 redundancyVer = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
4690 harqProcessNum = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
4691 puschTpc = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
4692 ul_SlInd = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
4694 /* Reversing bits in each DCI field */
4695 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4696 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4697 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4698 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4699 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4700 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4701 puschTpc = reverseBits(puschTpc, puschTpcSize);
4702 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4704 /* Calulating total number of bytes in buffer */
4705 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4706 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4707 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4709 numBytes = ulDciPtr->payloadSizeBits / 8;
4710 if(ulDciPtr->payloadSizeBits % 8)
4713 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4715 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
4719 /* Initialize buffer */
4720 for(bytePos = 0; bytePos < numBytes; bytePos++)
4721 ulDciPtr->payload[bytePos] = 0;
4723 bytePos = numBytes - 1;
4726 /* Packing DCI format fields */
4727 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4728 dciFormatId, dciFormatIdSize);
4729 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4730 freqDomResAssign, freqDomResAssignSize);
4731 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4732 timeDomResAssign, timeDomResAssignSize);
4733 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4734 freqHopFlag, freqHopFlagSize);
4735 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4736 modNCodScheme, modNCodSchemeSize);
4737 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4739 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4740 redundancyVer, redundancyVerSize);
4741 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4742 harqProcessNum, harqProcessNumSize);
4743 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4744 puschTpc, puschTpcSize);
4745 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4746 ul_SlInd, ul_SlIndSize);
4748 } /* fillUlDciPdu */
4750 /*******************************************************************
4752 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4756 * Function : fillUlDciPdcchPdu
4759 * -Fills the Pdcch PDU info
4761 * @params[in] Pointer to FAPI DL TTI Req
4762 * Pointer to PdcchCfg
4765 ******************************************************************/
4766 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4768 if(ulDciReqPdu != NULLP)
4770 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4771 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4772 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4773 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4774 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4775 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4776 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4777 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4778 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4779 convertFreqDomRsrcMapToIAPIFormat(dlInfo->ulGrant->coresetCfg.freqDomainResource, \
4780 ulDciReqPdu->pdcchPduConfig.freqDomainResource);
4781 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4782 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4783 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4784 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4785 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4786 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4787 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4789 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4790 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4792 /* Vendor UL DCI PDU */
4793 vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4794 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4795 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4800 /*******************************************************************
4802 * @brief Sends UL DCI Request to PHY
4806 * Function : fillUlDciReq
4809 * -Sends FAPI Ul Dci req to PHY
4811 * @params[in] Pointer to CmLteTimingInfo
4812 * @return ROK - success
4815 ******************************************************************/
4816 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4820 uint8_t numPduEncoded = 0;
4821 SlotTimingInfo ulDciReqTimingInfo ={0};
4822 MacDlSlot *currDlSlot = NULLP;
4823 fapi_ul_dci_req_t *ulDciReq =NULLP;
4824 p_fapi_api_queue_elem_t ulDciElem;
4826 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4828 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4829 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4830 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4832 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4835 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4836 sizeof(fapi_ul_dci_req_t));
4837 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4838 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4839 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4841 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4842 ulDciReq->slot = ulDciReqTimingInfo.slot;
4843 if(currDlSlot->dlInfo.ulGrant != NULLP)
4845 vendorUlDciReq->sym = 0;
4846 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4847 vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4848 if(ulDciReq->numPdus > 0)
4850 /* Fill PDCCH configuration Pdu */
4851 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4853 /* free UL GRANT at SCH */
4854 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4856 #ifdef ODU_SLOT_IND_DEBUG_LOG
4857 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
4860 prevElem->p_next = ulDciElem;
4865 lwr_mac_procInvalidEvt(&currTimingInfo);
4871 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4874 /* PHY_STATE_IDLE */
4875 #ifdef INTEL_TIMER_MODE
4876 lwr_mac_procIqSamplesReqEvt,
4878 lwr_mac_procParamReqEvt,
4879 lwr_mac_procParamRspEvt,
4880 lwr_mac_procConfigReqEvt,
4881 lwr_mac_procConfigRspEvt,
4882 lwr_mac_procInvalidEvt,
4883 lwr_mac_procInvalidEvt,
4886 /* PHY_STATE_CONFIGURED */
4887 #ifdef INTEL_TIMER_MODE
4888 lwr_mac_procInvalidEvt,
4890 lwr_mac_procParamReqEvt,
4891 lwr_mac_procParamRspEvt,
4892 lwr_mac_procConfigReqEvt,
4893 lwr_mac_procConfigRspEvt,
4894 lwr_mac_procStartReqEvt,
4895 lwr_mac_procInvalidEvt,
4898 /* PHY_STATE_RUNNING */
4899 #ifdef INTEL_TIMER_MODE
4900 lwr_mac_procInvalidEvt,
4902 lwr_mac_procInvalidEvt,
4903 lwr_mac_procInvalidEvt,
4904 lwr_mac_procConfigReqEvt,
4905 lwr_mac_procConfigRspEvt,
4906 lwr_mac_procInvalidEvt,
4907 lwr_mac_procInvalidEvt,
4911 /*******************************************************************
4913 * @brief Sends message to LWR_MAC Fsm Event Handler
4917 * Function : sendToLowerMac
4920 * -Sends message to LowerMac
4922 * @params[in] Message Type
4928 ******************************************************************/
4929 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4931 lwrMacCb.event = msgType;
4932 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4935 /**********************************************************************
4937 **********************************************************************/