[Epic-ID: ODUHIGH-516][Task-ID: ODUHIGH-523] Statistics Indication between DU APP...
[o-du/l2.git] / src / 5gnrmac / lwr_mac.h
1 /*******************************************************************************
2 ################################################################################
3 #   Copyright (c) [2017-2019] [Radisys]                                        #
4 #                                                                              #
5 #   Licensed under the Apache License, Version 2.0 (the "License");            #
6 #   you may not use this file except in compliance with the License.           #
7 #   You may obtain a copy of the License at                                    #
8 #                                                                              #
9 #       http://www.apache.org/licenses/LICENSE-2.0                             #
10 #                                                                              #
11 #   Unless required by applicable law or agreed to in writing, software        #
12 #   distributed under the License is distributed on an "AS IS" BASIS,          #
13 #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
14 #   See the License for the specific language governing permissions and        #
15 #   limitations under the License.                                             #
16 ################################################################################
17 *******************************************************************************/
18
19 /* Contains definitions for MAC CL modules */
20 #ifndef __LWR_MAC_H__
21 #define __LWR_MAC_H__
22
23 #ifdef INTEL_WLS_MEM
24 #define LWR_MAC_ALLOC(_datPtr, _size)   WLS_MEM_ALLOC(_datPtr, _size);
25 #else                                     
26 #define LWR_MAC_ALLOC(_datPtr, _size)   MAC_ALLOC(_datPtr, _size);
27 #endif                                    
28
29 #ifdef INTEL_WLS_MEM
30 #define LWR_MAC_FREE(_datPtr, _size) WLS_MEM_FREE(_datPtr, _size);
31 #else
32 #define LWR_MAC_FREE(_datPtr, _size) MAC_FREE(_datPtr, _size);
33 #endif
34
35 typedef enum
36 {
37    PHY_STATE_IDLE,
38    PHY_STATE_CONFIGURED,
39    PHY_STATE_RUNNING,
40    MAX_STATE   
41 }PhyState;
42
43 /* Events in Lower Mac */
44 typedef enum{
45 #ifdef INTEL_TIMER_MODE
46    UL_IQ_SAMPLE,
47 #endif
48    PARAM_REQUEST,
49    PARAM_RESPONSE,
50    CONFIG_REQUEST,
51    CONFIG_RESPONSE,
52    START_REQUEST,
53    STOP_REQUEST,
54    MAX_EVENT
55 }EventState;
56
57 typedef struct cellCb
58 {
59    uint16_t     cellId;
60    uint16_t     phyCellId;
61    PhyState     state;
62 }LwrMacCellCb;
63
64 typedef struct lwrMacGlobalCb
65 {
66    Region          region;
67    Pool            pool;
68    bool            clCfgDone;   /* CL configuration done */
69    uint8_t         phySlotIndCntr;
70    LwrMacCellCb    cellCb[MAX_NUM_CELL];   /* List of Cells configured */
71    uint8_t         numCell;  /* Number of Cells configured */
72    PhyState        phyState;    /* State of PHY */
73    EventState      event;       /* State of Event */
74 }LwrMacCb;
75
76 typedef enum
77 {
78    FAPI_RELEASE_15
79 }ReleaseCapab;
80
81 typedef enum
82 {
83    NOT_SUPPORTED,
84    SUPPORTED
85 }ParamSupport;
86
87 typedef enum
88 {
89    NORMAL_CYCLIC_PREFIX_MASK,
90    EXTENDED_CYCLIC_PREFIX_MASK
91 }CyclicPrefix;
92
93 typedef enum 
94 {
95    SPACING_15_KHZ,
96    SPACING_30_KHZ,
97    SPACING_60_KHZ,
98    SPACING_120_KHZ
99 }SubCarrierSpacing;
100
101 typedef enum 
102 {
103    BW_5MHZ,
104    BW_10MHZ,
105    BW_15MHZ,
106    BW_20MHZ,
107    BW_40MHZ,
108    BW_50MHZ,
109    BW_60MHZ,
110    BW_70MHZ,
111    BW_80MHZ,
112    BW_90MHZ,
113    BW_100MHZ,
114    BW_200MHZ,
115    BW_400MHZ
116 }SupportedBandwidth;
117
118 typedef enum
119 {
120    CCE_MAPPING_INTERLEAVED_MASK,
121    CCE_MAPPING_NONINTERLVD_MASK
122 }CCEMappingType;
123
124 typedef enum
125 {
126    FORMAT_0,
127    FORMAT_1,
128    FORMAT_2,
129    FORMAT_3,
130    FORMAT_4
131 }Formats;
132
133 typedef enum
134 {
135    MAPPING_TYPE_A,        
136    MAPPING_TYPE_B,
137 }MappingType;
138
139 typedef enum
140 {
141    ALLOCATION_TYPE_0,            
142    ALLOCATION_TYPE_1,
143 }AllocationType;
144
145 typedef enum
146 {
147    VRB_TO_PRB_MAP_NON_INTLV,
148    VRB_TO_PRB_MAP_INTLVD
149 }VrbToPrbMap;
150
151 typedef enum
152 {  
153    DMRS_CONFIG_TYPE_1,     
154    DMRS_CONFIG_TYPE_2
155 }DmrsConfigType;
156
157 typedef enum
158 {  
159    DMRS_MAX_LENGTH_1,     
160    DMRS_MAX_LENGTH_2
161 }DmrMaxLen;
162
163 typedef enum
164 {
165    DMRS_ADDITIONAL_POS_0,         
166    DMRS_ADDITIONAL_POS_1,         
167    DMRS_ADDITIONAL_POS_2,         
168    DMRS_ADDITIONAL_POS_3        
169 }DmrsPos;
170
171 typedef enum
172 {
173    MOD_QPSK,
174    MOD_16QAM,
175    MOD_64QAM,
176    MOD_256QAM
177 }ModulationOrder;
178
179 typedef enum 
180 {
181    AGG_FACTOR_1,
182    AGG_FACTOR_2,
183    AGG_FACTOR_4,
184    AGG_FACTOR_8
185 }AggregationFactor;
186
187 typedef enum
188 {
189    SF_FORMAT_A1,
190    SF_FORMAT_A2,
191    SF_FORMAT_A3,
192    SF_FORMAT_B1,
193    SF_FORMAT_B2,
194    SF_FORMAT_B3,
195    SF_FORMAT_B4,
196    SF_FORMAT_C0,
197    SF_FORMAT_C2
198 }ShortFormat;
199
200 typedef enum 
201 {
202    PRACH_FD_OCC_IN_A_SLOT_1   = 1,
203    PRACH_FD_OCC_IN_A_SLOT_2   = 2,
204    PRACH_FD_OCC_IN_A_SLOT_4   = 4,
205    PRACH_FD_OCC_IN_A_SLOT_8   = 8
206 }FdOccPerSlot;
207
208 typedef enum
209 {
210    RSSI_REPORT_DBM,
211    RSSI_REPORT_DBFS
212 }RssiMeasurement;
213
214 typedef struct clCellParam
215 {   
216    ReleaseCapab          releaseCapability;                    /* Release Capability */  
217    PhyState              ParamPhystate;
218    ParamSupport          skipBlankDlConfig;
219    ParamSupport          skipBlankUlConfig;
220    ParamSupport          numTlvsToReport;
221    CyclicPrefix          cyclicPrefix;                
222    SubCarrierSpacing     supportedSubcarrierSpacingDl;
223    SupportedBandwidth    supportedBandwidthDl;         
224    SubCarrierSpacing     supportedSubcarrierSpacingsUl;
225    SupportedBandwidth    supportedBandwidthUl;
226    CCEMappingType        cceMappingType;
227    ParamSupport          coresetOutsideFirst3OfdmSymsOfSlot;
228    ParamSupport          precoderGranularityCoreset;
229    ParamSupport          pdcchMuMimo;
230    ParamSupport          pdcchPrecoderCycling;
231    uint8_t               maxPdcchsPerSlot;
232    Formats               pucchFormats;
233    uint8_t               maxPucchsPerSlot;   
234    MappingType           pdschMappingType;
235    AllocationType        pdschAllocationTypes;
236    VrbToPrbMap           pdschVrbToPrbMapping;
237    ParamSupport          pdschCbg;
238    DmrsConfigType        pdschDmrsConfigTypes;
239    DmrMaxLen             pdschDmrsMaxLength;
240    DmrsPos               pdschDmrsAdditionalPos;
241    uint8_t               maxPdschsTBsPerSlot;
242    uint8_t               maxNumberMimoLayersPdsch;
243    ModulationOrder       supportedMaxModulationOrderDl;
244    uint8_t               maxMuMimoUsersDl;
245    ParamSupport          pdschDataInDmrsSymbols;
246    ParamSupport          premptionSupport;
247    ParamSupport          pdschNonSlotSupport;
248    ParamSupport          uciMuxUlschInPusch;
249    ParamSupport          uciOnlyPusch;
250    ParamSupport          puschFrequencyHopping;
251    DmrsConfigType        puschDmrsConfigTypes;
252    DmrMaxLen             puschDmrsMaxLength;
253    DmrsPos               puschDmrsAdditionalPos;
254    ParamSupport          puschCbg;
255    MappingType           puschMappingType;
256    AllocationType        puschAllocationTypes;
257    VrbToPrbMap           puschVrbToPrbMapping;
258    uint8_t               puschMaxPtrsPorts;
259    uint8_t               maxPduschsTBsPerSlot;
260    uint8_t               maxNumberMimoLayersNonCbPusch;
261    ModulationOrder       supportedModulationOrderUl;
262    uint8_t               maxMuMimoUsersUl;
263    ParamSupport          dftsOfdmSupport;
264    AggregationFactor     puschAggregationFactor;
265    Formats                prachLongFormats;
266    ShortFormat           prachShortFormats;
267    ParamSupport          prachRestrictedSets;
268    FdOccPerSlot          maxPrachFdOccasionsInASlot;
269    RssiMeasurement       rssiMeasurementSupport;
270 }ClCellParam;
271
272 LwrMacCb lwrMacCb; 
273 LwrMacCellCb * lwrMacGetCellCb ARGS((uint16_t cellId));
274 uint32_t reverseBits(uint32_t num, uint8_t numBits);
275 void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\
276       uint32_t val, uint8_t valSize);
277
278 #endif
279
280 /**********************************************************************
281   End of file
282  **********************************************************************/