src/5gnrmac/lwr_mac.h

   1 /*******************************************************************************
   2 ################################################################################
   3 #   Copyright (c) [2017-2019] [Radisys]                                        #
   4 #                                                                              #
   5 #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6 #   you may not use this file except in compliance with the License.           #
   7 #   You may obtain a copy of the License at                                    #
   8 #                                                                              #
   9 #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10 #                                                                              #
  11 #   Unless required by applicable law or agreed to in writing, software        #
  12 #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13 #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14 #   See the License for the specific language governing permissions and        #
  15 #   limitations under the License.                                             #
  16 ################################################################################
  17 *******************************************************************************/
  18
  19 /* Contains definitions for MAC CL modules */
  20 #ifndef __LWR_MAC_H__
  21 #define __LWR_MAC_H__
  22
  23 #define MAX_NUM_CELL_SUPP 1
  24
  25 #include "envdep.h"
  26 #include "gen.h"
  27 #include "ssi.h"
  28 #include "cm_hash.h"
  29
  30 #include "gen.x"
  31 #include "ssi.x"
  32 #include "cm_hash.x"
  33 #include "cm_lib.x"
  34 #include "mac_interface.h"
  35
  36 typedef enum
  37 {
  38    PHY_STATE_IDLE,
  39    PHY_STATE_CONFIGURED,
  40    PHY_STATE_RUNNING,
  41    MAX_STATE
  42 }PhyState;
  43
  44 /* Events in Lower Mac */
  45 typedef enum{
  46   PARAM_REQ,
  47   CONFIG_REQ = 2,
  48   START_REQ = 4,
  49   STOP_REQ,
  50   MAX_EVENT
  51 }EventState;
  52
  53 typedef struct clCb
  54 {
  55    Region          region;
  56    Pool            pool;
  57    Bool            clCfgDone;   /* CL configuration done */
  58    CmHashListCp    cellCbLst;   /* List of Cells configured */
  59    U8              numOfCells;  /* Number of Cells configured */
  60    PhyState        phyState;    /* State of PHY */
  61    EventState      event;       /* State of Event */
  62 }ClCb;
  63
  64 typedef struct cellCb
  65 {
  66    U16         cellId;
  67    MacCellCfg   cellCfg;
  68    PhyState    phyState;
  69 }ClCellCb;
  70
  71 typedef enum
  72 {
  73    RELEASE_15
  74 }ReleaseCapab;
  75
  76 typedef enum
  77 {
  78    NOT_SUPPORTED,
  79    SUPPORTED
  80 }ParamSupport;
  81
  82 typedef enum
  83 {
  84    NORMAL_CYCLIC_PREFIX_MASK,
  85    EXTENDED_CYCLIC_PREFIX_MASK
  86 }CyclicPrefix;
  87
  88 typedef enum
  89 {
  90    SPACING_15_KHZ,
  91    SPACING_30_KHZ,
  92    SPACING_60_KHZ,
  93    SPACING_120_KHZ
  94 }SubCarrierSpacing;
  95
  96 typedef enum
  97 {
  98    BW_5MHZ,
  99    BW_10MHZ,
 100    BW_15MHZ,
 101    BW_20MHZ,
 102    BW_40MHZ,
 103    BW_50MHZ,
 104    BW_60MHZ,
 105    BW_70MHZ,
 106    BW_80MHZ,
 107    BW_90MHZ,
 108    BW_100MHZ,
 109    BW_200MHZ,
 110    BW_400MHZ
 111 }SupportedBandwidth;
 112
 113 typedef enum
 114 {
 115    CCE_MAPPING_INTERLEAVED_MASK,
 116    CCE_MAPPING_NONINTERLVD_MASK
 117 }CCEMappingType;
 118
 119 typedef enum
 120 {
 121    FORMAT_0,
 122    FORMAT_1,
 123    FORMAT_2,
 124    FORMAT_3,
 125    FORMAT_4
 126 }Formats;
 127
 128 typedef enum
 129 {
 130    MAPPING_TYPE_A,
 131    MAPPING_TYPE_B,
 132 }MappingType;
 133
 134 typedef enum
 135 {
 136    ALLOCATION_TYPE_0,
 137    ALLOCATION_TYPE_1,
 138 }AllocationType;
 139
 140 typedef enum
 141 {
 142    VRB_TO_PRB_MAP_NON_INTLV,
 143    VRB_TO_PRB_MAP_INTLVD
 144 }VrbToPrbMap;
 145
 146 typedef enum
 147 {
 148    DMRS_CONFIG_TYPE_1,
 149    DMRS_CONFIG_TYPE_2
 150 }DmrsConfigType;
 151
 152 typedef enum
 153 {
 154    DMRS_MAX_LENGTH_1,
 155    DMRS_MAX_LENGTH_2
 156 }DmrMaxLen;
 157
 158 typedef enum
 159 {
 160    DMRS_ADDITIONAL_POS_0,
 161    DMRS_ADDITIONAL_POS_1,
 162    DMRS_ADDITIONAL_POS_2,
 163    DMRS_ADDITIONAL_POS_3
 164 }DmrsPos;
 165
 166 typedef enum
 167 {
 168    MOD_QPSK,
 169    MOD_16QAM,
 170    MOD_64QAM,
 171    MOD_256QAM
 172 }ModulationOrder;
 173
 174 typedef enum
 175 {
 176    AGG_FACTOR_1,
 177    AGG_FACTOR_2,
 178    AGG_FACTOR_4,
 179    AGG_FACTOR_8
 180 }AggregationFactor;
 181
 182 typedef enum
 183 {
 184    SF_FORMAT_A1,
 185    SF_FORMAT_A2,
 186    SF_FORMAT_A3,
 187    SF_FORMAT_B1,
 188    SF_FORMAT_B2,
 189    SF_FORMAT_B3,
 190    SF_FORMAT_B4,
 191    SF_FORMAT_C0,
 192    SF_FORMAT_C2
 193 }ShortFormat;
 194
 195 typedef enum
 196 {
 197    PRACH_FD_OCC_IN_A_SLOT_1   = 1,
 198    PRACH_FD_OCC_IN_A_SLOT_2   = 2,
 199    PRACH_FD_OCC_IN_A_SLOT_4   = 4,
 200    PRACH_FD_OCC_IN_A_SLOT_8   = 8
 201 }FdOccPerSlot;
 202
 203 typedef enum
 204 {
 205    RSSI_REPORT_DBM,
 206    RSSI_REPORT_DBFS
 207 }RssiMeasurement;
 208
 209 typedef struct clCellParam
 210 {
 211    ReleaseCapab          releaseCapability;                    /* Release Capability */
 212    PhyState              ParamPhystate;
 213    ParamSupport          skipBlankDlConfig;
 214    ParamSupport          skipBlankUlConfig;
 215    ParamSupport          numTlvsToReport;
 216    CyclicPrefix          cyclicPrefix;
 217    SubCarrierSpacing     supportedSubcarrierSpacingDl;
 218    SupportedBandwidth    supportedBandwidthDl;
 219    SubCarrierSpacing     supportedSubcarrierSpacingsUl;
 220    SupportedBandwidth    supportedBandwidthUl;
 221    CCEMappingType        cceMappingType;
 222    ParamSupport          coresetOutsideFirst3OfdmSymsOfSlot;
 223    ParamSupport          precoderGranularityCoreset;
 224    ParamSupport          pdcchMuMimo;
 225    ParamSupport          pdcchPrecoderCycling;
 226    U8                    maxPdcchsPerSlot;
 227    Formats               pucchFormats;
 228    U8                    maxPucchsPerSlot;
 229    MappingType           pdschMappingType;
 230    AllocationType        pdschAllocationTypes;
 231    VrbToPrbMap           pdschVrbToPrbMapping;
 232    ParamSupport          pdschCbg;
 233    DmrsConfigType        pdschDmrsConfigTypes;
 234    DmrMaxLen             pdschDmrsMaxLength;
 235    DmrsPos               pdschDmrsAdditionalPos;
 236    U8                    maxPdschsTBsPerSlot;
 237    U8                    maxNumberMimoLayersPdsch;
 238    ModulationOrder       supportedMaxModulationOrderDl;
 239    U8                    maxMuMimoUsersDl;
 240    ParamSupport          pdschDataInDmrsSymbols;
 241    ParamSupport          premptionSupport;
 242    ParamSupport          pdschNonSlotSupport;
 243    ParamSupport          uciMuxUlschInPusch;
 244    ParamSupport          uciOnlyPusch;
 245    ParamSupport          puschFrequencyHopping;
 246    DmrsConfigType        puschDmrsConfigTypes;
 247    DmrMaxLen             puschDmrsMaxLength;
 248    DmrsPos               puschDmrsAdditionalPos;
 249    ParamSupport          puschCbg;
 250    MappingType           puschMappingType;
 251    AllocationType        puschAllocationTypes;
 252    VrbToPrbMap           puschVrbToPrbMapping;
 253    U8                    puschMaxPtrsPorts;
 254    U8                    maxPduschsTBsPerSlot;
 255    U8                    maxNumberMimoLayersNonCbPusch;
 256    ModulationOrder       supportedModulationOrderUl;
 257    U8                    maxMuMimoUsersUl;
 258    ParamSupport          dftsOfdmSupport;
 259    AggregationFactor     puschAggregationFactor;
 260    Formats                prachLongFormats;
 261    ShortFormat           prachShortFormats;
 262    ParamSupport          prachRestrictedSets;
 263    FdOccPerSlot          maxPrachFdOccasionsInASlot;
 264    RssiMeasurement       rssiMeasurementSupport;
 265 }ClCellParam;
 266
 267
 268 EXTERN ClCb clGlobalCp;
 269 EXTERN ClCellCb * rgClUtlGetCellCb ARGS((U16 cellId));
 270
 271 #endif
 272
 273 /**********************************************************************
 274          End of file
 275 **********************************************************************/