src/5gnrmac/lwr_mac.h

   1 /*******************************************************************************
   2 ################################################################################
   3 #   Copyright (c) [2017-2019] [Radisys]                                        #
   4 #                                                                              #
   5 #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6 #   you may not use this file except in compliance with the License.           #
   7 #   You may obtain a copy of the License at                                    #
   8 #                                                                              #
   9 #       http://www.apache.org/licenses/LICENSE-2.0                             #
  10 #                                                                              #
  11 #   Unless required by applicable law or agreed to in writing, software        #
  12 #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13 #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14 #   See the License for the specific language governing permissions and        #
  15 #   limitations under the License.                                             #
  16 ################################################################################
  17 *******************************************************************************/
  18
  19 /* Contains definitions for MAC CL modules */
  20 #ifndef __LWR_MAC_H__
  21 #define __LWR_MAC_H__
  22
  23 #define MAX_NUM_CELL_SUPP 1
  24
  25 #include "envdep.h"
  26 #include "gen.h"
  27 #include "ssi.h"
  28 #include "cm_hash.h"
  29 #include "cm_lte.h"
  30
  31 #include "gen.x"
  32 #include "ssi.x"
  33 #include "cm_hash.x"
  34 #include "cm_lte.x"
  35 #include "cm_lib.x"
  36 #include "du_app_mac_inf.h"
  37
  38 #ifdef INTEL_WLS
  39 #define LWR_MAC_ALLOC(_datPtr, _size)   WLS_MEM_ALLOC(_datPtr, _size);
  40 #else
  41 #define LWR_MAC_ALLOC(_datPtr, _size)   MAC_ALLOC(_datPtr, _size);
  42 #endif
  43
  44 typedef enum
  45 {
  46    PHY_STATE_IDLE,
  47    PHY_STATE_CONFIGURED,
  48    PHY_STATE_RUNNING,
  49    MAX_STATE
  50 }PhyState;
  51
  52 /* Events in Lower Mac */
  53 typedef enum{
  54   PARAM_REQUEST,
  55   PARAM_RESPONSE,
  56   CONFIG_REQUEST,
  57   CONFIG_RESPONSE,
  58   START_REQUEST,
  59   STOP_REQUEST,
  60   MAX_EVENT
  61 }EventState;
  62
  63 typedef struct clCb
  64 {
  65    Region          region;
  66    Pool            pool;
  67    Bool            clCfgDone;   /* CL configuration done */
  68    CmHashListCp    cellCbLst;   /* List of Cells configured */
  69    U8              numOfCells;  /* Number of Cells configured */
  70    PhyState        phyState;    /* State of PHY */
  71    EventState      event;       /* State of Event */
  72 }ClCb;
  73
  74 typedef struct cellCb
  75 {
  76    U16         cellId;
  77    MacCellCfg   cellCfg;
  78    PhyState    phyState;
  79 }ClCellCb;
  80
  81 typedef enum
  82 {
  83    FAPI_RELEASE_15
  84 }ReleaseCapab;
  85
  86 typedef enum
  87 {
  88    NOT_SUPPORTED,
  89    SUPPORTED
  90 }ParamSupport;
  91
  92 typedef enum
  93 {
  94    NORMAL_CYCLIC_PREFIX_MASK,
  95    EXTENDED_CYCLIC_PREFIX_MASK
  96 }CyclicPrefix;
  97
  98 typedef enum
  99 {
 100    SPACING_15_KHZ,
 101    SPACING_30_KHZ,
 102    SPACING_60_KHZ,
 103    SPACING_120_KHZ
 104 }SubCarrierSpacing;
 105
 106 typedef enum
 107 {
 108    BW_5MHZ,
 109    BW_10MHZ,
 110    BW_15MHZ,
 111    BW_20MHZ,
 112    BW_40MHZ,
 113    BW_50MHZ,
 114    BW_60MHZ,
 115    BW_70MHZ,
 116    BW_80MHZ,
 117    BW_90MHZ,
 118    BW_100MHZ,
 119    BW_200MHZ,
 120    BW_400MHZ
 121 }SupportedBandwidth;
 122
 123 typedef enum
 124 {
 125    CCE_MAPPING_INTERLEAVED_MASK,
 126    CCE_MAPPING_NONINTERLVD_MASK
 127 }CCEMappingType;
 128
 129 typedef enum
 130 {
 131    FORMAT_0,
 132    FORMAT_1,
 133    FORMAT_2,
 134    FORMAT_3,
 135    FORMAT_4
 136 }Formats;
 137
 138 typedef enum
 139 {
 140    MAPPING_TYPE_A,
 141    MAPPING_TYPE_B,
 142 }MappingType;
 143
 144 typedef enum
 145 {
 146    ALLOCATION_TYPE_0,
 147    ALLOCATION_TYPE_1,
 148 }AllocationType;
 149
 150 typedef enum
 151 {
 152    VRB_TO_PRB_MAP_NON_INTLV,
 153    VRB_TO_PRB_MAP_INTLVD
 154 }VrbToPrbMap;
 155
 156 typedef enum
 157 {
 158    DMRS_CONFIG_TYPE_1,
 159    DMRS_CONFIG_TYPE_2
 160 }DmrsConfigType;
 161
 162 typedef enum
 163 {
 164    DMRS_MAX_LENGTH_1,
 165    DMRS_MAX_LENGTH_2
 166 }DmrMaxLen;
 167
 168 typedef enum
 169 {
 170    DMRS_ADDITIONAL_POS_0,
 171    DMRS_ADDITIONAL_POS_1,
 172    DMRS_ADDITIONAL_POS_2,
 173    DMRS_ADDITIONAL_POS_3
 174 }DmrsPos;
 175
 176 typedef enum
 177 {
 178    MOD_QPSK,
 179    MOD_16QAM,
 180    MOD_64QAM,
 181    MOD_256QAM
 182 }ModulationOrder;
 183
 184 typedef enum
 185 {
 186    AGG_FACTOR_1,
 187    AGG_FACTOR_2,
 188    AGG_FACTOR_4,
 189    AGG_FACTOR_8
 190 }AggregationFactor;
 191
 192 typedef enum
 193 {
 194    SF_FORMAT_A1,
 195    SF_FORMAT_A2,
 196    SF_FORMAT_A3,
 197    SF_FORMAT_B1,
 198    SF_FORMAT_B2,
 199    SF_FORMAT_B3,
 200    SF_FORMAT_B4,
 201    SF_FORMAT_C0,
 202    SF_FORMAT_C2
 203 }ShortFormat;
 204
 205 typedef enum
 206 {
 207    PRACH_FD_OCC_IN_A_SLOT_1   = 1,
 208    PRACH_FD_OCC_IN_A_SLOT_2   = 2,
 209    PRACH_FD_OCC_IN_A_SLOT_4   = 4,
 210    PRACH_FD_OCC_IN_A_SLOT_8   = 8
 211 }FdOccPerSlot;
 212
 213 typedef enum
 214 {
 215    RSSI_REPORT_DBM,
 216    RSSI_REPORT_DBFS
 217 }RssiMeasurement;
 218
 219 typedef struct clCellParam
 220 {
 221    ReleaseCapab          releaseCapability;                    /* Release Capability */
 222    PhyState              ParamPhystate;
 223    ParamSupport          skipBlankDlConfig;
 224    ParamSupport          skipBlankUlConfig;
 225    ParamSupport          numTlvsToReport;
 226    CyclicPrefix          cyclicPrefix;
 227    SubCarrierSpacing     supportedSubcarrierSpacingDl;
 228    SupportedBandwidth    supportedBandwidthDl;
 229    SubCarrierSpacing     supportedSubcarrierSpacingsUl;
 230    SupportedBandwidth    supportedBandwidthUl;
 231    CCEMappingType        cceMappingType;
 232    ParamSupport          coresetOutsideFirst3OfdmSymsOfSlot;
 233    ParamSupport          precoderGranularityCoreset;
 234    ParamSupport          pdcchMuMimo;
 235    ParamSupport          pdcchPrecoderCycling;
 236    U8                    maxPdcchsPerSlot;
 237    Formats               pucchFormats;
 238    U8                    maxPucchsPerSlot;
 239    MappingType           pdschMappingType;
 240    AllocationType        pdschAllocationTypes;
 241    VrbToPrbMap           pdschVrbToPrbMapping;
 242    ParamSupport          pdschCbg;
 243    DmrsConfigType        pdschDmrsConfigTypes;
 244    DmrMaxLen             pdschDmrsMaxLength;
 245    DmrsPos               pdschDmrsAdditionalPos;
 246    U8                    maxPdschsTBsPerSlot;
 247    U8                    maxNumberMimoLayersPdsch;
 248    ModulationOrder       supportedMaxModulationOrderDl;
 249    U8                    maxMuMimoUsersDl;
 250    ParamSupport          pdschDataInDmrsSymbols;
 251    ParamSupport          premptionSupport;
 252    ParamSupport          pdschNonSlotSupport;
 253    ParamSupport          uciMuxUlschInPusch;
 254    ParamSupport          uciOnlyPusch;
 255    ParamSupport          puschFrequencyHopping;
 256    DmrsConfigType        puschDmrsConfigTypes;
 257    DmrMaxLen             puschDmrsMaxLength;
 258    DmrsPos               puschDmrsAdditionalPos;
 259    ParamSupport          puschCbg;
 260    MappingType           puschMappingType;
 261    AllocationType        puschAllocationTypes;
 262    VrbToPrbMap           puschVrbToPrbMapping;
 263    U8                    puschMaxPtrsPorts;
 264    U8                    maxPduschsTBsPerSlot;
 265    U8                    maxNumberMimoLayersNonCbPusch;
 266    ModulationOrder       supportedModulationOrderUl;
 267    U8                    maxMuMimoUsersUl;
 268    ParamSupport          dftsOfdmSupport;
 269    AggregationFactor     puschAggregationFactor;
 270    Formats                prachLongFormats;
 271    ShortFormat           prachShortFormats;
 272    ParamSupport          prachRestrictedSets;
 273    FdOccPerSlot          maxPrachFdOccasionsInASlot;
 274    RssiMeasurement       rssiMeasurementSupport;
 275 }ClCellParam;
 276
 277 EXTERN ClCb clGlobalCp;
 278 EXTERN ClCellCb * rgClUtlGetCellCb ARGS((U16 cellId));
 279 EXTERN uint32_t reverseBits(uint32_t num, uint8_t numBits);
 280 EXTERN void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\
 281    uint32_t val, uint8_t valSize);
 282 EXTERN void lwrMacInit();
 283
 284 #endif
 285
 286 /**********************************************************************
 287          End of file
 288 **********************************************************************/