1 /******************************************************************************
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2 * Copyright 2017 Cisco Systems, Inc.
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3 * Copyright (c) 2019 Intel.
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5 * Licensed under the Apache License, Version 2.0 (the "License");
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6 * you may not use this file except in compliance with the License.
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7 * You may obtain a copy of the License at
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9 * http://www.apache.org/licenses/LICENSE-2.0
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11 * Unless required by applicable law or agreed to in writing, software
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12 * distributed under the License is distributed on an "AS IS" BASIS,
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13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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14 * See the License for the specific language governing permissions and
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15 * limitations under the License.
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17 *******************************************************************************/
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18 // This file has been modified by Intel in order to support 5G FAPI:PHY API Specification
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19 // Document 222.10.01 dated June 2019
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20 // Changes made by luis.farias@intel.com
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22 #ifndef _FAPI_INTERFACE_H_
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23 #define _FAPI_INTERFACE_H_
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25 #if defined(__cplusplus)
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29 typedef signed char int8_t;
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30 typedef unsigned char uint8_t;
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31 typedef int16_t int16_t;
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32 typedef uint16_t uint16_t;
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33 typedef int32_t int32_t;
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34 typedef uint32_t uint32_t;
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36 // Update for 5G FAPI
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37 #define FAPI_PARAM_REQUEST 0x00
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38 #define FAPI_PARAM_RESPONSE 0x01
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39 #define FAPI_CONFIG_REQUEST 0x02
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40 #define FAPI_CONFIG_RESPONSE 0x03
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41 #define FAPI_START_REQUEST 0x04
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42 #define FAPI_STOP_REQUEST 0x05
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43 #define FAPI_STOP_INDICATION 0x06
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44 #define FAPI_ERROR_INDICATION 0x07
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45 // Reserved 0x08 - 0x7f
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46 #define FAPI_DL_TTI_REQUEST 0x80
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47 #define FAPI_UL_TTI_REQUEST 0x81
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48 #define FAPI_SLOT_INDICATION 0x82
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49 #define FAPI_UL_DCI_REQUEST 0x83
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50 #define FAPI_TX_DATA_REQUEST 0x84
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51 #define FAPI_RX_DATA_INDICATION 0x85
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52 #define FAPI_CRC_INDICATION 0x86
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53 #define FAPI_UCI_INDICATION 0x87
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54 #define FAPI_SRS_INDICATION 0x88
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55 #define FAPI_RACH_INDICATION 0x89
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56 // Reserved 0x8a -0xff
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62 #define FAPI_RELEASE_CAPABILITY_TAG 0x0001
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63 #define FAPI_PHY_STATE_TAG 0x0002
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64 #define FAPI_SKIP_BLANK_DL_CONFIG_TAG 0x0003
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65 #define FAPI_SKIP_BLANK_UL_CONFIG_TAG 0x0004
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66 #define FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG 0x0005
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67 #define FAPI_CYCLIC_PREFIX_TAG 0x0006
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69 #define FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG 0x0007
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70 #define FAPI_SUPPORTED_BANDWIDTH_DL_TAG 0x0008
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71 #define FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG 0x0009
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72 #define FAPI_SUPPORTED_BANDWIDTH_UL_TAG 0x000A
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73 #define FAPI_CCE_MAPPING_TYPE_TAG 0x000B
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74 #define FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000c
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75 #define FAPI_PRECODER_GRANULARITY_CORESET_TAG 0x000d
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76 #define FAPI_PDCCH_MU_MIMO_TAG 0x000e
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77 #define FAPI_PDCCH_PRECODER_CYCLING_TAG 0x000f
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78 #define FAPI_MAX_PDCCHS_PER_SLOT_TAG 0x0010
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80 #define FAPI_PUCCH_FORMATS_TAG 0x0011
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81 #define FAPI_MAX_PUCCHS_PER_SLOT_TAG 0x0012
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83 #define FAPI_PDSCH_MAPPING_TYPE_TAG 0x0013
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84 #define FAPI_PDSCH_ALLOCATION_TYPES_TAG 0x0014
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85 #define FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015
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86 #define FAPI_PDSCH_CBG_TAG 0x0016
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87 #define FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017
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88 #define FAPI_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018
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89 #define FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019
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90 #define FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG 0x001a
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91 #define FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001b
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92 #define FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001c
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93 #define FAPI_MAX_MU_MIMO_USERS_DL_TAG 0x001d
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94 #define FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001e
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95 #define FAPI_PREMPTIONSUPPORT_TAG 0x001f
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96 #define FAPI_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020
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98 #define FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021
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99 #define FAPI_UCI_ONLY_PUSCH_TAG 0x0022
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100 #define FAPI_PUSCH_FREQUENCY_HOPPING_TAG 0x0023
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101 #define FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024
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102 #define FAPI_PUSCH_DMRS_MAX_LEN_TAG 0x0025
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103 #define FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026
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104 #define FAPI_PUSCH_CBG_TAG 0x0027
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105 #define FAPI_PUSCH_MAPPING_TYPE_TAG 0x0028
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106 #define FAPI_PUSCH_ALLOCATION_TYPES_TAG 0x0029
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107 #define FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002a
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108 #define FAPI_PUSCH_MAX_PTRS_PORTS_TAG 0x002b
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109 #define FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002c
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110 #define FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002d
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111 #define FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002e
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112 #define FAPI_MAX_MU_MIMO_USERS_UL_TAG 0x002f
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113 #define FAPI_DFTS_OFDM_SUPPORT_TAG 0x0030
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114 #define FAPI_PUSCH_AGGREGATION_FACTOR_TAG 0x0031
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115 // PRACH Parameters
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116 #define FAPI_PRACH_LONG_FORMATS_TAG 0x0032
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117 #define FAPI_PRACH_SHORT_FORMATS_TAG 0x0033
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118 #define FAPI_PRACH_RESTRICTED_SETS_TAG 0x0034
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119 #define FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035
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120 // Measurement Parameters
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121 #define FAPI_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036
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123 // CONFIG TLV TAGS per 5G FAPI
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124 // Carrier Configuration
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125 #define FAPI_DL_BANDWIDTH_TAG 0x1001
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126 #define FAPI_DL_FREQUENCY_TAG 0x1002
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127 #define FAPI_DL_K0_TAG 0x1003
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128 #define FAPI_DL_GRIDSIZE_TAG 0x1004
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129 #define FAPI_NUM_TX_ANT_TAG 0x1005
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130 #define FAPI_UPLINK_BANDWIDTH_TAG 0x1006
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131 #define FAPI_UPLINK_FREQUENCY_TAG 0x1007
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132 #define FAPI_UL_K0_TAG 0x1008
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133 #define FAPI_UL_GRID_SIZE_TAG 0x1009
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134 #define FAPI_NUM_RX_ANT_TAG 0x100a
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135 #define FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG 0x100b
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136 // Cell Configuration
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137 #define FAPI_PHY_CELL_ID_TAG 0x100c
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138 #define FAPI_FRAME_DUPLEX_TYPE_TAG 0x100d
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139 // SSB Configuration
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140 #define FAPI_SS_PBCH_POWER_TAG 0x100e
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141 #define FAPI_BCH_PAYLOAD_TAG 0x100f
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142 #define FAPI_SCS_COMMON_TAG 0x1010
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143 // PRACH Configuration
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144 #define FAPI_PRACH_SEQUENCE_LENGTH_TAG 0x1011
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145 #define FAPI_PRACH_SUBC_SPACING_TAG 0x1012
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146 #define FAPI_RESTRICTED_SET_CONFIG_TAG 0x1013
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147 #define FAPI_NUM_PRACH_FD_OCCASIONS_TAG 0x1014
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148 #define FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015
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149 #define FAPI_NUM_ROOT_SEQUENCES_TAG 0x1016
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150 #define FAPI_K1_TAG 0x1017
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151 #define FAPI_PRACH_ZERO_CORR_CONF_TAG 0x1018
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152 #define FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019
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153 #define FAPI_UNUSED_ROOT_SEQUENCES_TAG 0x101a
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154 #define FAPI_SSB_PER_RACH_TAG 0x101b
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155 #define FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101c
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157 #define FAPI_SSB_OFFSET_POINT_A_TAG 0x101d
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158 #define FAPI_BETA_PSS_TAG 0x101e
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159 #define FAPI_SSB_PERIOD_TAG 0x101f
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160 #define FAPI_SSB_SUBCARRIER_OFFSET_TAG 0x1020
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161 #define FAPI_MIB_TAG 0x1021
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162 #define FAPI_SSB_MASK_TAG 0x1022
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163 #define FAPI_BEAM_ID_TAG 0x1023
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164 #define FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024
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165 #define FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025
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167 #define FAPI_TDD_PERIOD_TAG 0x1026
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168 #define FAPI_SLOT_CONFIG_TAG 0x1027
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169 // Measurement Configuration
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170 #define FAPI_RSSI_MESUREMENT_TAG 0x1028
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172 // Error Codes updated per 5G FAPI Table 3-31
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173 #define FAPI_MSG_OK 0x0
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174 #define FAPI_MSG_INVALID_STATE 0x1
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175 #define FAPI_MSG_INVALID_CONFIG 0x2
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176 #define FAPI_MSG_SFN_OUT_OF_SYNC 0x3
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177 #define FAPI_MSG_SLOT_ERR 0x4
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178 #define FAPI_MSG_BCH_MISSING 0x5
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179 #define FAPI_MSG_INVALID_SFN 0x6
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180 #define FAPI_MSG_UL_DCI_ERR 0x7
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181 #define FAPI_MSG_TX_ERR 0x8
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184 // TODO : Work out what the correct maximums should be// Needs Review for 5G
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186 // Number of UL/DL configurations, I, as defined by 36.212 section 5.3.3.1.4
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187 // todo : work out what the max is
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188 #define FAPI_MAX_UL_DL_CONFIGURATIONS 4
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189 #define FAPI_MAX_NUM_PHYSICAL_ANTENNAS 4
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190 #define FAPI_MAX_NUM_SCHEDULED_UES 8
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191 #define FAPI_MAX_NUM_SUBBANDS 8
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192 #define FAPI_MAX_ANTENNA_PORT_COUNT 2
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195 // 5G FAPI Definitions
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196 #define NUMEROLOGIES 5
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197 #define MAX_NUM_UNUSED_ROOT_SEQUENCES 63 // 38.331 page 383
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198 #define MAX_NUM_PRACH_FD_OCCASIONS 64 // 38.331 page 383
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199 #define MAX_NUM_OF_SYMBOLS_PER_SLOT 14
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200 #define MAX_TDD_PERIODICITY 160// 38.212 11.1 for u=4 and P=10 ms
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201 #define MAX_NUMBER_TX_RUS 4 // m=p*q with p number of panels and q number of TxRU/RxRU per panel, depends on
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202 // the RF configuration, currently n=m=4, q=1, p=4 and k=21 (number of beams per pannel). n number of antenna ports
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203 #define MAX_NUMBER_OF_BEAMS 64 // Intel API Page 27
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204 #define MAX_NUM_ANT_PORTS 8 // Based on current RF
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205 #define MAX_NUM_LAYERS 8 // 38.211 Table 7.3.1.3-1
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206 #define MAX_NUM_TLVS_CELL_CONFIG 2 // 5G FAPI Table 3-9 (A)
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207 #define MAX_NUM_TLVS_CARRIER_CONFIG 27 // 5G FAPI Table 3-10 (B)
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208 #define MAX_NUM_TLVS_PDCCH_CONFIG 6 // 5G FAPI Table 3-11 (C)
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209 #define MAX_NUM_TLVS_PUCCH_CONFIG 2 // 5G FAPI Table 3-12 (D)
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210 #define MAX_NUM_TLVS_PDSCH_CONFIG 14 // 5G FAPI Table 3-13 (E)
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211 #define MAX_NUM_TLVS_PUSCH_CONFIG 17 // 5G FAPI Table 3-14 (F)
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212 #define MAX_NUM_TLVS_PRACH_CONFIG 4 // 5G FAPI Table 3-15 (G)
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213 #define MAX_NUM_TLVS_MEAS_CONFIG 1 // 5G FAPI Table 3-16 (H)
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214 #define MAX_NUM_TLVS_CONFIG 74 // A+B+C+D+E+F+G+H + Padding
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215 #define MAX_NUMBER_UNSUPPORTED_TLVS 74
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216 #define MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS 74
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217 #define MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS 74
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218 #define MAX_NUMBER_OF_MISSING_TLVS 74
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219 #define MAX_NUM_DIGBFINTERFACES 4 // Based on RF, 5G FAPI says {0,255}
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220 #define MAX_NUM_PRGS_PER_TTI 4 // Based on 38.214 5.1.2.3
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221 #define DCI_PAYLOAD_BYTE_LEN 32 // Based on Intel API MAX_DCI_BIT_BYTE_LEN
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222 #define MAX_NUMBER_DL_DCI 32 // Based on Intel API MAX_NUM_PDCCH
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223 #define MAX_NUMBER_OF_CODEWORDS_PER_PDU 2 // Based on MAX_DL_CODEWORD
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224 #define MAX_NUMBER_DL_PDUS_PER_TTI 129 // Based on (MAX_NUM_PDSCH*MAX_DL_CODEWORD + MAX_NUM_PDCCH + MAX_NUM_SRS + 1 PBCH/SLOT)
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225 #define MAX_NUMBER_OF_UES_PER_TTI 16 // Per common_ran_parameters.h
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226 #define MAX_NUM_CB_PER_TTI_IN_BYTES 192 // Based on Max Tb size of 1376264 bits + 24 crc over (8848-24) and O/H
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227 #define MAX_NUM_PTRS_PORTS 12 // Per 3GPP 38.212 Table 7.3.1.1.2-21
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228 #define MAX_NUMBER_OF_GROUPS_PER_TTI 8 // FlexRAN API Table 33
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229 #define MAX_NUMBER_UL_PDUS_PER_TTI 328 // (MAX_NUM_PUSCH+MAX_NUM_PUCCH+MAX_NUM_SRS+MAX_NUM_PRACH_DET)
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230 #define MAX_NUMBER_DCI_PDUS_PER_TTI 32 // Based on MAX_NUM_PDCCH
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231 #define MAX_NUMBER_OF_TLVS_PER_PDU 32 // Based on FAPI/nFAPI implementation
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232 #define MAX_NUMBER_TX_PDUS_PER_TTI 129 // Same as MAX_NUMBER_DL_PDUS_PER_TTI
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233 #define MAX_PDU_LENGTH 172096 // Based on 38.214 5.1.3.4, the TBS is 1376264 bits and divided by 8 and aligned to 64 bytes
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234 #define MAX_NUMBER_OF_PDUS_PER_TTI 129 // Same as MAX_NUMBER_DL_PDUS_PER_TTI
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235 #define MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI 64 // NUM_PUSCH_CHAN*MAX_NUMBER_OF_CODEWORDS_PER_PDU
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236 #define MAX_NUMBER_OF_CRCS_PER_SLOT 32 // Based on MAX_NUM_UL_CHAN
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237 #define MAX_HARQ_INFO_LEN_BYTES 214 // Based on 5G FAPI Table 3-70
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238 #define MAX_CSI_PART1_DATA_BYTES 214 // Based on 5G FAPI Table 3-71
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239 #define MAX_CSI_PART2_DATA_BYTES 214 // Based on 5G FAPI Table 3-72
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240 #define MAX_NUMBER_OF_HARQS_PER_IND 2 // Based on 5G FAPI Table 3-68
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241 #define MAX_SR_PAYLOAD_SIZE 1 // Based on 5G FAPI Table 3-69
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242 #define MAX_HARQ_PAYLOAD_SIZE 214 // Based on 5G FAPI Table 3-70
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243 #define MAX_NUMBER_UCI_PDUS_PER_SLOT 200 // Based on MAX_NUM_PUCCH
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244 #define MAX_NUMBER_RBS 273 // Based on MAX_NUM_OF_PRB_IN_FULL_BAND
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245 #define MAX_NUMBER_OF_REP_SYMBOLS 4 // Based on 5g FAPI Table 3-73
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246 #define MAX_NUMBER_SRS_PDUS_PER_SLOT 32 // Based on MAX_NUM_SRS
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247 #define MAX_NUM_PREAMBLES_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET
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248 #define MAX_NUMBER_RACH_PDUS_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET
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250 // Updated per 5G FAPI
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252 uint8_t numberOfMessagesIncluded;
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253 uint8_t handle; // Can be used for Phy Id or Carrier Id
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254 } fapi_msg_header_t;
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255 // Updated per 5G FAPI
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257 uint8_t message_type_id;
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258 uint32_t length; // Length of the message body in bytes
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260 // Updated per 5G FAPI
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265 // Updated per 5G FAPI
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269 } fapi_uint8_tlv_t;
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270 // Updated per 5G FAPI
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274 } fapi_uint16_tlv_t;
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275 // Updated per 5G FAPI
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279 } fapi_int16_tlv_t;
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280 // Updated per 5G FAPI
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284 } fapi_uint32_tlv_t;
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285 // Updated per 5G FAPI
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287 uint16_t tag; // In 5G FAPI for Cell Params
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290 } fapi_config_tlv_t;
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292 // Updated per 5G FAPI
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294 fapi_msg_t header; // For PARAM.req message length in fapi_msg_t is zero
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295 } fapi_param_req_t;
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297 // Updated per 5G FAPI
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299 fapi_uint16_tlv_t releaseCapability;
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300 fapi_uint16_tlv_t phyState;
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301 fapi_uint8_tlv_t skipBlankDlConfig;
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302 fapi_uint8_tlv_t skipBlankUlConfig;
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303 fapi_uint16_tlv_t numTlvsToReport;
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304 //fapi_param_tlv_t tlvStatus[MAX_NUMBER_OF_CONFIG_PARMS]; // Need to define this value based on 5G FAPI
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305 } fapi_cell_parms_t;
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307 // Updated per 5G FAPI
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309 fapi_uint8_tlv_t cyclicPrefix;
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310 fapi_uint8_tlv_t supportedSubcarrierSpacingDl;
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311 fapi_uint16_tlv_t supportedBandwidthDl;
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312 fapi_uint8_tlv_t supportedSubcarrierSpecingsUl;
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313 fapi_uint16_tlv_t supportedBandwidthUl;
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314 } fapi_carrier_parms_t;
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316 // Updated per 5G FAPI
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318 fapi_uint8_tlv_t cceMappingType;
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319 fapi_uint8_tlv_t coresetOutsideFirst3OfdmSymsOfSlot;
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320 fapi_uint8_tlv_t precoderGranularityCoreset;
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321 fapi_uint8_tlv_t pdcchMuMimo;
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322 fapi_uint8_tlv_t pdcchPrecoderCycling;
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323 fapi_uint8_tlv_t maxPdcchsPerSlot;
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324 } fapi_pdcch_parms_t;
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326 // Updated per 5G FAPI
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328 fapi_uint8_tlv_t pucchFormats;
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329 fapi_uint8_tlv_t maxPucchsPerSlot;
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330 } fapi_pucch_parms_t;
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332 // Updated per 5G FAPI
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334 fapi_uint8_tlv_t pdschMappingType;
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335 fapi_uint8_tlv_t pdschAllocationTypes;
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336 fapi_uint8_tlv_t pdschVrbToPrbMapping;
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337 fapi_uint8_tlv_t pdschCbg;
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338 fapi_uint8_tlv_t pdschDmrsConfigTypes;
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339 fapi_uint8_tlv_t pdschDmrsMaxLength;
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340 fapi_uint8_tlv_t pdschDmrsAdditionalPos;
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341 fapi_uint8_tlv_t maxPdschsTBsPerSlot;
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342 fapi_uint8_tlv_t maxNumberMimoLayersPdsch;
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343 fapi_uint8_tlv_t supportedMaxModulationOrderDl;
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344 fapi_uint8_tlv_t maxMuMimoUsersDl;
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345 fapi_uint8_tlv_t pdschDataInDmrsSymbols;
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346 fapi_uint8_tlv_t premptionSupport;
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347 fapi_uint8_tlv_t pdschNonSlotSupport;
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348 } fapi_pdsch_parms_t;
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350 // Updated per 5G FAPI
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352 fapi_uint8_tlv_t uciMuxUlschInPusch;
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353 fapi_uint8_tlv_t uciOnlyPusch;
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354 fapi_uint8_tlv_t puschFrequencyHopping;
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355 fapi_uint8_tlv_t puschDmrsConfigTypes;
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356 fapi_uint8_tlv_t puschDmrsMaxLen;
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357 fapi_uint8_tlv_t puschDmrsAditionalPos;
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358 fapi_uint8_tlv_t puschCbg;
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359 fapi_uint8_tlv_t puschMappingType;
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360 fapi_uint8_tlv_t puschAllocationTypes;
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361 fapi_uint8_tlv_t puschVrbToPrbMapping;
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362 fapi_uint8_tlv_t puschMaxPtrsPorts;
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363 fapi_uint8_tlv_t maxPduschsTBsPerSlot;
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364 fapi_uint8_tlv_t maxNumberMimoLayersnonCbPusch;
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365 fapi_uint8_tlv_t supportedModulationOrderUl;
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366 fapi_uint8_tlv_t maxMuMimoUsersUl;
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367 fapi_uint8_tlv_t dftsOfdmSupport;
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368 fapi_uint8_tlv_t puschAggregationFactor;
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369 } fapi_pusch_parms_t;
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371 // Updated per 5G FAPI
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373 fapi_uint8_tlv_t prachLongFormats;
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374 fapi_uint8_tlv_t prachShortFormats;
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375 fapi_uint8_tlv_t prachRestrictedSets;
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376 fapi_uint8_tlv_t maxPrachFdOccasionsInASlot;
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377 } fapi_prach_parms_t;
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379 // Updated per 5G FAPI
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381 fapi_uint8_tlv_t rssiMeasurementSupport;
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382 } fapi_meas_parms_t;
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384 // Updated per 5G FAPI
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386 fapi_cell_parms_t cell_parms;
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387 fapi_carrier_parms_t carr_parms;
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388 fapi_pdcch_parms_t pdcch_parms;
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389 fapi_pucch_parms_t pucch_parms;
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390 fapi_pdsch_parms_t pdsch_parms;
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391 fapi_pusch_parms_t pusch_parms;
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392 fapi_prach_parms_t prach_parms;
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393 fapi_meas_parms_t meas_parms;
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396 // Updated per 5G FAPI
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399 uint8_t error_code;
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400 uint8_t number_of_tlvs;
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401 fapi_uint16_tlv_t tlvs[MAX_NUM_TLVS_CONFIG];
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402 } fapi_param_resp_t;
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404 // Updated per 5G FAPI
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406 fapi_uint16_tlv_t dlBandwidth;
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407 fapi_uint32_tlv_t dlFrequency;
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408 fapi_uint16_tlv_t dlk0[NUMEROLOGIES];
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409 fapi_uint16_tlv_t dlGridSize[NUMEROLOGIES];
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410 fapi_uint16_tlv_t numTxAnt;
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411 fapi_uint16_tlv_t uplinkBandwidth;
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412 fapi_uint32_tlv_t uplinkFrequency;
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413 fapi_uint16_tlv_t ulk0[NUMEROLOGIES];
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414 fapi_uint16_tlv_t ulGridSize[NUMEROLOGIES];
\r
415 fapi_uint16_tlv_t numRxAnt;
\r
416 fapi_uint8_tlv_t frequencyShift7p5KHz;
\r
417 } fapi_carrier_config_t;
\r
419 // Updated per 5G FAPI
\r
421 fapi_uint8_tlv_t phyCellId;
\r
422 fapi_uint8_tlv_t frameDuplexType;
\r
423 } fapi_cell_config_t;
\r
425 // Updated per 5G FAPI
\r
427 fapi_uint32_tlv_t ssPbchPower;
\r
428 fapi_uint8_tlv_t bchPayload;
\r
429 fapi_uint8_tlv_t scsCommon;
\r
430 } fapi_ssb_config_t;
\r
432 // Updated per 5G FAPI
\r
434 fapi_uint16_tlv_t prachRootSequenceIndex;
\r
435 fapi_uint8_tlv_t numRootSequences;
\r
436 fapi_uint8_tlv_t unusedRootSequences[MAX_NUM_UNUSED_ROOT_SEQUENCES];
\r
437 } fapi_prachFdOccasion_t;
\r
439 // Updated per 5G FAPI
\r
441 fapi_uint8_tlv_t prachSequenceLength;
\r
442 fapi_uint8_tlv_t prachSubCSpacing;
\r
443 fapi_uint8_tlv_t restrictedSetConfig;
\r
444 fapi_prachFdOccasion_t prachFdOccasion[MAX_NUM_PRACH_FD_OCCASIONS];
\r
445 fapi_uint8_tlv_t ssbPerRach;
\r
446 fapi_uint8_tlv_t prachMultipleCarriersInABand;
\r
447 } fapi_prach_configuration_t;
\r
449 //Updated per 5G FAPI
\r
451 fapi_uint16_tlv_t ssbOffsetPointA;
\r
452 fapi_uint8_tlv_t betaPss;
\r
453 fapi_uint8_tlv_t ssbPeriod;
\r
454 fapi_uint8_tlv_t ssbSubCarrierOffset;
\r
455 fapi_uint32_tlv_t mib;
\r
456 fapi_uint32_tlv_t ssbMask[2];
\r
457 fapi_uint8_tlv_t beamId[64];
\r
458 fapi_uint8_tlv_t ssPbchMultipleCarriersInABand;
\r
459 fapi_uint8_tlv_t multipleCellsSsPbchInACarrier;
\r
460 } fapi_ssb_table_t;
\r
462 // Updated per 5G FAPI
\r
464 fapi_uint8_tlv_t slotConfig[MAX_NUM_OF_SYMBOLS_PER_SLOT];
\r
465 } fapi_slotconfig_t;
\r
467 // Updated per 5G FAPI
\r
469 fapi_uint8_tlv_t tddPeriod;
\r
470 fapi_slotconfig_t slotConfig[MAX_TDD_PERIODICITY];
\r
471 } fapi_tdd_table_t;
\r
473 // Updated per 5G FAPI
\r
475 fapi_uint8_tlv_t rssiMeasurement;
\r
476 } fapi_meas_config_t;
\r
478 // Updated per 5G FAPI
\r
480 int16_t digBeamWeightRe;
\r
481 int16_t digBeamWeightIm;
\r
482 } fapi_dig_beam_weight_t;
\r
484 // Updated per 5G FAPI
\r
487 fapi_dig_beam_weight_t digBeamWeight[MAX_NUMBER_TX_RUS];
\r
488 } fapi_dig_beam_config_t;
\r
490 // Updated per 5G FAPI
\r
492 uint16_t numDigBeams;
\r
494 fapi_dig_beam_config_t digBeam[MAX_NUMBER_OF_BEAMS];
\r
495 } fapi_beamforming_table_t;
\r
497 // Updated per 5G FAPI
\r
499 int16_t preCoderWeightRe;
\r
500 int16_t preCoderWeightIm;
\r
501 } fapi_precoderWeight_t;
\r
503 // Updated per 5G FAPI
\r
505 fapi_precoderWeight_t precoder_weight[MAX_NUM_ANT_PORTS];
\r
506 } fapi_precoder_weight_t;
\r
508 // Updated per 5G FAPI
\r
511 uint16_t numLayers;
\r
512 uint16_t numAntPorts;
\r
513 fapi_precoder_weight_t precoderWeight[MAX_NUM_LAYERS];
\r
514 } fapi_precoding_table_t;
\r
516 // Updated per 5G FAPI
\r
518 fapi_carrier_config_t carrierConfig;
\r
519 fapi_cell_config_t cellConfig;
\r
520 fapi_ssb_config_t ssbConfig;
\r
521 //fapi_prach_config_t prachConfig; //To be defined
\r
522 fapi_ssb_table_t ssbTable;
\r
523 fapi_tdd_table_t tddTable;
\r
524 fapi_meas_config_t measConfig;
\r
525 fapi_beamforming_table_t beamformingTable;
\r
526 fapi_precoding_table_t precodingTable;
\r
529 // Updated per 5G FAPI
\r
532 uint8_t number_of_tlvs;
\r
533 fapi_uint16_tlv_t tlvs[MAX_NUM_TLVS_CONFIG];
\r
534 } fapi_config_req_t;
\r
536 // Updated per 5G FAPI
\r
539 uint8_t error_code;
\r
540 uint8_t number_of_invalid_tlvs;
\r
541 uint8_t number_of_inv_tlvs_idle_only;
\r
542 uint8_t number_of_missing_tlvs;
\r
543 fapi_uint16_tlv_t tlvs[4*MAX_NUM_TLVS_CONFIG];
\r
544 // fapi_uint16_tlv_t unsupported_or_invalid_tlvs[MAX_NUMBER_UNSUPPORTED_TLVS];
\r
545 // fapi_uint16_tlv_t invalid_idle_only_tlvs[MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS];
\r
546 // fapi_uint16_tlv_t invalid_running_only_tlvs[MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS];
\r
547 // fapi_uint16_tlv_t missing_tlvs[MAX_NUMBER_OF_MISSING_TLVS];
\r
548 } fapi_config_resp_t;
\r
550 // Updated per 5G FAPI
\r
552 fapi_msg_t header; // Message Length is zero for START.request
\r
553 } fapi_start_req_t;
\r
555 // Updated per 5G FAPI
\r
557 fapi_msg_t header; // Message Length is zero for STOP.request
\r
560 // Updated per 5G FAPI
\r
562 fapi_msg_t header; // Message Length is zero for STOP.indication
\r
565 // Updated per 5G FAPI
\r
570 uint8_t message_id;
\r
571 uint8_t error_code;
\r
572 } fapi_error_ind_t;
\r
574 // Updated per 5G FAPI
\r
581 // Updated per 5G FAPI
\r
586 // Updated per 5G FAPI
\r
589 fapi_bmi_t beamIdx[MAX_NUM_DIGBFINTERFACES];
\r
592 // Updated per 5G FAPI
\r
596 uint8_t digBfInterfaces;
\r
597 fapi_pmi_bfi_t pmi_bfi[MAX_NUM_PRGS_PER_TTI];
\r
598 } fapi_precoding_bmform_t;
\r
600 // Updated per 5G FAPI
\r
603 uint16_t scramblingId;
\r
604 uint16_t scramblingRnti;
\r
606 uint8_t aggregationLevel;
\r
607 fapi_precoding_bmform_t pc_and_bform;
\r
608 uint8_t beta_pdcch_1_0;
\r
609 uint8_t powerControlOfssetSS;
\r
610 uint16_t payloadSizeBits;
\r
611 uint8_t payload[DCI_PAYLOAD_BYTE_LEN];
\r
614 // Updated per 5G FAPI
\r
618 uint8_t subCarrierSpacing;
\r
619 uint8_t cyclicPrefix;
\r
620 uint8_t startSymbolIndex;
\r
621 uint8_t durationSymbols;
\r
622 uint8_t freqDomainResource[6];
\r
623 uint8_t cceRegMappingType;
\r
624 uint8_t regBundleSize;
\r
625 uint8_t interleaverSize;
\r
626 uint8_t coreSetSize;
\r
627 uint16_t shiftIndex;
\r
628 uint8_t precoderGranularity;
\r
630 fapi_dl_dci_t* dlDci;
\r
631 } fapi_dl_pddch_pdu_t;
\r
633 // Updated per 5G FAPI
\r
635 uint16_t targetCodeRate;
\r
636 uint8_t qamModOrder;
\r
641 } fapi_codeword_pdu_t;
\r
643 // Updated per 5G FAPI
\r
645 uint16_t pduBitMap;
\r
650 uint8_t subCarrierSpacing;
\r
651 uint8_t cyclicPrefix;
\r
652 uint8_t nrOfCodeWords;
\r
653 fapi_codeword_pdu_t cwInfo[MAX_NUMBER_OF_CODEWORDS_PER_PDU];
\r
654 uint16_t dataScramblingId;
\r
655 uint8_t nrOfLayers;
\r
656 uint8_t transmissionScheme;
\r
658 uint16_t dlDmrsSymbPos;
\r
659 uint8_t dmrsConfigType;
\r
660 uint16_t dlDmrsScramblingId;
\r
662 uint8_t numDmrsCdmGrpsNoData;
\r
663 uint16_t dmrsPorts;
\r
664 uint8_t resourceAlloc;
\r
668 uint8_t vrbToPrbMapping;
\r
669 uint8_t startSymbIndex;
\r
670 uint8_t nrOfSymbols;
\r
671 uint8_t ptrsPortIndex;
\r
672 uint8_t ptrsTimeDensity;
\r
673 uint8_t ptrsFreqDensity;
\r
674 uint8_t ptrsReOffset;
\r
675 uint8_t nEpreRatioOfPdschToPtrs;
\r
676 fapi_precoding_bmform_t preCodingAndBeamforming;
\r
677 uint8_t powerControlOffset;
\r
678 uint8_t powerControlOffsetSS;
\r
679 uint8_t isLastCbPresent;
\r
680 uint8_t isInlineTbCrc;
\r
682 } fapi_dl_pdsch_pdu_t;
\r
684 // Updated per 5G FAPI
\r
688 uint8_t subCarrierSpacing;
\r
689 uint8_t cyclicPrefix;
\r
694 uint16_t freqDomain;
\r
698 uint8_t freqDensity;
\r
700 uint8_t powerControlOffset;
\r
701 uint8_t powerControlOffsetSs;
\r
702 fapi_precoding_bmform_t preCodingAndBeamforming;
\r
703 } fapi_dl_csi_rs_pdu_t;
\r
705 // Updated per 5G FAPI
\r
707 uint8_t dmrsTypeAPosition;
\r
708 uint8_t pdcchConfigSib1;
\r
709 uint8_t cellBarred;
\r
710 uint8_t intraFreqReselction;
\r
711 } fapi_phy_mib_pdu_t;
\r
713 // Updated per 5G FAPI
\r
717 uint32_t bchPayload;
\r
718 fapi_phy_mib_pdu_t phyMibPdu;
\r
720 } fapi_bch_payload_t;
\r
722 // Updated per 5G FAPI
\r
725 uint16_t physCellId;
\r
727 uint8_t ssbBlockIndex;
\r
728 uint16_t ssbSubCarrierOffset;
\r
729 uint8_t ssbOffsetPointA;
\r
730 uint8_t bchPayloadFlag;
\r
731 fapi_bch_payload_t bchPayload;
\r
732 fapi_precoding_bmform_t preCodingAndBeamforming;
\r
733 } fapi_dl_ssb_pdu_t;
\r
735 // Updated per 5G FAPI
\r
741 fapi_dl_pddch_pdu_t pdcch_pdu;
\r
742 fapi_dl_pdsch_pdu_t pdsch_pdu;
\r
743 fapi_dl_csi_rs_pdu_t csi_rs_pdu;
\r
744 fapi_dl_ssb_pdu_t ssb_pdu;
\r
746 } fapi_dl_tti_req_pdu_t;
\r
748 // Updated per 5G FAPI
\r
755 fapi_dl_tti_req_pdu_t* pdus;
\r
756 } fapi_dl_tti_req_t;
\r
758 // Updated per 5G FAPI
\r
760 uint8_t physCellId;
\r
761 uint8_t numPrachOcas;
\r
762 uint8_t prachFormat;
\r
764 uint8_t prachStartSymbol;
\r
766 fapi_precoding_bmform_t beamforming;
\r
767 } fapi_ul_prach_pdu_t;
\r
769 // Updated per 5G FAPI
\r
772 uint8_t pduIdx[MAX_NUMBER_OF_UES_PER_TTI];
\r
775 // Updated per 5G FAPI
\r
778 uint8_t harqProcessId;
\r
779 uint8_t newDataIndicator;
\r
782 uint8_t cbPresentAndPosition[MAX_NUM_CB_PER_TTI_IN_BYTES];
\r
783 }fapi_pusch_data_t;
\r
785 // Updated per 5G FAPI
\r
787 uint16_t harqAckBitLength;
\r
788 uint16_t csiPart1BitLength;
\r
789 uint16_t csiPart2BitLength;
\r
790 uint8_t alphaScaling;
\r
791 uint8_t betaOffsetHarqAck;
\r
792 uint8_t betaOffsetCsi1;
\r
793 uint8_t betaOffsetCsi2;
\r
794 } fapi_pusch_uci_t;
\r
796 // Updated per 5G FAPI
\r
798 uint16_t ptrsPortIndex;
\r
799 uint8_t ptrsDmrsPort;
\r
800 uint8_t ptrsReOffset;
\r
801 } fapi_ptrs_info_t;
\r
803 // Updated per 5G FAPI
\r
805 uint8_t numPtrsPorts;
\r
806 fapi_ptrs_info_t ptrsInfo[MAX_NUM_PTRS_PORTS];
\r
807 uint8_t ptrsTimeDensity;
\r
808 uint8_t ptrsFreqDensity;
\r
809 uint8_t ulPtrsPower;
\r
810 } fapi_pusch_ptrs_t;
\r
812 // Updated per 5G FAPI
\r
814 uint8_t lowPaprGroupNumber;
\r
815 uint16_t lowPaprSequenceNumber;
\r
816 uint8_t ulPtrsSampleDensity;
\r
817 uint8_t ulPtrsTimeDensityTransformPrecoding;
\r
818 } fapi_dfts_ofdm_t;
\r
820 // Updated per 5G FAPI
\r
822 uint16_t pduBitMap;
\r
827 uint8_t subCarrierSpacing;
\r
828 uint8_t cyclicPrefix;
\r
829 uint16_t targetCodeRate;
\r
830 uint8_t qamModOrder;
\r
833 uint8_t transformPrecoding;
\r
834 uint16_t dataScramblingId;
\r
835 uint8_t nrOfLayers;
\r
836 uint16_t ulDmrsSymbPos;
\r
837 uint8_t dmrsConfigType;
\r
838 uint16_t ulDmrsScramblingId;
\r
840 uint8_t numDmrsCdmGrpsNoData;
\r
841 uint16_t dmrsPorts;
\r
842 uint8_t resourceAlloc;
\r
843 uint8_t rbBitmap[36];
\r
846 uint8_t vrbToPrbMapping;
\r
847 uint8_t frequencyHopping;
\r
848 uint16_t txDirectCurrentLocation;
\r
849 uint8_t uplinkFrequencyShift7p5khz;
\r
850 uint8_t startSymbIndex;
\r
851 uint8_t nrOfSymbols;
\r
852 fapi_pusch_data_t puschData;
\r
853 fapi_pusch_uci_t puschUci;
\r
854 fapi_pusch_ptrs_t puschPtrs;
\r
855 fapi_dfts_ofdm_t dftsOfdm;
\r
856 fapi_precoding_bmform_t beamforming;
\r
857 } fapi_ul_pusch_pdu_t;
\r
859 // Updated per 5G FAPI
\r
865 uint8_t subCarrierSpacing;
\r
866 uint8_t cyclicPrefix;
\r
867 uint8_t formatType;
\r
868 uint8_t multiSlotTxIndicator;
\r
872 uint8_t startSymbolIndex;
\r
873 uint8_t nrOfSymbols;
\r
874 uint8_t freqHopFlag;
\r
875 uint16_t secondHopPrb;
\r
876 uint8_t groupHopFlag;
\r
877 uint8_t sequenceHopFlag;
\r
878 uint16_t hoppingId;
\r
879 uint16_t initialCyclicShift;
\r
880 uint16_t dataScramblingId;
\r
881 uint8_t timeDomainOccIdx;
\r
882 uint8_t preDftOccIdx;
\r
883 uint8_t preDftOccLen;
\r
884 uint8_t addDmrsFlag;
\r
885 uint16_t dmrsScramblingId;
\r
886 uint8_t dmrsCyclicShift;
\r
888 uint8_t bitLenHarq;
\r
889 uint16_t bitLenCsiPart1;
\r
890 uint16_t bitLenCsiPart2;
\r
891 fapi_precoding_bmform_t beamforming;
\r
892 } fapi_ul_pucch_pdu_t;
\r
894 // Updated per 5G FAPI
\r
900 uint8_t subCarrierSpacing;
\r
901 uint8_t cyclicPrefix;
\r
902 uint8_t numAntPorts;
\r
903 uint8_t numSymbols;
\r
904 uint8_t numRepetitions;
\r
905 uint8_t timeStartPosition;
\r
906 uint8_t configIndex;
\r
907 uint16_t sequenceId;
\r
908 uint8_t bandwidthIndex;
\r
910 uint8_t combOffset;
\r
911 uint8_t cyclicShift;
\r
912 uint8_t frequencyPosition;
\r
913 uint8_t frequencyShift;
\r
914 uint8_t frequencyHopping;
\r
915 uint8_t groupOrSequenceHopping;
\r
916 uint8_t resourceType;
\r
919 fapi_precoding_bmform_t beamforming;
\r
920 } fapi_ul_srs_pdu_t;
\r
922 // Updated per 5G FAPI
\r
928 fapi_ul_prach_pdu_t prach_pdu;
\r
929 fapi_ul_pusch_pdu_t pusch_pdu;
\r
930 fapi_ul_pucch_pdu_t pucch_pdu;
\r
931 fapi_ul_srs_pdu_t srs_pdu;
\r
932 //fapi_ul_rx_bmform_pdu_t rx_beamforming_pdu; //To be defined
\r
934 fapi_ue_info_t ueGrpInfo[MAX_NUMBER_OF_GROUPS_PER_TTI];
\r
935 } fapi_ul_tti_req_pdu_t;
\r
937 // Updated per 5G FAPI
\r
943 uint8_t rachPresent;
\r
947 fapi_ul_tti_req_pdu_t* pdus;
\r
948 } fapi_ul_tti_req_t;
\r
950 // Updated per 5G FAPI
\r
954 //fapi_dl_pdcch_pdu_t pdcchPduConfig; //To be defined
\r
957 // Updated per 5G FAPI
\r
963 fapi_dci_pdu_t* pdus;
\r
964 } fapi_ul_dci_req_t;
\r
966 // Updated per 5G FAPI
\r
968 uint16_t pduLength;
\r
971 fapi_uint32_tlv_t tlvs[MAX_NUMBER_OF_TLVS_PER_PDU];
\r
972 } fapi_tx_pdu_desc_t;
\r
974 // Updated per 5G FAPI
\r
976 fapi_msg_t header;
\r
980 fapi_tx_pdu_desc_t* pduDesc;
\r
981 } fapi_tx_data_req_t;
\r
983 // Updated per 5G FAPI
\r
988 uint16_t pduLength;
\r
990 uint16_t timingAdvance;
\r
993 } fapi_pdu_ind_info_t;
\r
995 // Updated per 5G FAPI
\r
1001 fapi_pdu_ind_info_t pdus[MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI];
\r
1002 } fapi_rx_data_indication_t;
\r
1004 // Updated per 5G FAPI
\r
1009 uint8_t tbCrcStatus;
\r
1011 uint8_t cbCrcStatus[MAX_NUM_CB_PER_TTI_IN_BYTES];
\r
1013 uint16_t timingAdvance;
\r
1015 } fapi_crc_ind_info_t;
\r
1017 // Updated per 5G FAPI
\r
1019 fapi_msg_t header;
\r
1023 fapi_crc_ind_info_t crc[MAX_NUMBER_OF_CRCS_PER_SLOT];
\r
1026 // Updated per 5G FAPI
\r
1029 uint16_t harqBitLen;
\r
1030 uint8_t harqPayload[MAX_HARQ_INFO_LEN_BYTES];
\r
1031 } fapi_harq_info_t;
\r
1033 // Updated per 5G FAPI
\r
1035 uint8_t csiPart1Crc;
\r
1036 uint16_t csiPart1BitLen;
\r
1037 uint8_t csiPart1Payload[MAX_CSI_PART1_DATA_BYTES];
\r
1038 } fapi_csi_p1_info_t;
\r
1040 // Updated per 5G FAPI
\r
1042 uint8_t csiPart2Crc;
\r
1043 uint16_t csiPart2BitLen;
\r
1044 uint8_t csiPart2Payload[MAX_CSI_PART2_DATA_BYTES];
\r
1045 } fapi_csi_p2_info_t;
\r
1047 // Updated per 5G FAPI
\r
1049 uint8_t pduBitmap;
\r
1053 uint16_t timingAdvance;
\r
1055 // fapi_harq_info_t harqInfo; // This is included if indicated by the pduBitmap
\r
1056 // fapi_csi_p1_info_t csiPart1info; // This is included if indicated by the pduBitmap
\r
1057 // fapi_csi_p2_info_t csiPart2info; // This is included if indicated by the pduBitmap
\r
1058 } fapi_uci_o_pusch_t;
\r
1060 // Updated per 5G FAPI
\r
1062 uint8_t srIndication;
\r
1063 uint8_t srConfidenceLevel;
\r
1064 } fapi_sr_f0f1_info_t;
\r
1066 // Updated per 5G FAPI
\r
1069 uint8_t harqConfidenceLevel;
\r
1070 uint8_t harqValue[MAX_NUMBER_OF_HARQS_PER_IND];
\r
1071 } fapi_harq_f0f1_info_t;
\r
1073 // Updated per 5G FAPI
\r
1075 uint16_t srBitlen;
\r
1076 uint8_t srPayload[MAX_SR_PAYLOAD_SIZE];
\r
1077 } fapi_sr_f2f3f4_info_t;
\r
1079 // Updated per 5G FAPI
\r
1082 uint16_t harqBitLen;
\r
1083 uint8_t harqPayload[MAX_HARQ_PAYLOAD_SIZE];
\r
1084 } fapi_harq_f2f3f4_info_t;
\r
1086 // Updated per 5G FAPI
\r
1088 uint8_t pduBitmap;
\r
1091 uint8_t pucchFormat;
\r
1093 uint16_t timingAdvance;
\r
1095 // fapi_sr_f2f3f4_info_t srInfo; // This is included if indicated by the pduBitmap
\r
1096 // fapi_harq_f2f3f4_info_t harqInfo; // This is included if indicated by the pduBitmap
\r
1097 // fapi_csi_p1_info_t csiPart1Info; // This is included if indicated by the pduBitmap
\r
1098 // fapi_csi_p2_info_t csiPart2Info; // This is included if indicated by the pduBitmap
\r
1099 } fapi_uci_o_pucch_f2f3f4_t;
\r
1101 // Updated per 5G FAPI
\r
1103 uint8_t pduBitmap;
\r
1106 uint8_t pucchFormat;
\r
1108 uint16_t timingAdvance;
\r
1110 // fapi_sr_f0f1_info_t srInfo; // This is included if indicated by the pduBitmap
\r
1111 // fapi_harq_f0f1_info_t harqInfo; // This is included if indicated by the pduBitmap
\r
1112 } fapi_uci_o_pucch_f0f1_t;
\r
1114 // Updated per 5G FAPI
\r
1120 fapi_uci_o_pusch_t uciPusch;
\r
1121 fapi_uci_o_pucch_f0f1_t uciPucchF0F1;
\r
1122 fapi_uci_o_pucch_f2f3f4_t uciPucchF2F3F4;
\r
1124 } fapi_uci_pdu_info_t;
\r
1126 // Updated per 5G FAPI
\r
1128 fapi_msg_t header;
\r
1132 fapi_uci_pdu_info_t uciPdu[MAX_NUMBER_UCI_PDUS_PER_SLOT];
\r
1133 } fapi_uci_indication_t;
\r
1135 // Updated per 5G FAPI
\r
1138 uint8_t rbSNR[MAX_NUMBER_RBS];
\r
1139 } fapi_symb_snr_t;
\r
1141 // Updated per 5G FAPI
\r
1145 uint16_t timingAdvance;
\r
1146 uint8_t numSymbols;
\r
1147 uint8_t wideBandSnr;
\r
1148 uint8_t numReportedSymbols;
\r
1149 fapi_symb_snr_t symbSnr[MAX_NUMBER_OF_REP_SYMBOLS];
\r
1152 // Updated per 5G FAPI
\r
1154 fapi_msg_t header;
\r
1158 fapi_srs_pdu_t srsPdus[MAX_NUMBER_SRS_PDUS_PER_SLOT];
\r
1159 } fapi_srs_indication_t;
\r
1161 // Updated per 5G FAPI
\r
1163 uint8_t preambleIndex;
\r
1164 uint16_t timingAdvance;
\r
1165 uint32_t premblePwr;
\r
1166 } fapi_preamble_info_t;
\r
1168 // Updated per 5G FAPI
\r
1170 uint16_t physCellId;
\r
1171 uint8_t symbolIndex;
\r
1172 uint8_t slotIndex;
\r
1173 uint8_t freqIndex;
\r
1176 uint8_t numPreamble;
\r
1177 fapi_preamble_info_t preambleInfo[MAX_NUM_PREAMBLES_PER_SLOT];
\r
1178 } fapi_rach_pdu_t;
\r
1180 // Updated per 5G FAPI
\r
1182 fapi_msg_t header;
\r
1186 fapi_rach_pdu_t rachPdu[MAX_NUMBER_RACH_PDUS_PER_SLOT];
\r
1187 } fapi_rach_indication_t;
\r
1190 //------------------------------------------------------------------------------
\r
1192 #if defined(__cplusplus)
\r