1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for rach handling functions
29 **********************************************************************/
32 @brief This file implements the rach handling.
36 #include "envopt.h" /* environment options */
37 #include "envdep.h" /* environment dependent */
38 #include "envind.h" /* environment independent */
39 #include "gen.h" /* general layer */
40 #include "ssi.h" /* system service interface */
41 #include "cm_tkns.h" /* Common Token Defines */
42 #include "cm_llist.h" /* Common Link List Defines */
43 #include "cm_hash.h" /* Common Hash List Defines */
44 #include "cm_mblk.h" /* common memory link list library */
45 #include "cm_lte.h" /* Common LTE Defines */
49 #include "gen.x" /* general layer typedefs */
50 #include "ssi.x" /* system services typedefs */
51 #include "cm5.x" /* system services */
52 #include "cm_tkns.x" /* Common Token Definitions */
53 #include "cm_llist.x" /* Common Link List Definitions */
54 #include "cm_lib.x" /* Common Library Definitions */
55 #include "cm_hash.x" /* Common Hash List Definitions */
56 #include "cm_mblk.x" /* common memory link list library */
57 #include "cm_lte.x" /* Common LTE Defines */
61 #include "du_app_mac_inf.h"
62 #include "mac_sch_interface.h"
64 #include "sch_utils.h"
66 extern SchCb schCb[SCH_MAX_INST];
67 extern int8_t coresetIdxTable[MAX_CORESET_INDEX][4];
68 extern int8_t searchSpaceIdxTable[MAX_SEARCH_SPACE_INDEX][4];
69 extern uint8_t puschDeltaTable[MAX_MU_PUSCH];
72 * @brief calculate ra-rnti function.
76 * Function : calculateRaRnti
78 * This function calculates ra-rnti
80 * @param[in] symbol index
81 * @param[in] slot index
82 * @param[in] frequency index
85 uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx)
88 uint8_t ulCarrierIdx = 0; /* configured to 0 */
89 raRnti = (1+symbolIdx+(14*slotIdx)+(14*80*freqIdx)+(14*80*8*ulCarrierIdx));
94 * @brief create raCb function.
98 * Function : createSchRaCb
100 * This function create raCb
103 * @param[in] shed instance
106 void createSchRaCb(uint16_t tcrnti, Inst schInst)
108 schCb[schInst].cells[schInst]->raCb[0].tcrnti = tcrnti;
112 * @brief resource allocation for msg3 PUSCH
116 * Function : schAllocMsg3Pusch
118 * This function handles msg3 PUSCH allocation
120 * @param[in] Inst schInst, SCH instance
121 * @param[in] slot, current slot
122 * @param[out] msg3StartRb
123 * @param[out] msg3NumRb
126 uint8_t schAllocMsg3Pusch(Inst schInst, uint16_t slot, uint16_t *msg3StartRb,
129 SchCellCb *cell = NULLP;
130 SchUlAlloc *ulAlloc = NULLP;
132 uint8_t msg3SlotAlloc = 0;
135 uint8_t startSymb = 0;
142 cell = schCb[schInst].cells[schInst];
143 puschMu = cell->cellCfg.puschMu;
144 delta = puschDeltaTable[puschMu];
145 k2 = cell->cellCfg.schInitialUlBwp.puschCommon.k2;
146 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.startSymbol;
147 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.lengthSymbol;
149 /* Slot allocation for msg3 based on 38.214 section 6.1.2.1 */
150 msg3SlotAlloc = slot + k2 + delta;
151 msg3SlotAlloc = msg3SlotAlloc % SCH_NUM_SLOTS;
153 startRb = PUSCH_START_RB;
155 /* formula used for calculation of rbSize, 38.214 section 6.1.4.2
156 * Ninfo = S.Nre.R.Qm.v
157 * Nre' = Nsc.NsymPdsch-NdmrsSymb-Noh
158 * Nre = min(156,Nre').nPrb */
159 numRb = 1; /* based on above calculation */
161 /* allocating 1 extra RB for now */
164 for(idx=startSymb; idx<symbLen; idx++)
166 cell->ulAlloc[msg3SlotAlloc]->assignedPrb[idx] = startRb + numRb;
168 ulAlloc = cell->ulAlloc[msg3SlotAlloc];
170 SCH_ALLOC(ulAlloc->schPuschInfo, sizeof(SchPuschInfo));
171 if(!ulAlloc->schPuschInfo)
173 DU_LOG("SCH: Memory allocation failed in schAllocMsg3Pusch");
176 ulAlloc->schPuschInfo->harqProcId = SCH_HARQ_PROC_ID;
177 ulAlloc->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1;
178 ulAlloc->schPuschInfo->fdAlloc.startPrb = startRb;
179 ulAlloc->schPuschInfo->fdAlloc.numPrb = numRb;
180 ulAlloc->schPuschInfo->tdAlloc.startSymb = startSymb;
181 ulAlloc->schPuschInfo->tdAlloc.numSymb = symbLen;
182 ulAlloc->schPuschInfo->tbInfo.mcs = 4;
183 ulAlloc->schPuschInfo->tbInfo.ndi = 1; /* new transmission */
184 ulAlloc->schPuschInfo->tbInfo.rv = 0;
185 ulAlloc->schPuschInfo->tbInfo.tbSize = 24; /*Considering 2 PRBs */
187 *msg3StartRb = startRb;
196 * @brief process rach indication function.
200 * Function : schProcessRachInd
202 * This function process rach indication
204 * @param[in] rachInd parameters
205 * @param[in] shed instance
208 uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst)
210 SchCellCb *cell = schCb[schInst].cells[schInst];
213 uint16_t msg3StartRb;
216 /* RAR will sent in the next slot */
217 slot = (rachInd->timingInfo.slot+SCHED_DELTA+RAR_DELAY)%SCH_NUM_SLOTS;
219 SchDlAlloc *dlAlloc = cell->dlAlloc[slot];
220 RarInfo *rarInfo = &(dlAlloc->rarInfo);
222 /* rar message presense in next slot ind and will be scheduled */
223 dlAlloc->rarPres = true;
225 /* calculate the ra-rnti value */
226 raRnti = calculateRaRnti(rachInd->symbolIdx,rachInd->slotIdx,rachInd->freqIdx);
228 /* create raCb at SCH */
229 createSchRaCb(rachInd->crnti,schInst);
231 /* allocate resources for msg3 */
232 ret = schAllocMsg3Pusch(schInst, slot, &msg3StartRb, &msg3NumRb);
237 rarInfo->raRnti = raRnti;
238 rarInfo->tcrnti = rachInd->crnti;
239 rarInfo->RAPID = rachInd->preambleIdx;
240 rarInfo->ta = rachInd->timingAdv;
241 rarInfo->msg3StartRb = msg3StartRb;
242 rarInfo->msg3NumRb = msg3NumRb;
248 * @brief fill RAR info function.
252 * Function : calculateRaRnti
254 * This function fills pdcch and pdsch info for RAR
256 * @param[in] rar Allocation info
259 * @param[in] offset to pointA to determine freq alloc
262 uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA)
265 uint8_t coreset0Idx = 0;
267 uint8_t firstSymbol = 0;
268 uint8_t numSymbols = 0;
270 uint8_t FreqDomainResource[6] = {0};
271 SchBwpDlCfg *initialBwp = &schCb[inst].cells[inst]->cellCfg.schInitialDlBwp;
273 PdcchCfg *pdcch = &rarAlloc->rarPdcchCfg;
274 PdschCfg *pdsch = &rarAlloc->rarPdschCfg;
276 coreset0Idx = initialBwp->pdcchCommon.raSearchSpace.coresetId;
278 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
279 numRbs = coresetIdxTable[coreset0Idx][1];
280 numSymbols = coresetIdxTable[coreset0Idx][2];
281 offset = coresetIdxTable[coreset0Idx][3];
283 /* calculate time domain parameters */
284 // note: since slot value is made sl1, RAR can be sent at all slots
285 uint16_t mask = 0x2000;
286 for(firstSymbol=0; firstSymbol<14;firstSymbol++)
288 if(initialBwp->pdcchCommon.raSearchSpace.monitoringSymbol & mask)
294 /* calculate the PRBs */
295 freqDomResourceAlloc( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
297 /* fill the PDCCH PDU */
298 pdcch->pdcchBwpCfg.BWPSize = initialBwp->bwp.numPrb;
299 pdcch->pdcchBwpCfg.BWPStart = initialBwp->bwp.firstPrb;
300 pdcch->pdcchBwpCfg.subcarrierSpacing = initialBwp->bwp.scs;
301 pdcch->pdcchBwpCfg.cyclicPrefix = initialBwp->bwp.cyclicPrefix;
302 pdcch->coreset0Cfg.startSymbolIndex = firstSymbol;
303 pdcch->coreset0Cfg.durationSymbols = numSymbols;
304 memcpy(pdcch->coreset0Cfg.freqDomainResource,FreqDomainResource,6);
305 pdcch->coreset0Cfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
306 pdcch->coreset0Cfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
307 pdcch->coreset0Cfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
308 pdcch->coreset0Cfg.coreSetType = 0;
309 pdcch->coreset0Cfg.shiftIndex = pci;
310 pdcch->coreset0Cfg.precoderGranularity = 0; /* sameAsRegBundle */
312 pdcch->dci.rnti = raRnti; /* RA-RNTI */
313 pdcch->dci.scramblingId = pci;
314 pdcch->dci.scramblingRnti = 0;
315 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
316 pdcch->dci.aggregLevel = 4;
317 pdcch->dci.beamPdcchInfo.numPrgs = 1;
318 pdcch->dci.beamPdcchInfo.prgSize = 1;
319 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
320 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
321 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
322 pdcch->dci.txPdcchPower.powerValue = 0;
323 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
324 pdcch->dci.pdschCfg = pdsch;
326 /* fill the PDSCH PDU */
328 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
329 pdsch->rnti = raRnti; /* RA-RNTI */
331 pdsch->pdschBwpCfg.BWPSize = initialBwp->bwp.numPrb;
332 pdsch->pdschBwpCfg.BWPStart = initialBwp->bwp.firstPrb;
333 pdsch->numCodewords = 1;
334 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
336 pdsch->codeword[cwCount].targetCodeRate = 308;
337 pdsch->codeword[cwCount].qamModOrder = 2;
338 pdsch->codeword[cwCount].mcsIndex = 4; /* mcs configured to 4 */
339 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
340 pdsch->codeword[cwCount].rvIndex = 0;
341 pdsch->codeword[cwCount].tbSize = 80/8; /* 38.214: Table 5.1.3.2-1,
342 devided by 8 to get the value in bytes */
344 pdsch->dataScramblingId = pci;
345 pdsch->numLayers = 1;
346 pdsch->transmissionScheme = 0;
348 pdsch->dmrs.dlDmrsSymbPos = 2;
349 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
350 pdsch->dmrs.dlDmrsScramblingId = pci;
351 pdsch->dmrs.scid = 0;
352 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
353 pdsch->dmrs.dmrsPorts = 0;
354 pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */
355 pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
356 /* formula used for calculation of rbSize, 38.213 section 5.1.3.2 *
357 * Ninfo = S . Nre . R . Qm . v *
358 * Nre' = Nsc . NsymPdsch - NdmrsSymb - Noh *
359 * Nre = min(156,Nre') . nPrb */
360 pdsch->freqAlloc.rbSize = 1; /* This value is calculated from above formulae */
361 pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */
362 pdsch->timeAlloc.startSymbolIndex = initialBwp->pdschCommon.startSymbol;
363 pdsch->timeAlloc.numSymbols = initialBwp->pdschCommon.lengthSymbol;
364 pdsch->beamPdschInfo.numPrgs = 1;
365 pdsch->beamPdschInfo.prgSize = 1;
366 pdsch->beamPdschInfo.digBfInterfaces = 0;
367 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
368 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
369 pdsch->txPdschPower.powerControlOffset = 0;
370 pdsch->txPdschPower.powerControlOffsetSS = 0;
375 /**********************************************************************
377 **********************************************************************/