1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
328 uint16_t numSlots = cell->numSlots;
329 bool isAllocated = false;
330 uint16_t pucchStartPrb;
332 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
334 //Assuming one entry in the list
335 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
337 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
339 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
340 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
342 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
343 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
344 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
346 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
347 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
351 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
352 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
365 if(pucchDedCfg->format1)
367 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
368 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
378 /* setting SR and UCI flag */
379 if(pucchDedCfg->schedReq)
381 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
383 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
384 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
387 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
389 ulSchedPucch->srFlag = true;
390 ulSchedPucch->uciFlag = true;
392 ulSchedPucch->harqFlag = true;//check how to enable?
398 * @brief Function to fill Pucch Resource Info
402 * Function : fillPucchResourceInfo
404 * Function to fill Pucch Resource Info
406 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
407 * @return ROK/RFAILED
410 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
412 uint8_t ret = ROK, ueId = 0, ueIdx = 0, pucchIdx = 0;
413 SchCellCb *cell = schCb[inst].cells[inst];
414 SchPucchCfgCmn *pucchCfg = NULLP;
415 SchBwpParams *ulBwp = NULLP;
416 SchUeCb *ueCb = NULLP;
419 GET_UE_ID(schPucchInfo->rnti, ueId);
422 ueCb = schGetUeCb(cell, schPucchInfo->rnti);
423 if(ueCb->ueDrxInfoPres)
425 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
429 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
431 /* fill pucch dedicated cfg */
432 ret = fillUlSchedPucchDedicatedCfg(cell,\
433 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
436 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
437 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
443 /* fill pucch common cfg */
444 /* derive pucchResourceSet from schCellCfg */
445 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
446 pucchIdx = pucchCfg->pucchResourceCommon;
447 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
448 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
449 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
450 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
453 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
454 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
455 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
456 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
457 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
459 /* set SR and UCI flag to false */
460 schPucchInfo->srFlag = true;
461 schPucchInfo->uciFlag = true;
468 * @brief resource allocation for UL
472 * Function : schUlResAlloc
474 * This function handles UL Resource allocation
476 * @param[in] SchCellCb *cell, cellCb
479 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
483 UlSchedInfo ulSchedInfo;
484 SchUlSlotInfo *schUlSlotInfo = NULLP;
485 SlotTimingInfo ulTimingInfo;
486 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
489 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
491 ulSchedInfo.cellId = cell->cellId;
492 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
493 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
494 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
496 /* Schedule resources for PRACH */
497 if(cell->firstSib1Transmitted)
498 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
500 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
501 if(schUlSlotInfo->schPuschInfo)
503 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
504 /* Check the ue drx status if the UE is active for uplink scheduling or not */
506 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
507 if(ueCb->ueDrxInfoPres)
509 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
513 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
514 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
515 sizeof(SchPuschInfo));
516 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
517 schUlSlotInfo->schPuschInfo = NULL;
520 if(schUlSlotInfo->pucchPres)
522 ret = fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
525 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
526 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
527 sizeof(SchPucchInfo));
533 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
537 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
540 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
543 schInitUlSlot(schUlSlotInfo);
547 /*******************************************************************
549 * @brief Fills pdcch and pdsch info for msg4
553 * Function : schDlRsrcAllocMsg4
556 * Fills pdcch and pdsch info for msg4
558 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
559 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
560 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
561 * @params[in] bool isRetx, SchDlHqProcCb *hqP
562 * @return ROK - success
565 * ****************************************************************/
566 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
567 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
569 uint8_t coreset0Idx = 0;
570 uint8_t firstSymbol = 0;
571 uint8_t numSymbols = 0;
572 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
573 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
576 SchBwpDlCfg *initialBwp = NULLP;
577 PdcchCfg *pdcch = NULLP;
578 PdschCfg *pdsch = NULLP;
580 DlMsgSchInfo *msg4Alloc = NULLP;
584 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
588 if(dlMsgAlloc == NULL)
590 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
594 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
595 initialBwp = &cell->cellCfg.schInitialDlBwp;
596 pdcch = &msg4Alloc->dlMsgPdcchCfg;
597 pdsch = &msg4Alloc->dlMsgPdschCfg;
598 bwp = &msg4Alloc->bwp;
599 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
601 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
602 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
604 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
605 numRbs = coresetIdxTable[coreset0Idx][1];
606 numSymbols = coresetIdxTable[coreset0Idx][2];
608 /* calculate time domain parameters */
609 uint16_t mask = 0x2000;
610 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
612 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
619 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
620 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
621 bwp->subcarrierSpacing = initialBwp->bwp.scs;
622 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
624 /* fill the PDCCH PDU */
625 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
626 pdcch->coresetCfg.durationSymbols = numSymbols;
627 memcpy(pdcch->coresetCfg.freqDomainResource, \
628 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
630 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
631 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
632 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
633 pdcch->coresetCfg.coreSetType = 0;
634 pdcch->coresetCfg.coreSetSize = numRbs;
635 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
636 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
638 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
639 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
640 pdcch->dci.scramblingRnti = 0;
641 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
642 pdcch->dci.aggregLevel = 4;
643 pdcch->dci.beamPdcchInfo.numPrgs = 1;
644 pdcch->dci.beamPdcchInfo.prgSize = 1;
645 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
646 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
647 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
648 pdcch->dci.txPdcchPower.powerValue = 0;
649 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
650 pdcch->dci.pdschCfg = pdsch;
652 /* fill the PDSCH PDU */
654 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
655 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
657 pdsch->numCodewords = 1;
658 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
660 pdsch->codeword[cwCount].targetCodeRate = 308;
661 pdsch->codeword[cwCount].qamModOrder = 2;
662 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
663 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
666 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
667 hqP->tbInfo[cwCount].tbSzReq = tbSize;
668 pdsch->codeword[cwCount].rvIndex = 0;
672 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
673 tbSize = hqP->tbInfo[cwCount].tbSzReq;
675 pdsch->codeword[cwCount].tbSize = tbSize;
677 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
678 pdsch->numLayers = 1;
679 pdsch->transmissionScheme = 0;
681 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
682 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
683 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
684 pdsch->dmrs.scid = 0;
685 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
686 pdsch->dmrs.dmrsPorts = 0;
687 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
688 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
689 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
691 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
692 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
694 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
695 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
696 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
697 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
699 /* Find total symbols occupied including DMRS */
700 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
701 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
702 * in that case only PDSCH symbols are marked as occupied */
703 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
705 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
706 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
708 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
711 startSymbol = dmrsStartSymbol;
712 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
715 /* Allocate the number of PRBs required for RAR PDSCH */
716 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
717 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
719 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
723 pdsch->beamPdschInfo.numPrgs = 1;
724 pdsch->beamPdschInfo.prgSize = 1;
725 pdsch->beamPdschInfo.digBfInterfaces = 0;
726 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
727 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
728 pdsch->txPdschPower.powerControlOffset = 0;
729 pdsch->txPdschPower.powerControlOffsetSS = 0;
731 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
735 /*******************************************************************
737 * @brief Scheduling for Pucch Resource
741 * Function : schAllocPucchResource
744 * Scheduling for Pucch Resource
746 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
747 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
748 * @return ROK - success
751 *******************************************************************/
753 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
754 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
756 uint16_t pucchSlot = 0;
757 SchUlSlotInfo *schUlSlotInfo = NULLP;
759 pucchSlot = pucchTime.slot;
760 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
761 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
763 schUlSlotInfo->pucchPres = true;
764 schUlSlotInfo->schPucchInfo.rnti = crnti;
767 /* set HARQ flag to true */
768 schUlSlotInfo->schPucchInfo.harqFlag = true;
769 schUlSlotInfo->schPucchInfo.numHarqBits = 1; /* 1 bit for HARQ */
770 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
771 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
776 /*******************************************************************
778 * @brief Fills pdcch and pdsch info for dedicated DL msg
782 * Function : schDlRsrcAllocDlMsg
785 * Fills pdcch and pdsch info for dl msg
787 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
788 * @params[in] uint16_t crnti, uint32_t tbSize
789 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
790 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
791 * @params[in] bool isRetx, SchDlHqProcCb *hqP
792 * @return ROK - success
795 * ****************************************************************/
796 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
797 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
798 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
801 PdcchCfg *pdcch = NULLP;
802 PdschCfg *pdsch = NULLP;
805 SchControlRsrcSet coreset1;
806 SchPdschConfig pdschCfg;
807 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
809 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
810 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
811 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
813 GET_UE_ID(crnti, ueId);
814 ueCb = cell->ueCb[ueId-1];
815 coreset1 = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
816 pdschCfg = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdschCfg;
819 bwp->freqAlloc.numPrb = MAX_NUM_RB;
820 bwp->freqAlloc.startPrb = 0;
821 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
822 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
824 /* fill the PDCCH PDU */
825 //Considering coreset1 also starts from same symbol as coreset0
826 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
827 pdcch->coresetCfg.durationSymbols = coreset1.duration;
828 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
829 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
830 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
831 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
832 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
833 //Considering number of RBs in coreset1 is same as coreset0
834 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
835 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
836 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
838 pdcch->dci.rnti = ueCb.crnti;
839 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
840 pdcch->dci.scramblingRnti = 0;
841 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
842 pdcch->dci.aggregLevel = 4;
843 pdcch->dci.beamPdcchInfo.numPrgs = 1;
844 pdcch->dci.beamPdcchInfo.prgSize = 1;
845 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
846 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
847 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
848 pdcch->dci.txPdcchPower.powerValue = 0;
849 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
851 /* fill the PDSCH PDU */
853 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
854 pdsch->rnti = ueCb.crnti;
856 pdsch->numCodewords = 1;
857 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
859 pdsch->codeword[cwCount].targetCodeRate = 308;
860 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
861 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
862 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
863 pdsch->codeword[cwCount].rvIndex = 0;
867 tbSize +=TX_PAYLOAD_HDR_LEN;
868 hqP->tbInfo[cwCount].tbSzReq = tbSize;
870 pdsch->codeword[cwCount].tbSize = tbSize;
872 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
873 pdsch->numLayers = 1;
874 pdsch->transmissionScheme = 0;
876 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
877 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
878 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
879 pdsch->dmrs.scid = 0;
880 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
881 pdsch->dmrs.dmrsPorts = 0;
882 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
883 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
884 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
886 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
887 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
889 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
890 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
891 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
892 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
894 /* Find total symbols occupied including DMRS */
895 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
896 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
897 * in that case only PDSCH symbols are marked as occupied */
898 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
900 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
901 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
903 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
906 startSymbol = dmrsStartSymbol;
907 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
910 /* Allocate the number of PRBs required for DL PDSCH */
911 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
912 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
914 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
918 pdsch->beamPdschInfo.numPrgs = 1;
919 pdsch->beamPdschInfo.prgSize = 1;
920 pdsch->beamPdschInfo.digBfInterfaces = 0;
921 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
922 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
923 pdsch->txPdschPower.powerControlOffset = 0;
924 pdsch->txPdschPower.powerControlOffsetSS = 0;
926 pdcch->dci.pdschCfg = pdsch;
930 /*******************************************************************
932 * @brief Fills k0 and k1 information table for FDD
936 * Function : BuildK0K1TableForFdd
939 * Fills k0 and k1 information table for FDD
941 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
942 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
943 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
944 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
945 * @return ROK - success
948 * ****************************************************************/
949 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
950 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
953 uint8_t k1TmpVal =0, cfgIdx=0;
954 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
956 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
957 * required but this will require for harq processing */
958 // uint8_t k0TmpVal = 0;
959 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
960 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
962 /* Initialization the structure and storing the total slot values. */
963 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
964 k0K1InfoTbl->tblSize = cell->numSlots;
966 /* Storing time domain resource allocation list based on common or dedicated configuration. */
967 if(pdschCfgCmnPres == true)
969 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
970 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
972 /*TODO uncomment this line during harq processing */
973 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
978 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
979 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
981 /*TODO uncomment this line during harq processing */
982 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
986 /* Checking all the slots for K0 and K1 values. */
987 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
990 /* Storing the values of k0 based on time domain resource
991 * allocation list. If the value is unavailable then fill default values,
992 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
993 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
995 /* TODO These if 0 we will remove during harq processing */
997 if(pdschCfgCmnPres == true)
999 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1003 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1005 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1009 k0TmpVal = DEFAULT_K0_VALUE;
1013 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1014 * then skip else continue storing the values. */
1016 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1018 k1TmpVal = UlAckTbl[k1Index];
1019 if(k1TmpVal <= MIN_NUM_K1_IDX)
1024 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1025 /* TODO Store K1 index where harq feedback will be received in harq table. */
1029 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1030 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1036 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1041 /*******************************************************************
1043 * @brief Fills k0 and k1 information table
1047 * Function : BuildK0K1Table
1050 * Fills K0 and k1 information table
1052 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1053 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1054 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1055 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1056 * @return ROK - success
1059 * ****************************************************************/
1060 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1061 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1066 bool ulSlotPresent = false;
1067 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1068 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1069 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1070 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1073 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1075 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1081 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1082 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1083 k0K1InfoTbl->tblSize = cell->numSlots;
1084 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1086 /* Storing time domain resource allocation list based on common or
1087 * dedicated configuration availability. */
1088 if(pdschCfgCmnPres == true)
1090 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1091 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1093 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1098 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1099 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1101 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1105 /* Checking all possible indexes for K0 and K1 values. */
1106 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1108 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1109 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1110 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1115 /* Storing K0 , start symbol and length symbol for further processing.
1116 * If K0 value is not available then we can fill the default values
1117 * given in spec 38.331. */
1119 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1121 if(pdschCfgCmnPres == true)
1123 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1124 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1125 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1129 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1131 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1135 k0TmpVal = DEFAULT_K0_VALUE;
1137 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1138 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1141 /* If current slot + k0 is UL then skip the slot
1142 * else if it is DL slot then continue the next steps
1143 * else if it is a FLEXI slot then check symbols of slot, It should not
1144 * contain any UL slot. */
1145 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1146 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1147 if(slotCfg == UL_SLOT)
1151 if(slotCfg == FLEXI_SLOT)
1153 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1155 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1156 if(slotCfg == UL_SLOT)
1163 /* If current slot + k0 + k1 is a DL slot then skip the slot
1164 * else if it is UL slot then store the information
1165 * else if it is FLEXI slot then check the symbols, it must have
1166 * at least one UL symbol. */
1168 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1170 k1TmpVal = UlAckTbl[k1Index];
1171 if(k1TmpVal > MIN_NUM_K1_IDX)
1173 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1174 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1175 if(slotCfg == DL_SLOT)
1179 if(slotCfg == FLEXI_SLOT)
1181 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1183 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1185 ulSlotPresent = true;
1190 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1192 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1193 /* TODO Store K1 index where harq feedback will be received
1199 /* Store all the values if all condition satisfies. */
1202 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1203 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1209 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1216 /*******************************************************************
1218 * @brief Fills K2 information table for FDD
1222 * Function : BuildK2InfoTableForFdd
1225 * Fills K2 information table for FDD
1227 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1228 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1229 * @return ROK - success
1232 * ****************************************************************/
1233 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1234 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1236 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1238 /* Initialization the structure and storing the total slot values. */
1239 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1240 k2InfoTbl->tblSize = cell->numSlots;
1242 msg3K2InfoTbl->tblSize = cell->numSlots;
1244 /* Checking all possible indexes for K2. */
1245 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1247 /* Storing K2 values. */
1248 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1250 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1251 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1252 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1254 /* Updating K2 values for MSG3 */
1257 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1258 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1259 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1265 /*******************************************************************
1267 * @brief Fills K2 information table
1271 * Function : BuildK2InfoTable
1274 * Fills K2 information table
1276 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1277 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1278 * @return ROK - success
1281 * ****************************************************************/
1282 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1283 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1287 bool dlSymbolPresent = false;
1288 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1289 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1290 SlotConfig currentSlot;
1293 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1295 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1301 /* Initialization the structure and storing the total slot values. */
1302 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1303 k2InfoTbl->tblSize = cell->numSlots;
1305 msg3K2InfoTbl->tblSize = cell->numSlots;
1306 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1308 /* Checking all possible indexes for K2. */
1309 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1311 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1313 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1314 if(currentSlot != UL_SLOT)
1316 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1318 /* Storing k2, startSymbol, endSymbol information for further processing.
1319 * If k2 is absent then fill the default values given in spec 38.331
1320 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1321 k2Val = timeDomRsrcAllocList[k2Index].k2;
1324 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1327 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1330 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1333 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1336 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1341 /* Current slot + k2 should be either UL or FLEXI slot.
1342 * If slot is FLEXI then check all the symbols of that slot,
1343 * it should not contain any DL or FLEXI slot */
1344 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1345 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1346 if(slotCfg != DL_SLOT)
1348 if(slotCfg == FLEXI_SLOT)
1350 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1351 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1352 dlSymbolPresent = false;
1353 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1355 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1356 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1358 dlSymbolPresent = true;
1363 /* Store all the values if all condition satisfies. */
1364 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1366 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1367 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1368 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1374 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1376 /* Check for K2 for MSG3 */
1377 /* Current slot + k2 should be either UL or FLEXI slot.
1378 * If slot is FLEXI then check all the symbols of that slot,
1379 * it should not contain any DL or FLEXI slot */
1380 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1381 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1382 if(slotCfg != DL_SLOT)
1384 if(slotCfg == FLEXI_SLOT)
1386 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1387 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1388 dlSymbolPresent = false;
1389 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1391 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1392 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1394 dlSymbolPresent = true;
1399 /* Store all the values if all condition satisfies. */
1400 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1402 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1403 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1404 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1415 /*******************************************************************************************
1417 * @brief Allocate the PRB using RRM policy
1421 * Function : prbAllocUsingRRMPolicy
1424 * [Step1]: Traverse each Node in the LC list
1425 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1426 * [Step3]: Calcualte the maxPRB for this LC.
1427 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1429 * b. For Default, just SharedPRB count
1430 * [Step4]: If the LC is the First one to be allocated for this UE then add
1431 * TX_PAYLODN_LEN to reqBO
1432 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1433 * based on reqBO and maxPRB left.
1434 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1435 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1436 * [Step8]: Continue the next loop from List->head
1439 * [Exit1]: If all the LCs are allocated in list
1440 * [Exit2]: If PRBs are exhausted
1442 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1443 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1444 * I/P > mcsIdx and PDSCH symbols count
1445 * I/P & O/P > Shared PRB , reserved PRB Count
1446 * I/P & O/P > Total TBS size accumulated
1447 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1448 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1452 * *******************************************************************************************/
1453 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1454 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1456 CmLList *node = NULLP;
1457 LcInfo *lcNode = NULLP;
1458 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1462 DU_LOG("\nERROR --> SCH: LcList not present");
1467 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1468 * For Other LcList, remReservedPRB = 0*/
1469 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1471 remReservedPRB = *reservedPRB;
1478 /*For Debugging purpose*/
1481 lcNode = (LcInfo *)node->node;
1483 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1484 * process of LCID which was fully allocated. Check is just for safety purpose*/
1485 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1487 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1489 deleteNodeFromLList(lcLL, node);
1490 SCH_FREE(lcNode, sizeof(LcInfo));
1495 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1496 if(lcNode->allocBO != 0)
1498 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1502 /*[Exit2]: If PRBs are exhausted*/
1505 /*Loop Exit: All resources exhausted*/
1506 if(remReservedPRB == 0 && *sharedPRB == 0)
1508 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1514 /*Loop Exit: All resources exhausted*/
1517 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1523 maxPRB = remReservedPRB + *sharedPRB;
1526 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1528 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1530 *isTxPayloadLenAdded = TRUE;
1531 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1532 mcsIdx, numSymbols, maxPRB, &estPrb);
1533 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1535 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1537 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1540 lcNode->reqBO += UL_GRANT_SIZE;
1541 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1546 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1547 mcsIdx, numSymbols, maxPRB, &estPrb);
1550 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1551 * estimated PRB allocated*/
1552 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1554 remReservedPRB = remReservedPRB - estPrb;
1556 else /*LC requirement need PRB share from SharedPRB*/
1558 if(*sharedPRB <= (estPrb - remReservedPRB))
1560 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1565 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1571 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1572 lcNode->allocPRB = estPrb;
1573 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1575 /*[Step8]:Next loop: First LC to be picked from the list
1576 * because Allocated Nodes are moved to the last*/
1583 /*******************************************************************************************
1585 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1590 * Function : updateGrantSizeForBoRpt
1593 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1594 * BO Report in dlMsgAlloc Pointer
1596 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1597 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1598 * I/P & O/P > BsrInfo (applicable for UL)
1599 * I/P & O/P > accumalatedBOSize
1602 * *******************************************************************************************/
1603 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1604 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1606 CmLList *node = NULLP, *next = NULLP;
1607 LcInfo *lcNode = NULLP;
1608 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1612 DU_LOG("\nERROR --> SCH: LcList not present");
1630 lcNode = (LcInfo *)node->node;
1633 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1634 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1635 if(dlMsgAlloc != NULLP)
1637 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1639 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1640 * report for allocation can be sent to MAC*/
1641 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1642 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1644 /*Calculate the Total Payload/BO size allocated*/
1645 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1647 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1648 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1650 dlMsgSchInfo->numLc++;
1651 /*The LC has been fully allocated, clean it*/
1652 if(lcNode->reqBO == 0)
1654 handleLcLList(lcLL, lcNode->lcId, DELETE);
1657 else if(bsrInfo != NULLP)
1659 *accumalatedBOSize += lcNode->allocBO;
1660 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1661 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1669 /*******************************************************************
1671 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1675 * Function : fillDlMsgInfo
1678 * fill DL message information for MSG4 and Dedicated DL Msg
1680 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1681 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1684 *******************************************************************/
1685 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1687 hqP->tbInfo[0].isEnabled = TRUE;
1688 hqP->tbInfo[0].state = HQ_TB_WAITING;
1689 hqP->tbInfo[0].txCntr++;
1690 hqP->tbInfo[1].isEnabled = TRUE;
1691 hqP->tbInfo[1].state = HQ_TB_WAITING;
1692 hqP->tbInfo[1].txCntr++;
1693 dlMsgInfo->crnti = crnti;
1694 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1695 dlMsgInfo->harqProcNum = hqP->procId;
1696 dlMsgInfo->dlAssignIdx = 0;
1697 dlMsgInfo->pucchTpc = 0;
1698 dlMsgInfo->pucchResInd = 0;
1699 dlMsgInfo->harqFeedbackInd = hqP->k1;
1700 dlMsgInfo->dciFormatId = 1;
1703 /*******************************************************************
1705 * @brief sch Process pending Msg4 Req
1709 * Function : schProcessMsg4Req
1712 * sch Process pending Msg4 Req
1714 * @params[in] SchCellCb *cell, cell cb struct pointer
1715 * @params[in] SlotTimingInfo currTime, current timing info
1716 * @params[in] uint8_t ueId, ue ID
1717 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1718 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1719 * @return ROK - success
1722 *******************************************************************/
1724 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1726 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1727 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1728 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1729 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1733 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1737 if (isRetxMsg4 == FALSE)
1739 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1741 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1746 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1747 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1749 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1753 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1755 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1756 if(dciSlotAlloc == NULLP)
1758 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1761 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1762 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1763 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1766 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1768 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1769 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1771 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1772 if(dciSlotAlloc->numSchedInfo == 0)
1774 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1775 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1778 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1782 /* Check if both DCI and RAR are sent in the same slot.
1783 * If not, allocate memory RAR PDSCH slot to store RAR info
1785 if(pdcchTime.slot == pdschTime.slot)
1787 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1788 dciSlotAlloc->numSchedInfo++;
1792 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1793 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1795 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1796 if(msg4SlotAlloc == NULLP)
1798 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1799 if(dciSlotAlloc->numSchedInfo == 0)
1801 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1802 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1805 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1808 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1809 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1810 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1813 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1815 /* Copy all RAR info */
1816 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1817 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1818 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1819 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1821 /* Assign correct PDU types in corresponding slots */
1822 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1823 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1824 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1826 dciSlotAlloc->numSchedInfo++;
1827 msg4SlotAlloc->numSchedInfo++;
1830 /* PUCCH resource */
1831 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1833 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1834 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1835 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1836 cell->raCb[ueId-1].msg4recvd = FALSE;
1839 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1844 /*******************************************************************
1846 * @brief Handler to calculate TBS size for BSR requested
1850 * Function : schCalculateUlTbs
1852 * Functionality: Function will note the required TBS for each LCGIDX and use
1853 * the Priority LCG List and RRM policy to allocate the TBS size
1855 * @params [in] ueCb (Pointer to UE CB)
1856 * [in] puschTime (Time slot where PUSCH will be sent)
1857 * [in] symbLen (No of Symbols used for PUSCH transmission)
1858 * [out] startPrb(Pointer to startPRB which will be calculated while
1859 * finding the best Free Block)
1860 * [out] totTBS(Pointer to total TBS size)
1861 * [in] isRetx (to indicate retransmission)
1862 * [in] hqP (UL Harq process pointer)
1864 * @return uint8_t : ROK > Scheduling of UL grant is successful
1865 * RFAILED > vice versa
1867 * ****************************************************************/
1868 uint8_t schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
1869 uint16_t *startPrb, uint32_t *totTBS, bool isRetx, SchUlHqProcCb *hqP)
1871 uint16_t mcsIdx = 0;
1872 CmLListCp *lcLL = NULLP;
1873 uint16_t lcgIdx = 0, lcId =0, maxFreePRB = 0;
1874 uint16_t rsvdDedicatedPRB;
1879 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1881 if(ueCb->bsrInfo[lcgIdx].dataVol == 0)
1886 /*TODO: lcgIdx and LCID has been implemented as one to one mapping.
1887 * Need to check the mapping to figure out the LCID and lcgIdx once L2
1888 * spec specifies any logic*/
1890 if(ueCb->ulInfo.ulLcCtxt[lcId].isDedicated)
1892 lcLL = &(hqP->ulLcPrbEst.dedLcList);
1893 rsvdDedicatedPRB = ueCb->ulInfo.ulLcCtxt[lcId].rsvdDedicatedPRB;
1897 lcLL = &(hqP->ulLcPrbEst.defLcList);
1900 /*[Step2]: Update the reqPRB and Payloadsize for this LC in the appropriate List*/
1901 if(updateLcListReqPRB(lcLL, lcId, ueCb->bsrInfo[lcgIdx].dataVol) != ROK)
1903 DU_LOG("\nERROR --> SCH: LcgId:%d updation failed",lcId);
1908 if ((hqP->ulLcPrbEst.defLcList.count == 0) && (hqP->ulLcPrbEst.dedLcList.count == 0))
1910 if( (ueCb->srRcvd) || (isRetx) )
1912 *startPrb = MAX_NUM_RB;
1913 *totTBS = schCalcTbSize(UL_GRANT_SIZE);
1915 /*Returning true when NO Grant is there for UE as this is not scheduling
1920 maxFreePRB = searchLargestFreeBlock(ueCb->cellCb, puschTime, startPrb, DIR_UL);
1922 /*[Step4]: Estimation of PRB and BO which can be allocated to each LC in
1923 * the list based on RRM policy*/
1925 /*Either this UE contains no reservedPRB pool fir dedicated S-NSSAI or
1926 * Num of Free PRB available is not enough to reserve Dedicated PRBs*/
1929 mcsIdx = ueCb->ueCfg.ulModInfo.mcsIndex;
1930 if((hqP->ulLcPrbEst.dedLcList.count == 0) || ((maxFreePRB < rsvdDedicatedPRB)))
1932 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB;
1933 DU_LOG("\nDEBUG --> SCH : UL Only Default Slice is scheduled, sharedPRB Count:%d",\
1934 hqP->ulLcPrbEst.sharedNumPrb);
1936 /*PRB Alloc for Default LCs*/
1937 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen,\
1938 &(hqP->ulLcPrbEst.sharedNumPrb), NULLP, NULLP,&(ueCb->srRcvd));
1942 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB - rsvdDedicatedPRB;
1944 /*PRB Alloc for Dedicated LCs*/
1945 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.dedLcList), TRUE, mcsIdx, symbLen,\
1946 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1947 NULLP,&(ueCb->srRcvd));
1949 /*PRB Alloc for Default LCs*/
1950 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen, \
1951 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1952 NULLP,&(ueCb->srRcvd));
1955 /*[Step5]:Traverse each LCID in LcList to calculate the exact Scheduled Bytes
1956 * using allocated BO per LC and Update dlMsgAlloc(BO report for MAC*/
1957 if(hqP->ulLcPrbEst.dedLcList.count != 0)
1958 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.dedLcList), NULLP, ueCb->bsrInfo, totTBS);
1960 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.defLcList), NULLP, ueCb->bsrInfo, totTBS);
1962 /*Below case will hit if NO LC(s) are allocated due to resource crunch*/
1967 DU_LOG("\nERROR --> SCH : NO FREE PRB!!");
1971 /*Schedule the LC for next slot*/
1972 DU_LOG("\nDEBUG --> SCH : No LC has been scheduled");
1979 /*******************************************************************
1981 * @brief sch Process pending Sr or Bsr Req
1985 * Function : schProcessSrOrBsrReq
1988 * sch Process pending Sr or Bsr Req
1990 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1991 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1992 * @return true - success
1995 *******************************************************************/
1996 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
1998 bool k2Found = FALSE;
1999 uint8_t ret = RFAILED;
2000 uint8_t startSymb = 0, symbLen = 0;
2001 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
2002 uint16_t startPrb = 0;
2003 uint32_t totDataReq = 0; /* in bytes */
2005 SchPuschInfo *puschInfo;
2006 DciInfo *dciInfo = NULLP;
2007 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
2008 SlotTimingInfo dciTime, puschTime;
2012 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
2016 ueCb = &cell->ueCb[ueId-1];
2020 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
2024 if (isRetx == FALSE)
2026 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
2032 /* Calculating time frame to send DCI for SR */
2033 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
2035 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2038 if(ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
2039 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl;
2041 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
2043 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
2045 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
2047 if(!ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
2049 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2050 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
2051 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
2055 k2Val = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
2056 startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
2057 symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
2059 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
2060 /* Calculating time frame to send PUSCH for SR */
2061 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
2063 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2066 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
2077 ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq, isRetx, *hqP);
2079 if(totDataReq > 0 && ret == ROK)
2081 SCH_ALLOC(dciInfo, sizeof(DciInfo));
2084 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
2087 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2088 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2090 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2094 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
2095 memset(dciInfo,0,sizeof(DciInfo));
2097 /* Update PUSCH allocation */
2098 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb, isRetx, *hqP) == ROK)
2100 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
2102 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
2103 if(puschInfo != NULLP)
2105 /* Fill DCI for UL grant */
2106 schFillUlDci(ueCb, puschInfo, dciInfo, isRetx, *hqP);
2107 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
2108 ueCb->srRcvd = false;
2109 ueCb->bsrRcvd = false;
2110 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
2111 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2112 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, ROK);
2113 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, ROK);
2114 cmLListAdd2Tail(&(ueCb->hqUlmap[puschTime.slot]->hqList), &(*hqP)->ulSlotLnk);
2119 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2120 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2121 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2126 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2133 /*******************************************************************
2135 * @brief sch Process pending Sr or Bsr Req
2139 * Function : updateBsrAndLcList
2142 * Updating the BSRInfo in UECB and Lclist
2144 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2145 * @return ROK - success
2148 *******************************************************************/
2149 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
2151 CmLList *node = NULLP, *next = NULLP;
2152 LcInfo *lcNode = NULLP;
2156 DU_LOG("\nERROR --> SCH: LcList not present");
2173 lcNode = (LcInfo *)node->node;
2176 /*Only when Status is OK then allocation is marked as ZERO and reqBO
2177 * is updated in UE's DB. If Failure, then allocation is added to reqBO
2178 * and same is updated in Ue's DB inside BSR Info structure*/
2181 lcNode->allocBO = 0;
2184 lcNode->reqBO += lcNode->allocBO;
2185 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
2186 if(lcNode->reqBO == 0)
2188 handleLcLList(lcLL, lcNode->lcId, DELETE);
2195 /********************************************************************************
2197 * @brief Increment the Slot by a input factor
2201 * Function : schIncrSlot
2204 * Increment the slot by a input factor till num of Slots configured in a
2205 * Radio Frame. If it exceeds, move to next sfn.
2207 * @params[in/out] SlotTimingInfo timingInfo
2208 * [in] uint8_t incr [Increment factor]
2209 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2211 * @return ROK - success
2214 *******************************************************************/
2215 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2217 timingInfo->slot += incr;
2218 if(timingInfo->slot >= numSlotsPerRF)
2220 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2221 timingInfo->slot %= numSlotsPerRF;
2222 if(timingInfo->sfn > MAX_SFN)
2224 timingInfo->sfn %= MAX_SFN;
2229 /*******************************************************************
2231 * @brief Fill PDSCH info in Page Alloc
2235 * Function : schFillPagePdschCfg
2237 * Functionality: Fill PDSCH info in Page Alloc
2239 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2240 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2242 * @return pointer to return Value(ROK, RFAILED)
2244 * ****************************************************************/
2245 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2247 uint8_t cwCount = 0;
2248 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2250 /* fill the PDSCH PDU */
2252 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2253 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2254 pagePdschCfg->pduIndex = 0;
2255 pagePdschCfg->numCodewords = 1;
2256 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2258 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2259 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2260 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2261 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2262 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2263 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2264 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2266 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2267 pagePdschCfg->numLayers = 1;
2268 pagePdschCfg->transmissionScheme = 0;
2269 pagePdschCfg->refPoint = 0;
2270 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2271 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2272 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2273 pagePdschCfg->dmrs.scid = 0;
2274 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2275 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2276 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2277 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2278 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2280 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2281 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2282 pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
2283 pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2284 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2285 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2286 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2287 pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2288 pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2290 /* Find total symbols occupied including DMRS */
2291 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2292 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2293 * in that case only PDSCH symbols are marked as occupied */
2294 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2296 startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
2297 numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2299 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2302 startSymbol = dmrsStartSymbol;
2303 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2306 /* Allocate the number of PRBs required for DL PDSCH */
2307 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2308 &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
2310 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2314 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2315 pagePdschCfg->beamPdschInfo.prgSize = 1;
2316 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2317 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2318 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2319 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2320 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2325 /**********************************************************************
2327 **********************************************************************/