1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
30 #include "nr5g_fapi_internal.h"
31 #include "fapi_vendor_extension.h"
36 #include "lwr_mac_fsm.h"
37 #include "lwr_mac_phy.h"
38 #include "mac_utils.h"
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
48 #define SET_MSG_LEN(x, size) x += size
50 /* Global variables */
53 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
54 void fapiMacConfigRsp(uint16_t cellId);
55 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
56 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
57 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
58 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem);
60 void lwrMacLayerInit(Region region, Pool pool)
66 memset(&lwrMacCb, 0, sizeof(LwrMacCb));
67 lwrMacCb.region = region;
69 lwrMacCb.clCfgDone = TRUE;
71 lwrMacCb.phyState = PHY_STATE_IDLE;
74 /* Initializing WLS free mem list */
75 lwrMacCb.phySlotIndCntr = 1;
76 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
78 cmLListInit(&wlsBlockToFreeList[idx]);
83 /*******************************************************************
85 * @brief Handles Invalid Request Event
89 * Function : lwr_mac_procInvalidEvt
92 * - Displays the PHY state when the invalid event occurs
95 * @return ROK - success
98 * ****************************************************************/
99 uint8_t lwr_mac_procInvalidEvt(void *msg)
101 #ifdef CALL_FLOW_DEBUG_LOG
102 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
104 DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
109 /*******************************************************************
111 * @brief Fills FAPI message header
115 * Function : fillMsgHeader
118 * -Fills FAPI message header
120 * @params[in] Pointer to header
126 * ****************************************************************/
127 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
129 memset(hdr, 0, sizeof(fapi_msg_t));
130 hdr->msg_id = msgType;
131 hdr->length = msgLen;
134 /*******************************************************************
136 * @brief Fills FAPI Config Request message header
140 * Function : fillTlvs
143 * -Fills FAPI Config Request message header
145 * @params[in] Pointer to TLV
152 * ****************************************************************/
153 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
154 uint32_t value, uint32_t *msgLen)
157 tlv->tl.length = length;
159 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
161 /*******************************************************************
163 * @brief fills the cyclic prefix by comparing the bitmask
167 * Function : fillCyclicPrefix
170 * -checks the value with the bitmask and
171 * fills the cellPtr's cyclic prefix.
173 * @params[in] Pointer to ClCellParam
174 * Value to be compared
177 ********************************************************************/
178 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
180 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
182 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
184 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
186 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
190 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
194 /*******************************************************************
196 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
200 * Function : fillSubcarrierSpaceDl
203 * -checks the value with the bitmask and
204 * fills the cellPtr's subcarrier spacing in DL
206 * @params[in] Pointer to ClCellParam
207 * Value to be compared
210 * ****************************************************************/
212 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
214 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
216 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
218 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
220 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
222 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
224 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
226 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
228 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
232 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
236 /*******************************************************************
238 * @brief fills the downlink bandwidth by comparing the bitmask
242 * Function : fillBandwidthDl
245 * -checks the value with the bitmask and
246 * -fills the cellPtr's DL Bandwidth
248 * @params[in] Pointer to ClCellParam
249 * Value to be compared
252 * ****************************************************************/
254 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
256 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
258 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
260 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
262 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
264 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
266 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
268 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
270 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
272 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
274 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
276 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
278 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
280 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
282 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
284 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
286 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
288 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
290 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
292 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
294 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
296 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
298 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
300 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
302 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
304 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
306 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
310 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
314 /*******************************************************************
316 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
320 * Function : fillSubcarrierSpaceUl
323 * -checks the value with the bitmask and
324 * -fills cellPtr's subcarrier spacing in UL
326 * @params[in] Pointer to ClCellParam
327 * Value to be compared
330 * ****************************************************************/
332 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
334 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
336 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
338 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
340 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
342 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
344 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
346 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
348 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
352 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
356 /*******************************************************************
358 * @brief fills the uplink bandwidth by comparing the bitmask
362 * Function : fillBandwidthUl
365 * -checks the value with the bitmask and
366 * fills the cellPtr's UL Bandwidth
370 * @params[in] Pointer to ClCellParam
371 * Value to be compared
375 * ****************************************************************/
377 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
379 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
381 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
383 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
385 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
387 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
389 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
391 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
393 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
395 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
397 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
399 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
401 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
403 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
405 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
407 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
409 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
411 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
413 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
415 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
417 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
419 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
421 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
423 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
425 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
427 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
429 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
433 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
436 /*******************************************************************
438 * @brief fills the CCE maping by comparing the bitmask
442 * Function : fillCCEmaping
445 * -checks the value with the bitmask and
446 * fills the cellPtr's CCE Mapping Type
449 * @params[in] Pointer to ClCellParam
450 * Value to be compared
453 * ****************************************************************/
455 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
457 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
459 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
461 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
463 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
467 (*cellPtr)->cceMappingType = INVALID_VALUE;
471 /*******************************************************************
473 * @brief fills the PUCCH format by comparing the bitmask
477 * Function : fillPucchFormat
480 * -checks the value with the bitmask and
481 * fills the cellPtr's pucch format
484 * @params[in] Pointer to ClCellParam
485 * Value to be compared
488 * ****************************************************************/
490 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
492 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
494 (*cellPtr)->pucchFormats = FORMAT_0;
496 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
498 (*cellPtr)->pucchFormats = FORMAT_1;
500 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
502 (*cellPtr)->pucchFormats = FORMAT_2;
504 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
506 (*cellPtr)->pucchFormats = FORMAT_3;
508 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
510 (*cellPtr)->pucchFormats = FORMAT_4;
514 (*cellPtr)->pucchFormats = INVALID_VALUE;
518 /*******************************************************************
520 * @brief fills the PDSCH Mapping Type by comparing the bitmask
524 * Function : fillPdschMappingType
527 * -checks the value with the bitmask and
528 * fills the cellPtr's PDSCH MappingType
530 * @params[in] Pointer to ClCellParam
531 * Value to be compared
534 * ****************************************************************/
536 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
538 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
540 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
542 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
544 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
548 (*cellPtr)->pdschMappingType = INVALID_VALUE;
552 /*******************************************************************
554 * @brief fills the PDSCH Allocation Type by comparing the bitmask
558 * Function : fillPdschAllocationType
561 * -checks the value with the bitmask and
562 * fills the cellPtr's PDSCH AllocationType
564 * @params[in] Pointer to ClCellParam
565 * Value to be compared
568 * ****************************************************************/
570 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
572 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
574 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
576 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
578 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
582 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
586 /*******************************************************************
588 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
592 * Function : fillPrbMappingType
595 * -checks the value with the bitmask and
596 * fills the cellPtr's PRB Mapping Type
598 * @params[in] Pointer to ClCellParam
599 * Value to be compared
602 ******************************************************************/
603 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
605 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
607 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
609 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
611 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
615 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
619 /*******************************************************************
621 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
625 * Function : fillPdschDmrsConfigType
628 * -checks the value with the bitmask and
629 * fills the cellPtr's DmrsConfig Type
631 * @params[in] Pointer to ClCellParam
632 * Value to be compared
635 ******************************************************************/
637 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
639 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
641 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
643 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
645 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
649 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
653 /*******************************************************************
655 * @brief fills the PDSCH DmrsLength by comparing the bitmask
659 * Function : fillPdschDmrsLength
662 * -checks the value with the bitmask and
663 * fills the cellPtr's PdschDmrsLength
665 * @params[in] Pointer to ClCellParam
666 * Value to be compared
669 ******************************************************************/
670 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
672 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
674 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
676 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
678 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
682 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
686 /*******************************************************************
688 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
692 * Function : fillPdschDmrsAddPos
695 * -checks the value with the bitmask and
696 * fills the cellPtr's Pdsch DmrsAddPos
698 * @params[in] Pointer to ClCellParam
699 * Value to be compared
702 ******************************************************************/
704 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
706 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
708 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
710 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
712 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
714 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
716 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
718 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
720 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
724 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
728 /*******************************************************************
730 * @brief fills the Modulation Order in DL by comparing the bitmask
734 * Function : fillModulationOrderDl
737 * -checks the value with the bitmask and
738 * fills the cellPtr's ModulationOrder in DL.
740 * @params[in] Pointer to ClCellParam
741 * Value to be compared
744 ******************************************************************/
745 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
749 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
753 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
757 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
761 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
765 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
769 /*******************************************************************
771 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
775 * Function : fillPuschDmrsConfigType
778 * -checks the value with the bitmask and
779 * fills the cellPtr's PUSCH DmrsConfigType
781 * @params[in] Pointer to ClCellParam
782 * Value to be compared
785 ******************************************************************/
787 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
789 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
791 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
793 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
795 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
799 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
803 /*******************************************************************
805 * @brief fills the PUSCH DmrsLength by comparing the bitmask
809 * Function : fillPuschDmrsLength
812 * -checks the value with the bitmask and
813 * fills the cellPtr's PUSCH DmrsLength
815 * @params[in] Pointer to ClCellParam
816 * Value to be compared
819 ******************************************************************/
821 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
823 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
825 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
827 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
829 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
833 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
837 /*******************************************************************
839 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
843 * Function : fillPuschDmrsAddPos
846 * -checks the value with the bitmask and
847 * fills the cellPtr's PUSCH DmrsAddPos
849 * @params[in] Pointer to ClCellParam
850 * Value to be compared
853 ******************************************************************/
855 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
857 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
859 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
861 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
863 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
865 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
867 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
869 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
871 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
875 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
879 /*******************************************************************
881 * @brief fills the PUSCH Mapping Type by comparing the bitmask
885 * Function : fillPuschMappingType
888 * -checks the value with the bitmask and
889 * fills the cellPtr's PUSCH MappingType
891 * @params[in] Pointer to ClCellParam
892 * Value to be compared
895 ******************************************************************/
897 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
899 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
901 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
903 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
905 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
909 (*cellPtr)->puschMappingType = INVALID_VALUE;
913 /*******************************************************************
915 * @brief fills the PUSCH Allocation Type by comparing the bitmask
919 * Function : fillPuschAllocationType
922 * -checks the value with the bitmask and
923 * fills the cellPtr's PUSCH AllocationType
925 * @params[in] Pointer to ClCellParam
926 * Value to be compared
929 ******************************************************************/
931 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
933 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
935 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
937 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
939 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
943 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
947 /*******************************************************************
949 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
953 * Function : fillPuschPrbMappingType
956 * -checks the value with the bitmask and
957 * fills the cellPtr's PUSCH PRB MApping Type
959 * @params[in] Pointer to ClCellParam
960 * Value to be compared
963 ******************************************************************/
965 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
967 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
969 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
971 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
973 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
977 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
981 /*******************************************************************
983 * @brief fills the Modulation Order in Ul by comparing the bitmask
987 * Function : fillModulationOrderUl
990 * -checks the value with the bitmask and
991 * fills the cellPtr's Modualtsion Order in UL.
993 * @params[in] Pointer to ClCellParam
994 * Value to be compared
997 ******************************************************************/
999 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1003 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1007 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1011 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1015 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1019 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1023 /*******************************************************************
1025 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1029 * Function : fillPuschAggregationFactor
1032 * -checks the value with the bitmask and
1033 * fills the cellPtr's PUSCH Aggregation Factor
1035 * @params[in] Pointer to ClCellParam
1036 * Value to be compared
1039 ******************************************************************/
1041 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1043 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1045 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1047 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1049 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1051 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1053 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1055 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1057 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1061 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1065 /*******************************************************************
1067 * @brief fills the PRACH Long Format by comparing the bitmask
1071 * Function : fillPrachLongFormat
1074 * -checks the value with the bitmask and
1075 * fills the cellPtr's PRACH Long Format
1077 * @params[in] Pointer to ClCellParam
1078 * Value to be compared
1081 ******************************************************************/
1083 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1085 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1087 (*cellPtr)->prachLongFormats = FORMAT_0;
1089 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1091 (*cellPtr)->prachLongFormats = FORMAT_1;
1093 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1095 (*cellPtr)->prachLongFormats = FORMAT_2;
1097 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1099 (*cellPtr)->prachLongFormats = FORMAT_3;
1103 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1107 /*******************************************************************
1109 * @brief fills the PRACH Short Format by comparing the bitmask
1113 * Function : fillPrachShortFormat
1116 * -checks the value with the bitmask and
1117 * fills the cellPtr's PRACH ShortFormat
1119 * @params[in] Pointer to ClCellParam
1120 * Value to be compared
1123 ******************************************************************/
1125 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1127 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1129 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1131 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1133 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1135 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1137 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1139 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1141 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1143 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1145 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1147 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1149 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1151 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1153 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1155 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1157 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1159 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1161 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1165 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1169 /*******************************************************************
1171 * @brief fills the Fd Occasions Type by comparing the bitmask
1175 * Function : fillFdOccasions
1178 * -checks the value with the bitmask and
1179 * fills the cellPtr's Fd Occasions
1181 * @params[in] Pointer to ClCellParam
1182 * Value to be compared
1185 ******************************************************************/
1187 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1191 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1195 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1199 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1203 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1207 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1211 /*******************************************************************
1213 * @brief fills the RSSI Measurement by comparing the bitmask
1217 * Function : fillRssiMeas
1220 * -checks the value with the bitmask and
1221 * fills the cellPtr's RSSI Measurement report
1223 * @params[in] Pointer to ClCellParam
1224 * Value to be compared
1227 ******************************************************************/
1229 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1231 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1233 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1235 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1237 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1241 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1245 /*******************************************************************
1247 * @brief Returns the TLVs value
1251 * Function : getParamValue
1254 * -return TLVs value
1257 * @return ROK - temp
1260 * ****************************************************************/
1262 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1265 posPtr = &tlv->tl.tag;
1266 posPtr += sizeof(tlv->tl.tag);
1267 posPtr += sizeof(tlv->tl.length);
1268 /*TO DO: malloc to SSI memory */
1269 if(type == FAPI_UINT_8)
1271 return(*(uint8_t *)posPtr);
1273 else if(type == FAPI_UINT_16)
1275 return(*(uint16_t *)posPtr);
1277 else if(type == FAPI_UINT_32)
1279 return(*(uint32_t *)posPtr);
1283 DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
1289 /*******************************************************************
1291 * @brief Modifes the received mibPdu to uint32 bit
1292 * and stores it in MacCellCfg
1296 * Function : setMibPdu
1301 * @params[in] Pointer to mibPdu
1302 * pointer to modified value
1303 ******************************************************************/
1304 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1306 *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1307 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1308 DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
1311 /*******************************************************************
1313 * @brief Sends FAPI Param req to PHY
1317 * Function : lwr_mac_procParamReqEvt
1320 * -Sends FAPI Param req to PHY
1323 * @return ROK - success
1326 * ****************************************************************/
1328 uint8_t lwr_mac_procParamReqEvt(void *msg)
1331 #ifdef CALL_FLOW_DEBUG_LOG
1332 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1335 /* startGuardTimer(); */
1336 fapi_param_req_t *paramReq = NULL;
1337 fapi_msg_header_t *msgHeader;
1338 p_fapi_api_queue_elem_t paramReqElem;
1339 p_fapi_api_queue_elem_t headerElem;
1341 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1342 if(paramReq != NULL)
1344 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1345 sizeof(fapi_tx_data_req_t));
1346 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1347 memset(paramReq, 0, sizeof(fapi_param_req_t));
1348 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1350 /* Fill message header */
1351 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1354 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
1355 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1358 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1359 sizeof(fapi_msg_header_t));
1360 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1361 msgHeader->num_msg = 1;
1362 msgHeader->handle = 0;
1364 DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
1365 LwrMacSendToL1(headerElem);
1369 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
1376 /*******************************************************************
1378 * @brief Sends FAPI Param Response to MAC via PHY
1382 * Function : lwr_mac_procParamRspEvt
1385 * -Sends FAPI Param rsp to MAC via PHY
1388 * @return ROK - success
1391 * ****************************************************************/
1393 uint8_t lwr_mac_procParamRspEvt(void *msg)
1396 /* stopGuardTimer(); */
1398 uint32_t encodedVal;
1399 fapi_param_resp_t *paramRsp;
1400 ClCellParam *cellParam = NULLP;
1402 paramRsp = (fapi_param_resp_t *)msg;
1403 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1405 if(paramRsp != NULLP)
1407 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1408 if(cellParam != NULLP)
1410 DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
1411 if(paramRsp->error_code == MSG_OK)
1413 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1415 switch(paramRsp->tlvs[index].tl.tag)
1417 case FAPI_RELEASE_CAPABILITY_TAG:
1418 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1419 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1421 cellParam->releaseCapability = RELEASE_15;
1425 case FAPI_PHY_STATE_TAG:
1426 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1427 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1429 DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1434 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1435 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1436 if(encodedVal != RFAILED && encodedVal != 0)
1438 cellParam->skipBlankDlConfig = SUPPORTED;
1442 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1446 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1447 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1448 if(encodedVal != RFAILED && encodedVal != 0)
1450 cellParam->skipBlankUlConfig = SUPPORTED;
1454 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1458 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1459 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1462 case FAPI_CYCLIC_PREFIX_TAG:
1463 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1464 if(encodedVal != RFAILED)
1466 fillCyclicPrefix(encodedVal, &cellParam);
1470 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1471 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1472 if(encodedVal != RFAILED)
1474 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1478 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1479 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1480 if(encodedVal != RFAILED)
1482 fillBandwidthDl(encodedVal, &cellParam);
1486 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1487 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1488 if(encodedVal != RFAILED)
1490 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1494 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1495 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1496 if(encodedVal != RFAILED)
1498 fillBandwidthUl(encodedVal, &cellParam);
1502 case FAPI_CCE_MAPPING_TYPE_TAG:
1503 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1504 if(encodedVal != RFAILED)
1506 fillCCEmaping(encodedVal, &cellParam);
1510 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1511 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1512 if(encodedVal != RFAILED && encodedVal != 0)
1514 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1518 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1522 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1523 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1524 if(encodedVal != RFAILED && encodedVal != 0)
1526 cellParam->precoderGranularityCoreset = SUPPORTED;
1530 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1534 case FAPI_PDCCH_MU_MIMO_TAG:
1535 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1536 if(encodedVal != RFAILED && encodedVal != 0)
1538 cellParam->pdcchMuMimo = SUPPORTED;
1542 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1546 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1547 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1548 if(encodedVal != RFAILED && encodedVal != 0)
1550 cellParam->pdcchPrecoderCycling = SUPPORTED;
1554 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1558 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1559 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1562 case FAPI_PUCCH_FORMATS_TAG:
1563 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1564 if(encodedVal != RFAILED)
1566 fillPucchFormat(encodedVal, &cellParam);
1570 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1571 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1574 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1575 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1576 if(encodedVal != RFAILED)
1578 fillPdschMappingType(encodedVal, &cellParam);
1582 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1583 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1584 if(encodedVal != RFAILED)
1586 fillPdschAllocationType(encodedVal, &cellParam);
1590 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1591 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1592 if(encodedVal != RFAILED)
1594 fillPrbMappingType(encodedVal, &cellParam);
1598 case FAPI_PDSCH_CBG_TAG:
1599 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1600 if(encodedVal != RFAILED && encodedVal != 0)
1602 cellParam->pdschCbg = SUPPORTED;
1606 cellParam->pdschCbg = NOT_SUPPORTED;
1610 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1611 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1612 if(encodedVal != RFAILED)
1614 fillPdschDmrsConfigType(encodedVal, &cellParam);
1618 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1619 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1620 if(encodedVal != RFAILED)
1622 fillPdschDmrsLength(encodedVal, &cellParam);
1626 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1627 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1628 if(encodedVal != RFAILED)
1630 fillPdschDmrsAddPos(encodedVal, &cellParam);
1634 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1635 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1638 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1639 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1640 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1642 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1646 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1647 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1648 if(encodedVal != RFAILED)
1650 fillModulationOrderDl(encodedVal, &cellParam);
1654 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1655 cellParam->maxMuMimoUsersDl = \
1656 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1659 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1660 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1661 if(encodedVal != RFAILED && encodedVal != 0)
1663 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1667 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1671 case FAPI_PREMPTIONSUPPORT_TAG:
1672 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1673 if(encodedVal != RFAILED && encodedVal != 0)
1675 cellParam->premptionSupport = SUPPORTED;
1679 cellParam->premptionSupport = NOT_SUPPORTED;
1683 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1684 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1685 if(encodedVal != RFAILED && encodedVal != 0)
1687 cellParam->pdschNonSlotSupport = SUPPORTED;
1691 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1695 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1696 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1697 if(encodedVal != RFAILED && encodedVal != 0)
1699 cellParam->uciMuxUlschInPusch = SUPPORTED;
1703 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1707 case FAPI_UCI_ONLY_PUSCH_TAG:
1708 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1709 if(encodedVal != RFAILED && encodedVal != 0)
1711 cellParam->uciOnlyPusch = SUPPORTED;
1715 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1719 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1720 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1721 if(encodedVal != RFAILED && encodedVal != 0)
1723 cellParam->puschFrequencyHopping = SUPPORTED;
1727 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1731 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1732 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1733 if(encodedVal != RFAILED)
1735 fillPuschDmrsConfig(encodedVal, &cellParam);
1739 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1740 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1741 if(encodedVal != RFAILED)
1743 fillPuschDmrsLength(encodedVal, &cellParam);
1747 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1748 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1749 if(encodedVal != RFAILED)
1751 fillPuschDmrsAddPos(encodedVal, &cellParam);
1755 case FAPI_PUSCH_CBG_TAG:
1756 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1757 if(encodedVal != RFAILED && encodedVal != 0)
1759 cellParam->puschCbg = SUPPORTED;
1763 cellParam->puschCbg = NOT_SUPPORTED;
1767 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1768 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1769 if(encodedVal != RFAILED)
1771 fillPuschMappingType(encodedVal, &cellParam);
1775 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1776 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1777 if(encodedVal != RFAILED)
1779 fillPuschAllocationType(encodedVal, &cellParam);
1783 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1784 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1785 if(encodedVal != RFAILED)
1787 fillPuschPrbMappingType(encodedVal, &cellParam);
1791 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1792 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1793 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1795 cellParam->puschMaxPtrsPorts = encodedVal;
1799 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1800 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1803 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1804 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1807 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1808 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1809 if(encodedVal != RFAILED)
1811 fillModulationOrderUl(encodedVal, &cellParam);
1815 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1816 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1819 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1820 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1821 if(encodedVal != RFAILED && encodedVal != 0)
1823 cellParam->dftsOfdmSupport = SUPPORTED;
1827 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1831 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1832 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1833 if(encodedVal != RFAILED)
1835 fillPuschAggregationFactor(encodedVal, &cellParam);
1839 case FAPI_PRACH_LONG_FORMATS_TAG:
1840 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1841 if(encodedVal != RFAILED)
1843 fillPrachLongFormat(encodedVal, &cellParam);
1847 case FAPI_PRACH_SHORT_FORMATS_TAG:
1848 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1849 if(encodedVal != RFAILED)
1851 fillPrachShortFormat(encodedVal, &cellParam);
1855 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1856 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1857 if(encodedVal != RFAILED && encodedVal != 0)
1859 cellParam->prachRestrictedSets = SUPPORTED;
1863 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1867 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1868 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1869 if(encodedVal != RFAILED)
1871 fillFdOccasions(encodedVal, &cellParam);
1875 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1876 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1877 if(encodedVal != RFAILED)
1879 fillRssiMeas(encodedVal, &cellParam);
1883 //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1887 MAC_FREE(cellParam, sizeof(ClCellParam));
1888 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1893 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
1899 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
1905 DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
1913 #ifdef INTEL_TIMER_MODE
1914 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1916 void * wlsHdlr = NULLP;
1917 fapi_msg_header_t *msgHeader;
1918 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1919 p_fapi_api_queue_elem_t headerElem;
1920 p_fapi_api_queue_elem_t iqSampleElem;
1921 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1923 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1925 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1927 /* Fill IQ sample req */
1928 mtGetWlsHdl(&wlsHdlr);
1929 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1930 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1931 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1934 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
1937 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1938 sizeof(fapi_vendor_ext_iq_samples_req_t));
1940 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1941 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1942 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1943 sizeof(fapi_vendor_ext_iq_samples_req_t));
1945 iqSampleReq->iq_samples_info.carrNum = 0;
1946 iqSampleReq->iq_samples_info.numSubframes = 40;
1947 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1948 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1949 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1950 iqSampleReq->iq_samples_info.startFrameNum = 0;
1951 iqSampleReq->iq_samples_info.startSlotNum = 0;
1952 iqSampleReq->iq_samples_info.startSymNum = 0;
1953 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1954 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1956 /* TODO : Fill remaining parameters */
1958 /* Fill message header */
1959 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1962 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1965 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1966 sizeof(fapi_msg_header_t));
1967 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1968 msgHeader->num_msg = 1;
1969 msgHeader->handle = 0;
1971 DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
1972 LwrMacSendToL1(headerElem);
1977 /*******************************************************************
1979 * @brief Sends FAPI Config req to PHY
1983 * Function : lwr_mac_procConfigReqEvt
1986 * -Sends FAPI Config Req to PHY
1989 * @return ROK - success
1992 * ****************************************************************/
1994 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1997 #ifdef CALL_FLOW_DEBUG_LOG
1998 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
2001 uint8_t slotIdx = 0;
2002 uint8_t symbolIdx =0;
2005 uint16_t *cellId =NULLP;
2006 uint16_t cellIdx =0;
2007 uint32_t msgLen = 0;
2009 MacCellCfg macCfgParams;
2010 fapi_vendor_msg_t *vendorMsg;
2011 fapi_config_req_t *configReq;
2012 fapi_msg_header_t *msgHeader;
2013 p_fapi_api_queue_elem_t headerElem;
2014 p_fapi_api_queue_elem_t vendorMsgQElem;
2015 p_fapi_api_queue_elem_t cfgReqQElem;
2017 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2020 cellId = (uint16_t *)msg;
2021 GET_CELL_IDX(*cellId, cellIdx);
2022 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2024 /* Fill Cell Configuration in lwrMacCb */
2025 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2026 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2027 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2030 /* Allocte And fill Vendor msg */
2031 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2034 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2037 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2038 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2039 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2040 vendorMsg->config_req_vendor.hopping_id = 0;
2041 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2042 vendorMsg->config_req_vendor.group_hop_flag = 0;
2043 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2044 vendorMsg->config_req_vendor.urllc_capable = 0;
2045 vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2046 vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2047 vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2048 vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2049 vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2050 vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2051 vendorMsg->start_req_vendor.sfn = 0;
2052 vendorMsg->start_req_vendor.slot = 0;
2053 vendorMsg->start_req_vendor.mode = 4;
2055 vendorMsg->start_req_vendor.count = 0;
2056 vendorMsg->start_req_vendor.period = 1;
2058 /* Fill FAPI config req */
2059 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2062 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2063 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2066 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2067 sizeof(fapi_config_req_t));
2069 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2070 memset(configReq, 0, sizeof(fapi_config_req_t));
2071 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2073 configReq->number_of_tlvs = 25;
2075 configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2078 msgLen = sizeof(configReq->number_of_tlvs);
2080 if(macCfgParams.dlCarrCfg.pres)
2082 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2083 sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2084 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2085 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2086 /* Due to bug in Intel FT code, commenting TLVs that are are not
2087 * needed to avoid error. Must be uncommented when FT bug is fixed */
2088 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2089 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2090 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2091 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2092 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2093 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2095 if(macCfgParams.ulCarrCfg.pres)
2097 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2098 sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2099 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2100 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2101 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2102 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2103 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2104 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2105 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2106 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2108 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2109 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2111 /* fill cell config */
2112 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2113 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2114 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2115 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2117 /* fill SSB configuration */
2118 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2119 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2120 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2121 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2122 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2123 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2125 /* fill PRACH configuration */
2126 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2127 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2128 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2129 sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2130 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2131 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2132 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2133 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2134 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2135 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2136 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2137 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2138 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2139 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2140 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2141 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2142 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2143 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2144 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2145 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2146 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2148 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2149 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2150 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2155 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2158 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2159 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2160 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2161 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2163 /* fill SSB table */
2164 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2165 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2166 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2167 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2168 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2169 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2170 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2171 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2173 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2174 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2175 sizeof(uint32_t), mib, &msgLen);
2177 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2178 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2179 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2180 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2181 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2182 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2183 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2184 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2187 /* fill TDD table */
2188 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2189 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2190 for(slotIdx =0 ;slotIdx< MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2192 for(symbolIdx = 0; symbolIdx< MAX_SYMB_PER_SLOT; symbolIdx++)
2194 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2195 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[slotIdx][symbolIdx], &msgLen);
2200 /* fill measurement config */
2201 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2202 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2204 /* fill DMRS Type A Pos */
2205 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2206 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2208 /* Fill message header */
2209 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2212 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2213 LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2214 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2217 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2218 sizeof(fapi_msg_header_t));
2219 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2220 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2221 msgHeader->handle = 0;
2223 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2224 LwrMacSendToL1(headerElem);
2228 } /* lwr_mac_handleConfigReqEvt */
2230 /*******************************************************************
2232 * @brief Processes config response from phy
2236 * Function : lwr_mac_procConfigRspEvt
2239 * Processes config response from phy
2241 * @params[in] FAPI message pointer
2242 * @return ROK - success
2245 * ****************************************************************/
2247 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2250 fapi_config_resp_t *configRsp;
2251 configRsp = (fapi_config_resp_t *)msg;
2253 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2256 if(configRsp != NULL)
2258 if(configRsp->error_code == MSG_OK)
2260 DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
2261 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2262 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2264 * Store config response into an intermediate struture and send to MAC
2265 * Support LC and LWLC for sending config rsp to MAC
2267 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2271 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
2277 DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
2283 } /* lwr_mac_procConfigRspEvt */
2285 /*******************************************************************
2287 * @brief Build and send start request to phy
2291 * Function : lwr_mac_procStartReqEvt
2294 * Build and send start request to phy
2296 * @params[in] FAPI message pointer
2297 * @return ROK - success
2300 * ****************************************************************/
2301 uint8_t lwr_mac_procStartReqEvt(void *msg)
2304 #ifdef CALL_FLOW_DEBUG_LOG
2305 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2307 fapi_msg_header_t *msgHeader;
2308 fapi_start_req_t *startReq;
2309 fapi_vendor_msg_t *vendorMsg;
2310 p_fapi_api_queue_elem_t headerElem;
2311 p_fapi_api_queue_elem_t startReqElem;
2312 p_fapi_api_queue_elem_t vendorMsgElem;
2314 /* Allocte And fill Vendor msg */
2315 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2318 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
2321 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2322 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2323 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2324 vendorMsg->start_req_vendor.sfn = 0;
2325 vendorMsg->start_req_vendor.slot = 0;
2326 vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2328 vendorMsg->start_req_vendor.count = 0;
2329 vendorMsg->start_req_vendor.period = 1;
2332 /* Fill FAPI config req */
2333 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2336 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
2337 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2340 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2341 sizeof(fapi_start_req_t));
2343 startReq = (fapi_start_req_t *)(startReqElem + 1);
2344 memset(startReq, 0, sizeof(fapi_start_req_t));
2345 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2347 /* Fill message header */
2348 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2351 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2352 LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2353 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2356 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2357 sizeof(fapi_msg_header_t));
2358 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2359 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2360 msgHeader->handle = 0;
2363 DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
2364 LwrMacSendToL1(headerElem);
2367 } /* lwr_mac_procStartReqEvt */
2369 /*******************************************************************
2371 * @brief Sends FAPI Stop Req to PHY
2375 * Function : lwr_mac_procStopReqEvt
2378 * -Sends FAPI Stop Req to PHY
2381 * @return ROK - success
2384 ********************************************************************/
2386 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem)
2389 #ifdef CALL_FLOW_DEBUG_LOG
2390 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2393 fapi_stop_req_t *stopReq;
2394 fapi_vendor_msg_t *vendorMsg;
2395 p_fapi_api_queue_elem_t stopReqElem;
2396 p_fapi_api_queue_elem_t vendorMsgElem;
2398 /* Allocte And fill Vendor msg */
2399 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2402 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in stop req");
2405 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2406 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2407 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2408 vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
2409 vendorMsg->stop_req_vendor.slot = slotInfo.slot;
2411 /* Fill FAPI stop req */
2412 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2415 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
2416 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2419 FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2420 sizeof(fapi_stop_req_t));
2421 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2422 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2423 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2426 DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
2427 prevElem->p_next = stopReqElem;
2434 /*******************************************************************
2436 * @brief fills SSB PDU required for DL TTI info in MAC
2440 * Function : fillSsbPdu
2443 * -Fills the SSB PDU info
2446 * @params[in] Pointer to FAPI DL TTI Req
2447 * Pointer to RgCellCb
2448 * Pointer to msgLen of DL TTI Info
2451 ******************************************************************/
2453 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2454 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2456 uint32_t mibPayload = 0;
2457 if(dlTtiReqPdu != NULL)
2459 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2460 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2461 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2462 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2463 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2464 /* ssbOfPdufstA to be filled in ssbCfg */
2465 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2466 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2467 /* Bit manipulation for SFN */
2468 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2469 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2470 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2471 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2472 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2473 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2474 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2475 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2476 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2483 /*******************************************************************
2485 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2489 * Function : fillSib1DlDciPdu
2492 * -Fills the Dl DCI PDU
2494 * @params[in] Pointer to fapi_dl_dci_t
2495 * Pointer to PdcchCfg
2498 ******************************************************************/
2500 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2502 if(dlDciPtr != NULLP)
2508 uint16_t coreset0Size=0;
2511 uint32_t freqDomResAssign=0;
2512 uint32_t timeDomResAssign=0;
2513 uint8_t VRB2PRBMap=0;
2514 uint32_t modNCodScheme=0;
2515 uint8_t redundancyVer=0;
2516 uint32_t sysInfoInd=0;
2517 uint32_t reserved=0;
2519 /* Size(in bits) of each field in DCI format 0_1
2520 * as mentioned in spec 38.214 */
2521 uint8_t freqDomResAssignSize = 0;
2522 uint8_t timeDomResAssignSize = 4;
2523 uint8_t VRB2PRBMapSize = 1;
2524 uint8_t modNCodSchemeSize = 5;
2525 uint8_t redundancyVerSize = 2;
2526 uint8_t sysInfoIndSize = 1;
2527 uint8_t reservedSize = 15;
2529 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2530 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2531 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2532 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2533 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2534 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2535 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2536 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2537 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2538 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2539 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2540 dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2542 /* Calculating freq domain resource allocation field value and size
2543 * coreset0Size = Size of coreset 0
2544 * RBStart = Starting Virtual Rsource block
2545 * RBLen = length of contiguously allocted RBs
2546 * Spec 38.214 Sec 5.1.2.2.2
2548 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2549 rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2550 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2552 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2554 if((rbLen - 1) <= floor(coreset0Size / 2))
2555 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2557 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2558 + (coreset0Size - 1 - rbStart);
2560 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2563 /* Fetching DCI field values */
2564 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2565 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2566 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2567 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2568 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2571 /* Reversing bits in each DCI field */
2572 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2573 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2574 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2575 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2576 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2577 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2579 /* Calulating total number of bytes in buffer */
2580 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2581 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2582 + sysInfoIndSize + reservedSize;
2584 numBytes = dlDciPtr->payloadSizeBits / 8;
2585 if(dlDciPtr->payloadSizeBits % 8)
2588 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2590 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2594 /* Initialize buffer */
2595 for(bytePos = 0; bytePos < numBytes; bytePos++)
2596 dlDciPtr->payload[bytePos] = 0;
2598 bytePos = numBytes - 1;
2601 /* Packing DCI format fields */
2602 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2603 freqDomResAssign, freqDomResAssignSize);
2604 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2605 timeDomResAssign, timeDomResAssignSize);
2606 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2607 VRB2PRBMap, VRB2PRBMapSize);
2608 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2609 modNCodScheme, modNCodSchemeSize);
2610 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2611 redundancyVer, redundancyVerSize);
2612 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2613 sysInfoInd, sysInfoIndSize);
2614 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2615 reserved, reservedSize);
2618 } /* fillSib1DlDciPdu */
2621 /*******************************************************************
2623 * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2627 * Function : fillPageDlDciPdu
2630 * -Fills the Dl DCI PDU for Paging
2632 * @params[in] Pointer to fapi_dl_dci_t
2633 * Pointer to dlPageAlloc
2636 ******************************************************************/
2638 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc)
2640 if(dlDciPtr != NULLP)
2646 uint16_t coreset0Size = 0;
2647 uint16_t rbStart = 0;
2649 uint8_t shortMsgInd = 0;
2650 uint8_t shortMsg = 0;
2651 uint32_t freqDomResAssign = 0;
2652 uint32_t timeDomResAssign = 0;
2653 uint8_t VRB2PRBMap = 0;
2654 uint32_t modNCodScheme = 0;
2655 uint8_t tbScaling = 0;
2656 uint32_t reserved = 0;
2658 /* Size(in bits) of each field in DCI format 1_0
2659 * as mentioned in spec 38.214 */
2660 uint8_t shortMsgIndSize = 2;
2661 uint8_t shortMsgSize = 8;
2662 uint8_t freqDomResAssignSize = 0;
2663 uint8_t timeDomResAssignSize = 4;
2664 uint8_t VRB2PRBMapSize = 1;
2665 uint8_t modNCodSchemeSize = 5;
2666 uint8_t tbScalingSize = 2;
2667 uint8_t reservedSize = 6;
2669 dlDciPtr->rnti = dlPageAlloc->pagePdcchCfg.dci.rnti;
2670 dlDciPtr->scramblingId = dlPageAlloc->pagePdcchCfg.dci.scramblingId;
2671 dlDciPtr->scramblingRnti = dlPageAlloc->pagePdcchCfg.dci.scramblingRnti;
2672 dlDciPtr->cceIndex = dlPageAlloc->pagePdcchCfg.dci.cceIndex;
2673 dlDciPtr->aggregationLevel = dlPageAlloc->pagePdcchCfg.dci.aggregLevel;
2674 dlDciPtr->pc_and_bform.numPrgs = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.numPrgs;
2675 dlDciPtr->pc_and_bform.prgSize = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prgSize;
2676 dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
2677 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
2678 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
2679 dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerValue;
2680 dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
2682 /* Calculating freq domain resource allocation field value and size
2683 * coreset0Size = Size of coreset 0
2684 * RBStart = Starting Virtual Rsource block
2685 * RBLen = length of contiguously allocted RBs
2686 * Spec 38.214 Sec 5.1.2.2.2
2688 coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
2689 rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2690 rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2692 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2694 if((rbLen - 1) <= floor(coreset0Size / 2))
2695 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2697 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2698 + (coreset0Size - 1 - rbStart);
2700 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2703 /*Fetching DCI field values */
2705 /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2706 if(dlPageAlloc->shortMsgInd != TRUE)
2708 /*When Short Msg is absent*/
2714 /*Short Msg is Present*/
2715 if(dlPageAlloc->dlPagePduLen == 0 || dlPageAlloc->dlPagePdu == NULLP)
2717 /*When Paging Msg is absent*/
2722 /*Both Short and Paging is present*/
2725 shortMsg = dlPageAlloc->shortMsg;
2728 timeDomResAssign = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2729 VRB2PRBMap = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2730 modNCodScheme = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->codeword[0].mcsIndex;
2734 /* Reversing bits in each DCI field */
2735 shortMsgInd = reverseBits(shortMsgInd, shortMsgIndSize);
2736 shortMsg = reverseBits(shortMsg, shortMsgSize);
2737 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2738 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2739 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2740 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2741 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2742 tbScaling = reverseBits(tbScaling, tbScalingSize);
2744 /* Calulating total number of bytes in buffer */
2745 dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2746 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2747 + tbScaling + reservedSize;
2749 numBytes = dlDciPtr->payloadSizeBits / 8;
2750 if(dlDciPtr->payloadSizeBits % 8)
2755 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2757 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2761 /* Initialize buffer */
2762 for(bytePos = 0; bytePos < numBytes; bytePos++)
2764 dlDciPtr->payload[bytePos] = 0;
2767 bytePos = numBytes - 1;
2770 /* Packing DCI format fields */
2771 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2772 shortMsgInd, shortMsgIndSize);
2773 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2774 shortMsg, shortMsgSize);
2775 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2776 freqDomResAssign, freqDomResAssignSize);
2777 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2778 timeDomResAssign, timeDomResAssignSize);
2779 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2780 VRB2PRBMap, VRB2PRBMapSize);
2781 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2782 modNCodScheme, modNCodSchemeSize);
2783 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2784 tbScaling, tbScalingSize);
2785 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2786 reserved, reservedSize);
2788 } /* fillPageDlDciPdu */
2790 /*******************************************************************
2792 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2796 * Function : fillRarDlDciPdu
2799 * -Fills the Dl DCI PDU
2801 * @params[in] Pointer to fapi_dl_dci_t
2802 * Pointer to PdcchCfg
2805 ******************************************************************/
2807 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2809 if(dlDciPtr != NULLP)
2811 uint8_t numBytes =0;
2815 uint16_t coreset0Size =0;
2816 uint16_t rbStart =0;
2818 uint32_t freqDomResAssign =0;
2819 uint8_t timeDomResAssign =0;
2820 uint8_t VRB2PRBMap =0;
2821 uint8_t modNCodScheme =0;
2822 uint8_t tbScaling =0;
2823 uint32_t reserved =0;
2825 /* Size(in bits) of each field in DCI format 1_0 */
2826 uint8_t freqDomResAssignSize = 0;
2827 uint8_t timeDomResAssignSize = 4;
2828 uint8_t VRB2PRBMapSize = 1;
2829 uint8_t modNCodSchemeSize = 5;
2830 uint8_t tbScalingSize = 2;
2831 uint8_t reservedSize = 16;
2833 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2834 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2835 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2836 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2837 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2838 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2839 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2840 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2841 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2842 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2843 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2844 dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2846 /* Calculating freq domain resource allocation field value and size
2847 * coreset0Size = Size of coreset 0
2848 * RBStart = Starting Virtual Rsource block
2849 * RBLen = length of contiguously allocted RBs
2850 * Spec 38.214 Sec 5.1.2.2.2
2853 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2854 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2855 rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2856 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2858 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2860 if((rbLen - 1) <= floor(coreset0Size / 2))
2861 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2863 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2864 + (coreset0Size - 1 - rbStart);
2866 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2869 /* Fetching DCI field values */
2870 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
2871 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2872 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2873 tbScaling = 0; /* configured to 0 scaling */
2876 /* Reversing bits in each DCI field */
2877 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2878 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2879 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2880 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2881 tbScaling = reverseBits(tbScaling, tbScalingSize);
2883 /* Calulating total number of bytes in buffer */
2884 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2885 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2887 numBytes = dlDciPtr->payloadSizeBits / 8;
2888 if(dlDciPtr->payloadSizeBits % 8)
2891 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2893 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2897 /* Initialize buffer */
2898 for(bytePos = 0; bytePos < numBytes; bytePos++)
2899 dlDciPtr->payload[bytePos] = 0;
2901 bytePos = numBytes - 1;
2904 /* Packing DCI format fields */
2905 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2906 freqDomResAssign, freqDomResAssignSize);
2907 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2908 timeDomResAssign, timeDomResAssignSize);
2909 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2910 VRB2PRBMap, VRB2PRBMapSize);
2911 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2912 modNCodScheme, modNCodSchemeSize);
2913 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2914 tbScaling, tbScalingSize);
2915 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2916 reserved, reservedSize);
2918 } /* fillRarDlDciPdu */
2920 /*******************************************************************
2922 * @brief fills DL DCI PDU required for DL TTI info in MAC
2926 * Function : fillDlMsgDlDciPdu
2929 * -Fills the Dl DCI PDU
2931 * @params[in] Pointer to fapi_dl_dci_t
2932 * Pointer to PdcchCfg
2935 ******************************************************************/
2936 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2937 DlMsgInfo *dlMsgInfo)
2939 if(dlDciPtr != NULLP)
2945 uint16_t coresetSize = 0;
2946 uint16_t rbStart = 0;
2948 uint8_t dciFormatId;
2949 uint32_t freqDomResAssign;
2950 uint8_t timeDomResAssign;
2952 uint8_t modNCodScheme;
2954 uint8_t redundancyVer = 0;
2955 uint8_t harqProcessNum = 0;
2956 uint8_t dlAssignmentIdx = 0;
2957 uint8_t pucchTpc = 0;
2958 uint8_t pucchResoInd = 0;
2959 uint8_t harqFeedbackInd = 0;
2961 /* Size(in bits) of each field in DCI format 1_0 */
2962 uint8_t dciFormatIdSize = 1;
2963 uint8_t freqDomResAssignSize = 0;
2964 uint8_t timeDomResAssignSize = 4;
2965 uint8_t VRB2PRBMapSize = 1;
2966 uint8_t modNCodSchemeSize = 5;
2967 uint8_t ndiSize = 1;
2968 uint8_t redundancyVerSize = 2;
2969 uint8_t harqProcessNumSize = 4;
2970 uint8_t dlAssignmentIdxSize = 2;
2971 uint8_t pucchTpcSize = 2;
2972 uint8_t pucchResoIndSize = 3;
2973 uint8_t harqFeedbackIndSize = 3;
2975 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2976 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2977 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2978 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2979 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2980 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2981 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2982 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2983 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2984 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2985 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2986 dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2988 /* Calculating freq domain resource allocation field value and size
2989 * coreset0Size = Size of coreset 0
2990 * RBStart = Starting Virtual Rsource block
2991 * RBLen = length of contiguously allocted RBs
2992 * Spec 38.214 Sec 5.1.2.2.2
2994 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2995 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2996 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2998 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
3000 if((rbLen - 1) <= floor(coresetSize / 2))
3001 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3003 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3004 + (coresetSize - 1 - rbStart);
3006 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3009 /* Fetching DCI field values */
3010 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
3011 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
3012 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
3013 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
3014 ndi = dlMsgInfo->ndi;
3015 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
3016 harqProcessNum = dlMsgInfo->harqProcNum;
3017 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
3018 pucchTpc = dlMsgInfo->pucchTpc;
3019 pucchResoInd = dlMsgInfo->pucchResInd;
3020 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
3022 /* Reversing bits in each DCI field */
3023 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3024 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3025 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3026 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3027 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3028 ndi = reverseBits(ndi, ndiSize);
3029 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3030 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3031 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3032 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
3033 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
3034 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3037 /* Calulating total number of bytes in buffer */
3038 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3039 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3040 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3041 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3043 numBytes = dlDciPtr->payloadSizeBits / 8;
3044 if(dlDciPtr->payloadSizeBits % 8)
3047 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3049 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
3053 /* Initialize buffer */
3054 for(bytePos = 0; bytePos < numBytes; bytePos++)
3055 dlDciPtr->payload[bytePos] = 0;
3057 bytePos = numBytes - 1;
3060 /* Packing DCI format fields */
3061 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3062 dciFormatId, dciFormatIdSize);
3063 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3064 freqDomResAssign, freqDomResAssignSize);
3065 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3066 timeDomResAssign, timeDomResAssignSize);
3067 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3068 VRB2PRBMap, VRB2PRBMapSize);
3069 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3070 modNCodScheme, modNCodSchemeSize);
3071 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3073 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3074 redundancyVer, redundancyVerSize);
3075 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3076 redundancyVer, redundancyVerSize);
3077 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3078 harqProcessNum, harqProcessNumSize);
3079 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3080 dlAssignmentIdx, dlAssignmentIdxSize);
3081 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3082 pucchTpc, pucchTpcSize);
3083 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3084 pucchResoInd, pucchResoIndSize);
3085 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
3086 harqFeedbackInd, harqFeedbackIndSize);
3090 /*******************************************************************
3092 * @brief fills PDCCH PDU required for DL TTI info in MAC
3096 * Function : fillPdcchPdu
3099 * -Fills the Pdcch PDU info
3102 * @params[in] Pointer to FAPI DL TTI Req
3103 * Pointer to PdcchCfg
3106 ******************************************************************/
3107 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3108 RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3110 if(dlTtiReqPdu != NULLP)
3112 PdcchCfg *pdcchInfo = NULLP;
3113 BwpCfg *bwp = NULLP;
3115 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3116 if(rntiType == SI_RNTI_TYPE)
3118 pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3119 bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3120 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3122 else if(rntiType == P_RNTI_TYPE)
3124 pdcchInfo = &dlSlot->pageAllocInfo->pagePdcchCfg;
3125 bwp = &dlSlot->pageAllocInfo->bwp;
3126 fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, dlSlot->pageAllocInfo);
3128 else if(rntiType == RA_RNTI_TYPE)
3130 pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3131 bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3132 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3134 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3136 pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
3137 bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
3138 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3139 &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
3143 DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
3146 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3147 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3148 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3149 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3150 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3151 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3152 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3153 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
3154 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3155 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3156 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3157 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
3158 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3159 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3160 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3162 /* Calculating PDU length. Considering only one dl dci pdu for now */
3163 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3165 /* Filling Vendor message PDU */
3166 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3167 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3168 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3169 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3170 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3176 /*******************************************************************
3178 * @brief fills PDSCH PDU required for DL TTI info in MAC
3182 * Function : fillPdschPdu
3185 * -Fills the Pdsch PDU info
3188 * @params[in] Pointer to FAPI DL TTI Req
3189 * Pointer to PdschCfg
3190 * Pointer to msgLen of DL TTI Info
3193 ******************************************************************/
3195 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3196 BwpCfg bwp, uint16_t pduIndex)
3200 if(dlTtiReqPdu != NULLP)
3202 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3203 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3204 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3205 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3206 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3207 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3208 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3209 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3210 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3211 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3212 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3214 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3215 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3216 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3217 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3218 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3219 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3221 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3222 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3223 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3224 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3225 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3226 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3227 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3228 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3229 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3230 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3231 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3232 /* since we are using type-1, hence rbBitmap excluded */
3233 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3234 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3235 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3236 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3237 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3238 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3239 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3240 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3241 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3242 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3243 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3244 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3245 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3246 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3247 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3248 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3249 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3251 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3253 /* DL TTI Request vendor message */
3254 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3255 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3256 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3257 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3259 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3264 /***********************************************************************
3266 * @brief calculates the total size to be allocated for DL TTI Req
3270 * Function : calcDlTtiReqPduCount
3273 * -calculates the total pdu count to be allocated for DL TTI Req
3275 * @params[in] MacDlSlot *dlSlot
3278 * ********************************************************************/
3279 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3282 uint8_t idx = 0, ueIdx=0;
3284 if(dlSlot->dlInfo.isBroadcastPres)
3286 if(dlSlot->dlInfo.brdcstAlloc.ssbTrans)
3288 for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3290 /* SSB PDU is filled */
3294 if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3296 /* PDCCH and PDSCH PDU is filled */
3301 if(dlSlot->pageAllocInfo)
3303 /* PDCCH and PDSCH PDU is filled */
3307 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3309 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3311 /* PDCCH and PDSCH PDU is filled */
3312 if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
3318 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3320 for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3322 /* PDCCH and PDSCH PDU is filled */
3323 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
3325 else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
3333 /***********************************************************************
3335 * @brief calculates the total size to be allocated for DL TTI Req
3339 * Function : calcTxDataReqPduCount
3342 * -calculates the total pdu count to be allocated for DL TTI Req
3344 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3347 * ********************************************************************/
3348 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3350 uint8_t idx = 0, count = 0, ueIdx=0;
3352 if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1Trans)
3356 if(dlSlot->pageAllocInfo)
3361 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3363 if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
3364 ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
3367 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3369 for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3371 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
3372 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
3380 /***********************************************************************
3382 * @brief fills the SIB1 TX-DATA request message
3386 * Function : fillSib1TxDataReq
3389 * - fills the SIB1 TX-DATA request message
3391 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3392 * @params[in] macCellCfg consist of SIB1 pdu
3393 * @params[in] uint32_t *msgLen
3394 * @params[in] uint16_t pduIndex
3397 * ********************************************************************/
3398 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3401 uint32_t payloadSize = 0;
3402 uint8_t *sib1Payload = NULLP;
3403 fapi_api_queue_elem_t *payloadElem = NULLP;
3404 #ifdef INTEL_WLS_MEM
3405 void * wlsHdlr = NULLP;
3408 pduDesc[pduIndex].pdu_index = pduIndex;
3409 pduDesc[pduIndex].num_tlvs = 1;
3412 payloadSize = pdschCfg.codeword[0].tbSize;
3413 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3414 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3415 LWR_MAC_ALLOC(sib1Payload, payloadSize);
3416 if(sib1Payload == NULLP)
3420 payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3421 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3422 macCellCfg->sib1Cfg.sib1PduLen);
3423 memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->sib1Cfg.sib1Pdu, macCellCfg->sib1Cfg.sib1PduLen);
3425 #ifdef INTEL_WLS_MEM
3426 mtGetWlsHdl(&wlsHdlr);
3427 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3429 pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3431 pduDesc[pduIndex].pdu_length = payloadSize;
3433 #ifdef INTEL_WLS_MEM
3434 addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3436 LWR_MAC_FREE(sib1Payload, payloadSize);
3442 /***********************************************************************
3444 * @brief fills the PAGE TX-DATA request message
3448 * Function : fillPageTxDataReq
3451 * - fills the Page TX-DATA request message
3453 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3454 * @params[in] macCellCfg consist of SIB1 pdu
3455 * @params[in] uint32_t *msgLen
3456 * @params[in] uint16_t pduIndex
3459 * ********************************************************************/
3460 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo,
3463 uint32_t payloadSize = 0;
3464 uint8_t *pagePayload = NULLP;
3465 fapi_api_queue_elem_t *payloadElem = NULLP;
3466 #ifdef INTEL_WLS_MEM
3467 void * wlsHdlr = NULLP;
3470 pduDesc[pduIndex].pdu_index = pduIndex;
3471 pduDesc[pduIndex].num_tlvs = 1;
3474 payloadSize = pdschCfg.codeword[0].tbSize;
3475 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3476 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3477 LWR_MAC_ALLOC(pagePayload, payloadSize);
3478 if(pagePayload == NULLP)
3482 payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3483 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3484 pageAllocInfo->dlPagePduLen);
3485 memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->dlPagePdu, pageAllocInfo->dlPagePduLen);
3487 #ifdef INTEL_WLS_MEM
3488 mtGetWlsHdl(&wlsHdlr);
3489 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3491 pduDesc[pduIndex].tlvs[0].value = pagePayload;
3493 pduDesc[pduIndex].pdu_length = payloadSize;
3495 #ifdef INTEL_WLS_MEM
3496 addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3498 LWR_MAC_FREE(pagePayload, payloadSize);
3504 /***********************************************************************
3506 * @brief fills the RAR TX-DATA request message
3510 * Function : fillRarTxDataReq
3513 * - fills the RAR TX-DATA request message
3515 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3516 * @params[in] RarInfo *rarInfo
3517 * @params[in] uint32_t *msgLen
3518 * @params[in] uint16_t pduIndex
3521 * ********************************************************************/
3522 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
3524 uint16_t payloadSize;
3525 uint8_t *rarPayload = NULLP;
3526 fapi_api_queue_elem_t *payloadElem = NULLP;
3527 #ifdef INTEL_WLS_MEM
3528 void * wlsHdlr = NULLP;
3531 pduDesc[pduIndex].pdu_index = pduIndex;
3532 pduDesc[pduIndex].num_tlvs = 1;
3535 payloadSize = pdschCfg.codeword[0].tbSize;
3536 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3537 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3538 LWR_MAC_ALLOC(rarPayload, payloadSize);
3539 if(rarPayload == NULLP)
3543 payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3544 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3545 memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3547 #ifdef INTEL_WLS_MEM
3548 mtGetWlsHdl(&wlsHdlr);
3549 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3551 pduDesc[pduIndex].tlvs[0].value = rarPayload;
3553 pduDesc[pduIndex].pdu_length = payloadSize;
3555 #ifdef INTEL_WLS_MEM
3556 addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3558 LWR_MAC_FREE(rarPayload, payloadSize);
3563 /***********************************************************************
3565 * @brief fills the DL dedicated Msg TX-DATA request message
3569 * Function : fillDlMsgTxDataReq
3572 * - fills the Dl Dedicated Msg TX-DATA request message
3574 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3575 * @params[in] DlMsgInfo *dlMsgInfo
3576 * @params[in] uint32_t *msgLen
3577 * @params[in] uint16_t pduIndex
3580 * ********************************************************************/
3581 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
3583 uint16_t payloadSize;
3584 uint8_t *dlMsgPayload = NULLP;
3585 fapi_api_queue_elem_t *payloadElem = NULLP;
3586 #ifdef INTEL_WLS_MEM
3587 void * wlsHdlr = NULLP;
3590 pduDesc[pduIndex].pdu_index = pduIndex;
3591 pduDesc[pduIndex].num_tlvs = 1;
3594 payloadSize = pdschCfg.codeword[0].tbSize;
3595 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3596 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3597 LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3598 if(dlMsgPayload == NULLP)
3602 payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3603 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
3604 memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3606 #ifdef INTEL_WLS_MEM
3607 mtGetWlsHdl(&wlsHdlr);
3608 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3610 pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3612 pduDesc[pduIndex].pdu_length = payloadSize;
3614 #ifdef INTEL_WLS_MEM
3615 addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3617 LWR_MAC_FREE(dlMsgPayload, payloadSize);
3624 /*******************************************************************
3626 * @brief Sends DL TTI Request to PHY
3630 * Function : fillDlTtiReq
3633 * -Sends FAPI DL TTI req to PHY
3635 * @params[in] timing info
3636 * @return ROK - success
3639 * ****************************************************************/
3640 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3642 #ifdef CALL_FLOW_DEBUG_LOG
3643 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3649 uint8_t numPduEncoded = 0;
3651 uint16_t cellIdx =0;
3652 uint16_t pduIndex = 0;
3654 SlotTimingInfo dlTtiReqTimingInfo;
3655 MacDlSlot *currDlSlot = NULLP;
3656 MacCellCfg macCellCfg;
3658 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3659 fapi_msg_header_t *msgHeader = NULLP;
3660 p_fapi_api_queue_elem_t dlTtiElem;
3661 p_fapi_api_queue_elem_t headerElem;
3662 p_fapi_api_queue_elem_t prevElem;
3663 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3665 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3666 /* consider phy delay */
3667 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
3668 dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3670 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3672 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3674 /* Vendor Message */
3675 fapi_vendor_msg_t *vendorMsg;
3676 p_fapi_api_queue_elem_t vendorMsgQElem;
3677 /* Allocte And fill Vendor msg */
3678 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3681 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
3684 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3685 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3686 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3688 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3691 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3692 sizeof(fapi_dl_tti_req_t));
3693 /* Fill message header */
3694 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3697 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
3698 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3702 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3703 sizeof(fapi_msg_header_t));
3704 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3705 msgHeader->num_msg = 2;
3706 msgHeader->handle = 0;
3708 /* Fill Dl TTI Request */
3709 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3710 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3711 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3713 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3714 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3715 dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
3716 nPdu = dlTtiReq->nPdus;
3718 vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3719 vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3721 dlTtiReq->nGroup = 0;
3722 if(dlTtiReq->nPdus > 0)
3724 if(currDlSlot->dlInfo.isBroadcastPres)
3726 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3728 if(dlTtiReq->pdus != NULLP)
3730 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3732 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3733 currDlSlot, idx, dlTtiReq->sfn);
3737 DU_LOG("\033[1;31m");
3738 DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
3742 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3744 /* Filling SIB1 param */
3745 if(numPduEncoded != nPdu)
3747 rntiType = SI_RNTI_TYPE;
3750 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3751 currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3755 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3756 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3757 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3759 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3763 DU_LOG("\033[1;34m");
3764 DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
3769 if(currDlSlot->pageAllocInfo != NULLP)
3771 /* Filling DL Paging Alloc param */
3772 if(numPduEncoded != nPdu)
3774 rntiType = P_RNTI_TYPE;
3775 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], currDlSlot, -1, \
3776 rntiType, CORESET_TYPE0, MAX_NUM_UE);
3778 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3779 &currDlSlot->pageAllocInfo->pagePdschCfg,
3780 currDlSlot->pageAllocInfo->bwp,
3782 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3786 DU_LOG("\033[1;34m");
3787 DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
3791 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3793 if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3795 /* Filling RAR param */
3796 rntiType = RA_RNTI_TYPE;
3797 if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3798 (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
3800 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3801 currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3804 if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
3805 (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
3807 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3808 &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3809 currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3814 DU_LOG("\033[1;32m");
3815 DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
3820 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3822 for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
3824 /* Filling Msg4 param */
3825 if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3826 (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
3828 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3830 rntiType = TC_RNTI_TYPE;
3831 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3832 currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
3836 /* Filling other DL msg params */
3837 rntiType = C_RNTI_TYPE;
3838 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3839 currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
3844 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
3846 if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
3847 (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
3849 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3850 &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
3851 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
3855 DU_LOG("\033[1;32m");
3856 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
3858 DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
3862 DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
3870 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
3871 currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
3878 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
3881 #ifdef ODU_SLOT_IND_DEBUG_LOG
3882 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
3885 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3886 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
3887 msgHeader->num_msg++;
3889 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3890 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
3891 msgHeader->num_msg++;
3893 /* send Tx-DATA req message */
3894 sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
3895 if(dlTtiElem->p_next->p_next->p_next)
3897 msgHeader->num_msg++;
3898 prevElem = dlTtiElem->p_next->p_next->p_next;
3901 prevElem = dlTtiElem->p_next->p_next;
3905 #ifdef ODU_SLOT_IND_DEBUG_LOG
3906 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
3908 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
3909 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
3910 msgHeader->num_msg++;
3912 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3913 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
3914 msgHeader->num_msg++;
3916 prevElem = dlTtiElem->p_next->p_next;
3919 if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
3921 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
3922 lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
3923 msgHeader->num_msg++;
3924 macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
3925 prevElem = prevElem->p_next;
3927 prevElem->p_next = vendorMsgQElem;
3928 LwrMacSendToL1(headerElem);
3929 memset(currDlSlot, 0, sizeof(MacDlSlot));
3934 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
3935 memset(currDlSlot, 0, sizeof(MacDlSlot));
3941 lwr_mac_procInvalidEvt(&currTimingInfo);
3948 /*******************************************************************
3950 * @brief Sends TX data Request to PHY
3954 * Function : sendTxDataReq
3957 * -Sends FAPI TX data req to PHY
3959 * @params[in] timing info
3960 * @return ROK - success
3963 * ****************************************************************/
3964 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
3967 #ifdef CALL_FLOW_DEBUG_LOG
3968 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
3973 uint8_t schInfoIdx = 0;
3975 uint16_t pduIndex = 0;
3976 fapi_tx_data_req_t *txDataReq =NULLP;
3977 p_fapi_api_queue_elem_t txDataElem = 0;
3979 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3981 /* send TX_Data request message */
3982 nPdu = calcTxDataReqPduCount(dlSlot);
3985 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3986 if(txDataElem == NULLP)
3988 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
3992 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3993 sizeof(fapi_tx_data_req_t));
3994 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3995 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3996 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3998 vendorTxDataReq->sym = 0;
4000 txDataReq->sfn = currTimingInfo.sfn;
4001 txDataReq->slot = currTimingInfo.slot;
4002 if(dlSlot->dlInfo.brdcstAlloc.sib1Trans)
4004 fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4005 dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg);
4007 txDataReq->num_pdus++;
4009 if(dlSlot->pageAllocInfo != NULLP)
4011 fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo, \
4012 dlSlot->pageAllocInfo->pagePdschCfg);
4014 txDataReq->num_pdus++;
4015 MAC_FREE(dlSlot->pageAllocInfo->dlPagePdu, sizeof(dlSlot->pageAllocInfo->dlPagePduLen));
4016 MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4019 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4021 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4023 if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
4025 fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4026 dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4028 txDataReq->num_pdus++;
4030 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4033 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4035 for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
4037 if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
4038 (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
4040 fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4041 &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
4042 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
4044 txDataReq->num_pdus++;
4046 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
4047 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
4048 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
4050 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
4054 /* Fill message header */
4055 DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
4056 prevElem->p_next = txDataElem;
4062 /***********************************************************************
4064 * @brief calculates the total size to be allocated for UL TTI Req
4068 * Function : getnPdus
4071 * -calculates the total pdu count to be allocated for UL TTI Req
4073 * @params[in] Pointer to fapi Ul TTI Req
4074 * Pointer to CurrUlSlot
4076 * ********************************************************************/
4078 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4080 uint8_t pduCount = 0;
4082 if(ulTtiReq && currUlSlot)
4084 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4087 ulTtiReq->rachPresent++;
4089 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4094 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4099 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4104 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
4113 /***********************************************************************
4115 * @brief Set the value of zero correlation config in PRACH PDU
4119 * Function : setNumCs
4122 * -Set the value of zero correlation config in PRACH PDU
4124 * @params[in] Pointer to zero correlation config
4125 * Pointer to MacCellCfg
4126 * ********************************************************************/
4128 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4132 if(macCellCfg != NULLP)
4134 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4135 *numCs = UnrestrictedSetNcsTable[idx];
4140 /***********************************************************************
4142 * @brief Fills the PRACH PDU in UL TTI Request
4146 * Function : fillPrachPdu
4149 * -Fills the PRACH PDU in UL TTI Request
4151 * @params[in] Pointer to Prach Pdu
4152 * Pointer to CurrUlSlot
4153 * Pointer to macCellCfg
4155 * ********************************************************************/
4158 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4160 if(ulTtiReqPdu != NULLP)
4162 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4163 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
4164 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4165 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
4166 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4167 currUlSlot->ulInfo.prachSchInfo.prachFormat;
4168 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
4169 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4170 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
4171 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4172 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4173 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4174 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4175 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4176 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4180 /*******************************************************************
4182 * @brief Filling PUSCH PDU in UL TTI Request
4186 * Function : fillPuschPdu
4188 * Functionality: Filling PUSCH PDU in UL TTI Request
4191 * @return ROK - success
4194 * ****************************************************************/
4195 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4197 if(ulTtiReqPdu != NULLP)
4199 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4200 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4201 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4202 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
4203 /* TODO : Fill handle in raCb when scheduling pusch and access here */
4204 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4205 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
4206 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
4207 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4208 macCellCfg->initialUlBwp.bwp.scs;
4209 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4210 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4211 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4212 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
4213 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
4214 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
4215 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4216 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
4217 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4218 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4219 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4220 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
4221 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4222 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4223 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4224 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4225 currUlSlot->ulInfo.schPuschInfo.resAllocType;
4226 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4227 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
4228 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4229 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
4230 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4231 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4232 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4233 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4234 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4235 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
4236 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4237 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
4238 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4239 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
4240 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4241 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
4242 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4243 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
4244 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4245 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
4246 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4247 currUlSlot->ulInfo.schPuschInfo.harqProcId;
4248 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4249 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
4250 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4251 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
4252 /* numCb is 0 for new transmission */
4253 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4255 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4257 /* UL TTI Vendor PDU */
4258 ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4259 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4260 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4261 for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4263 ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4268 /*******************************************************************
4270 * @brief Fill PUCCH PDU in Ul TTI Request
4274 * Function : fillPucchPdu
4276 * Functionality: Fill PUCCH PDU in Ul TTI Request
4279 * @return ROK - success
4282 * ****************************************************************/
4283 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4284 MacUlSlot *currUlSlot)
4286 if(ulTtiReqPdu != NULLP)
4288 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
4289 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4290 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
4291 /* TODO : Fill handle in raCb when scheduling pucch and access here */
4292 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
4293 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
4294 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
4295 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
4296 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
4297 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
4298 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4300 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
4301 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
4302 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
4303 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
4304 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
4305 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = currUlSlot->ulInfo.schPucchInfo.secondPrbHop;
4306 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4307 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4308 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
4310 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = currUlSlot->ulInfo.schPucchInfo.initialCyclicShift;
4312 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4313 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
4314 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
4315 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
4316 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
4317 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
4318 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4319 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
4320 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
4321 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
4322 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
4323 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
4324 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
4325 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
4326 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
4327 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4329 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4331 /* UL TTI Vendor PDU */
4332 ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4333 ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4334 ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4335 for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4337 ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4344 /*******************************************************************
4346 * @brief Sends UL TTI Request to PHY
4350 * Function : fillUlTtiReq
4353 * -Sends FAPI Param req to PHY
4355 * @params[in] Pointer to CmLteTimingInfo
4356 * @return ROK - success
4359 ******************************************************************/
4360 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4362 #ifdef CALL_FLOW_DEBUG_LOG
4363 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4367 uint16_t cellIdx =0;
4368 uint8_t pduIdx = -1;
4369 SlotTimingInfo ulTtiReqTimingInfo;
4370 MacUlSlot *currUlSlot = NULLP;
4371 MacCellCfg macCellCfg;
4372 fapi_ul_tti_req_t *ulTtiReq = NULLP;
4373 p_fapi_api_queue_elem_t ulTtiElem;
4375 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4377 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4378 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4381 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
4382 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
4384 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4387 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4388 sizeof(fapi_ul_tti_req_t));
4389 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4390 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4391 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4392 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
4393 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4394 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4395 vendorUlTti->num_ul_pdu = ulTtiReq->nPdus;
4396 vendorUlTti->sym = 0;
4397 ulTtiReq->nGroup = 0;
4398 if(ulTtiReq->nPdus > 0)
4400 /* Fill Prach Pdu */
4401 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
4404 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4405 ulTtiReq->rachPresent++;
4408 /* Fill PUSCH PDU */
4409 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
4412 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4415 /* Fill PUCCH PDU */
4416 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
4419 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
4424 #ifdef ODU_SLOT_IND_DEBUG_LOG
4425 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
4427 prevElem->p_next = ulTtiElem;
4429 memset(currUlSlot, 0, sizeof(MacUlSlot));
4434 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
4435 memset(currUlSlot, 0, sizeof(MacUlSlot));
4441 lwr_mac_procInvalidEvt(&currTimingInfo);
4448 /*******************************************************************
4450 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4454 * Function : fillUlDciPdu
4457 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4459 * @params[in] Pointer to fapi_dl_dci_t
4460 * Pointer to DciInfo
4463 ******************************************************************/
4464 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4466 #ifdef CALL_FLOW_DEBUG_LOG
4467 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4469 if(ulDciPtr != NULLP)
4471 uint8_t numBytes =0;
4475 uint8_t coreset1Size = 0;
4476 uint16_t rbStart = 0;
4478 uint8_t dciFormatId = 0;
4479 uint32_t freqDomResAssign =0;
4480 uint8_t timeDomResAssign =0;
4481 uint8_t freqHopFlag =0;
4482 uint8_t modNCodScheme =0;
4484 uint8_t redundancyVer = 0;
4485 uint8_t harqProcessNum = 0;
4486 uint8_t puschTpc = 0;
4487 uint8_t ul_SlInd = 0;
4489 /* Size(in bits) of each field in DCI format 0_0 */
4490 uint8_t dciFormatIdSize = 1;
4491 uint8_t freqDomResAssignSize = 0;
4492 uint8_t timeDomResAssignSize = 4;
4493 uint8_t freqHopFlagSize = 1;
4494 uint8_t modNCodSchemeSize = 5;
4495 uint8_t ndiSize = 1;
4496 uint8_t redundancyVerSize = 2;
4497 uint8_t harqProcessNumSize = 4;
4498 uint8_t puschTpcSize = 2;
4499 uint8_t ul_SlIndSize = 1;
4501 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4502 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4503 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4504 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4505 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4506 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4507 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4508 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4509 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4510 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4511 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
4512 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4514 /* Calculating freq domain resource allocation field value and size
4515 * coreset1Size = Size of coreset 1
4516 * RBStart = Starting Virtual Rsource block
4517 * RBLen = length of contiguously allocted RBs
4518 * Spec 38.214 Sec 5.1.2.2.2
4520 if(schDciInfo->formatType == FORMAT0_0)
4522 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4523 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4524 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4526 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4528 if((rbLen - 1) <= floor(coreset1Size / 2))
4529 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4531 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4532 + (coreset1Size - 1 - rbStart);
4534 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4536 /* Fetching DCI field values */
4537 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4538 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4539 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
4540 modNCodScheme = schDciInfo->format.format0_0.mcs;
4541 ndi = schDciInfo->format.format0_0.ndi;
4542 redundancyVer = schDciInfo->format.format0_0.rv;
4543 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
4544 puschTpc = schDciInfo->format.format0_0.tpcCmd;
4545 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
4547 /* Reversing bits in each DCI field */
4548 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4549 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4550 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4551 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4552 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4553 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4554 puschTpc = reverseBits(puschTpc, puschTpcSize);
4555 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4557 /* Calulating total number of bytes in buffer */
4558 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4559 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4560 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4562 numBytes = ulDciPtr->payloadSizeBits / 8;
4563 if(ulDciPtr->payloadSizeBits % 8)
4566 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4568 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
4572 /* Initialize buffer */
4573 for(bytePos = 0; bytePos < numBytes; bytePos++)
4574 ulDciPtr->payload[bytePos] = 0;
4576 bytePos = numBytes - 1;
4579 /* Packing DCI format fields */
4580 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4581 dciFormatId, dciFormatIdSize);
4582 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4583 freqDomResAssign, freqDomResAssignSize);
4584 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4585 timeDomResAssign, timeDomResAssignSize);
4586 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4587 freqHopFlag, freqHopFlagSize);
4588 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4589 modNCodScheme, modNCodSchemeSize);
4590 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4592 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4593 redundancyVer, redundancyVerSize);
4594 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4595 harqProcessNum, harqProcessNumSize);
4596 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4597 puschTpc, puschTpcSize);
4598 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4599 ul_SlInd, ul_SlIndSize);
4601 } /* fillUlDciPdu */
4603 /*******************************************************************
4605 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4609 * Function : fillUlDciPdcchPdu
4612 * -Fills the Pdcch PDU info
4614 * @params[in] Pointer to FAPI DL TTI Req
4615 * Pointer to PdcchCfg
4618 ******************************************************************/
4619 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4621 if(ulDciReqPdu != NULLP)
4623 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4624 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4625 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4626 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4627 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4628 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4629 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4630 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4631 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4632 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4633 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4634 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4635 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4636 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4637 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4638 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4639 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4641 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4642 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4644 /* Vendor UL DCI PDU */
4645 vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4646 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4647 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4652 /*******************************************************************
4654 * @brief Sends UL DCI Request to PHY
4658 * Function : fillUlDciReq
4661 * -Sends FAPI Ul Dci req to PHY
4663 * @params[in] Pointer to CmLteTimingInfo
4664 * @return ROK - success
4667 ******************************************************************/
4668 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4672 uint8_t numPduEncoded = 0;
4673 SlotTimingInfo ulDciReqTimingInfo ={0};
4674 MacDlSlot *currDlSlot = NULLP;
4675 fapi_ul_dci_req_t *ulDciReq =NULLP;
4676 p_fapi_api_queue_elem_t ulDciElem;
4678 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4680 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4681 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4682 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
4684 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4687 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4688 sizeof(fapi_ul_dci_req_t));
4689 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4690 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4691 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4693 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4694 ulDciReq->slot = ulDciReqTimingInfo.slot;
4695 if(currDlSlot->dlInfo.ulGrant != NULLP)
4697 vendorUlDciReq->sym = 0;
4698 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4699 vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4700 if(ulDciReq->numPdus > 0)
4702 /* Fill PDCCH configuration Pdu */
4703 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4705 /* free UL GRANT at SCH */
4706 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4708 #ifdef ODU_SLOT_IND_DEBUG_LOG
4709 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
4712 prevElem->p_next = ulDciElem;
4717 lwr_mac_procInvalidEvt(&currTimingInfo);
4723 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4726 /* PHY_STATE_IDLE */
4727 #ifdef INTEL_TIMER_MODE
4728 lwr_mac_procIqSamplesReqEvt,
4730 lwr_mac_procParamReqEvt,
4731 lwr_mac_procParamRspEvt,
4732 lwr_mac_procConfigReqEvt,
4733 lwr_mac_procConfigRspEvt,
4734 lwr_mac_procInvalidEvt,
4735 lwr_mac_procInvalidEvt,
4738 /* PHY_STATE_CONFIGURED */
4739 #ifdef INTEL_TIMER_MODE
4740 lwr_mac_procInvalidEvt,
4742 lwr_mac_procParamReqEvt,
4743 lwr_mac_procParamRspEvt,
4744 lwr_mac_procConfigReqEvt,
4745 lwr_mac_procConfigRspEvt,
4746 lwr_mac_procStartReqEvt,
4747 lwr_mac_procInvalidEvt,
4750 /* PHY_STATE_RUNNING */
4751 #ifdef INTEL_TIMER_MODE
4752 lwr_mac_procInvalidEvt,
4754 lwr_mac_procInvalidEvt,
4755 lwr_mac_procInvalidEvt,
4756 lwr_mac_procConfigReqEvt,
4757 lwr_mac_procConfigRspEvt,
4758 lwr_mac_procInvalidEvt,
4759 lwr_mac_procInvalidEvt,
4763 /*******************************************************************
4765 * @brief Sends message to LWR_MAC Fsm Event Handler
4769 * Function : sendToLowerMac
4772 * -Sends message to LowerMac
4774 * @params[in] Message Type
4780 ******************************************************************/
4781 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4783 lwrMacCb.event = msgType;
4784 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4787 /**********************************************************************
4789 **********************************************************************/