1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
28 #include "lwr_mac_phy.h"
33 #include "lwr_mac_fsm.h"
34 #include "mac_utils.h"
36 #define MIB_SFN_BITMASK 0xFC
37 #define PDCCH_PDU_TYPE 0
38 #define PDSCH_PDU_TYPE 1
39 #define SSB_PDU_TYPE 3
40 #define PRACH_PDU_TYPE 0
41 #define PUSCH_PDU_TYPE 1
42 #define PUCCH_PDU_TYPE 2
44 #define SET_MSG_LEN(x, size) x += size
46 extern void fapiMacConfigRsp(uint16_t cellId);
47 extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
49 /* Global variables */
51 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
58 /* Initializing WLS free mem list */
60 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
62 cmLListInit(&wlsBlockToFreeList[idx]);
67 /*******************************************************************
69 * @brief Handles Invalid Request Event
73 * Function : lwr_mac_procInvalidEvt
76 * - Displays the PHY state when the invalid event occurs
79 * @return ROK - success
82 * ****************************************************************/
83 uint8_t lwr_mac_procInvalidEvt(void *msg)
85 printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
90 /*******************************************************************
92 * @brief Fills FAPI message header
96 * Function : fillMsgHeader
99 * -Fills FAPI message header
101 * @params[in] Pointer to header
107 * ****************************************************************/
108 PUBLIC void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
110 memset(hdr, 0, sizeof(fapi_msg_t));
111 hdr->msg_id = msgType;
112 hdr->length = msgLen;
115 /*******************************************************************
117 * @brief Fills FAPI Config Request message header
121 * Function : fillTlvs
124 * -Fills FAPI Config Request message header
126 * @params[in] Pointer to TLV
133 * ****************************************************************/
134 PUBLIC void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
135 uint16_t value, uint32_t *msgLen)
138 tlv->tl.length = length;
140 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
142 /*******************************************************************
144 * @brief fills the cyclic prefix by comparing the bitmask
148 * Function : fillCyclicPrefix
151 * -checks the value with the bitmask and
152 * fills the cellPtr's cyclic prefix.
154 * @params[in] Pointer to ClCellParam
155 * Value to be compared
158 ********************************************************************/
159 PUBLIC void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
161 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
163 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
165 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
167 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
171 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
175 /*******************************************************************
177 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
181 * Function : fillSubcarrierSpaceDl
184 * -checks the value with the bitmask and
185 * fills the cellPtr's subcarrier spacing in DL
187 * @params[in] Pointer to ClCellParam
188 * Value to be compared
191 * ****************************************************************/
193 PUBLIC void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
195 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
197 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
199 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
201 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
203 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
205 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
207 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
209 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
213 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
217 /*******************************************************************
219 * @brief fills the downlink bandwidth by comparing the bitmask
223 * Function : fillBandwidthDl
226 * -checks the value with the bitmask and
227 * -fills the cellPtr's DL Bandwidth
229 * @params[in] Pointer to ClCellParam
230 * Value to be compared
233 * ****************************************************************/
235 PUBLIC void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
237 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
239 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
241 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
243 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
245 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
247 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
249 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
251 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
253 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
255 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
257 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
261 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
265 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
269 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
273 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
277 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
281 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
285 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
291 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
295 /*******************************************************************
297 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
301 * Function : fillSubcarrierSpaceUl
304 * -checks the value with the bitmask and
305 * -fills cellPtr's subcarrier spacing in UL
307 * @params[in] Pointer to ClCellParam
308 * Value to be compared
311 * ****************************************************************/
313 PUBLIC void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
315 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
317 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
319 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
321 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
323 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
325 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
327 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
329 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
333 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
337 /*******************************************************************
339 * @brief fills the uplink bandwidth by comparing the bitmask
343 * Function : fillBandwidthUl
346 * -checks the value with the bitmask and
347 * fills the cellPtr's UL Bandwidth
351 * @params[in] Pointer to ClCellParam
352 * Value to be compared
356 * ****************************************************************/
358 PUBLIC void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
360 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
362 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
364 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
366 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
368 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
370 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
372 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
374 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
376 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
378 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
380 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
384 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
388 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
392 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
396 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
400 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
404 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
408 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
414 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
417 /*******************************************************************
419 * @brief fills the CCE maping by comparing the bitmask
423 * Function : fillCCEmaping
426 * -checks the value with the bitmask and
427 * fills the cellPtr's CCE Mapping Type
430 * @params[in] Pointer to ClCellParam
431 * Value to be compared
434 * ****************************************************************/
436 PUBLIC void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
438 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
440 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
442 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
444 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
448 (*cellPtr)->cceMappingType = INVALID_VALUE;
452 /*******************************************************************
454 * @brief fills the PUCCH format by comparing the bitmask
458 * Function : fillPucchFormat
461 * -checks the value with the bitmask and
462 * fills the cellPtr's pucch format
465 * @params[in] Pointer to ClCellParam
466 * Value to be compared
469 * ****************************************************************/
471 PUBLIC void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
473 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
475 (*cellPtr)->pucchFormats = FORMAT_0;
477 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
479 (*cellPtr)->pucchFormats = FORMAT_1;
481 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
483 (*cellPtr)->pucchFormats = FORMAT_2;
485 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
487 (*cellPtr)->pucchFormats = FORMAT_3;
489 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
491 (*cellPtr)->pucchFormats = FORMAT_4;
495 (*cellPtr)->pucchFormats = INVALID_VALUE;
499 /*******************************************************************
501 * @brief fills the PDSCH Mapping Type by comparing the bitmask
505 * Function : fillPdschMappingType
508 * -checks the value with the bitmask and
509 * fills the cellPtr's PDSCH MappingType
511 * @params[in] Pointer to ClCellParam
512 * Value to be compared
515 * ****************************************************************/
517 PUBLIC void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
519 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
521 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
523 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
525 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
529 (*cellPtr)->pdschMappingType = INVALID_VALUE;
533 /*******************************************************************
535 * @brief fills the PDSCH Allocation Type by comparing the bitmask
539 * Function : fillPdschAllocationType
542 * -checks the value with the bitmask and
543 * fills the cellPtr's PDSCH AllocationType
545 * @params[in] Pointer to ClCellParam
546 * Value to be compared
549 * ****************************************************************/
551 PUBLIC void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
553 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
555 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
557 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
559 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
563 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
567 /*******************************************************************
569 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
573 * Function : fillPrbMappingType
576 * -checks the value with the bitmask and
577 * fills the cellPtr's PRB Mapping Type
579 * @params[in] Pointer to ClCellParam
580 * Value to be compared
583 ******************************************************************/
584 PUBLIC void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
586 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
588 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
590 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
592 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
596 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
600 /*******************************************************************
602 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
606 * Function : fillPdschDmrsConfigType
609 * -checks the value with the bitmask and
610 * fills the cellPtr's DmrsConfig Type
612 * @params[in] Pointer to ClCellParam
613 * Value to be compared
616 ******************************************************************/
618 PUBLIC void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
620 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
622 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
624 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
626 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
630 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
634 /*******************************************************************
636 * @brief fills the PDSCH DmrsLength by comparing the bitmask
640 * Function : fillPdschDmrsLength
643 * -checks the value with the bitmask and
644 * fills the cellPtr's PdschDmrsLength
646 * @params[in] Pointer to ClCellParam
647 * Value to be compared
650 ******************************************************************/
651 PUBLIC void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
653 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
655 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
657 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
659 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
663 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
667 /*******************************************************************
669 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
673 * Function : fillPdschDmrsAddPos
676 * -checks the value with the bitmask and
677 * fills the cellPtr's Pdsch DmrsAddPos
679 * @params[in] Pointer to ClCellParam
680 * Value to be compared
683 ******************************************************************/
685 PUBLIC void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
687 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
689 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
691 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
693 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
695 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
697 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
699 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
701 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
705 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
709 /*******************************************************************
711 * @brief fills the Modulation Order in DL by comparing the bitmask
715 * Function : fillModulationOrderDl
718 * -checks the value with the bitmask and
719 * fills the cellPtr's ModulationOrder in DL.
721 * @params[in] Pointer to ClCellParam
722 * Value to be compared
725 ******************************************************************/
726 PUBLIC void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
730 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
734 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
738 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
742 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
746 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
750 /*******************************************************************
752 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
756 * Function : fillPuschDmrsConfigType
759 * -checks the value with the bitmask and
760 * fills the cellPtr's PUSCH DmrsConfigType
762 * @params[in] Pointer to ClCellParam
763 * Value to be compared
766 ******************************************************************/
768 PUBLIC void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
770 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
772 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
774 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
776 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
780 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
784 /*******************************************************************
786 * @brief fills the PUSCH DmrsLength by comparing the bitmask
790 * Function : fillPuschDmrsLength
793 * -checks the value with the bitmask and
794 * fills the cellPtr's PUSCH DmrsLength
796 * @params[in] Pointer to ClCellParam
797 * Value to be compared
800 ******************************************************************/
802 PUBLIC void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
804 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
806 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
808 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
810 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
814 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
818 /*******************************************************************
820 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
824 * Function : fillPuschDmrsAddPos
827 * -checks the value with the bitmask and
828 * fills the cellPtr's PUSCH DmrsAddPos
830 * @params[in] Pointer to ClCellParam
831 * Value to be compared
834 ******************************************************************/
836 PUBLIC void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
838 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
840 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
842 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
844 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
846 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
848 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
850 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
852 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
856 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
860 /*******************************************************************
862 * @brief fills the PUSCH Mapping Type by comparing the bitmask
866 * Function : fillPuschMappingType
869 * -checks the value with the bitmask and
870 * fills the cellPtr's PUSCH MappingType
872 * @params[in] Pointer to ClCellParam
873 * Value to be compared
876 ******************************************************************/
878 PUBLIC void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
880 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
882 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
884 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
886 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
890 (*cellPtr)->puschMappingType = INVALID_VALUE;
894 /*******************************************************************
896 * @brief fills the PUSCH Allocation Type by comparing the bitmask
900 * Function : fillPuschAllocationType
903 * -checks the value with the bitmask and
904 * fills the cellPtr's PUSCH AllocationType
906 * @params[in] Pointer to ClCellParam
907 * Value to be compared
910 ******************************************************************/
912 PUBLIC void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
914 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
916 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
918 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
920 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
924 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
928 /*******************************************************************
930 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
934 * Function : fillPuschPrbMappingType
937 * -checks the value with the bitmask and
938 * fills the cellPtr's PUSCH PRB MApping Type
940 * @params[in] Pointer to ClCellParam
941 * Value to be compared
944 ******************************************************************/
946 PUBLIC void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
948 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
950 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
952 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
954 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
958 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
962 /*******************************************************************
964 * @brief fills the Modulation Order in Ul by comparing the bitmask
968 * Function : fillModulationOrderUl
971 * -checks the value with the bitmask and
972 * fills the cellPtr's Modualtsion Order in UL.
974 * @params[in] Pointer to ClCellParam
975 * Value to be compared
978 ******************************************************************/
980 PUBLIC void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
984 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
988 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
992 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
996 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1000 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1004 /*******************************************************************
1006 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1010 * Function : fillPuschAggregationFactor
1013 * -checks the value with the bitmask and
1014 * fills the cellPtr's PUSCH Aggregation Factor
1016 * @params[in] Pointer to ClCellParam
1017 * Value to be compared
1020 ******************************************************************/
1022 PUBLIC void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1024 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1026 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1028 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1030 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1032 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1034 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1036 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1038 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1042 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1046 /*******************************************************************
1048 * @brief fills the PRACH Long Format by comparing the bitmask
1052 * Function : fillPrachLongFormat
1055 * -checks the value with the bitmask and
1056 * fills the cellPtr's PRACH Long Format
1058 * @params[in] Pointer to ClCellParam
1059 * Value to be compared
1062 ******************************************************************/
1064 PUBLIC void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1066 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1068 (*cellPtr)->prachLongFormats = FORMAT_0;
1070 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1072 (*cellPtr)->prachLongFormats = FORMAT_1;
1074 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1076 (*cellPtr)->prachLongFormats = FORMAT_2;
1078 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1080 (*cellPtr)->prachLongFormats = FORMAT_3;
1084 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1088 /*******************************************************************
1090 * @brief fills the PRACH Short Format by comparing the bitmask
1094 * Function : fillPrachShortFormat
1097 * -checks the value with the bitmask and
1098 * fills the cellPtr's PRACH ShortFormat
1100 * @params[in] Pointer to ClCellParam
1101 * Value to be compared
1104 ******************************************************************/
1106 PUBLIC void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1108 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1110 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1112 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1114 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1116 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1118 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1120 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1122 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1124 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1126 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1128 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1132 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1136 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1140 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1146 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1150 /*******************************************************************
1152 * @brief fills the Fd Occasions Type by comparing the bitmask
1156 * Function : fillFdOccasions
1159 * -checks the value with the bitmask and
1160 * fills the cellPtr's Fd Occasions
1162 * @params[in] Pointer to ClCellParam
1163 * Value to be compared
1166 ******************************************************************/
1168 PUBLIC void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1172 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1176 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1180 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1184 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1188 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1192 /*******************************************************************
1194 * @brief fills the RSSI Measurement by comparing the bitmask
1198 * Function : fillRssiMeas
1201 * -checks the value with the bitmask and
1202 * fills the cellPtr's RSSI Measurement report
1204 * @params[in] Pointer to ClCellParam
1205 * Value to be compared
1208 ******************************************************************/
1210 PUBLIC void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1212 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1214 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1216 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1218 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1222 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1226 /*******************************************************************
1228 * @brief Returns the TLVs value
1232 * Function : getParamValue
1235 * -return TLVs value
1238 * @return ROK - temp
1241 * ****************************************************************/
1243 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1245 //uint16_t valueLen;
1247 //valueLen = tlv->tl.length;
1248 posPtr = &tlv->tl.tag;
1249 posPtr += sizeof(tlv->tl.tag);
1250 posPtr += sizeof(tlv->tl.length);
1251 /*TO DO: malloc to SSI memory */
1252 if(type == FAPI_UINT_8)
1254 //temp = (uint8_t *)malloc(valueLen * sizeof(U8));
1255 //memcpy(temp, posPtr, valueLen);
1256 return(*(uint8_t *)posPtr);
1258 else if(type == FAPI_UINT_16)
1260 return(*(uint16_t *)posPtr);
1262 else if(type == FAPI_UINT_32)
1264 return(*(uint32_t *)posPtr);
1268 DU_LOG("\nLWR_MAC: Value Extraction failed" );
1273 /*******************************************************************
1275 * @brief Sends FAPI Param req to PHY
1279 * Function : lwr_mac_procParamReqEvt
1282 * -Sends FAPI Param req to PHY
1285 * @return ROK - success
1288 * ****************************************************************/
1290 uint8_t lwr_mac_procParamReqEvt(void *msg)
1293 /* startGuardTimer(); */
1294 uint32_t msgLen = 0; //Length of message Body
1295 fapi_param_req_t *paramReq = NULL;
1297 LWR_MAC_ALLOC(paramReq, sizeof(fapi_param_req_t));
1298 if(paramReq != NULL)
1300 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, msgLen);
1302 DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
1303 LwrMacSendToPhy(paramReq->header.msg_id, \
1304 sizeof(fapi_param_req_t), (void *)paramReq);
1308 DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
1315 /*******************************************************************
1317 * @brief Sends FAPI Param Response to MAC via PHY
1321 * Function : lwr_mac_procParamRspEvt
1324 * -Sends FAPI Param rsp to MAC via PHY
1327 * @return ROK - success
1330 * ****************************************************************/
1332 uint8_t lwr_mac_procParamRspEvt(void *msg)
1335 /* stopGuardTimer(); */
1337 uint32_t encodedVal;
1338 fapi_param_resp_t *paramRsp;
1339 ClCellParam *cellParam = NULLP;
1341 paramRsp = (fapi_param_resp_t *)msg;
1342 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1344 if(paramRsp != NULLP)
1346 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1347 if(cellParam != NULLP)
1349 DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
1350 if(paramRsp->error_code == MSG_OK)
1352 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1354 switch(paramRsp->tlvs[index].tl.tag)
1356 case FAPI_RELEASE_CAPABILITY_TAG:
1357 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1358 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1360 cellParam->releaseCapability = RELEASE_15;
1364 case FAPI_PHY_STATE_TAG:
1365 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1366 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1368 printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1373 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1374 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1375 if(encodedVal != RFAILED && encodedVal != 0)
1377 cellParam->skipBlankDlConfig = SUPPORTED;
1381 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1385 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1386 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1387 if(encodedVal != RFAILED && encodedVal != 0)
1389 cellParam->skipBlankUlConfig = SUPPORTED;
1393 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1397 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1398 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1401 case FAPI_CYCLIC_PREFIX_TAG:
1402 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1403 if(encodedVal != RFAILED)
1405 fillCyclicPrefix(encodedVal, &cellParam);
1409 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1410 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1411 if(encodedVal != RFAILED)
1413 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1417 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1418 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1419 if(encodedVal != RFAILED)
1421 fillBandwidthDl(encodedVal, &cellParam);
1425 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1426 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1427 if(encodedVal != RFAILED)
1429 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1433 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1434 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1435 if(encodedVal != RFAILED)
1437 fillBandwidthUl(encodedVal, &cellParam);
1441 case FAPI_CCE_MAPPING_TYPE_TAG:
1442 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1443 if(encodedVal != RFAILED)
1445 fillCCEmaping(encodedVal, &cellParam);
1449 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1450 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1451 if(encodedVal != RFAILED && encodedVal != 0)
1453 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1457 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1461 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1462 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1463 if(encodedVal != RFAILED && encodedVal != 0)
1465 cellParam->precoderGranularityCoreset = SUPPORTED;
1469 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1473 case FAPI_PDCCH_MU_MIMO_TAG:
1474 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1475 if(encodedVal != RFAILED && encodedVal != 0)
1477 cellParam->pdcchMuMimo = SUPPORTED;
1481 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1485 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1486 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1487 if(encodedVal != RFAILED && encodedVal != 0)
1489 cellParam->pdcchPrecoderCycling = SUPPORTED;
1493 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1497 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1498 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1501 case FAPI_PUCCH_FORMATS_TAG:
1502 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1503 if(encodedVal != RFAILED)
1505 fillPucchFormat(encodedVal, &cellParam);
1509 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1510 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1513 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1514 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1515 if(encodedVal != RFAILED)
1517 fillPdschMappingType(encodedVal, &cellParam);
1521 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1522 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1523 if(encodedVal != RFAILED)
1525 fillPdschAllocationType(encodedVal, &cellParam);
1529 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1530 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1531 if(encodedVal != RFAILED)
1533 fillPrbMappingType(encodedVal, &cellParam);
1537 case FAPI_PDSCH_CBG_TAG:
1538 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1539 if(encodedVal != RFAILED && encodedVal != 0)
1541 cellParam->pdschCbg = SUPPORTED;
1545 cellParam->pdschCbg = NOT_SUPPORTED;
1549 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1550 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1551 if(encodedVal != RFAILED)
1553 fillPdschDmrsConfigType(encodedVal, &cellParam);
1557 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1558 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1559 if(encodedVal != RFAILED)
1561 fillPdschDmrsLength(encodedVal, &cellParam);
1565 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1566 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1567 if(encodedVal != RFAILED)
1569 fillPdschDmrsAddPos(encodedVal, &cellParam);
1573 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1574 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1577 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1578 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1579 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1581 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1585 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1586 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1587 if(encodedVal != RFAILED)
1589 fillModulationOrderDl(encodedVal, &cellParam);
1593 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1594 cellParam->maxMuMimoUsersDl = \
1595 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1598 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1599 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1600 if(encodedVal != RFAILED && encodedVal != 0)
1602 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1606 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1610 case FAPI_PREMPTIONSUPPORT_TAG:
1611 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1612 if(encodedVal != RFAILED && encodedVal != 0)
1614 cellParam->premptionSupport = SUPPORTED;
1618 cellParam->premptionSupport = NOT_SUPPORTED;
1622 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1623 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1624 if(encodedVal != RFAILED && encodedVal != 0)
1626 cellParam->pdschNonSlotSupport = SUPPORTED;
1630 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1634 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1635 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1636 if(encodedVal != RFAILED && encodedVal != 0)
1638 cellParam->uciMuxUlschInPusch = SUPPORTED;
1642 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1646 case FAPI_UCI_ONLY_PUSCH_TAG:
1647 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1648 if(encodedVal != RFAILED && encodedVal != 0)
1650 cellParam->uciOnlyPusch = SUPPORTED;
1654 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1658 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1659 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1660 if(encodedVal != RFAILED && encodedVal != 0)
1662 cellParam->puschFrequencyHopping = SUPPORTED;
1666 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1670 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1671 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1672 if(encodedVal != RFAILED)
1674 fillPuschDmrsConfig(encodedVal, &cellParam);
1678 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1679 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1680 if(encodedVal != RFAILED)
1682 fillPuschDmrsLength(encodedVal, &cellParam);
1686 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1687 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1688 if(encodedVal != RFAILED)
1690 fillPuschDmrsAddPos(encodedVal, &cellParam);
1694 case FAPI_PUSCH_CBG_TAG:
1695 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1696 if(encodedVal != RFAILED && encodedVal != 0)
1698 cellParam->puschCbg = SUPPORTED;
1702 cellParam->puschCbg = NOT_SUPPORTED;
1706 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1707 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1708 if(encodedVal != RFAILED)
1710 fillPuschMappingType(encodedVal, &cellParam);
1714 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1715 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1716 if(encodedVal != RFAILED)
1718 fillPuschAllocationType(encodedVal, &cellParam);
1722 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1723 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1724 if(encodedVal != RFAILED)
1726 fillPuschPrbMappingType(encodedVal, &cellParam);
1730 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1731 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1732 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1734 cellParam->puschMaxPtrsPorts = encodedVal;
1738 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1739 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1742 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1743 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1746 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1747 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1748 if(encodedVal != RFAILED)
1750 fillModulationOrderUl(encodedVal, &cellParam);
1754 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1755 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1758 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1759 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1760 if(encodedVal != RFAILED && encodedVal != 0)
1762 cellParam->dftsOfdmSupport = SUPPORTED;
1766 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1770 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1771 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1772 if(encodedVal != RFAILED)
1774 fillPuschAggregationFactor(encodedVal, &cellParam);
1778 case FAPI_PRACH_LONG_FORMATS_TAG:
1779 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1780 if(encodedVal != RFAILED)
1782 fillPrachLongFormat(encodedVal, &cellParam);
1786 case FAPI_PRACH_SHORT_FORMATS_TAG:
1787 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1788 if(encodedVal != RFAILED)
1790 fillPrachShortFormat(encodedVal, &cellParam);
1794 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1795 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1796 if(encodedVal != RFAILED && encodedVal != 0)
1798 cellParam->prachRestrictedSets = SUPPORTED;
1802 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1806 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1807 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1808 if(encodedVal != RFAILED)
1810 fillFdOccasions(encodedVal, &cellParam);
1814 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1815 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1816 if(encodedVal != RFAILED)
1818 fillRssiMeas(encodedVal, &cellParam);
1822 //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1826 MAC_FREE(cellParam, sizeof(ClCellParam));
1827 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1832 DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
1838 DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
1844 DU_LOG("\nLWR_MAC: Param Response received from PHY is NULL");
1852 /*******************************************************************
1854 * @brief Sends FAPI Config req to PHY
1858 * Function : lwr_mac_procConfigReqEvt
1861 * -Sends FAPI Config Req to PHY
1864 * @return ROK - success
1867 * ****************************************************************/
1869 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1876 uint32_t msgLen = 0;
1877 MacCellCfg macCfgParams;
1878 fapi_config_req_t *configReq;
1880 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1883 cellId = (uint16_t *)msg;
1884 GET_CELL_IDX(*cellId, cellIdx);
1885 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
1887 /* Fill Cell Configuration in lwrMacCb */
1888 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
1889 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
1890 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
1893 /* Fill FAPI config req */
1894 LWR_MAC_ALLOC(configReq, sizeof(fapi_config_req_t));
1895 if(configReq != NULL)
1897 memset(configReq, 0, sizeof(fapi_config_req_t));
1898 msgLen = sizeof(macCfgParams.numTlv);
1899 configReq->number_of_tlvs = macCfgParams.numTlv;
1901 if(macCfgParams.dlCarrCfg.pres)
1903 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
1904 sizeof(uint16_t), macCfgParams.dlCarrCfg.bw, &msgLen);
1905 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
1906 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
1907 fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
1908 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
1909 fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
1910 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
1911 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
1912 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
1914 if(macCfgParams.ulCarrCfg.pres)
1916 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
1917 sizeof(uint16_t), macCfgParams.ulCarrCfg.bw, &msgLen);
1918 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
1919 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
1920 fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
1921 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
1922 fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
1923 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
1924 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
1925 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
1927 fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
1928 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
1930 /* fill cell config */
1931 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
1932 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
1933 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
1934 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
1936 /* fill SSB configuration */
1937 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
1938 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
1939 fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
1940 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
1941 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
1942 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
1944 /* fill PRACH configuration */
1945 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
1946 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
1947 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
1948 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
1949 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
1950 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
1951 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
1952 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
1953 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
1954 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
1955 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
1956 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
1957 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
1958 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
1959 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
1960 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
1961 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
1962 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
1963 if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
1965 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
1966 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
1967 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
1972 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
1975 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
1976 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
1977 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
1978 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
1980 /* fill SSB table */
1981 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
1982 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
1983 fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
1984 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
1985 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
1986 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
1987 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
1988 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
1989 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
1990 sizeof(uint32_t), macCfgParams.ssbCfg.mibPdu[0], &msgLen);
1991 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
1992 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
1993 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
1994 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
1995 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
1996 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
1997 fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
1998 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2000 /* fill TDD table */
2001 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2002 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2003 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2004 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
2006 /* fill measurement config */
2007 fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2008 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2010 /* fill DMRS Type A Pos */
2011 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2012 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2014 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, \
2015 (sizeof(fapi_config_req_t) - sizeof(fapi_msg_t)));
2017 DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
2018 LwrMacSendToPhy(configReq->header.msg_id, sizeof(fapi_config_req_t), (void *)configReq);
2022 DU_LOG("\nLWR_MAC: Failed to allocate memory for config Request");
2028 } /* lwr_mac_handleConfigReqEvt */
2030 /*******************************************************************
2032 * @brief Processes config response from phy
2036 * Function : lwr_mac_procConfigRspEvt
2039 * Processes config response from phy
2041 * @params[in] FAPI message pointer
2042 * @return ROK - success
2045 * ****************************************************************/
2047 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2050 fapi_config_resp_t *configRsp;
2051 configRsp = (fapi_config_resp_t *)msg;
2053 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2056 if(configRsp != NULL)
2058 if(configRsp->error_code == MSG_OK)
2060 DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
2061 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2062 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2064 * Store config response into an intermediate struture and send to MAC
2065 * Support LC and LWLC for sending config rsp to MAC
2067 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2071 DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
2077 DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
2083 } /* lwr_mac_procConfigRspEvt */
2085 /*******************************************************************
2087 * @brief Build and send start request to phy
2091 * Function : lwr_mac_procStartReqEvt
2094 * Build and send start request to phy
2096 * @params[in] FAPI message pointer
2097 * @return ROK - success
2100 * ****************************************************************/
2101 uint8_t lwr_mac_procStartReqEvt(void *msg)
2104 uint32_t msgLen = 0;
2105 fapi_start_req_t *startReq;
2107 LWR_MAC_ALLOC(startReq, sizeof(fapi_start_req_t));
2108 if(startReq != NULL)
2110 memset(startReq, 0, sizeof(fapi_start_req_t));
2111 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, msgLen);
2113 DU_LOG("\nLWR_MAC: Sending Start Request to PHY");
2114 LwrMacSendToPhy(startReq->header.msg_id, sizeof(fapi_start_req_t),\
2119 DU_LOG("\nLWR_MAC: Failed to allocate memory for Start Request");
2124 } /* lwr_mac_procStartReqEvt */
2126 /*******************************************************************
2128 * @brief Sends FAPI Stop Req to PHY
2132 * Function : lwr_mac_procStopReqEvt
2135 * -Sends FAPI Stop Req to PHY
2138 * @return ROK - success
2141 ********************************************************************/
2143 uint8_t lwr_mac_procStopReqEvt(void *msg)
2146 uint32_t msgLen = 0;
2147 fapi_stop_req_t *stopReq = NULLP;
2148 LWR_MAC_ALLOC(stopReq, sizeof(fapi_stop_req_t));
2149 if(stopReq != NULLP)
2151 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2152 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, msgLen);
2153 DU_LOG("\nLOWER MAC: Sending Stop Request to PHY");
2154 LwrMacSendToPhy(stopReq->header.msg_id, sizeof(fapi_stop_req_t), (void *)stopReq);
2158 DU_LOG("\nLOWER MAC: Failed to allocate memory for Stop Request");
2165 /*******************************************************************
2167 * @brief Modifes the received mibPdu to uint32 bit
2168 * and stores it in MacCellCfg
2172 * Function : setMibPdu
2177 * @params[in] Pointer to mibPdu
2178 * pointer to modified value
2179 ******************************************************************/
2181 PUBLIC void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
2183 *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
2184 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
2185 DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
2189 /*******************************************************************
2191 * @brief fills SSB PDU required for DL TTI info in MAC
2195 * Function : fillSsbPdu
2198 * -Fills the SSB PDU info
2201 * @params[in] Pointer to FAPI DL TTI Req
2202 * Pointer to RgCellCb
2203 * Pointer to msgLen of DL TTI Info
2206 ******************************************************************/
2208 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2209 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2211 uint32_t mibPayload = 0;
2212 if(dlTtiReqPdu != NULL)
2214 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2215 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2216 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2217 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2218 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2219 /* ssbOfPdufstA to be filled in ssbCfg */
2220 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2221 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2222 /* Bit manipulation for SFN */
2223 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2224 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2225 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2226 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2227 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2228 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2229 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2230 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2231 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2238 /*******************************************************************
2240 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2244 * Function : fillSib1DlDciPdu
2247 * -Fills the Dl DCI PDU
2249 * @params[in] Pointer to fapi_dl_dci_t
2250 * Pointer to PdcchCfg
2253 ******************************************************************/
2255 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2257 if(dlDciPtr != NULLP)
2263 uint16_t coreset0Size;
2266 uint32_t freqDomResAssign;
2267 uint32_t timeDomResAssign;
2269 uint32_t modNCodScheme;
2270 uint8_t redundancyVer;
2271 uint32_t sysInfoInd;
2274 /* Size(in bits) of each field in DCI format 0_1
2275 * as mentioned in spec 38.214 */
2276 uint8_t freqDomResAssignSize;
2277 uint8_t timeDomResAssignSize = 4;
2278 uint8_t VRB2PRBMapSize = 1;
2279 uint8_t modNCodSchemeSize = 5;
2280 uint8_t redundancyVerSize = 2;
2281 uint8_t sysInfoIndSize = 1;
2282 uint8_t reservedSize = 15;
2284 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2285 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2286 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2287 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2288 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2289 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2290 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2291 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2292 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2293 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2294 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2295 dlDciPtr->powerControlOfssetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2297 /* Calculating freq domain resource allocation field value and size
2298 * coreset0Size = Size of coreset 0
2299 * RBStart = Starting Virtual Rsource block
2300 * RBLen = length of contiguously allocted RBs
2301 * Spec 38.214 Sec 5.1.2.2.2
2303 coreset0Size= sib1PdcchInfo->coreset0Cfg.coreSetSize;
2304 rbStart = 0; /* For SIB1 */
2305 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2306 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2308 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2310 if((rbLen - 1) <= floor(coreset0Size / 2))
2311 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2313 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2314 + (coreset0Size - 1 - rbStart);
2316 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2319 /* Fetching DCI field values */
2320 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2322 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2324 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2325 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2326 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2329 /* Reversing bits in each DCI field */
2330 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2331 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2332 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2333 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2334 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2335 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2337 /* Calulating total number of bytes in buffer */
2338 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2339 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2340 + sysInfoIndSize + reservedSize;
2342 numBytes = dlDciPtr->payloadSizeBits / 8;
2343 if(dlDciPtr->payloadSizeBits % 8)
2346 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2348 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2352 /* Initialize buffer */
2353 for(bytePos = 0; bytePos < numBytes; bytePos++)
2354 dlDciPtr->payload[bytePos] = 0;
2356 bytePos = numBytes - 1;
2359 /* Packing DCI format fields */
2360 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2361 freqDomResAssign, freqDomResAssignSize);
2362 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2363 timeDomResAssign, timeDomResAssignSize);
2364 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2365 VRB2PRBMap, VRB2PRBMapSize);
2366 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2367 modNCodScheme, modNCodSchemeSize);
2368 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2369 redundancyVer, redundancyVerSize);
2370 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2371 sysInfoInd, sysInfoIndSize);
2372 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2373 reserved, reservedSize);
2376 } /* fillSib1DlDciPdu */
2378 /*******************************************************************
2380 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2384 * Function : fillRarDlDciPdu
2387 * -Fills the Dl DCI PDU
2389 * @params[in] Pointer to fapi_dl_dci_t
2390 * Pointer to PdcchCfg
2393 ******************************************************************/
2395 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2397 if(dlDciPtr != NULLP)
2403 uint16_t coreset0Size;
2406 uint32_t freqDomResAssign;
2407 uint8_t timeDomResAssign;
2409 uint8_t modNCodScheme;
2413 /* Size(in bits) of each field in DCI format 1_0 */
2414 uint8_t freqDomResAssignSize;
2415 uint8_t timeDomResAssignSize = 4;
2416 uint8_t VRB2PRBMapSize = 1;
2417 uint8_t modNCodSchemeSize = 5;
2418 uint8_t tbScalingSize = 2;
2419 uint8_t reservedSize = 16;
2421 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2422 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2423 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2424 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2425 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2426 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2427 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2428 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2429 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2430 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2431 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2432 dlDciPtr->powerControlOfssetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2434 /* Calculating freq domain resource allocation field value and size
2435 * coreset0Size = Size of coreset 0
2436 * RBStart = Starting Virtual Rsource block
2437 * RBLen = length of contiguously allocted RBs
2438 * Spec 38.214 Sec 5.1.2.2.2
2441 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2442 coreset0Size= rarPdcchInfo->coreset0Cfg.coreSetSize;
2443 rbStart = 0; /* For SIB1 */
2444 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2445 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2447 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2449 if((rbLen - 1) <= floor(coreset0Size / 2))
2450 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2452 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2453 + (coreset0Size - 1 - rbStart);
2455 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2458 /* Fetching DCI field values */
2459 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2460 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2461 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2462 tbScaling = 0; /* configured to 0 scaling */
2465 /* Reversing bits in each DCI field */
2466 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2467 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2468 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2469 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2470 tbScaling = reverseBits(tbScaling, tbScalingSize);
2472 /* Calulating total number of bytes in buffer */
2473 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2474 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2476 numBytes = dlDciPtr->payloadSizeBits / 8;
2477 if(dlDciPtr->payloadSizeBits % 8)
2480 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2482 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2486 /* Initialize buffer */
2487 for(bytePos = 0; bytePos < numBytes; bytePos++)
2488 dlDciPtr->payload[bytePos] = 0;
2490 bytePos = numBytes - 1;
2493 /* Packing DCI format fields */
2494 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2495 freqDomResAssign, freqDomResAssignSize);
2496 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2497 timeDomResAssign, timeDomResAssignSize);
2498 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2499 VRB2PRBMap, VRB2PRBMapSize);
2500 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2501 modNCodScheme, modNCodSchemeSize);
2502 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2503 tbScaling, tbScalingSize);
2504 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2505 reserved, reservedSize);
2507 } /* fillRarDlDciPdu */
2509 /*******************************************************************
2511 * @brief fills msg4 Dl DCI PDU required for DL TTI info in MAC
2515 * Function : fillMsg4DlDciPdu
2518 * -Fills the Msg4 Dl DCI PDU
2520 * @params[in] Pointer to fapi_dl_dci_t
2521 * Pointer to PdcchCfg
2524 ******************************************************************/
2525 void fillMsg4DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *msg4PdcchInfo,\
2528 if(dlDciPtr != NULLP)
2534 uint16_t coreset0Size = 0;
2535 uint16_t rbStart = 0;
2537 uint8_t dciFormatId;
2538 uint32_t freqDomResAssign;
2539 uint8_t timeDomResAssign;
2541 uint8_t modNCodScheme;
2543 uint8_t redundancyVer = 0;
2544 uint8_t harqProcessNum = 0;
2545 uint8_t dlAssignmentIdx = 0;
2546 uint8_t pucchTpc = 0;
2547 uint8_t pucchResoInd = 0;
2548 uint8_t harqFeedbackInd = 0;
2550 /* Size(in bits) of each field in DCI format 1_0 */
2551 uint8_t dciFormatIdSize = 1;
2552 uint8_t freqDomResAssignSize;
2553 uint8_t timeDomResAssignSize = 4;
2554 uint8_t VRB2PRBMapSize = 1;
2555 uint8_t modNCodSchemeSize = 5;
2556 uint8_t ndiSize = 1;
2557 uint8_t redundancyVerSize = 2;
2558 uint8_t harqProcessNumSize = 4;
2559 uint8_t dlAssignmentIdxSize = 2;
2560 uint8_t pucchTpcSize = 2;
2561 uint8_t pucchResoIndSize = 3;
2562 uint8_t harqFeedbackIndSize = 3;
2564 dlDciPtr->rnti = msg4PdcchInfo->dci.rnti;
2565 dlDciPtr->scramblingId = msg4PdcchInfo->dci.scramblingId;
2566 dlDciPtr->scramblingRnti = msg4PdcchInfo->dci.scramblingRnti;
2567 dlDciPtr->cceIndex = msg4PdcchInfo->dci.cceIndex;
2568 dlDciPtr->aggregationLevel = msg4PdcchInfo->dci.aggregLevel;
2569 dlDciPtr->pc_and_bform.numPrgs = msg4PdcchInfo->dci.beamPdcchInfo.numPrgs;
2570 dlDciPtr->pc_and_bform.prgSize = msg4PdcchInfo->dci.beamPdcchInfo.prgSize;
2571 dlDciPtr->pc_and_bform.digBfInterfaces = msg4PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2572 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2573 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2574 dlDciPtr->beta_pdcch_1_0 = msg4PdcchInfo->dci.txPdcchPower.powerValue;
2575 dlDciPtr->powerControlOfssetSS = msg4PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2577 /* Calculating freq domain resource allocation field value and size
2578 * coreset0Size = Size of coreset 0
2579 * RBStart = Starting Virtual Rsource block
2580 * RBLen = length of contiguously allocted RBs
2581 * Spec 38.214 Sec 5.1.2.2.2
2584 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2585 coreset0Size = msg4PdcchInfo->coreset0Cfg.coreSetSize;
2586 //rbStart = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2587 rbLen = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2589 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2591 if((rbLen - 1) <= floor(coreset0Size / 2))
2592 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2594 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2595 + (coreset0Size - 1 - rbStart);
2597 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2600 /* Fetching DCI field values */
2601 dciFormatId = msg4Info->dciFormatId; /* DCI indentifier for DL */
2602 timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2603 VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2604 modNCodScheme = msg4PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2605 ndi = msg4Info->ndi;
2606 redundancyVer = msg4PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2607 harqProcessNum = msg4Info->harqProcNum;
2608 dlAssignmentIdx = msg4Info->dlAssignIdx;
2609 pucchTpc = msg4Info->pucchTpc;
2610 pucchResoInd = msg4Info->pucchResInd;
2611 harqFeedbackInd = msg4Info->harqFeedbackInd;
2613 /* Reversing bits in each DCI field */
2614 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2615 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2616 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2617 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2618 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2619 ndi = reverseBits(ndi, ndiSize);
2620 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2621 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2622 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2623 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2624 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2625 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2628 /* Calulating total number of bytes in buffer */
2629 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2630 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2631 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2632 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2634 numBytes = dlDciPtr->payloadSizeBits / 8;
2635 if(dlDciPtr->payloadSizeBits % 8)
2638 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2640 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2644 /* Initialize buffer */
2645 for(bytePos = 0; bytePos < numBytes; bytePos++)
2646 dlDciPtr->payload[bytePos] = 0;
2648 bytePos = numBytes - 1;
2651 /* Packing DCI format fields */
2652 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2653 dciFormatId, dciFormatIdSize);
2654 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2655 freqDomResAssign, freqDomResAssignSize);
2656 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2657 timeDomResAssign, timeDomResAssignSize);
2658 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2659 VRB2PRBMap, VRB2PRBMapSize);
2660 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2661 modNCodScheme, modNCodSchemeSize);
2662 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2664 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2665 redundancyVer, redundancyVerSize);
2666 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2667 redundancyVer, redundancyVerSize);
2668 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2669 harqProcessNum, harqProcessNumSize);
2670 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2671 dlAssignmentIdx, dlAssignmentIdxSize);
2672 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2673 pucchTpc, pucchTpcSize);
2674 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2675 pucchResoInd, pucchResoIndSize);
2676 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2677 harqFeedbackInd, harqFeedbackIndSize);
2679 } /* fillMsg4DlDciPdu */
2681 /*******************************************************************
2683 * @brief fills PDCCH PDU required for DL TTI info in MAC
2687 * Function : fillPdcchPdu
2690 * -Fills the Pdcch PDU info
2693 * @params[in] Pointer to FAPI DL TTI Req
2694 * Pointer to PdcchCfg
2697 ******************************************************************/
2698 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2699 RntiType rntiType, uint8_t coreSetType)
2701 if(dlTtiReqPdu != NULLP)
2703 PdcchCfg *pdcchInfo = NULLP;
2704 BwpCfg *bwp = NULLP;
2706 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2707 if(rntiType == SI_RNTI_TYPE)
2709 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2710 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2711 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2713 else if(rntiType == RA_RNTI_TYPE)
2715 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2716 bwp = &dlInfo->rarAlloc->bwp;
2717 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2719 else if(rntiType == TC_RNTI_TYPE)
2721 pdcchInfo = &dlInfo->msg4Alloc->msg4PdcchCfg;
2722 bwp = &dlInfo->msg4Alloc->bwp;
2723 fillMsg4DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2724 &dlInfo->msg4Alloc->msg4Info);
2728 DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
2731 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2732 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2733 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2734 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2735 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2736 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coreset0Cfg.startSymbolIndex;
2737 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coreset0Cfg.durationSymbols;
2738 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coreset0Cfg.freqDomainResource, 6);
2739 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coreset0Cfg.cceRegMappingType;
2740 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coreset0Cfg.regBundleSize;
2741 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coreset0Cfg.interleaverSize;
2742 dlTtiReqPdu->pdu.pdcch_pdu.coreSetSize = pdcchInfo->coreset0Cfg.coreSetType;
2743 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coreset0Cfg.shiftIndex;
2744 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coreset0Cfg.precoderGranularity;
2745 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2746 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2748 /* Calculating PDU length. Considering only one dl dci pdu for now */
2749 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2755 /*******************************************************************
2757 * @brief fills PDSCH PDU required for DL TTI info in MAC
2761 * Function : fillPdschPdu
2764 * -Fills the Pdsch PDU info
2767 * @params[in] Pointer to FAPI DL TTI Req
2768 * Pointer to PdschCfg
2769 * Pointer to msgLen of DL TTI Info
2772 ******************************************************************/
2774 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2775 BwpCfg bwp, uint16_t pduIndex)
2779 if(dlTtiReqPdu != NULLP)
2781 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2782 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2783 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2784 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2785 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2786 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
2787 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
2788 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
2789 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
2790 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
2791 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
2793 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
2794 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
2795 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
2796 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
2797 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
2798 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
2800 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
2801 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
2802 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
2803 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
2804 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
2805 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
2806 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
2807 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
2808 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
2809 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
2810 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
2811 /* since we are using type-1, hence rbBitmap excluded */
2812 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
2813 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
2814 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
2815 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
2816 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
2817 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
2818 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
2819 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
2820 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2821 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
2822 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2823 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
2824 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
2825 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
2826 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
2827 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
2828 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
2830 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
2834 /***********************************************************************
2836 * @brief calculates the total size to be allocated for DL TTI Req
2840 * Function : calcDlTtiReqPduCount
2843 * -calculates the total pdu count to be allocated for DL TTI Req
2845 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2848 * ********************************************************************/
2849 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
2854 if(dlInfo->isBroadcastPres)
2856 if(dlInfo->brdcstAlloc.ssbTrans)
2858 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
2860 /* SSB PDU is filled */
2864 if(dlInfo->brdcstAlloc.sib1Trans)
2866 /* PDCCH and PDSCH PDU is filled */
2870 if(dlInfo->rarAlloc != NULLP)
2872 /* PDCCH and PDSCH PDU is filled */
2875 if(dlInfo->msg4Alloc != NULLP)
2877 /* PDCCH and PDSCH PDU is filled */
2884 /***********************************************************************
2886 * @brief calculates the total size to be allocated for DL TTI Req
2890 * Function : calcTxDataReqPduCount
2893 * -calculates the total pdu count to be allocated for DL TTI Req
2895 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2898 * ********************************************************************/
2899 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
2903 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
2907 if(dlInfo->rarAlloc != NULLP)
2911 if(dlInfo->msg4Alloc != NULLP)
2918 /***********************************************************************
2920 * @brief fills the SIB1 TX-DATA request message
2924 * Function : fillSib1TxDataReq
2927 * - fills the SIB1 TX-DATA request message
2929 * @params[in] fapi_tx_pdu_desc_t *pduDesc
2930 * @params[in] macCellCfg consist of SIB1 pdu
2931 * @params[in] uint32_t *msgLen
2932 * @params[in] uint16_t pduIndex
2935 * ********************************************************************/
2936 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
2939 uint32_t pduLen = 0;
2940 uint8_t *sib1TxdataValue = NULLP;
2942 pduDesc[pduIndex].pdu_index = pduIndex;
2943 pduDesc[pduIndex].num_tlvs = 1;
2946 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
2947 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
2948 pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
2949 LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
2950 if(sib1TxdataValue == NULLP)
2954 memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
2955 macCellCfg->sib1Cfg.sib1PduLen);
2956 pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
2958 /* The total length of the PDU description and PDU data */
2959 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
2960 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
2961 pduDesc[pduIndex].pdu_length = pduLen;
2964 MAC_FREE(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
2970 /***********************************************************************
2972 * @brief fills the RAR TX-DATA request message
2976 * Function : fillRarTxDataReq
2979 * - fills the RAR TX-DATA request message
2981 * @params[in] fapi_tx_pdu_desc_t *pduDesc
2982 * @params[in] RarInfo *rarInfo
2983 * @params[in] uint32_t *msgLen
2984 * @params[in] uint16_t pduIndex
2987 * ********************************************************************/
2988 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
2991 uint32_t pduLen = 0;
2992 uint8_t *rarTxdataValue = NULLP;
2994 pduDesc[pduIndex].pdu_index = pduIndex;
2995 pduDesc[pduIndex].num_tlvs = 1;
2998 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
2999 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3000 pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3001 LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3002 if(rarTxdataValue == NULLP)
3006 memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3007 pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3009 /* The total length of the PDU description and PDU data */
3010 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3011 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3012 pduDesc[pduIndex].pdu_length = pduLen;
3014 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3015 * But since we did not implement WLS, this has to be done here
3018 MAC_FREE(rarTxdataValue,rarInfo->rarPduLen);
3024 /***********************************************************************
3026 * @brief fills the Msg4 TX-DATA request message
3030 * Function : fillMsg4TxDataReq
3033 * - fills the Msg4 TX-DATA request message
3035 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3036 * @params[in] Msg4Info *msg4Info
3037 * @params[in] uint32_t *msgLen
3038 * @params[in] uint16_t pduIndex
3041 * ********************************************************************/
3042 uint8_t fillMsg4TxDataReq(fapi_tx_pdu_desc_t *pduDesc, Msg4Info *msg4Info,
3045 uint32_t pduLen = 0;
3046 uint8_t *msg4TxDataValue = NULLP;
3048 pduDesc[pduIndex].pdu_index = pduIndex;
3049 pduDesc[pduIndex].num_tlvs = 1;
3052 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3053 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3054 pduDesc[pduIndex].tlvs[0].tl.length = msg4Info->msg4PduLen;
3055 LWR_MAC_ALLOC(msg4TxDataValue, msg4Info->msg4PduLen);
3056 if(msg4TxDataValue == NULLP)
3060 memcpy(msg4TxDataValue, msg4Info->msg4Pdu, msg4Info->msg4PduLen);
3061 pduDesc[pduIndex].tlvs[0].value = msg4TxDataValue;
3063 /* The total length of the PDU description and PDU data */
3064 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3065 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3066 pduDesc[pduIndex].pdu_length = pduLen;
3068 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3069 * But since we did not implement WLS, this has to be done here
3072 MAC_FREE(msg4TxDataValue, msg4Info->msg4PduLen);
3079 /*******************************************************************
3081 * @brief Sends DL TTI Request to PHY
3085 * Function : fillDlTtiReq
3088 * -Sends FAPI DL TTI req to PHY
3090 * @params[in] timing info
3091 * @return ROK - success
3094 * ****************************************************************/
3095 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3100 uint8_t numPduEncoded = 0;
3102 uint16_t pduIndex = 0;
3103 uint32_t msgLen = 0;
3105 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3106 SlotIndInfo dlTtiReqTimingInfo;
3108 MacDlSlot *currDlSlot = NULLP;
3109 MacCellCfg macCellCfg;
3110 memset(&macCellCfg, 0, sizeof(MacCellCfg));
3113 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3115 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3116 /* consider phy delay */
3117 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3119 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3121 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3122 nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
3123 LWR_MAC_ALLOC(dlTtiReq, sizeof(fapi_dl_tti_req_t));
3124 if(dlTtiReq != NULLP)
3126 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3127 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3128 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3129 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3130 nPdu = dlTtiReq->nPdus;
3131 dlTtiReq->nGroup = 0;
3133 if(dlTtiReq->nPdus > 0)
3135 if(currDlSlot->dlInfo.isBroadcastPres)
3137 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3139 if(dlTtiReq->pdus != NULLP)
3141 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3143 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3144 currDlSlot, idx, dlTtiReq->sfn);
3148 printf("\033[1;31m");
3149 DU_LOG("\nLWR_MAC: MIB sent..");
3152 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3154 /* Filling SIB1 param */
3155 if(numPduEncoded != nPdu)
3157 rntiType = SI_RNTI_TYPE;
3158 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3159 rntiType, CORESET_TYPE0);
3161 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3162 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3163 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3168 printf("\033[1;34m");
3169 DU_LOG("\nLWR_MAC: SIB1 sent...");
3173 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3175 /* Filling RAR param */
3176 rntiType = RA_RNTI_TYPE;
3177 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3178 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3180 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3181 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3182 currDlSlot->dlInfo.rarAlloc->bwp,
3187 printf("\033[1;32m");
3188 DU_LOG("\nLWR_MAC: RAR sent...");
3191 if(currDlSlot->dlInfo.msg4Alloc != NULLP)
3193 /* Filling Msg4 param */
3194 rntiType = TC_RNTI_TYPE;
3195 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3196 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3198 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3199 &currDlSlot->dlInfo.msg4Alloc->msg4PdschCfg,
3200 currDlSlot->dlInfo.msg4Alloc->bwp,
3205 printf("\033[1;32m");
3206 DU_LOG("\nLWR_MAC: MSG4 sent...");
3209 msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
3210 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
3211 LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), \
3214 /* send Tx-DATA req message */
3215 sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3219 msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
3220 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
3221 LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), (void *)dlTtiReq);
3223 memset(currDlSlot, 0, sizeof(MacDlSlot));
3228 DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
3229 memset(currDlSlot, 0, sizeof(MacDlSlot));
3235 lwr_mac_procInvalidEvt(&currTimingInfo);
3242 /*******************************************************************
3244 * @brief Sends TX data Request to PHY
3248 * Function : sendTxDataReq
3251 * -Sends FAPI TX data req to PHY
3253 * @params[in] timing info
3254 * @return ROK - success
3257 * ****************************************************************/
3258 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3263 uint32_t msgLen = 0;
3264 uint16_t pduIndex = 0;
3265 uint32_t txDataReqMsgSize = 0;
3266 fapi_tx_data_req_t *txDataReq = NULLP;
3268 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3270 /* send TX_Data request message */
3271 nPdu = calcTxDataReqPduCount(dlInfo);
3274 txDataReqMsgSize = sizeof(fapi_tx_data_req_t);
3275 if(dlInfo->brdcstAlloc.sib1Trans)
3277 txDataReqMsgSize += macCb.macCell[cellIdx]->macCellCfg.sib1Cfg.sib1PduLen;
3279 if(dlInfo->rarAlloc != NULLP)
3281 txDataReqMsgSize += dlInfo->rarAlloc->rarInfo.rarPduLen;
3283 if(dlInfo->msg4Alloc != NULLP)
3285 txDataReqMsgSize += dlInfo->msg4Alloc->msg4Info.msg4PduLen;
3288 LWR_MAC_ALLOC(txDataReq, txDataReqMsgSize);
3289 if(txDataReq == NULLP)
3291 DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
3295 memset(txDataReq, 0, txDataReqMsgSize);
3296 txDataReq->sfn = currTimingInfo.sfn;
3297 txDataReq->slot = currTimingInfo.slot;
3298 if(dlInfo->brdcstAlloc.sib1Trans)
3300 fillSib1TxDataReq(txDataReq->pdu_desc,
3301 &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3303 txDataReq->num_pdus++;
3305 if(dlInfo->rarAlloc != NULLP)
3307 fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3309 txDataReq->num_pdus++;
3311 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3312 dlInfo->rarAlloc = NULLP;
3314 if(dlInfo->msg4Alloc != NULLP && dlInfo->msg4Alloc->msg4Info.msg4Pdu != NULLP)
3316 fillMsg4TxDataReq(txDataReq->pdu_desc, &dlInfo->msg4Alloc->\
3317 msg4Info, pduIndex);
3319 txDataReq->num_pdus++;
3321 MAC_FREE(dlInfo->msg4Alloc->msg4Info.msg4Pdu,\
3322 dlInfo->msg4Alloc->msg4Info.msg4PduLen);
3323 dlInfo->msg4Alloc->msg4Info.msg4Pdu = NULLP;
3324 MAC_FREE(dlInfo->msg4Alloc,sizeof(Msg4Alloc));
3325 dlInfo->msg4Alloc = NULLP;
3327 msgLen = txDataReqMsgSize - sizeof(fapi_msg_t);
3328 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, msgLen);
3329 LwrMacSendToPhy(txDataReq->header.msg_id, txDataReqMsgSize, \
3336 /***********************************************************************
3338 * @brief calculates the total size to be allocated for UL TTI Req
3342 * Function : getnPdus
3345 * -calculates the total pdu count to be allocated for UL TTI Req
3347 * @params[in] Pointer to fapi Ul TTI Req
3348 * Pointer to CurrUlSlot
3350 * ********************************************************************/
3352 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3354 uint8_t pduCount = 0;
3356 if(ulTtiReq && currUlSlot)
3358 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3361 ulTtiReq->rachPresent++;
3363 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3368 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3373 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3378 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3387 /***********************************************************************
3389 * @brief Set the value of zero correlation config in PRACH PDU
3393 * Function : setNumCs
3396 * -Set the value of zero correlation config in PRACH PDU
3398 * @params[in] Pointer to zero correlation config
3399 * Pointer to MacCellCfg
3400 * ********************************************************************/
3402 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3406 if(macCellCfg != NULLP)
3408 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3409 *numCs = UnrestrictedSetNcsTable[idx];
3414 /***********************************************************************
3416 * @brief Fills the PRACH PDU in UL TTI Request
3420 * Function : fillPrachPdu
3423 * -Fills the PRACH PDU in UL TTI Request
3425 * @params[in] Pointer to Prach Pdu
3426 * Pointer to CurrUlSlot
3427 * Pointer to macCellCfg
3429 * ********************************************************************/
3432 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3434 if(ulTtiReqPdu != NULLP)
3436 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3437 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3438 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3439 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3440 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3441 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3442 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3443 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3444 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3445 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3446 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3447 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3448 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3449 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3450 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3454 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3456 if(ulTtiReqPdu != NULLP)
3458 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3459 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3460 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3461 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3462 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3463 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3464 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3465 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3466 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3467 macCellCfg->initialUlBwp.bwp.scs;
3468 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3469 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3470 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3471 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = 2;
3472 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = \
3473 currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3474 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = 0;
3475 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3476 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3477 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3478 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3479 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3480 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3481 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3482 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3483 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3484 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3485 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3486 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3487 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3488 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3489 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3490 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3491 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3492 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3493 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3494 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3495 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3496 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3497 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3498 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3499 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3500 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3501 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3502 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3503 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3504 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3505 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3506 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3507 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3508 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3509 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3510 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3511 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3512 /* numCb is 0 for new transmission */
3513 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3515 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3519 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3520 MacUlSlot *currUlSlot)
3522 if(ulTtiReqPdu != NULLP)
3524 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3525 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3526 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3527 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3528 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3529 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3530 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3531 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3532 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3533 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3534 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3535 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
3536 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3537 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3538 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3539 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3540 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
3541 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
3542 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3543 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3544 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3545 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
3546 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3547 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
3548 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
3549 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
3550 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
3551 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3552 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3553 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3554 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3555 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3556 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3557 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3558 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3559 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3560 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3562 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3568 /*******************************************************************
3570 * @brief Sends UL TTI Request to PHY
3574 * Function : fillUlTtiReq
3577 * -Sends FAPI Param req to PHY
3579 * @params[in] Pointer to CmLteTimingInfo
3580 * @return ROK - success
3583 ******************************************************************/
3584 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3588 uint8_t pduIdx = -1;
3589 uint32_t msgLen = 0;
3590 uint32_t msgSize = 0;
3592 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3593 SlotIndInfo ulTtiReqTimingInfo;
3595 MacUlSlot *currUlSlot = NULLP;
3596 MacCellCfg macCellCfg;
3598 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3600 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3601 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3604 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3606 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3607 msgSize = sizeof(fapi_ul_tti_req_t);
3608 LWR_MAC_ALLOC(ulTtiReq, msgSize);
3610 if(ulTtiReq != NULLP)
3612 memset(ulTtiReq, 0, msgSize);
3613 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3614 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3615 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3616 ulTtiReq->nGroup = 0;
3617 if(ulTtiReq->nPdus > 0)
3619 /* Fill Prach Pdu */
3620 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3623 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3626 /* Fill PUSCH PDU */
3627 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3630 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3632 /* Fill PUCCH PDU */
3633 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3636 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3639 msgLen = sizeof(fapi_ul_tti_req_t) - sizeof(fapi_msg_t);
3640 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
3642 DU_LOG("\nLWR_MAC: Sending UL TTI Request");
3643 LwrMacSendToPhy(ulTtiReq->header.msg_id, msgSize, (void *)ulTtiReq);
3645 memset(currUlSlot, 0, sizeof(MacUlSlot));
3650 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
3651 memset(currUlSlot, 0, sizeof(MacUlSlot));
3657 lwr_mac_procInvalidEvt(&currTimingInfo);
3664 /*******************************************************************
3666 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3670 * Function : fillUlDciPdu
3673 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3675 * @params[in] Pointer to fapi_dl_dci_t
3676 * Pointer to DciInfo
3679 ******************************************************************/
3680 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3682 if(ulDciPtr != NULLP)
3688 uint8_t coreset1Size = 0;
3689 uint16_t rbStart = 0;
3691 uint8_t dciFormatId = 0;
3692 uint32_t freqDomResAssign;
3693 uint8_t timeDomResAssign;
3694 uint8_t freqHopFlag;
3695 uint8_t modNCodScheme;
3697 uint8_t redundancyVer = 0;
3698 uint8_t harqProcessNum = 0;
3699 uint8_t puschTpc = 0;
3700 uint8_t ul_SlInd = 0;
3702 /* Size(in bits) of each field in DCI format 0_0 */
3703 uint8_t dciFormatIdSize = 1;
3704 uint8_t freqDomResAssignSize = 0;
3705 uint8_t timeDomResAssignSize = 4;
3706 uint8_t freqHopFlagSize = 1;
3707 uint8_t modNCodSchemeSize = 5;
3708 uint8_t ndiSize = 1;
3709 uint8_t redundancyVerSize = 2;
3710 uint8_t harqProcessNumSize = 4;
3711 uint8_t puschTpcSize = 2;
3712 uint8_t ul_SlIndSize = 1;
3714 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
3715 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
3716 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
3717 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
3718 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
3719 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
3720 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
3721 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
3722 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
3723 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
3724 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
3725 ulDciPtr->powerControlOfssetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
3727 /* Calculating freq domain resource allocation field value and size
3728 * coreset1Size = Size of coreset 1
3729 * RBStart = Starting Virtual Rsource block
3730 * RBLen = length of contiguously allocted RBs
3731 * Spec 38.214 Sec 5.1.2.2.2
3733 if(schDciInfo->formatType == FORMAT0_0)
3735 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
3736 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
3737 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
3739 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
3741 if((rbLen - 1) <= floor(coreset1Size / 2))
3742 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
3744 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
3745 + (coreset1Size - 1 - rbStart);
3747 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
3749 /* Fetching DCI field values */
3750 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
3751 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
3752 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
3753 modNCodScheme = schDciInfo->format.format0_0.mcs;
3754 ndi = schDciInfo->format.format0_0.ndi;
3755 redundancyVer = schDciInfo->format.format0_0.rv;
3756 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
3757 puschTpc = schDciInfo->format.format0_0.tpcCmd;
3758 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
3760 /* Reversing bits in each DCI field */
3761 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3762 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3763 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3764 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3765 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3766 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3767 puschTpc = reverseBits(puschTpc, puschTpcSize);
3768 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
3770 /* Calulating total number of bytes in buffer */
3771 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3772 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
3773 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
3775 numBytes = ulDciPtr->payloadSizeBits / 8;
3776 if(ulDciPtr->payloadSizeBits % 8)
3779 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3781 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
3785 /* Initialize buffer */
3786 for(bytePos = 0; bytePos < numBytes; bytePos++)
3787 ulDciPtr->payload[bytePos] = 0;
3789 bytePos = numBytes - 1;
3792 /* Packing DCI format fields */
3793 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3794 dciFormatId, dciFormatIdSize);
3795 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3796 freqDomResAssign, freqDomResAssignSize);
3797 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3798 timeDomResAssign, timeDomResAssignSize);
3799 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3800 freqHopFlag, freqHopFlagSize);
3801 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3802 modNCodScheme, modNCodSchemeSize);
3803 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3805 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3806 redundancyVer, redundancyVerSize);
3807 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3808 harqProcessNum, harqProcessNumSize);
3809 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3810 puschTpc, puschTpcSize);
3811 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3812 ul_SlInd, ul_SlIndSize);
3814 } /* fillUlDciPdu */
3816 /*******************************************************************
3818 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
3822 * Function : fillUlDciPdcchPdu
3825 * -Fills the Pdcch PDU info
3827 * @params[in] Pointer to FAPI DL TTI Req
3828 * Pointer to PdcchCfg
3831 ******************************************************************/
3832 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
3834 if(ulDciReqPdu != NULLP)
3836 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
3837 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
3838 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
3839 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
3840 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
3841 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
3842 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
3843 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
3844 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
3845 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
3846 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
3847 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
3848 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
3849 ulDciReqPdu->pdcchPduConfig.coreSetSize = dlInfo->ulGrant->coresetCfg.coreSetType;
3850 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
3851 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
3852 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
3853 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
3855 /* Calculating PDU length. Considering only one Ul dci pdu for now */
3856 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3861 /*******************************************************************
3863 * @brief Sends UL DCI Request to PHY
3867 * Function : fillUlDciReq
3870 * -Sends FAPI Ul Dci req to PHY
3872 * @params[in] Pointer to CmLteTimingInfo
3873 * @return ROK - success
3876 ******************************************************************/
3877 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
3881 uint8_t numPduEncoded = 0;
3882 uint32_t msgLen = 0;
3883 uint32_t msgSize = 0;
3885 fapi_ul_dci_req_t *ulDciReq = NULLP;
3886 SlotIndInfo ulDciReqTimingInfo;
3888 MacDlSlot *currDlSlot = NULLP;
3890 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3892 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3893 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
3894 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3896 if(currDlSlot->dlInfo.ulGrant != NULLP)
3898 msgSize = sizeof(fapi_ul_dci_req_t);
3899 LWR_MAC_ALLOC(ulDciReq, msgSize);
3900 if(ulDciReq != NULLP)
3902 memset(ulDciReq, 0, msgSize);
3903 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
3904 ulDciReq->slot = ulDciReqTimingInfo.slot;
3905 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
3906 if(ulDciReq->numPdus > 0)
3908 /* Fill PDCCH configuration Pdu */
3909 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
3911 /* free UL GRANT at SCH */
3912 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
3913 currDlSlot->dlInfo.ulGrant = NULLP;
3914 /* send UL DCI to PHY */
3915 msgLen = sizeof(fapi_ul_dci_req_t) - sizeof(fapi_msg_t);
3916 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, msgLen);
3917 LwrMacSendToPhy(ulDciReq->header.msg_id, sizeof(fapi_ul_dci_req_t), (void *)ulDciReq);
3923 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
3924 memset(currDlSlot, 0, sizeof(MacDlSlot));
3931 lwr_mac_procInvalidEvt(&currTimingInfo);
3937 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
3940 /* PHY_STATE_IDLE */
3941 lwr_mac_procParamReqEvt,
3942 lwr_mac_procParamRspEvt,
3943 lwr_mac_procConfigReqEvt,
3944 lwr_mac_procConfigRspEvt,
3945 lwr_mac_procInvalidEvt,
3946 lwr_mac_procInvalidEvt,
3949 /* PHY_STATE_CONFIGURED */
3950 lwr_mac_procParamReqEvt,
3951 lwr_mac_procParamRspEvt,
3952 lwr_mac_procConfigReqEvt,
3953 lwr_mac_procConfigRspEvt,
3954 lwr_mac_procStartReqEvt,
3955 lwr_mac_procInvalidEvt,
3958 /* PHY_STATE_RUNNING */
3959 lwr_mac_procInvalidEvt,
3960 lwr_mac_procInvalidEvt,
3961 lwr_mac_procConfigReqEvt,
3962 lwr_mac_procConfigRspEvt,
3963 lwr_mac_procInvalidEvt,
3964 lwr_mac_procStopReqEvt,
3968 /*******************************************************************
3970 * @brief Sends message to LWR_MAC Fsm Event Handler
3974 * Function : sendToLowerMac
3977 * -Sends message to LowerMac
3979 * @params[in] Message Type
3985 ******************************************************************/
3986 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
3988 lwrMacCb.event = msgType;
3989 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
3991 /**********************************************************************
3993 **********************************************************************/