1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
28 #include "lwr_mac_phy.h"
32 #include "fapi_vendor_extension.h"
37 #include "lwr_mac_fsm.h"
38 #include "mac_utils.h"
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
48 #define SET_MSG_LEN(x, size) x += size
50 void fapiMacConfigRsp(uint16_t cellId);
51 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
53 /* Global variables */
55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
57 void lwrMacLayerInit()
62 /* Initializing WLS free mem list */
64 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
66 cmLListInit(&wlsBlockToFreeList[idx]);
71 /*******************************************************************
73 * @brief Handles Invalid Request Event
77 * Function : lwr_mac_procInvalidEvt
80 * - Displays the PHY state when the invalid event occurs
83 * @return ROK - success
86 * ****************************************************************/
87 uint8_t lwr_mac_procInvalidEvt(void *msg)
89 printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
94 /*******************************************************************
96 * @brief Fills FAPI message header
100 * Function : fillMsgHeader
103 * -Fills FAPI message header
105 * @params[in] Pointer to header
111 * ****************************************************************/
112 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
114 memset(hdr, 0, sizeof(fapi_msg_t));
115 hdr->msg_id = msgType;
116 hdr->length = msgLen;
119 /*******************************************************************
121 * @brief Fills FAPI Config Request message header
125 * Function : fillTlvs
128 * -Fills FAPI Config Request message header
130 * @params[in] Pointer to TLV
137 * ****************************************************************/
138 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
139 uint32_t value, uint32_t *msgLen)
142 tlv->tl.length = length;
144 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
146 /*******************************************************************
148 * @brief fills the cyclic prefix by comparing the bitmask
152 * Function : fillCyclicPrefix
155 * -checks the value with the bitmask and
156 * fills the cellPtr's cyclic prefix.
158 * @params[in] Pointer to ClCellParam
159 * Value to be compared
162 ********************************************************************/
163 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
165 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
167 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
169 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
171 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
175 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
179 /*******************************************************************
181 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
185 * Function : fillSubcarrierSpaceDl
188 * -checks the value with the bitmask and
189 * fills the cellPtr's subcarrier spacing in DL
191 * @params[in] Pointer to ClCellParam
192 * Value to be compared
195 * ****************************************************************/
197 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
199 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
201 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
203 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
205 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
207 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
209 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
211 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
213 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
217 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
221 /*******************************************************************
223 * @brief fills the downlink bandwidth by comparing the bitmask
227 * Function : fillBandwidthDl
230 * -checks the value with the bitmask and
231 * -fills the cellPtr's DL Bandwidth
233 * @params[in] Pointer to ClCellParam
234 * Value to be compared
237 * ****************************************************************/
239 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
241 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
243 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
245 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
247 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
249 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
251 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
253 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
255 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
257 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
261 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
265 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
269 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
273 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
277 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
281 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
285 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
289 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
291 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
295 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
299 /*******************************************************************
301 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
305 * Function : fillSubcarrierSpaceUl
308 * -checks the value with the bitmask and
309 * -fills cellPtr's subcarrier spacing in UL
311 * @params[in] Pointer to ClCellParam
312 * Value to be compared
315 * ****************************************************************/
317 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
319 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
321 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
323 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
325 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
327 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
329 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
331 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
333 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
337 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
341 /*******************************************************************
343 * @brief fills the uplink bandwidth by comparing the bitmask
347 * Function : fillBandwidthUl
350 * -checks the value with the bitmask and
351 * fills the cellPtr's UL Bandwidth
355 * @params[in] Pointer to ClCellParam
356 * Value to be compared
360 * ****************************************************************/
362 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
364 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
366 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
368 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
370 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
372 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
374 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
376 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
378 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
380 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
384 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
388 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
392 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
396 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
400 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
404 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
408 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
412 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
414 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
418 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
421 /*******************************************************************
423 * @brief fills the CCE maping by comparing the bitmask
427 * Function : fillCCEmaping
430 * -checks the value with the bitmask and
431 * fills the cellPtr's CCE Mapping Type
434 * @params[in] Pointer to ClCellParam
435 * Value to be compared
438 * ****************************************************************/
440 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
442 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
444 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
446 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
448 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
452 (*cellPtr)->cceMappingType = INVALID_VALUE;
456 /*******************************************************************
458 * @brief fills the PUCCH format by comparing the bitmask
462 * Function : fillPucchFormat
465 * -checks the value with the bitmask and
466 * fills the cellPtr's pucch format
469 * @params[in] Pointer to ClCellParam
470 * Value to be compared
473 * ****************************************************************/
475 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
477 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
479 (*cellPtr)->pucchFormats = FORMAT_0;
481 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
483 (*cellPtr)->pucchFormats = FORMAT_1;
485 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
487 (*cellPtr)->pucchFormats = FORMAT_2;
489 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
491 (*cellPtr)->pucchFormats = FORMAT_3;
493 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
495 (*cellPtr)->pucchFormats = FORMAT_4;
499 (*cellPtr)->pucchFormats = INVALID_VALUE;
503 /*******************************************************************
505 * @brief fills the PDSCH Mapping Type by comparing the bitmask
509 * Function : fillPdschMappingType
512 * -checks the value with the bitmask and
513 * fills the cellPtr's PDSCH MappingType
515 * @params[in] Pointer to ClCellParam
516 * Value to be compared
519 * ****************************************************************/
521 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
523 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
525 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
527 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
529 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
533 (*cellPtr)->pdschMappingType = INVALID_VALUE;
537 /*******************************************************************
539 * @brief fills the PDSCH Allocation Type by comparing the bitmask
543 * Function : fillPdschAllocationType
546 * -checks the value with the bitmask and
547 * fills the cellPtr's PDSCH AllocationType
549 * @params[in] Pointer to ClCellParam
550 * Value to be compared
553 * ****************************************************************/
555 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
557 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
559 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
561 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
563 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
567 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
571 /*******************************************************************
573 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
577 * Function : fillPrbMappingType
580 * -checks the value with the bitmask and
581 * fills the cellPtr's PRB Mapping Type
583 * @params[in] Pointer to ClCellParam
584 * Value to be compared
587 ******************************************************************/
588 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
590 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
592 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
594 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
596 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
600 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
604 /*******************************************************************
606 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
610 * Function : fillPdschDmrsConfigType
613 * -checks the value with the bitmask and
614 * fills the cellPtr's DmrsConfig Type
616 * @params[in] Pointer to ClCellParam
617 * Value to be compared
620 ******************************************************************/
622 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
624 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
626 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
628 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
630 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
634 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
638 /*******************************************************************
640 * @brief fills the PDSCH DmrsLength by comparing the bitmask
644 * Function : fillPdschDmrsLength
647 * -checks the value with the bitmask and
648 * fills the cellPtr's PdschDmrsLength
650 * @params[in] Pointer to ClCellParam
651 * Value to be compared
654 ******************************************************************/
655 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
657 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
659 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
661 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
663 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
667 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
671 /*******************************************************************
673 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
677 * Function : fillPdschDmrsAddPos
680 * -checks the value with the bitmask and
681 * fills the cellPtr's Pdsch DmrsAddPos
683 * @params[in] Pointer to ClCellParam
684 * Value to be compared
687 ******************************************************************/
689 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
691 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
693 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
695 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
697 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
699 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
701 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
703 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
705 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
709 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
713 /*******************************************************************
715 * @brief fills the Modulation Order in DL by comparing the bitmask
719 * Function : fillModulationOrderDl
722 * -checks the value with the bitmask and
723 * fills the cellPtr's ModulationOrder in DL.
725 * @params[in] Pointer to ClCellParam
726 * Value to be compared
729 ******************************************************************/
730 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
734 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
738 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
742 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
746 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
750 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
754 /*******************************************************************
756 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
760 * Function : fillPuschDmrsConfigType
763 * -checks the value with the bitmask and
764 * fills the cellPtr's PUSCH DmrsConfigType
766 * @params[in] Pointer to ClCellParam
767 * Value to be compared
770 ******************************************************************/
772 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
774 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
776 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
778 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
780 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
784 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
788 /*******************************************************************
790 * @brief fills the PUSCH DmrsLength by comparing the bitmask
794 * Function : fillPuschDmrsLength
797 * -checks the value with the bitmask and
798 * fills the cellPtr's PUSCH DmrsLength
800 * @params[in] Pointer to ClCellParam
801 * Value to be compared
804 ******************************************************************/
806 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
808 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
810 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
812 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
814 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
818 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
822 /*******************************************************************
824 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
828 * Function : fillPuschDmrsAddPos
831 * -checks the value with the bitmask and
832 * fills the cellPtr's PUSCH DmrsAddPos
834 * @params[in] Pointer to ClCellParam
835 * Value to be compared
838 ******************************************************************/
840 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
842 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
844 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
846 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
848 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
850 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
852 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
854 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
856 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
860 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
864 /*******************************************************************
866 * @brief fills the PUSCH Mapping Type by comparing the bitmask
870 * Function : fillPuschMappingType
873 * -checks the value with the bitmask and
874 * fills the cellPtr's PUSCH MappingType
876 * @params[in] Pointer to ClCellParam
877 * Value to be compared
880 ******************************************************************/
882 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
884 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
886 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
888 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
890 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
894 (*cellPtr)->puschMappingType = INVALID_VALUE;
898 /*******************************************************************
900 * @brief fills the PUSCH Allocation Type by comparing the bitmask
904 * Function : fillPuschAllocationType
907 * -checks the value with the bitmask and
908 * fills the cellPtr's PUSCH AllocationType
910 * @params[in] Pointer to ClCellParam
911 * Value to be compared
914 ******************************************************************/
916 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
918 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
920 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
922 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
924 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
928 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
932 /*******************************************************************
934 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
938 * Function : fillPuschPrbMappingType
941 * -checks the value with the bitmask and
942 * fills the cellPtr's PUSCH PRB MApping Type
944 * @params[in] Pointer to ClCellParam
945 * Value to be compared
948 ******************************************************************/
950 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
952 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
954 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
956 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
958 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
962 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
966 /*******************************************************************
968 * @brief fills the Modulation Order in Ul by comparing the bitmask
972 * Function : fillModulationOrderUl
975 * -checks the value with the bitmask and
976 * fills the cellPtr's Modualtsion Order in UL.
978 * @params[in] Pointer to ClCellParam
979 * Value to be compared
982 ******************************************************************/
984 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
988 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
992 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
996 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1000 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1004 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1008 /*******************************************************************
1010 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1014 * Function : fillPuschAggregationFactor
1017 * -checks the value with the bitmask and
1018 * fills the cellPtr's PUSCH Aggregation Factor
1020 * @params[in] Pointer to ClCellParam
1021 * Value to be compared
1024 ******************************************************************/
1026 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1028 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1030 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1032 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1034 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1036 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1038 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1040 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1042 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1046 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1050 /*******************************************************************
1052 * @brief fills the PRACH Long Format by comparing the bitmask
1056 * Function : fillPrachLongFormat
1059 * -checks the value with the bitmask and
1060 * fills the cellPtr's PRACH Long Format
1062 * @params[in] Pointer to ClCellParam
1063 * Value to be compared
1066 ******************************************************************/
1068 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1070 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1072 (*cellPtr)->prachLongFormats = FORMAT_0;
1074 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1076 (*cellPtr)->prachLongFormats = FORMAT_1;
1078 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1080 (*cellPtr)->prachLongFormats = FORMAT_2;
1082 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1084 (*cellPtr)->prachLongFormats = FORMAT_3;
1088 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1092 /*******************************************************************
1094 * @brief fills the PRACH Short Format by comparing the bitmask
1098 * Function : fillPrachShortFormat
1101 * -checks the value with the bitmask and
1102 * fills the cellPtr's PRACH ShortFormat
1104 * @params[in] Pointer to ClCellParam
1105 * Value to be compared
1108 ******************************************************************/
1110 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1112 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1114 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1116 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1118 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1120 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1122 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1124 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1126 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1128 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1132 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1136 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1140 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1144 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1146 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1150 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1154 /*******************************************************************
1156 * @brief fills the Fd Occasions Type by comparing the bitmask
1160 * Function : fillFdOccasions
1163 * -checks the value with the bitmask and
1164 * fills the cellPtr's Fd Occasions
1166 * @params[in] Pointer to ClCellParam
1167 * Value to be compared
1170 ******************************************************************/
1172 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1176 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1180 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1184 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1188 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1192 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1196 /*******************************************************************
1198 * @brief fills the RSSI Measurement by comparing the bitmask
1202 * Function : fillRssiMeas
1205 * -checks the value with the bitmask and
1206 * fills the cellPtr's RSSI Measurement report
1208 * @params[in] Pointer to ClCellParam
1209 * Value to be compared
1212 ******************************************************************/
1214 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1216 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1218 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1220 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1222 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1226 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1230 /*******************************************************************
1232 * @brief Returns the TLVs value
1236 * Function : getParamValue
1239 * -return TLVs value
1242 * @return ROK - temp
1245 * ****************************************************************/
1247 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1250 posPtr = &tlv->tl.tag;
1251 posPtr += sizeof(tlv->tl.tag);
1252 posPtr += sizeof(tlv->tl.length);
1253 /*TO DO: malloc to SSI memory */
1254 if(type == FAPI_UINT_8)
1256 return(*(uint8_t *)posPtr);
1258 else if(type == FAPI_UINT_16)
1260 return(*(uint16_t *)posPtr);
1262 else if(type == FAPI_UINT_32)
1264 return(*(uint32_t *)posPtr);
1268 DU_LOG("\nLWR_MAC: Value Extraction failed" );
1274 /*******************************************************************
1276 * @brief Modifes the received mibPdu to uint32 bit
1277 * and stores it in MacCellCfg
1281 * Function : setMibPdu
1286 * @params[in] Pointer to mibPdu
1287 * pointer to modified value
1288 ******************************************************************/
1289 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1291 *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
1292 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1293 DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
1296 /*******************************************************************
1298 * @brief Sends FAPI Param req to PHY
1302 * Function : lwr_mac_procParamReqEvt
1305 * -Sends FAPI Param req to PHY
1308 * @return ROK - success
1311 * ****************************************************************/
1313 uint8_t lwr_mac_procParamReqEvt(void *msg)
1316 /* startGuardTimer(); */
1317 fapi_param_req_t *paramReq = NULL;
1318 fapi_msg_header_t *msgHeader;
1319 p_fapi_api_queue_elem_t paramReqElem;
1320 p_fapi_api_queue_elem_t headerElem;
1322 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1323 if(paramReq != NULL)
1325 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1326 sizeof(fapi_tx_data_req_t));
1327 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1328 memset(paramReq, 0, sizeof(fapi_param_req_t));
1329 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1331 /* Fill message header */
1332 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1335 DU_LOG("\nLWR_MAC: Memory allocation failed for param req header");
1336 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1339 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1340 sizeof(fapi_msg_header_t));
1341 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1342 msgHeader->num_msg = 1;
1343 msgHeader->handle = 0;
1345 DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
1346 LwrMacSendToL1(headerElem);
1350 DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
1357 /*******************************************************************
1359 * @brief Sends FAPI Param Response to MAC via PHY
1363 * Function : lwr_mac_procParamRspEvt
1366 * -Sends FAPI Param rsp to MAC via PHY
1369 * @return ROK - success
1372 * ****************************************************************/
1374 uint8_t lwr_mac_procParamRspEvt(void *msg)
1377 /* stopGuardTimer(); */
1379 uint32_t encodedVal;
1380 fapi_param_resp_t *paramRsp;
1381 ClCellParam *cellParam = NULLP;
1383 paramRsp = (fapi_param_resp_t *)msg;
1384 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1386 if(paramRsp != NULLP)
1388 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1389 if(cellParam != NULLP)
1391 DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
1392 if(paramRsp->error_code == MSG_OK)
1394 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1396 switch(paramRsp->tlvs[index].tl.tag)
1398 case FAPI_RELEASE_CAPABILITY_TAG:
1399 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1400 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1402 cellParam->releaseCapability = RELEASE_15;
1406 case FAPI_PHY_STATE_TAG:
1407 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1408 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1410 printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1415 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1416 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1417 if(encodedVal != RFAILED && encodedVal != 0)
1419 cellParam->skipBlankDlConfig = SUPPORTED;
1423 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1427 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1428 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1429 if(encodedVal != RFAILED && encodedVal != 0)
1431 cellParam->skipBlankUlConfig = SUPPORTED;
1435 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1439 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1440 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1443 case FAPI_CYCLIC_PREFIX_TAG:
1444 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1445 if(encodedVal != RFAILED)
1447 fillCyclicPrefix(encodedVal, &cellParam);
1451 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1452 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1453 if(encodedVal != RFAILED)
1455 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1459 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1460 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1461 if(encodedVal != RFAILED)
1463 fillBandwidthDl(encodedVal, &cellParam);
1467 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1468 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1469 if(encodedVal != RFAILED)
1471 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1475 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1476 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1477 if(encodedVal != RFAILED)
1479 fillBandwidthUl(encodedVal, &cellParam);
1483 case FAPI_CCE_MAPPING_TYPE_TAG:
1484 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1485 if(encodedVal != RFAILED)
1487 fillCCEmaping(encodedVal, &cellParam);
1491 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1492 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1493 if(encodedVal != RFAILED && encodedVal != 0)
1495 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1499 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1503 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1504 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1505 if(encodedVal != RFAILED && encodedVal != 0)
1507 cellParam->precoderGranularityCoreset = SUPPORTED;
1511 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1515 case FAPI_PDCCH_MU_MIMO_TAG:
1516 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1517 if(encodedVal != RFAILED && encodedVal != 0)
1519 cellParam->pdcchMuMimo = SUPPORTED;
1523 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1527 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1528 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1529 if(encodedVal != RFAILED && encodedVal != 0)
1531 cellParam->pdcchPrecoderCycling = SUPPORTED;
1535 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1539 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1540 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1543 case FAPI_PUCCH_FORMATS_TAG:
1544 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1545 if(encodedVal != RFAILED)
1547 fillPucchFormat(encodedVal, &cellParam);
1551 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1552 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1555 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1556 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1557 if(encodedVal != RFAILED)
1559 fillPdschMappingType(encodedVal, &cellParam);
1563 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1564 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1565 if(encodedVal != RFAILED)
1567 fillPdschAllocationType(encodedVal, &cellParam);
1571 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1572 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1573 if(encodedVal != RFAILED)
1575 fillPrbMappingType(encodedVal, &cellParam);
1579 case FAPI_PDSCH_CBG_TAG:
1580 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1581 if(encodedVal != RFAILED && encodedVal != 0)
1583 cellParam->pdschCbg = SUPPORTED;
1587 cellParam->pdschCbg = NOT_SUPPORTED;
1591 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1592 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1593 if(encodedVal != RFAILED)
1595 fillPdschDmrsConfigType(encodedVal, &cellParam);
1599 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1600 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1601 if(encodedVal != RFAILED)
1603 fillPdschDmrsLength(encodedVal, &cellParam);
1607 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1608 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1609 if(encodedVal != RFAILED)
1611 fillPdschDmrsAddPos(encodedVal, &cellParam);
1615 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1616 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1619 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1620 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1621 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1623 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1627 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1628 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1629 if(encodedVal != RFAILED)
1631 fillModulationOrderDl(encodedVal, &cellParam);
1635 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1636 cellParam->maxMuMimoUsersDl = \
1637 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1640 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1641 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1642 if(encodedVal != RFAILED && encodedVal != 0)
1644 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1648 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1652 case FAPI_PREMPTIONSUPPORT_TAG:
1653 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1654 if(encodedVal != RFAILED && encodedVal != 0)
1656 cellParam->premptionSupport = SUPPORTED;
1660 cellParam->premptionSupport = NOT_SUPPORTED;
1664 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1665 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1666 if(encodedVal != RFAILED && encodedVal != 0)
1668 cellParam->pdschNonSlotSupport = SUPPORTED;
1672 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1676 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1677 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1678 if(encodedVal != RFAILED && encodedVal != 0)
1680 cellParam->uciMuxUlschInPusch = SUPPORTED;
1684 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1688 case FAPI_UCI_ONLY_PUSCH_TAG:
1689 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1690 if(encodedVal != RFAILED && encodedVal != 0)
1692 cellParam->uciOnlyPusch = SUPPORTED;
1696 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1700 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1701 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1702 if(encodedVal != RFAILED && encodedVal != 0)
1704 cellParam->puschFrequencyHopping = SUPPORTED;
1708 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1712 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1713 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1714 if(encodedVal != RFAILED)
1716 fillPuschDmrsConfig(encodedVal, &cellParam);
1720 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1721 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1722 if(encodedVal != RFAILED)
1724 fillPuschDmrsLength(encodedVal, &cellParam);
1728 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1729 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1730 if(encodedVal != RFAILED)
1732 fillPuschDmrsAddPos(encodedVal, &cellParam);
1736 case FAPI_PUSCH_CBG_TAG:
1737 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1738 if(encodedVal != RFAILED && encodedVal != 0)
1740 cellParam->puschCbg = SUPPORTED;
1744 cellParam->puschCbg = NOT_SUPPORTED;
1748 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1749 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1750 if(encodedVal != RFAILED)
1752 fillPuschMappingType(encodedVal, &cellParam);
1756 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1757 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1758 if(encodedVal != RFAILED)
1760 fillPuschAllocationType(encodedVal, &cellParam);
1764 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1765 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1766 if(encodedVal != RFAILED)
1768 fillPuschPrbMappingType(encodedVal, &cellParam);
1772 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1773 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1774 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1776 cellParam->puschMaxPtrsPorts = encodedVal;
1780 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1781 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1784 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1785 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1788 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1789 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1790 if(encodedVal != RFAILED)
1792 fillModulationOrderUl(encodedVal, &cellParam);
1796 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1797 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1800 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1801 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1802 if(encodedVal != RFAILED && encodedVal != 0)
1804 cellParam->dftsOfdmSupport = SUPPORTED;
1808 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1812 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1813 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1814 if(encodedVal != RFAILED)
1816 fillPuschAggregationFactor(encodedVal, &cellParam);
1820 case FAPI_PRACH_LONG_FORMATS_TAG:
1821 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1822 if(encodedVal != RFAILED)
1824 fillPrachLongFormat(encodedVal, &cellParam);
1828 case FAPI_PRACH_SHORT_FORMATS_TAG:
1829 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1830 if(encodedVal != RFAILED)
1832 fillPrachShortFormat(encodedVal, &cellParam);
1836 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1837 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1838 if(encodedVal != RFAILED && encodedVal != 0)
1840 cellParam->prachRestrictedSets = SUPPORTED;
1844 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1848 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1849 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1850 if(encodedVal != RFAILED)
1852 fillFdOccasions(encodedVal, &cellParam);
1856 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1857 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1858 if(encodedVal != RFAILED)
1860 fillRssiMeas(encodedVal, &cellParam);
1864 //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1868 MAC_FREE(cellParam, sizeof(ClCellParam));
1869 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1874 DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
1880 DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
1886 DU_LOG("\nLWR_MAC: Param Response received from PHY is NULL");
1894 #ifdef INTEL_TIMER_MODE
1895 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1897 void * wlsHdlr = NULLP;
1898 fapi_msg_header_t *msgHeader;
1899 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1900 p_fapi_api_queue_elem_t headerElem;
1901 p_fapi_api_queue_elem_t iqSampleElem;
1902 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1904 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1906 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1908 /* Fill IQ sample req */
1909 mtGetWlsHdl(&wlsHdlr);
1910 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1911 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1912 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1915 DU_LOG("\nLWR_MAC: Memory allocation failed for IQ sample req");
1918 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1919 sizeof(fapi_vendor_ext_iq_samples_req_t));
1921 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1922 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1923 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1924 sizeof(fapi_vendor_ext_iq_samples_req_t));
1926 iqSampleReq->iq_samples_info.carrNum = 0;
1927 iqSampleReq->iq_samples_info.numSubframes = 40;
1928 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1929 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1930 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1931 iqSampleReq->iq_samples_info.startFrameNum = 0;
1932 iqSampleReq->iq_samples_info.startSlotNum = 0;
1933 iqSampleReq->iq_samples_info.startSymNum = 0;
1934 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1935 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1937 /* TODO : Fill remaining parameters */
1939 /* Fill message header */
1940 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1943 DU_LOG("\nLWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1946 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1947 sizeof(fapi_msg_header_t));
1948 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1949 msgHeader->num_msg = 1;
1950 msgHeader->handle = 0;
1952 DU_LOG("\nLWR_MAC: Sending IQ Sample request to Phy");
1953 LwrMacSendToL1(headerElem);
1958 /*******************************************************************
1960 * @brief Sends FAPI Config req to PHY
1964 * Function : lwr_mac_procConfigReqEvt
1967 * -Sends FAPI Config Req to PHY
1970 * @return ROK - success
1973 * ****************************************************************/
1975 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1982 uint32_t msgLen = 0;
1984 MacCellCfg macCfgParams;
1985 fapi_vendor_msg_t *vendorMsg;
1986 fapi_config_req_t *configReq;
1987 fapi_msg_header_t *msgHeader;
1988 p_fapi_api_queue_elem_t headerElem;
1989 p_fapi_api_queue_elem_t vendorMsgQElem;
1990 p_fapi_api_queue_elem_t cfgReqQElem;
1992 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1995 cellId = (uint16_t *)msg;
1996 GET_CELL_IDX(*cellId, cellIdx);
1997 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
1999 /* Fill Cell Configuration in lwrMacCb */
2000 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2001 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2002 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
2005 /* Allocte And fill Vendor msg */
2006 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2009 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2012 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2013 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2014 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2015 vendorMsg->config_req_vendor.hopping_id = 0;
2016 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2017 vendorMsg->config_req_vendor.group_hop_flag = 0;
2018 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2020 /* Fill FAPI config req */
2021 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2024 DU_LOG("\nLWR_MAC: Memory allocation failed for config req");
2025 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2028 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2029 sizeof(fapi_config_req_t));
2031 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2032 memset(configReq, 0, sizeof(fapi_config_req_t));
2033 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2034 configReq->number_of_tlvs = 25;
2035 msgLen = sizeof(configReq->number_of_tlvs);
2037 if(macCfgParams.dlCarrCfg.pres)
2039 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2040 sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
2041 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2042 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
2043 /* Due to bug in Intel FT code, commenting TLVs that are are not
2044 * needed to avoid error. Must be uncommented when FT bug is fixed */
2045 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2046 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2047 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2048 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2049 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2050 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
2052 if(macCfgParams.ulCarrCfg.pres)
2054 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2055 sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
2056 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2057 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
2058 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2059 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2060 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2061 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2062 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2063 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
2065 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2066 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2068 /* fill cell config */
2069 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2070 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
2071 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2072 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
2074 /* fill SSB configuration */
2075 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2076 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2077 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2078 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2079 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2080 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2082 /* fill PRACH configuration */
2083 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2084 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2085 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2086 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2087 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2088 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2089 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2090 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2091 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2092 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2093 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2094 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2095 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2096 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2097 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2098 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2099 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2100 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2101 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2102 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2103 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2105 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2106 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2107 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2112 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2115 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2116 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2117 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2118 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2120 /* fill SSB table */
2121 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2122 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2123 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2124 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2125 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2126 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2127 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2128 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2130 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2131 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2132 sizeof(uint32_t), mib, &msgLen);
2134 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2135 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2136 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2137 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2138 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2139 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2140 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2141 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2143 /* fill TDD table */
2144 //fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2145 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2146 //fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2147 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
2149 /* fill measurement config */
2150 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2151 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2153 /* fill DMRS Type A Pos */
2154 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2155 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2157 /* Fill message header */
2158 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2161 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2162 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2163 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2166 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2167 sizeof(fapi_msg_header_t));
2168 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2169 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2170 msgHeader->handle = 0;
2172 DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
2173 LwrMacSendToL1(headerElem);
2177 } /* lwr_mac_handleConfigReqEvt */
2179 /*******************************************************************
2181 * @brief Processes config response from phy
2185 * Function : lwr_mac_procConfigRspEvt
2188 * Processes config response from phy
2190 * @params[in] FAPI message pointer
2191 * @return ROK - success
2194 * ****************************************************************/
2196 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2199 fapi_config_resp_t *configRsp;
2200 configRsp = (fapi_config_resp_t *)msg;
2202 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2205 if(configRsp != NULL)
2207 if(configRsp->error_code == MSG_OK)
2209 DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
2210 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2211 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2213 * Store config response into an intermediate struture and send to MAC
2214 * Support LC and LWLC for sending config rsp to MAC
2216 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2220 DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
2226 DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
2232 } /* lwr_mac_procConfigRspEvt */
2234 /*******************************************************************
2236 * @brief Build and send start request to phy
2240 * Function : lwr_mac_procStartReqEvt
2243 * Build and send start request to phy
2245 * @params[in] FAPI message pointer
2246 * @return ROK - success
2249 * ****************************************************************/
2250 uint8_t lwr_mac_procStartReqEvt(void *msg)
2253 fapi_msg_header_t *msgHeader;
2254 fapi_start_req_t *startReq;
2255 fapi_vendor_msg_t *vendorMsg;
2256 p_fapi_api_queue_elem_t headerElem;
2257 p_fapi_api_queue_elem_t startReqElem;
2258 p_fapi_api_queue_elem_t vendorMsgElem;
2260 /* Allocte And fill Vendor msg */
2261 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2264 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in start req");
2267 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2268 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2269 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2270 vendorMsg->start_req_vendor.sfn = 0;
2271 vendorMsg->start_req_vendor.slot = 0;
2272 vendorMsg->start_req_vendor.mode = 1; /* for FDD */
2274 vendorMsg->start_req_vendor.count = 0;
2275 vendorMsg->start_req_vendor.period = 1;
2278 /* Fill FAPI config req */
2279 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2282 DU_LOG("\nLWR_MAC: Memory allocation failed for start req");
2283 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2286 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2287 sizeof(fapi_start_req_t));
2289 startReq = (fapi_start_req_t *)(startReqElem + 1);
2290 memset(startReq, 0, sizeof(fapi_start_req_t));
2291 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2293 /* Fill message header */
2294 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2297 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2298 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2299 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2302 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2303 sizeof(fapi_msg_header_t));
2304 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2305 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2306 msgHeader->handle = 0;
2309 DU_LOG("\nLWR_MAC: Sending Start Request to Phy");
2310 LwrMacSendToL1(headerElem);
2313 } /* lwr_mac_procStartReqEvt */
2315 /*******************************************************************
2317 * @brief Sends FAPI Stop Req to PHY
2321 * Function : lwr_mac_procStopReqEvt
2324 * -Sends FAPI Stop Req to PHY
2327 * @return ROK - success
2330 ********************************************************************/
2332 uint8_t lwr_mac_procStopReqEvt(void *msg)
2335 SlotIndInfo *slotInfo;
2336 fapi_msg_header_t *msgHeader;
2337 fapi_stop_req_t *stopReq;
2338 fapi_vendor_msg_t *vendorMsg;
2339 p_fapi_api_queue_elem_t headerElem;
2340 p_fapi_api_queue_elem_t stopReqElem;
2341 p_fapi_api_queue_elem_t vendorMsgElem;
2343 slotInfo = (SlotIndInfo *)msg;
2345 /* Allocte And fill Vendor msg */
2346 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2349 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in stop req");
2352 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2353 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2354 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2355 vendorMsg->stop_req_vendor.sfn = slotInfo->sfn;
2356 vendorMsg->stop_req_vendor.slot = slotInfo->slot;
2358 /* Fill FAPI stop req */
2359 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2362 DU_LOG("\nLWR_MAC: Memory allocation failed for stop req");
2363 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2366 FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
2367 sizeof(fapi_stop_req_t));
2368 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2369 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2370 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2372 /* Fill message header */
2373 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2376 DU_LOG("\nLWR_MAC: Memory allocation failed for header in stop req");
2377 LWR_MAC_FREE(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2378 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2381 FILL_FAPI_LIST_ELEM(headerElem, stopReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2382 sizeof(fapi_msg_header_t));
2383 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2384 msgHeader->num_msg = 2; /* Stop req msg and vendor specific msg */
2385 msgHeader->handle = 0;
2388 DU_LOG("\nLWR_MAC: Sending Stop Request to Phy");
2389 LwrMacSendToL1(headerElem);
2396 /*******************************************************************
2398 * @brief fills SSB PDU required for DL TTI info in MAC
2402 * Function : fillSsbPdu
2405 * -Fills the SSB PDU info
2408 * @params[in] Pointer to FAPI DL TTI Req
2409 * Pointer to RgCellCb
2410 * Pointer to msgLen of DL TTI Info
2413 ******************************************************************/
2415 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2416 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2418 uint32_t mibPayload = 0;
2419 if(dlTtiReqPdu != NULL)
2421 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2422 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2423 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2424 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2425 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2426 /* ssbOfPdufstA to be filled in ssbCfg */
2427 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2428 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2429 /* Bit manipulation for SFN */
2430 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2431 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2432 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2433 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2434 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2435 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2436 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2437 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2438 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2445 /*******************************************************************
2447 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2451 * Function : fillSib1DlDciPdu
2454 * -Fills the Dl DCI PDU
2456 * @params[in] Pointer to fapi_dl_dci_t
2457 * Pointer to PdcchCfg
2460 ******************************************************************/
2462 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2464 if(dlDciPtr != NULLP)
2470 uint16_t coreset0Size;
2473 uint32_t freqDomResAssign;
2474 uint32_t timeDomResAssign;
2476 uint32_t modNCodScheme;
2477 uint8_t redundancyVer;
2478 uint32_t sysInfoInd;
2481 /* Size(in bits) of each field in DCI format 0_1
2482 * as mentioned in spec 38.214 */
2483 uint8_t freqDomResAssignSize;
2484 uint8_t timeDomResAssignSize = 4;
2485 uint8_t VRB2PRBMapSize = 1;
2486 uint8_t modNCodSchemeSize = 5;
2487 uint8_t redundancyVerSize = 2;
2488 uint8_t sysInfoIndSize = 1;
2489 uint8_t reservedSize = 15;
2491 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2492 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2493 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2494 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2495 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2496 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2497 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2498 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2499 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2500 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2501 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2502 dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2504 /* Calculating freq domain resource allocation field value and size
2505 * coreset0Size = Size of coreset 0
2506 * RBStart = Starting Virtual Rsource block
2507 * RBLen = length of contiguously allocted RBs
2508 * Spec 38.214 Sec 5.1.2.2.2
2510 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2511 rbStart = 0; /* For SIB1 */
2512 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2513 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2515 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2517 if((rbLen - 1) <= floor(coreset0Size / 2))
2518 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2520 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2521 + (coreset0Size - 1 - rbStart);
2523 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2526 /* Fetching DCI field values */
2527 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2529 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2531 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2532 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2533 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2536 /* Reversing bits in each DCI field */
2537 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2538 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2539 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2540 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2541 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2542 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2544 /* Calulating total number of bytes in buffer */
2545 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2546 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2547 + sysInfoIndSize + reservedSize;
2549 numBytes = dlDciPtr->payloadSizeBits / 8;
2550 if(dlDciPtr->payloadSizeBits % 8)
2553 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2555 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2559 /* Initialize buffer */
2560 for(bytePos = 0; bytePos < numBytes; bytePos++)
2561 dlDciPtr->payload[bytePos] = 0;
2563 bytePos = numBytes - 1;
2566 /* Packing DCI format fields */
2567 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2568 freqDomResAssign, freqDomResAssignSize);
2569 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2570 timeDomResAssign, timeDomResAssignSize);
2571 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2572 VRB2PRBMap, VRB2PRBMapSize);
2573 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2574 modNCodScheme, modNCodSchemeSize);
2575 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2576 redundancyVer, redundancyVerSize);
2577 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2578 sysInfoInd, sysInfoIndSize);
2579 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2580 reserved, reservedSize);
2583 } /* fillSib1DlDciPdu */
2585 /*******************************************************************
2587 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2591 * Function : fillRarDlDciPdu
2594 * -Fills the Dl DCI PDU
2596 * @params[in] Pointer to fapi_dl_dci_t
2597 * Pointer to PdcchCfg
2600 ******************************************************************/
2602 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2604 if(dlDciPtr != NULLP)
2610 uint16_t coreset0Size;
2613 uint32_t freqDomResAssign;
2614 uint8_t timeDomResAssign;
2616 uint8_t modNCodScheme;
2620 /* Size(in bits) of each field in DCI format 1_0 */
2621 uint8_t freqDomResAssignSize;
2622 uint8_t timeDomResAssignSize = 4;
2623 uint8_t VRB2PRBMapSize = 1;
2624 uint8_t modNCodSchemeSize = 5;
2625 uint8_t tbScalingSize = 2;
2626 uint8_t reservedSize = 16;
2628 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2629 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2630 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2631 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2632 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2633 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2634 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2635 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2636 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2637 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2638 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2639 dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2641 /* Calculating freq domain resource allocation field value and size
2642 * coreset0Size = Size of coreset 0
2643 * RBStart = Starting Virtual Rsource block
2644 * RBLen = length of contiguously allocted RBs
2645 * Spec 38.214 Sec 5.1.2.2.2
2648 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2649 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2650 rbStart = 0; /* For SIB1 */
2651 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2652 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2654 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2656 if((rbLen - 1) <= floor(coreset0Size / 2))
2657 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2659 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2660 + (coreset0Size - 1 - rbStart);
2662 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2665 /* Fetching DCI field values */
2666 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2667 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2668 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2669 tbScaling = 0; /* configured to 0 scaling */
2672 /* Reversing bits in each DCI field */
2673 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2674 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2675 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2676 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2677 tbScaling = reverseBits(tbScaling, tbScalingSize);
2679 /* Calulating total number of bytes in buffer */
2680 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2681 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2683 numBytes = dlDciPtr->payloadSizeBits / 8;
2684 if(dlDciPtr->payloadSizeBits % 8)
2687 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2689 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2693 /* Initialize buffer */
2694 for(bytePos = 0; bytePos < numBytes; bytePos++)
2695 dlDciPtr->payload[bytePos] = 0;
2697 bytePos = numBytes - 1;
2700 /* Packing DCI format fields */
2701 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2702 freqDomResAssign, freqDomResAssignSize);
2703 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2704 timeDomResAssign, timeDomResAssignSize);
2705 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2706 VRB2PRBMap, VRB2PRBMapSize);
2707 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2708 modNCodScheme, modNCodSchemeSize);
2709 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2710 tbScaling, tbScalingSize);
2711 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2712 reserved, reservedSize);
2714 } /* fillRarDlDciPdu */
2716 /*******************************************************************
2718 * @brief fills DL DCI PDU required for DL TTI info in MAC
2722 * Function : fillDlMsgDlDciPdu
2725 * -Fills the Dl DCI PDU
2727 * @params[in] Pointer to fapi_dl_dci_t
2728 * Pointer to PdcchCfg
2731 ******************************************************************/
2732 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2733 DlMsgInfo *dlMsgInfo)
2735 if(dlDciPtr != NULLP)
2741 uint16_t coresetSize = 0;
2742 uint16_t rbStart = 0;
2744 uint8_t dciFormatId;
2745 uint32_t freqDomResAssign;
2746 uint8_t timeDomResAssign;
2748 uint8_t modNCodScheme;
2750 uint8_t redundancyVer = 0;
2751 uint8_t harqProcessNum = 0;
2752 uint8_t dlAssignmentIdx = 0;
2753 uint8_t pucchTpc = 0;
2754 uint8_t pucchResoInd = 0;
2755 uint8_t harqFeedbackInd = 0;
2757 /* Size(in bits) of each field in DCI format 1_0 */
2758 uint8_t dciFormatIdSize = 1;
2759 uint8_t freqDomResAssignSize = 0;
2760 uint8_t timeDomResAssignSize = 4;
2761 uint8_t VRB2PRBMapSize = 1;
2762 uint8_t modNCodSchemeSize = 5;
2763 uint8_t ndiSize = 1;
2764 uint8_t redundancyVerSize = 2;
2765 uint8_t harqProcessNumSize = 4;
2766 uint8_t dlAssignmentIdxSize = 2;
2767 uint8_t pucchTpcSize = 2;
2768 uint8_t pucchResoIndSize = 3;
2769 uint8_t harqFeedbackIndSize = 3;
2771 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2772 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2773 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2774 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2775 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2776 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2777 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2778 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2779 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2780 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2781 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2782 dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2784 /* Calculating freq domain resource allocation field value and size
2785 * coreset0Size = Size of coreset 0
2786 * RBStart = Starting Virtual Rsource block
2787 * RBLen = length of contiguously allocted RBs
2788 * Spec 38.214 Sec 5.1.2.2.2
2790 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2791 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2792 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2794 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2796 if((rbLen - 1) <= floor(coresetSize / 2))
2797 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2799 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2800 + (coresetSize - 1 - rbStart);
2802 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2805 /* Fetching DCI field values */
2806 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
2807 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2808 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2809 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2810 ndi = dlMsgInfo->ndi;
2811 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2812 harqProcessNum = dlMsgInfo->harqProcNum;
2813 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
2814 pucchTpc = dlMsgInfo->pucchTpc;
2815 pucchResoInd = dlMsgInfo->pucchResInd;
2816 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
2818 /* Reversing bits in each DCI field */
2819 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2820 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2821 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2822 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2823 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2824 ndi = reverseBits(ndi, ndiSize);
2825 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2826 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2827 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2828 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2829 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2830 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2833 /* Calulating total number of bytes in buffer */
2834 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2835 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2836 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2837 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2839 numBytes = dlDciPtr->payloadSizeBits / 8;
2840 if(dlDciPtr->payloadSizeBits % 8)
2843 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2845 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2849 /* Initialize buffer */
2850 for(bytePos = 0; bytePos < numBytes; bytePos++)
2851 dlDciPtr->payload[bytePos] = 0;
2853 bytePos = numBytes - 1;
2856 /* Packing DCI format fields */
2857 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2858 dciFormatId, dciFormatIdSize);
2859 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2860 freqDomResAssign, freqDomResAssignSize);
2861 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2862 timeDomResAssign, timeDomResAssignSize);
2863 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2864 VRB2PRBMap, VRB2PRBMapSize);
2865 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2866 modNCodScheme, modNCodSchemeSize);
2867 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2869 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2870 redundancyVer, redundancyVerSize);
2871 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2872 redundancyVer, redundancyVerSize);
2873 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2874 harqProcessNum, harqProcessNumSize);
2875 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2876 dlAssignmentIdx, dlAssignmentIdxSize);
2877 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2878 pucchTpc, pucchTpcSize);
2879 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2880 pucchResoInd, pucchResoIndSize);
2881 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2882 harqFeedbackInd, harqFeedbackIndSize);
2886 /*******************************************************************
2888 * @brief fills PDCCH PDU required for DL TTI info in MAC
2892 * Function : fillPdcchPdu
2895 * -Fills the Pdcch PDU info
2898 * @params[in] Pointer to FAPI DL TTI Req
2899 * Pointer to PdcchCfg
2902 ******************************************************************/
2903 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2904 RntiType rntiType, uint8_t coreSetType)
2906 if(dlTtiReqPdu != NULLP)
2908 PdcchCfg *pdcchInfo = NULLP;
2909 BwpCfg *bwp = NULLP;
2911 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2912 if(rntiType == SI_RNTI_TYPE)
2914 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2915 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2916 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2918 else if(rntiType == RA_RNTI_TYPE)
2920 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2921 bwp = &dlInfo->rarAlloc->bwp;
2922 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2924 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2926 pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2927 bwp = &dlInfo->dlMsgAlloc->bwp;
2928 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2929 &dlInfo->dlMsgAlloc->dlMsgInfo);
2933 DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
2936 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2937 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2938 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2939 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2940 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2941 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2942 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2943 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2944 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2945 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2946 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2947 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
2948 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2949 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2950 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2952 /* Calculating PDU length. Considering only one dl dci pdu for now */
2953 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2959 /*******************************************************************
2961 * @brief fills PDSCH PDU required for DL TTI info in MAC
2965 * Function : fillPdschPdu
2968 * -Fills the Pdsch PDU info
2971 * @params[in] Pointer to FAPI DL TTI Req
2972 * Pointer to PdschCfg
2973 * Pointer to msgLen of DL TTI Info
2976 ******************************************************************/
2978 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2979 BwpCfg bwp, uint16_t pduIndex)
2983 if(dlTtiReqPdu != NULLP)
2985 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2986 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2987 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2988 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2989 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2990 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
2991 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
2992 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
2993 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
2994 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
2995 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
2997 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
2998 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
2999 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3000 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3001 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3002 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3004 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3005 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3006 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3007 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3008 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3009 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3010 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3011 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3012 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3013 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3014 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3015 /* since we are using type-1, hence rbBitmap excluded */
3016 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
3017 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
3018 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3019 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
3020 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
3021 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3022 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3023 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3024 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3025 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3026 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3027 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3028 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3029 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3030 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3031 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3032 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3034 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3038 /***********************************************************************
3040 * @brief calculates the total size to be allocated for DL TTI Req
3044 * Function : calcDlTtiReqPduCount
3047 * -calculates the total pdu count to be allocated for DL TTI Req
3049 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3052 * ********************************************************************/
3053 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
3058 if(dlInfo->isBroadcastPres)
3060 if(dlInfo->brdcstAlloc.ssbTrans)
3062 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
3064 /* SSB PDU is filled */
3068 if(dlInfo->brdcstAlloc.sib1Trans)
3070 /* PDCCH and PDSCH PDU is filled */
3074 if(dlInfo->rarAlloc != NULLP)
3076 /* PDCCH and PDSCH PDU is filled */
3079 if(dlInfo->dlMsgAlloc != NULLP)
3081 /* PDCCH and PDSCH PDU is filled */
3087 /***********************************************************************
3089 * @brief calculates the total size to be allocated for DL TTI Req
3093 * Function : calcTxDataReqPduCount
3096 * -calculates the total pdu count to be allocated for DL TTI Req
3098 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3101 * ********************************************************************/
3102 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
3106 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
3110 if(dlInfo->rarAlloc != NULLP)
3114 if(dlInfo->dlMsgAlloc != NULLP)
3120 /***********************************************************************
3122 * @brief fills the SIB1 TX-DATA request message
3126 * Function : fillSib1TxDataReq
3129 * - fills the SIB1 TX-DATA request message
3131 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3132 * @params[in] macCellCfg consist of SIB1 pdu
3133 * @params[in] uint32_t *msgLen
3134 * @params[in] uint16_t pduIndex
3137 * ********************************************************************/
3138 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
3141 uint32_t pduLen = 0;
3142 uint8_t *sib1TxdataValue = NULLP;
3144 pduDesc[pduIndex].pdu_index = pduIndex;
3145 pduDesc[pduIndex].num_tlvs = 1;
3148 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3149 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3150 pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
3151 LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3152 if(sib1TxdataValue == NULLP)
3156 memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
3157 macCellCfg->sib1Cfg.sib1PduLen);
3158 pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
3160 /* The total length of the PDU description and PDU data */
3161 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3162 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3163 pduDesc[pduIndex].pdu_length = pduLen;
3165 #ifdef INTEL_WLS_MEM
3166 addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (slotIndIdx-1));
3168 LWR_MAC_FREE(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen);
3174 /***********************************************************************
3176 * @brief fills the RAR TX-DATA request message
3180 * Function : fillRarTxDataReq
3183 * - fills the RAR TX-DATA request message
3185 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3186 * @params[in] RarInfo *rarInfo
3187 * @params[in] uint32_t *msgLen
3188 * @params[in] uint16_t pduIndex
3191 * ********************************************************************/
3192 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
3195 uint32_t pduLen = 0;
3196 uint8_t *rarTxdataValue = NULLP;
3198 pduDesc[pduIndex].pdu_index = pduIndex;
3199 pduDesc[pduIndex].num_tlvs = 1;
3202 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3203 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3204 pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3205 LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3206 if(rarTxdataValue == NULLP)
3210 memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3211 pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3213 /* The total length of the PDU description and PDU data */
3214 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3215 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3216 pduDesc[pduIndex].pdu_length = pduLen;
3218 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3219 * But since we did not implement WLS, this has to be done here
3221 #ifdef INTEL_WLS_MEM
3222 addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (slotIndIdx-1));
3224 LWR_MAC_FREE(rarTxdataValue, rarInfo->rarPduLen);
3230 /***********************************************************************
3232 * @brief fills the DL dedicated Msg TX-DATA request message
3236 * Function : fillDlMsgTxDataReq
3239 * - fills the Dl Dedicated Msg TX-DATA request message
3241 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3242 * @params[in] DlMsgInfo *dlMsgInfo
3243 * @params[in] uint32_t *msgLen
3244 * @params[in] uint16_t pduIndex
3247 * ********************************************************************/
3248 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3251 uint32_t pduLen = 0;
3252 uint8_t *dedMsgTxDataValue = NULLP;
3254 pduDesc[pduIndex].pdu_index = pduIndex;
3255 pduDesc[pduIndex].num_tlvs = 1;
3258 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3259 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3260 pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3261 LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3262 if(dedMsgTxDataValue == NULLP)
3266 memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3267 pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3269 /* The total length of the PDU description and PDU data */
3270 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3271 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3272 pduDesc[pduIndex].pdu_length = pduLen;
3274 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3275 * But since we did not implement WLS, this has to be done here
3277 #ifdef INTEL_WLS_MEM
3278 addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (slotIndIdx-1));
3280 LWR_MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3288 /*******************************************************************
3290 * @brief Sends DL TTI Request to PHY
3294 * Function : fillDlTtiReq
3297 * -Sends FAPI DL TTI req to PHY
3299 * @params[in] timing info
3300 * @return ROK - success
3303 * ****************************************************************/
3304 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3309 uint8_t numPduEncoded = 0;
3311 uint16_t pduIndex = 0;
3313 SlotIndInfo dlTtiReqTimingInfo;
3314 MacDlSlot *currDlSlot = NULLP;
3315 MacCellCfg macCellCfg;
3317 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3318 fapi_msg_header_t *msgHeader;
3319 p_fapi_api_queue_elem_t dlTtiElem;
3320 p_fapi_api_queue_elem_t headerElem;
3322 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3324 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3325 /* consider phy delay */
3326 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3328 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3330 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3331 nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
3333 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3336 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3337 sizeof(fapi_dl_tti_req_t));
3339 /* Fill message header */
3340 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3343 DU_LOG("\nLWR_MAC: Memory allocation failed for header in DL TTI req");
3344 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3347 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3348 sizeof(fapi_msg_header_t));
3349 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3350 msgHeader->num_msg = 1;
3351 msgHeader->handle = 0;
3353 /* Fill Dl TTI Request */
3354 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3355 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3356 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3358 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3359 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3360 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3361 nPdu = dlTtiReq->nPdus;
3362 dlTtiReq->nGroup = 0;
3364 if(dlTtiReq->nPdus > 0)
3366 if(currDlSlot->dlInfo.isBroadcastPres)
3368 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3370 if(dlTtiReq->pdus != NULLP)
3372 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3374 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3375 currDlSlot, idx, dlTtiReq->sfn);
3379 printf("\033[1;31m");
3380 DU_LOG("\nLWR_MAC: MIB sent..");
3383 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3385 /* Filling SIB1 param */
3386 if(numPduEncoded != nPdu)
3388 rntiType = SI_RNTI_TYPE;
3389 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3390 rntiType, CORESET_TYPE0);
3392 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3393 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3394 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3399 printf("\033[1;34m");
3400 DU_LOG("\nLWR_MAC: SIB1 sent...");
3404 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3406 /* Filling RAR param */
3407 rntiType = RA_RNTI_TYPE;
3408 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3409 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3411 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3412 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3413 currDlSlot->dlInfo.rarAlloc->bwp,
3418 printf("\033[1;32m");
3419 DU_LOG("\nLWR_MAC: RAR sent...");
3422 if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3424 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3426 /* Filling Msg4 param */
3427 printf("\033[1;32m");
3428 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3430 rntiType = TC_RNTI_TYPE;
3431 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3432 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3433 DU_LOG("\nLWR_MAC: MSG4 sent...");
3437 /* Filling other DL msg params */
3438 rntiType = C_RNTI_TYPE;
3439 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3440 &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3441 DU_LOG("\nLWR_MAC: DL MSG sent...");
3446 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3447 &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3448 currDlSlot->dlInfo.dlMsgAlloc->bwp,
3455 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3456 currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3460 #ifdef ODU_SLOT_IND_DEBUG_LOG
3461 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3463 LwrMacSendToL1(headerElem);
3465 /* send Tx-DATA req message */
3466 sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3470 #ifdef ODU_SLOT_IND_DEBUG_LOG
3471 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3473 LwrMacSendToL1(headerElem);
3475 memset(currDlSlot, 0, sizeof(MacDlSlot));
3480 DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
3481 memset(currDlSlot, 0, sizeof(MacDlSlot));
3487 lwr_mac_procInvalidEvt(&currTimingInfo);
3494 /*******************************************************************
3496 * @brief Sends TX data Request to PHY
3500 * Function : sendTxDataReq
3503 * -Sends FAPI TX data req to PHY
3505 * @params[in] timing info
3506 * @return ROK - success
3509 * ****************************************************************/
3510 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3515 uint16_t pduIndex = 0;
3516 fapi_tx_data_req_t *txDataReq;
3517 fapi_msg_header_t *msgHeader;
3518 p_fapi_api_queue_elem_t txDataElem;
3519 p_fapi_api_queue_elem_t headerElem;
3521 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3523 /* send TX_Data request message */
3524 nPdu = calcTxDataReqPduCount(dlInfo);
3527 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3528 if(txDataElem == NULLP)
3530 DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
3534 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
3535 sizeof(fapi_tx_data_req_t));
3536 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
3537 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
3538 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
3540 txDataReq->sfn = currTimingInfo.sfn;
3541 txDataReq->slot = currTimingInfo.slot;
3542 if(dlInfo->brdcstAlloc.sib1Trans)
3544 fillSib1TxDataReq(txDataReq->pdu_desc,
3545 &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3547 txDataReq->num_pdus++;
3549 if(dlInfo->rarAlloc != NULLP)
3551 fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3553 txDataReq->num_pdus++;
3555 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3556 dlInfo->rarAlloc = NULLP;
3558 if(dlInfo->dlMsgAlloc != NULLP)
3560 fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3561 &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3563 txDataReq->num_pdus++;
3565 MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3566 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3567 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3568 MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3569 dlInfo->dlMsgAlloc = NULLP;
3572 /* Fill message header */
3573 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3576 DU_LOG("\nLWR_MAC: Memory allocation failed for TxDataReq header");
3577 LWR_MAC_FREE(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
3580 FILL_FAPI_LIST_ELEM(headerElem, txDataElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3581 sizeof(fapi_msg_header_t));
3582 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3583 msgHeader->num_msg = 1;
3584 msgHeader->handle = 0;
3586 DU_LOG("\nLWR_MAC: Sending TX DATA Request");
3587 LwrMacSendToL1(headerElem);
3593 /***********************************************************************
3595 * @brief calculates the total size to be allocated for UL TTI Req
3599 * Function : getnPdus
3602 * -calculates the total pdu count to be allocated for UL TTI Req
3604 * @params[in] Pointer to fapi Ul TTI Req
3605 * Pointer to CurrUlSlot
3607 * ********************************************************************/
3609 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3611 uint8_t pduCount = 0;
3613 if(ulTtiReq && currUlSlot)
3615 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3618 ulTtiReq->rachPresent++;
3620 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3625 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3630 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3635 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3644 /***********************************************************************
3646 * @brief Set the value of zero correlation config in PRACH PDU
3650 * Function : setNumCs
3653 * -Set the value of zero correlation config in PRACH PDU
3655 * @params[in] Pointer to zero correlation config
3656 * Pointer to MacCellCfg
3657 * ********************************************************************/
3659 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3663 if(macCellCfg != NULLP)
3665 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3666 *numCs = UnrestrictedSetNcsTable[idx];
3671 /***********************************************************************
3673 * @brief Fills the PRACH PDU in UL TTI Request
3677 * Function : fillPrachPdu
3680 * -Fills the PRACH PDU in UL TTI Request
3682 * @params[in] Pointer to Prach Pdu
3683 * Pointer to CurrUlSlot
3684 * Pointer to macCellCfg
3686 * ********************************************************************/
3689 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3691 if(ulTtiReqPdu != NULLP)
3693 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3694 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3695 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3696 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3697 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3698 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3699 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3700 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3701 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3702 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3703 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3704 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3705 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3706 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3707 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3711 /*******************************************************************
3713 * @brief Filling PUSCH PDU in UL TTI Request
3717 * Function : fillPuschPdu
3719 * Functionality: Filling PUSCH PDU in UL TTI Request
3722 * @return ROK - success
3725 * ****************************************************************/
3726 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3728 if(ulTtiReqPdu != NULLP)
3730 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3731 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3732 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3733 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3734 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3735 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3736 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3737 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3738 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3739 macCellCfg->initialUlBwp.bwp.scs;
3740 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3741 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3742 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3743 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
3744 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3745 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcsTable;
3746 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3747 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3748 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3749 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3750 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3751 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3752 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3753 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3754 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3755 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3756 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3757 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3758 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3759 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3760 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3761 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3762 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3763 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3764 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3765 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3766 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3767 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3768 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3769 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3770 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3771 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3772 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3773 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3774 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3775 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3776 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3777 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3778 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3779 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3780 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3781 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3782 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3783 /* numCb is 0 for new transmission */
3784 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3786 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3790 /*******************************************************************
3792 * @brief Fill PUCCH PDU in Ul TTI Request
3796 * Function : fillPucchPdu
3798 * Functionality: Fill PUCCH PDU in Ul TTI Request
3801 * @return ROK - success
3804 * ****************************************************************/
3805 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3806 MacUlSlot *currUlSlot)
3808 if(ulTtiReqPdu != NULLP)
3810 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3811 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3812 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3813 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3814 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3815 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3816 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3817 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3818 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3819 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3820 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3821 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
3822 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3823 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3824 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3825 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3826 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
3827 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
3828 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3829 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3830 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3831 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
3832 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3833 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
3834 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
3835 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
3836 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
3837 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3838 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3839 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3840 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3841 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3842 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3843 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3844 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3845 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3846 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3848 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3854 /*******************************************************************
3856 * @brief Sends UL TTI Request to PHY
3860 * Function : fillUlTtiReq
3863 * -Sends FAPI Param req to PHY
3865 * @params[in] Pointer to CmLteTimingInfo
3866 * @return ROK - success
3869 ******************************************************************/
3870 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3874 uint8_t pduIdx = -1;
3875 SlotIndInfo ulTtiReqTimingInfo;
3876 MacUlSlot *currUlSlot = NULLP;
3877 MacCellCfg macCellCfg;
3878 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3879 fapi_msg_header_t *msgHeader;
3880 p_fapi_api_queue_elem_t ulTtiElem;
3881 p_fapi_api_queue_elem_t headerElem;
3883 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3885 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3886 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3889 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3890 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3892 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3895 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
3896 sizeof(fapi_ul_tti_req_t));
3897 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
3898 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
3899 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
3900 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3901 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3902 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3903 ulTtiReq->nGroup = 0;
3904 if(ulTtiReq->nPdus > 0)
3906 /* Fill Prach Pdu */
3907 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3910 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3913 /* Fill PUSCH PDU */
3914 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3917 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3919 /* Fill PUCCH PDU */
3920 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3923 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3927 /* Fill message header */
3928 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3931 DU_LOG("\nLWR_MAC: Memory allocation failed for UL TTI req header");
3932 LWR_MAC_FREE(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
3935 FILL_FAPI_LIST_ELEM(headerElem, ulTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3936 sizeof(fapi_msg_header_t));
3937 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3938 msgHeader->num_msg = 1;
3939 msgHeader->handle = 0;
3940 #ifdef ODU_SLOT_IND_DEBUG_LOG
3941 DU_LOG("\nLWR_MAC: Sending UL TTI Request");
3943 LwrMacSendToL1(headerElem);
3945 memset(currUlSlot, 0, sizeof(MacUlSlot));
3950 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
3951 memset(currUlSlot, 0, sizeof(MacUlSlot));
3957 lwr_mac_procInvalidEvt(&currTimingInfo);
3964 /*******************************************************************
3966 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3970 * Function : fillUlDciPdu
3973 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3975 * @params[in] Pointer to fapi_dl_dci_t
3976 * Pointer to DciInfo
3979 ******************************************************************/
3980 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3982 if(ulDciPtr != NULLP)
3988 uint8_t coreset1Size = 0;
3989 uint16_t rbStart = 0;
3991 uint8_t dciFormatId = 0;
3992 uint32_t freqDomResAssign;
3993 uint8_t timeDomResAssign;
3994 uint8_t freqHopFlag;
3995 uint8_t modNCodScheme;
3997 uint8_t redundancyVer = 0;
3998 uint8_t harqProcessNum = 0;
3999 uint8_t puschTpc = 0;
4000 uint8_t ul_SlInd = 0;
4002 /* Size(in bits) of each field in DCI format 0_0 */
4003 uint8_t dciFormatIdSize = 1;
4004 uint8_t freqDomResAssignSize = 0;
4005 uint8_t timeDomResAssignSize = 4;
4006 uint8_t freqHopFlagSize = 1;
4007 uint8_t modNCodSchemeSize = 5;
4008 uint8_t ndiSize = 1;
4009 uint8_t redundancyVerSize = 2;
4010 uint8_t harqProcessNumSize = 4;
4011 uint8_t puschTpcSize = 2;
4012 uint8_t ul_SlIndSize = 1;
4014 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4015 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4016 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4017 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4018 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4019 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4020 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4021 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4022 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4023 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4024 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
4025 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4027 /* Calculating freq domain resource allocation field value and size
4028 * coreset1Size = Size of coreset 1
4029 * RBStart = Starting Virtual Rsource block
4030 * RBLen = length of contiguously allocted RBs
4031 * Spec 38.214 Sec 5.1.2.2.2
4033 if(schDciInfo->formatType == FORMAT0_0)
4035 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4036 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
4037 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
4039 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4041 if((rbLen - 1) <= floor(coreset1Size / 2))
4042 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4044 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4045 + (coreset1Size - 1 - rbStart);
4047 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4049 /* Fetching DCI field values */
4050 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
4051 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
4052 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
4053 modNCodScheme = schDciInfo->format.format0_0.mcs;
4054 ndi = schDciInfo->format.format0_0.ndi;
4055 redundancyVer = schDciInfo->format.format0_0.rv;
4056 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
4057 puschTpc = schDciInfo->format.format0_0.tpcCmd;
4058 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
4060 /* Reversing bits in each DCI field */
4061 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4062 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4063 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4064 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4065 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4066 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4067 puschTpc = reverseBits(puschTpc, puschTpcSize);
4068 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4070 /* Calulating total number of bytes in buffer */
4071 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4072 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4073 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4075 numBytes = ulDciPtr->payloadSizeBits / 8;
4076 if(ulDciPtr->payloadSizeBits % 8)
4079 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4081 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
4085 /* Initialize buffer */
4086 for(bytePos = 0; bytePos < numBytes; bytePos++)
4087 ulDciPtr->payload[bytePos] = 0;
4089 bytePos = numBytes - 1;
4092 /* Packing DCI format fields */
4093 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4094 dciFormatId, dciFormatIdSize);
4095 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4096 freqDomResAssign, freqDomResAssignSize);
4097 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4098 timeDomResAssign, timeDomResAssignSize);
4099 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4100 freqHopFlag, freqHopFlagSize);
4101 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4102 modNCodScheme, modNCodSchemeSize);
4103 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4105 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4106 redundancyVer, redundancyVerSize);
4107 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4108 harqProcessNum, harqProcessNumSize);
4109 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4110 puschTpc, puschTpcSize);
4111 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4112 ul_SlInd, ul_SlIndSize);
4114 } /* fillUlDciPdu */
4116 /*******************************************************************
4118 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4122 * Function : fillUlDciPdcchPdu
4125 * -Fills the Pdcch PDU info
4127 * @params[in] Pointer to FAPI DL TTI Req
4128 * Pointer to PdcchCfg
4131 ******************************************************************/
4132 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4134 if(ulDciReqPdu != NULLP)
4136 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4137 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4138 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4139 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4140 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4141 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4142 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4143 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4144 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4145 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
4146 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4147 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4148 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4149 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4150 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4151 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4152 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4154 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4155 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4160 /*******************************************************************
4162 * @brief Sends UL DCI Request to PHY
4166 * Function : fillUlDciReq
4169 * -Sends FAPI Ul Dci req to PHY
4171 * @params[in] Pointer to CmLteTimingInfo
4172 * @return ROK - success
4175 ******************************************************************/
4176 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
4180 uint8_t numPduEncoded = 0;
4181 SlotIndInfo ulDciReqTimingInfo;
4182 MacDlSlot *currDlSlot = NULLP;
4183 fapi_ul_dci_req_t *ulDciReq;
4184 fapi_msg_header_t *msgHeader;
4185 p_fapi_api_queue_elem_t ulDciElem;
4186 p_fapi_api_queue_elem_t headerElem;
4188 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4190 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4191 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
4192 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
4194 if(currDlSlot->dlInfo.ulGrant != NULLP)
4196 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4199 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4200 sizeof(fapi_ul_dci_req_t));
4201 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4202 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4203 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4205 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4206 ulDciReq->slot = ulDciReqTimingInfo.slot;
4207 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4208 if(ulDciReq->numPdus > 0)
4210 /* Fill PDCCH configuration Pdu */
4211 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4213 /* free UL GRANT at SCH */
4214 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4215 currDlSlot->dlInfo.ulGrant = NULLP;
4217 /* Fill message header */
4218 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
4221 DU_LOG("\nLWR_MAC: Memory allocation failed for UL DCI req header");
4222 LWR_MAC_FREE(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4225 FILL_FAPI_LIST_ELEM(headerElem, ulDciElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
4226 sizeof(fapi_msg_header_t));
4227 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
4228 msgHeader->num_msg = 1;
4229 msgHeader->handle = 0;
4230 #ifdef ODU_SLOT_IND_DEBUG_LOG
4231 DU_LOG("\nLWR_MAC: Sending UL DCI Request");
4233 LwrMacSendToL1(headerElem);
4238 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
4239 memset(currDlSlot, 0, sizeof(MacDlSlot));
4246 lwr_mac_procInvalidEvt(&currTimingInfo);
4252 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4255 /* PHY_STATE_IDLE */
4256 #ifdef INTEL_TIMER_MODE
4257 lwr_mac_procIqSamplesReqEvt,
4259 lwr_mac_procParamReqEvt,
4260 lwr_mac_procParamRspEvt,
4261 lwr_mac_procConfigReqEvt,
4262 lwr_mac_procConfigRspEvt,
4263 lwr_mac_procInvalidEvt,
4264 lwr_mac_procInvalidEvt,
4267 /* PHY_STATE_CONFIGURED */
4268 #ifdef INTEL_TIMER_MODE
4269 lwr_mac_procInvalidEvt,
4271 lwr_mac_procParamReqEvt,
4272 lwr_mac_procParamRspEvt,
4273 lwr_mac_procConfigReqEvt,
4274 lwr_mac_procConfigRspEvt,
4275 lwr_mac_procStartReqEvt,
4276 lwr_mac_procInvalidEvt,
4279 /* PHY_STATE_RUNNING */
4280 #ifdef INTEL_TIMER_MODE
4281 lwr_mac_procInvalidEvt,
4283 lwr_mac_procInvalidEvt,
4284 lwr_mac_procInvalidEvt,
4285 lwr_mac_procConfigReqEvt,
4286 lwr_mac_procConfigRspEvt,
4287 lwr_mac_procInvalidEvt,
4288 lwr_mac_procStopReqEvt,
4292 /*******************************************************************
4294 * @brief Sends message to LWR_MAC Fsm Event Handler
4298 * Function : sendToLowerMac
4301 * -Sends message to LowerMac
4303 * @params[in] Message Type
4309 ******************************************************************/
4310 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4312 lwrMacCb.event = msgType;
4313 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4315 /**********************************************************************
4317 **********************************************************************/