1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /* Contains definitions for MAC CL modules */
24 #define LWR_MAC_ALLOC(_datPtr, _size) WLS_MEM_ALLOC(_datPtr, _size);
26 #define LWR_MAC_ALLOC(_datPtr, _size) MAC_ALLOC(_datPtr, _size);
30 #define LWR_MAC_FREE(_datPtr, _size) WLS_MEM_FREE(_datPtr, _size);
32 #define LWR_MAC_FREE(_datPtr, _size) MAC_FREE(_datPtr, _size);
43 /* Events in Lower Mac */
61 typedef struct lwrMacGlobalCb
65 bool clCfgDone; /* CL configuration done */
66 LwrMacCellCb cellCb[MAX_NUM_CELL]; /* List of Cells configured */
67 uint8_t numCell; /* Number of Cells configured */
68 PhyState phyState; /* State of PHY */
69 EventState event; /* State of Event */
85 NORMAL_CYCLIC_PREFIX_MASK,
86 EXTENDED_CYCLIC_PREFIX_MASK
116 CCE_MAPPING_INTERLEAVED_MASK,
117 CCE_MAPPING_NONINTERLVD_MASK
143 VRB_TO_PRB_MAP_NON_INTLV,
144 VRB_TO_PRB_MAP_INTLVD
161 DMRS_ADDITIONAL_POS_0,
162 DMRS_ADDITIONAL_POS_1,
163 DMRS_ADDITIONAL_POS_2,
164 DMRS_ADDITIONAL_POS_3
198 PRACH_FD_OCC_IN_A_SLOT_1 = 1,
199 PRACH_FD_OCC_IN_A_SLOT_2 = 2,
200 PRACH_FD_OCC_IN_A_SLOT_4 = 4,
201 PRACH_FD_OCC_IN_A_SLOT_8 = 8
210 typedef struct clCellParam
212 ReleaseCapab releaseCapability; /* Release Capability */
213 PhyState ParamPhystate;
214 ParamSupport skipBlankDlConfig;
215 ParamSupport skipBlankUlConfig;
216 ParamSupport numTlvsToReport;
217 CyclicPrefix cyclicPrefix;
218 SubCarrierSpacing supportedSubcarrierSpacingDl;
219 SupportedBandwidth supportedBandwidthDl;
220 SubCarrierSpacing supportedSubcarrierSpacingsUl;
221 SupportedBandwidth supportedBandwidthUl;
222 CCEMappingType cceMappingType;
223 ParamSupport coresetOutsideFirst3OfdmSymsOfSlot;
224 ParamSupport precoderGranularityCoreset;
225 ParamSupport pdcchMuMimo;
226 ParamSupport pdcchPrecoderCycling;
227 uint8_t maxPdcchsPerSlot;
228 Formats pucchFormats;
229 uint8_t maxPucchsPerSlot;
230 MappingType pdschMappingType;
231 AllocationType pdschAllocationTypes;
232 VrbToPrbMap pdschVrbToPrbMapping;
233 ParamSupport pdschCbg;
234 DmrsConfigType pdschDmrsConfigTypes;
235 DmrMaxLen pdschDmrsMaxLength;
236 DmrsPos pdschDmrsAdditionalPos;
237 uint8_t maxPdschsTBsPerSlot;
238 uint8_t maxNumberMimoLayersPdsch;
239 ModulationOrder supportedMaxModulationOrderDl;
240 uint8_t maxMuMimoUsersDl;
241 ParamSupport pdschDataInDmrsSymbols;
242 ParamSupport premptionSupport;
243 ParamSupport pdschNonSlotSupport;
244 ParamSupport uciMuxUlschInPusch;
245 ParamSupport uciOnlyPusch;
246 ParamSupport puschFrequencyHopping;
247 DmrsConfigType puschDmrsConfigTypes;
248 DmrMaxLen puschDmrsMaxLength;
249 DmrsPos puschDmrsAdditionalPos;
250 ParamSupport puschCbg;
251 MappingType puschMappingType;
252 AllocationType puschAllocationTypes;
253 VrbToPrbMap puschVrbToPrbMapping;
254 uint8_t puschMaxPtrsPorts;
255 uint8_t maxPduschsTBsPerSlot;
256 uint8_t maxNumberMimoLayersNonCbPusch;
257 ModulationOrder supportedModulationOrderUl;
258 uint8_t maxMuMimoUsersUl;
259 ParamSupport dftsOfdmSupport;
260 AggregationFactor puschAggregationFactor;
261 Formats prachLongFormats;
262 ShortFormat prachShortFormats;
263 ParamSupport prachRestrictedSets;
264 FdOccPerSlot maxPrachFdOccasionsInASlot;
265 RssiMeasurement rssiMeasurementSupport;
269 LwrMacCellCb * lwrMacGetCellCb ARGS((uint16_t cellId));
270 uint32_t reverseBits(uint32_t num, uint8_t numBits);
271 void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\
272 uint32_t val, uint8_t valSize);
273 void lwrMacLayerInit();
277 /**********************************************************************
279 **********************************************************************/