1 /******************************************************************************
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3 * Copyright (c) 2019 Intel.
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5 * Licensed under the Apache License, Version 2.0 (the "License");
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6 * you may not use this file except in compliance with the License.
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7 * You may obtain a copy of the License at
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9 * http://www.apache.org/licenses/LICENSE-2.0
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11 * Unless required by applicable law or agreed to in writing, software
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12 * distributed under the License is distributed on an "AS IS" BASIS,
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13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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14 * See the License for the specific language governing permissions and
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15 * limitations under the License.
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17 *******************************************************************************/
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20 #include "common.hpp"
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21 #include "xran_fh_o_du.h"
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22 #include "xran_cp_api.h"
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23 #include "xran_lib_wrap.hpp"
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24 #include "xran_common.h"
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34 using namespace std;
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35 const std::string module_name = "init_sys_functional";
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37 extern enum xran_if_state xran_if_current_state;
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39 void physide_sym_call_back(void * param)
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45 int physide_dl_tti_call_back(void * param)
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51 int physide_ul_half_slot_call_back(void * param)
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57 int physide_ul_full_slot_call_back(void * param)
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63 void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
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69 void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
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75 class Init_Sys_Check : public KernelTests
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79 void SetUp() override
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82 xranlib->Open(nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback);
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85 /* It's called after an execution of the each test case.*/
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86 void TearDown() override
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94 BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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95 BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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96 BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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97 BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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98 BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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100 /* buffers lists */
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101 struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
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102 struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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103 struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
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104 struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
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105 struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
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107 void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
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108 uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][xranLibWraper::MAX_SW_XRAN_INTERFACE_NUM];
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109 uint16_t nInstanceNum;
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112 TEST_P(Init_Sys_Check, Test_Open_Close)
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114 struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
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115 /* check stat of lib */
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116 ASSERT_EQ(1, p_xran_dev_ctx->enableCP);
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117 ASSERT_EQ(1, p_xran_dev_ctx->xran2phy_mem_ready);
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120 TEST_P(Init_Sys_Check, Test_xran_mm_init)
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123 ret = xran_mm_init (xranlib->get_xranhandle(), (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
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127 /* this case cannot be tested since memory cannot be initialized twice */
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128 /* memory initialization is moved to the wrapper class */
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130 TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)
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135 uint32_t nSW_ToFpga_FTH_TxBufferLen = 13168; /* 273*12*4 + 64*/
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139 struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
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140 struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
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141 struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
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142 struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
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143 struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
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145 Init_Sys_Check::nInstanceNum = xranlib->get_num_cc();
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147 for (k = 0; k < XRAN_PORTS_NUM; k++) {
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148 ret = xran_sector_get_instances (xranlib->get_xranhandle(), Init_Sys_Check::nInstanceNum, &(Init_Sys_Check::nInstanceHandle[k][0]));
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150 ASSERT_EQ(1, Init_Sys_Check::nInstanceNum);
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154 ret = xran_bm_init(Init_Sys_Check::nInstanceHandle[0][0],
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155 &Init_Sys_Check::nBufPoolIndex[0][0],
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156 XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
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159 ret = xran_bm_allocate_buffer(Init_Sys_Check::nInstanceHandle[0][0], Init_Sys_Check::nBufPoolIndex[0][0],&ptr, &mb);
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161 ASSERT_NE(ptr, nullptr);
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162 ASSERT_NE(mb, nullptr);
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164 ret = xran_bm_free_buffer(Init_Sys_Check::nInstanceHandle[0][0], ptr, mb);
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169 for(int i=0; i< xranlib->get_num_cc(); i++)
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171 for(int j=0; j<XRAN_N_FE_BUF_LEN; j++)
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173 for(int z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
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174 pFthTxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
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175 pFthTxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
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176 pFthRxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
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177 pFthRxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
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178 pFthRxRachBuffer[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
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183 if(NULL != Init_Sys_Check::nInstanceHandle[0])
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185 for (int i = 0; i < xranlib->get_num_cc(); i++)
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187 ret = xran_5g_fronthault_config (Init_Sys_Check::nInstanceHandle[0][i],
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189 pFthTxPrbMapBuffer[i],
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191 pFthRxPrbMapBuffer[i],
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192 xran_fh_rx_callback, &pFthRxBuffer[i][0]);
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197 // add prach callback here
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198 for (int i = 0; i < xranlib->get_num_cc(); i++)
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200 ret = xran_5g_prach_req(Init_Sys_Check::nInstanceHandle[0][i], pFthRxRachBuffer[i],
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201 xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
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210 TEST_P(Init_Sys_Check, Test_xran_get_common_counters)
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213 struct xran_common_counters x_counters;
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215 ret = xran_get_common_counters(xranlib->get_xranhandle(), &x_counters);
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218 ASSERT_EQ(0, x_counters.Rx_on_time);
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219 ASSERT_EQ(0, x_counters.Rx_early);
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220 ASSERT_EQ(0, x_counters.Rx_late);
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221 ASSERT_EQ(0, x_counters.Rx_corrupt);
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222 ASSERT_EQ(0, x_counters.Rx_pkt_dupl);
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223 ASSERT_EQ(0, x_counters.Total_msgs_rcvd);
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226 TEST_P(Init_Sys_Check, Test_xran_get_slot_idx)
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228 #define NUM_OF_SUBFRAME_PER_FRAME 10
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229 int32_t nNrOfSlotInSf = 1;
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230 int32_t nSfIdx = -1;
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231 uint32_t nFrameIdx;
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232 uint32_t nSubframeIdx;
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236 uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
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237 nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
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238 + nSubframeIdx*nNrOfSlotInSf
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241 ASSERT_EQ(0, nSfIdx);
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244 TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb)
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246 struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
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248 ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
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250 ASSERT_EQ(physide_dl_tti_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]);
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251 ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);
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252 ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]);
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254 ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
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256 ASSERT_EQ(physide_ul_half_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]);
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257 ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]);
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258 ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]);
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260 ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
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262 ASSERT_EQ(physide_ul_full_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]);
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263 ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_FULL_SLOT_RX]);
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264 ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_FULL_SLOT_RX]);
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268 TEST_P(Init_Sys_Check, Test_xran_reg_sym_cb){
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270 ret = xran_reg_sym_cb(xranlib->get_xranhandle(), physide_sym_call_back, NULL, 11, 0);
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274 TEST_P(Init_Sys_Check, Test_xran_mm_destroy){
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276 ret = xran_mm_destroy(xranlib->get_xranhandle());
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280 TEST_P(Init_Sys_Check, Test_xran_start_stop){
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282 ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);
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283 ret = xranlib->Start();
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285 ASSERT_EQ(XRAN_RUNNING, xran_if_current_state);
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286 ret = xranlib->Stop();
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288 ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);
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291 INSTANTIATE_TEST_CASE_P(UnitTest, Init_Sys_Check,
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292 testing::ValuesIn(get_sequence(Init_Sys_Check::get_number_of_cases("init_sys_functional"))));
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