1 /******************************************************************************
3 * Copyright (c) 2019 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
21 * This file consist of implementation of FAPI UL_TTI.request message.
25 #include "nr5g_fapi_framework.h"
26 #include "gnb_l1_l2_api.h"
27 #include "nr5g_fapi_fapi2mac_api.h"
28 #include "nr5g_fapi_fapi2phy_api.h"
29 #include "nr5g_fapi_fapi2phy_p7_proc.h"
30 #include "nr5g_fapi_fapi2phy_p7_pvt_proc.h"
31 #include "nr5g_fapi_memory.h"
34 /** @ingroup group_source_api_p7_fapi2phy_proc
36 * @param[in] p_phy_instance Pointer to PHY instance.
37 * @param[in] p_fapi_req Pointer to FAPI UL_TTI.request message structure.
39 * @return Returns ::SUCCESS and ::FAILURE.
42 * This message indicates the control information for an uplink slot.
45 uint8_t nr5g_fapi_ul_tti_request(
46 p_nr5g_fapi_phy_instance_t p_phy_instance,
47 fapi_ul_tti_req_t * p_fapi_req,
48 fapi_vendor_msg_t * p_fapi_vendor_msg)
50 PULConfigRequestStruct p_ia_ul_config_req;
51 PMAC2PHY_QUEUE_EL p_list_elem;
52 nr5g_fapi_stats_t *p_stats;
53 UNUSED(p_fapi_vendor_msg);
55 if (NULL == p_phy_instance) {
56 NR5G_FAPI_LOG(ERROR_LOG, ("[NR5G_FAPI][UL_TTI.request] Invalid "
60 p_stats = &p_phy_instance->stats;
61 p_stats->fapi_stats.fapi_ul_tti_req++;
63 if (NULL == p_fapi_req) {
64 NR5G_FAPI_LOG(ERROR_LOG, ("[NR5G_FAPI][UL_TTI.request] Invalid fapi "
69 p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem((uint8_t)
70 MSG_TYPE_PHY_UL_CONFIG_REQ, 1,
71 (uint32_t) sizeof(ULConfigRequestStruct));
73 NR5G_FAPI_LOG(ERROR_LOG,
74 ("[NR5G_FAPI][UL_TTI.request] Unable to create "
75 "list element. Out of memory!!!"));
79 p_ia_ul_config_req = (PULConfigRequestStruct) (p_list_elem + 1);
80 NR5G_FAPI_MEMSET(p_ia_ul_config_req, sizeof(ULConfigRequestStruct), 0,
81 sizeof(ULConfigRequestStruct));
82 p_ia_ul_config_req->sMsgHdr.nMessageType = MSG_TYPE_PHY_UL_CONFIG_REQ;
83 p_ia_ul_config_req->sMsgHdr.nMessageLen =
84 (uint16_t) sizeof(ULConfigRequestStruct);
86 if (FAILURE == nr5g_fapi_ul_tti_req_to_phy_translation(p_phy_instance,
87 p_fapi_req, p_ia_ul_config_req)) {
88 nr5g_fapi_fapi2phy_destroy_api_list_elem(p_list_elem);
89 NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_TTI.request][%d][%d,%d] Not Sent",
90 p_phy_instance->phy_id, p_ia_ul_config_req->sSFN_Slot.nSFN,
91 p_ia_ul_config_req->sSFN_Slot.nSlot));
95 nr5g_fapi_fapi2phy_add_to_api_list(p_list_elem);
97 p_stats->iapi_stats.iapi_ul_config_req++;
98 NR5G_FAPI_LOG(TRACE_LOG, ("[NR5G_FAPI][UL_TTI.request][%d][%d,%d]",
99 p_phy_instance->phy_id,
100 p_ia_ul_config_req->sSFN_Slot.nSFN,
101 p_ia_ul_config_req->sSFN_Slot.nSlot));
106 /** @ingroup group_source_api_p7_fapi2phy_proc
108 * @param[in] bwp_size Variable holding the Bandwidth part size.
110 * @return Returns ::RBG Size.
113 * This functions calculates and return RBG Size from Bandwidth part size provided.
116 uint8_t nr5g_fapi_calc_n_rbg_size(
119 uint8_t n_rbg_size = 0;
120 if (bwp_size >= 1 && bwp_size <= 36) {
122 } else if (bwp_size >= 37 && bwp_size <= 72) {
124 } else if (bwp_size >= 73 && bwp_size <= 144) {
126 } else if (bwp_size >= 145 && bwp_size <= 275) {
134 /** @ingroup group_source_api_p7_fapi2phy_proc
136 * @param[in] n_rbg_size Variable holding the RBG Size
137 * @param[in] p_push_pdu Pointer to FAPI PUSCH Pdu
139 * @return Returns ::RBG Bitmap entry
142 * This functions derives the RBG Bitmap entry for PUSCH Type-0 allocation.
145 uint32_t nr5g_fapi_calc_n_rbg_index_entry(
147 fapi_ul_pusch_pdu_t * p_pusch_pdu)
149 uint8_t i, temp, num_bits = 0;
150 uint32_t n_rbg_bitmap = 0;
151 uint8_t rb_bitmap_entries, rb_bitmap;
153 rb_bitmap_entries = ceil(n_rbg_size / 8);
154 for (i = 0; i < rb_bitmap_entries; i++) {
157 rb_bitmap = p_pusch_pdu->rbBitmap[i];
158 while (num_bits < 8) {
159 if (rb_bitmap & (1 << num_bits)) {
160 temp |= (1 << (7 - num_bits));
164 n_rbg_bitmap |= ((n_rbg_bitmap | temp) << (32 - (8 * (i + 1))));
169 /** @ingroup group_source_api_p7_fapi2phy_proc
171 * @param[in] fapi_alpha_scaling Variable holding the FAPI Alpha Scaling Value.
173 * @return Returns ::PHY equivalent Alpha Scaling Value.
176 * This functions derives the PHY equivalent Alpha Scaling value from FAPI Alpha Scaling Value.
179 uint8_t nr5g_fapi_calc_alpha_scaling(
180 uint8_t fapi_alpha_scaling)
182 uint8_t alpha_scaling;
184 switch (fapi_alpha_scaling) {
205 return alpha_scaling;
208 /** @ingroup group_source_api_p7_fapi2phy_proc
210 * @param[in] p_pusch_data Pointer to FAPI Optional PUSCH Data structure.
211 * @param[in] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
216 * This function converts FAPI UL_TTI.request's Optional PUSCH Data to IAPI UL_Config.request's
217 * ULSCH PDU structure.
220 void nr5g_fapi_pusch_data_to_phy_ulsch_translation(
221 nr5g_fapi_pusch_info_t * p_pusch_info,
222 fapi_pusch_data_t * p_pusch_data,
223 ULSCHPDUStruct * p_ul_data_chan)
225 p_ul_data_chan->nRV = p_pusch_data->rvIndex;
226 p_pusch_info->harq_process_id = p_ul_data_chan->nHARQID =
227 p_pusch_data->harqProcessId;
228 p_ul_data_chan->nNDI = p_pusch_data->newDataIndicator;
229 p_ul_data_chan->nTBSize = p_pusch_data->tbSize;
230 //numCb and cbPresentAndPoistion[] is ignored as per design
233 /** @ingroup group_source_api_p7_fapi2phy_proc
235 * @param[in] p_pusch_uci Pointer to FAPI Optional PUSCH UCI structure.
236 * @param[in] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
241 * This function converts FAPI UL_TTI.request's Optional PUSCH UCI to IAPI UL_Config.request's
242 * ULSCH PDU structure.
245 void nr5g_fapi_pusch_uci_to_phy_ulsch_translation(
246 fapi_pusch_uci_t * p_pusch_uci,
247 ULSCHPDUStruct * p_ul_data_chan)
249 p_ul_data_chan->nAck = p_pusch_uci->harqAckBitLength;
250 //csiPart1BitLength and csiPart2BitLength are ignored as per design
251 p_ul_data_chan->nAlphaScaling =
252 nr5g_fapi_calc_alpha_scaling(p_pusch_uci->alphaScaling);
253 //p_ul_data_chan->nAlphaScaling = 0;
254 p_ul_data_chan->nBetaOffsetACKIndex = p_pusch_uci->betaOffsetHarqAck;
255 //betaOffsetCsi1 and betaOffsetCsi2 are ignored as per design
258 /** @ingroup group_source_api_p7_fapi2phy_proc
260 * @param[in] p_pusch_ptrs Pointer to FAPI Optional PUSCH PTRS structure.
261 * @param[in] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
266 * This function converts FAPI UL_TTI.request's Optional PUSCH PTRS to IAPI UL_Config.request's
267 * ULSCH PDU structure.
270 void nr5g_fapi_pusch_ptrs_to_phy_ulsch_translation(
271 fapi_pusch_ptrs_t * p_pusch_ptrs,
272 ULSCHPDUStruct * p_ul_data_chan)
274 uint8_t i, num_ptrs_ports = 0, port_index = 0;
275 fapi_ptrs_info_t *p_ptrs_info;
277 if (p_pusch_ptrs->ptrsTimeDensity <= 2) {
278 p_ul_data_chan->nPTRSTimeDensity =
279 pow(2, p_pusch_ptrs->ptrsTimeDensity);
281 if (p_pusch_ptrs->ptrsFreqDensity == 0 ||
282 p_pusch_ptrs->ptrsFreqDensity == 1) {
283 p_ul_data_chan->nPTRSFreqDensity =
284 pow(2, (p_pusch_ptrs->ptrsFreqDensity + 1));
286 if (p_pusch_ptrs->numPtrsPorts > 0) {
287 num_ptrs_ports = p_ul_data_chan->nNrOfPTRSPorts = 1;
289 for (i = 0; (i < num_ptrs_ports && port_index < FAPI_MAX_PTRS_PORTS); i++) {
290 p_ptrs_info = &p_pusch_ptrs->ptrsInfo[i];
291 if ((p_ptrs_info->ptrsPortIndex >> i) & 0x01) {
292 p_ul_data_chan->nPTRSPortIndex[port_index++] = i;
294 //PTRSDmrsPort is ignored as per Design
295 p_ul_data_chan->nPTRSReOffset = p_ptrs_info->ptrsReOffset;
299 /** @ingroup group_source_api_p7_fapi2phy_proc
301 * @param[in] p_phy_instance Pointer to PHY instance.
302 * @param[in] p_pusch_pdu Pointer to FAPI PUSCH PDU structure.
303 * @param[out] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
308 * This function converts FAPI UL_TTI.request's PUSCH PDU to IAPI UL_Config.request's
309 * ULSCH PDU structure.
312 void nr5g_fapi_pusch_to_phy_ulsch_translation(
313 p_nr5g_fapi_phy_instance_t p_phy_instance,
314 nr5g_fapi_pusch_info_t * p_pusch_info,
315 fapi_ul_pusch_pdu_t * p_pusch_pdu,
316 ULSCHPDUStruct * p_ul_data_chan)
318 uint8_t mcs_table, nr_of_layers, n_rbg_size;
319 uint8_t i, port_index = 0;
320 uint16_t dmrs_ports, bwp_size, bwp_start, pdu_bitmap;
321 nr5g_fapi_stats_t *p_stats;
323 p_stats = &p_phy_instance->stats;
324 p_stats->fapi_stats.fapi_ul_tti_pusch_pdus++;
326 NR5G_FAPI_MEMSET(p_ul_data_chan, sizeof(ULSCHPDUStruct), 0,
327 sizeof(ULSCHPDUStruct));
329 p_ul_data_chan->sPDUHdr.nPDUType = UL_PDU_TYPE_ULSCH;
330 p_ul_data_chan->sPDUHdr.nPDUSize = RUP32B(sizeof(ULSCHPDUStruct));
332 p_ul_data_chan->nRNTI = p_pusch_pdu->rnti;
334 p_pusch_info->handle = p_ul_data_chan->nUEId =
335 (uint16_t) p_pusch_pdu->handle;
337 bwp_size = p_ul_data_chan->nBWPSize = p_pusch_pdu->bwpSize;
338 bwp_start = p_ul_data_chan->nBWPStart = p_pusch_pdu->bwpStart;
340 p_ul_data_chan->nSubcSpacing = p_pusch_pdu->subCarrierSpacing;
341 p_ul_data_chan->nCpType = p_pusch_pdu->cyclicPrefix;
342 p_ul_data_chan->nMCS = p_pusch_pdu->mcsIndex;
343 p_ul_data_chan->nTransPrecode = 0;
344 mcs_table = p_pusch_pdu->mcsTable;
345 if (mcs_table <= 2) {
346 p_ul_data_chan->nMcsTable = mcs_table;
348 if ((mcs_table > 2) && (mcs_table <= 4)) {
349 p_ul_data_chan->nTransPrecode = 1;
351 if (mcs_table == 3) {
352 p_ul_data_chan->nMcsTable = 0;
354 p_ul_data_chan->nMcsTable = 2;
358 p_ul_data_chan->nNid = p_pusch_pdu->dataScramblingId;
359 p_ul_data_chan->nDMRSConfigType = p_pusch_pdu->dmrsConfigType;
360 p_ul_data_chan->nMappingType = p_pusch_pdu->mappingType;
361 p_ul_data_chan->nNrOfDMRSSymbols = p_pusch_pdu->nrOfDmrsSymbols;
362 p_ul_data_chan->nDMRSAddPos = p_pusch_pdu->dmrsAddPos;
363 p_ul_data_chan->nNIDnSCID = p_pusch_pdu->ulDmrsScramblingId;
364 p_ul_data_chan->nSCID = p_pusch_pdu->scid;
365 p_ul_data_chan->nNrOfCDMs = p_pusch_pdu->numDmrsCdmGrpsNoData;
367 dmrs_ports = p_pusch_pdu->dmrsPorts;
368 nr_of_layers = p_ul_data_chan->nNrOfLayers = p_pusch_pdu->nrOfLayers;
369 for (i = 0; (i < FAPI_MAX_DMRS_PORTS && port_index < nr_of_layers); i++) {
370 if (port_index < FAPI_MAX_UL_LAYERS) {
371 if ((dmrs_ports >> i) && 0x0001) {
372 p_ul_data_chan->nPortIndex[port_index++] = i;
378 p_ul_data_chan->nTPPuschID = p_pusch_pdu->nTpPuschId;
379 p_ul_data_chan->nTpPi2BPSK = p_pusch_pdu->tpPi2Bpsk;
380 //Config-1 alone is supported
381 n_rbg_size = p_ul_data_chan->nRBGSize = nr5g_fapi_calc_n_rbg_size(bwp_size);
382 if (n_rbg_size > 0) {
383 p_ul_data_chan->nNrOfRBGs =
384 ceil((bwp_size + (bwp_start % n_rbg_size)) / n_rbg_size);
386 //First entry would be sufficient as maximum no of RBG's is at max 18.
387 p_ul_data_chan->nRBGIndex[0] =
388 nr5g_fapi_calc_n_rbg_index_entry(n_rbg_size, p_pusch_pdu);
389 p_ul_data_chan->nRBStart = p_pusch_pdu->rbStart;
390 p_ul_data_chan->nRBSize = p_pusch_pdu->rbSize;
391 p_ul_data_chan->nVRBtoPRB = p_pusch_pdu->vrbToPrbMapping;
392 p_ul_data_chan->nResourceAllocType = p_pusch_pdu->resourceAlloc;
393 p_ul_data_chan->nStartSymbolIndex = p_pusch_pdu->startSymbIndex;
394 p_ul_data_chan->nNrOfSymbols = p_pusch_pdu->nrOfSymbols;
396 p_ul_data_chan->nPTRSPresent = 0;
397 pdu_bitmap = p_pusch_pdu->pduBitMap;
398 if (pdu_bitmap & 0x01) {
399 nr5g_fapi_pusch_data_to_phy_ulsch_translation(p_pusch_info,
400 &p_pusch_pdu->puschData, p_ul_data_chan);
402 if (pdu_bitmap & 0x02) {
403 nr5g_fapi_pusch_uci_to_phy_ulsch_translation(&p_pusch_pdu->puschUci,
406 if (pdu_bitmap & 0x04) {
407 nr5g_fapi_pusch_ptrs_to_phy_ulsch_translation(&p_pusch_pdu->puschPtrs,
410 if ((pdu_bitmap & (1 << 15))) {
411 p_ul_data_chan->nPTRSPresent = 1;
413 p_ul_data_chan->nULType = 0;
414 p_ul_data_chan->nNrOfAntennaPorts =
415 p_phy_instance->phy_config.n_nr_of_rx_ant;
416 p_ul_data_chan->nRBBundleSize = 0;
417 p_ul_data_chan->nPMI = 0;
418 p_ul_data_chan->nTransmissionScheme = 0;
419 p_ul_data_chan->rsv1 = 0;
420 p_ul_data_chan->nNrofRxRU = p_phy_instance->phy_config.n_nr_of_rx_ant;
421 p_stats->iapi_stats.iapi_ul_tti_pusch_pdus++;
424 /** @ingroup group_source_api_p7_fapi2phy_proc
426 * @param[in] num_groups Variable holding the groups for which PUCCH resources
428 * @param[in] initial_cyclic_shift Variable holding the parameter initial_cyclic
429 shift to be verified against the already receieved pucch resources.
430 * @param[in] nr_of_layers Variable holding the parameter nr_of_symbols
431 to be verified against the already received pucch resources.
432 * @param[in] start_symbol_index Variable holding the parameter start_symbol_index
433 to be verified against the already received pucch resources.
434 * @param[in] time_domain_occ_idx Variable holding the parameter time_domain_occ_idx
435 to be verified against the already received pucch resources.
436 * @param[in] p_pucch_resources Pointer pointing to the received pucch resources.
438 * @return group_id, if pucch_resources match with parameters passed.
439 * 0xFF, if pucch_resources not match with parameters passed.
441 * This function returns the group_id if parameters passed already available in
442 * pucch_resources received earlier.
445 uint8_t nr5g_get_pucch_resources_group_id(
447 uint16_t initial_cyclic_shift,
448 uint8_t nr_of_symbols,
449 uint8_t start_symbol_index,
450 uint8_t time_domain_occ_idx,
451 nr5g_fapi_pucch_resources_t * p_pucch_resources)
453 uint8_t i, group_id = 0xFF;
454 for (i = 0; i < num_groups; i++) {
455 if ((initial_cyclic_shift == p_pucch_resources[i].initial_cyclic_shift)
456 && (nr_of_symbols == p_pucch_resources[i].nr_of_symbols)
457 && (start_symbol_index == p_pucch_resources[i].start_symbol_index)
458 && (time_domain_occ_idx ==
459 p_pucch_resources[i].time_domain_occ_idx)) {
460 group_id = p_pucch_resources[i].group_id;
467 /** @ingroup group_source_api_p7_fapi2phy_proc
469 * @param[in] p_phy_instance Pointer to PHY instance.
470 * @param[in] p_pucch_pdu Pointer to FAPI PUSCH PDU structure.
471 * @param[in] p_ul_ctrl_chan Pointer to IAPI ULCCH_UCIPDU structure.
476 * This function converts FAPI UL_TTI.request's PUCCH PDU to IAPI UL_Config.request's
477 * ULCCH_UCI PDU structure.
480 void nr5g_fapi_pucch_to_phy_ulcch_uci_translation(
481 p_nr5g_fapi_phy_instance_t p_phy_instance,
482 nr5g_fapi_pucch_info_t * p_pucch_info,
483 fapi_ul_pucch_pdu_t * p_pucch_pdu,
484 uint8_t * num_group_ids,
485 nr5g_fapi_pucch_resources_t * p_pucch_resources,
486 ULCCHUCIPDUStruct * p_ul_ctrl_chan)
489 nr5g_fapi_stats_t *p_stats;
490 uint8_t initial_cyclic_shift, nr_of_symbols;
491 uint8_t start_symbol_index, time_domain_occ_idx;
492 uint8_t num_groups = *num_group_ids;
494 p_stats = &p_phy_instance->stats;
495 p_stats->fapi_stats.fapi_ul_tti_pucch_pdus++;
496 NR5G_FAPI_MEMSET(p_ul_ctrl_chan, sizeof(ULCCHUCIPDUStruct), 0,
497 sizeof(ULCCHUCIPDUStruct));
498 p_ul_ctrl_chan->sPDUHdr.nPDUType = UL_PDU_TYPE_ULCCH_UCI;
499 p_ul_ctrl_chan->sPDUHdr.nPDUSize = RUP32B(sizeof(ULCCHUCIPDUStruct));
501 p_ul_ctrl_chan->nRNTI = p_pucch_pdu->rnti;
502 p_pucch_info->handle = p_ul_ctrl_chan->nUEId =
503 (uint16_t) p_pucch_pdu->handle;
505 p_ul_ctrl_chan->nSubcSpacing = p_pucch_pdu->subCarrierSpacing;
506 p_ul_ctrl_chan->nCpType = p_pucch_pdu->cyclicPrefix;
507 p_pucch_info->pucch_format = p_ul_ctrl_chan->nFormat =
508 p_pucch_pdu->formatType;
509 if (p_pucch_pdu->pi2Bpsk) {
510 p_ul_ctrl_chan->modType = 1;
512 p_ul_ctrl_chan->modType = 2;
514 p_ul_ctrl_chan->nStartPRB = p_pucch_pdu->prbStart;
515 p_ul_ctrl_chan->nPRBs = p_pucch_pdu->prbSize;
516 start_symbol_index = p_ul_ctrl_chan->nStartSymbolx =
517 p_pucch_pdu->startSymbolIndex;
518 nr_of_symbols = p_ul_ctrl_chan->nSymbols = p_pucch_pdu->nrOfSymbols;
519 p_ul_ctrl_chan->nFreqHopFlag = p_pucch_pdu->freqHopFlag;
521 p_ul_ctrl_chan->n2ndHopPRB = p_pucch_pdu->secondHopPrb;
522 initial_cyclic_shift = p_ul_ctrl_chan->nM0 =
523 p_pucch_pdu->initialCyclicShift;
524 p_ul_ctrl_chan->nID = p_pucch_pdu->dataScramblingId;
525 time_domain_occ_idx = p_ul_ctrl_chan->nFmt1OrthCCodeIdx =
526 p_pucch_pdu->timeDomainOccIdx;
527 p_ul_ctrl_chan->nFmt4OrthCCodeIdx = p_pucch_pdu->preDftOccIdx;
528 p_ul_ctrl_chan->nFmt4OrthCCodeLength = p_pucch_pdu->preDftOccLen;
529 p_ul_ctrl_chan->nAddDmrsFlag = p_pucch_pdu->addDmrsFlag;
530 p_ul_ctrl_chan->nScramID = p_pucch_pdu->dmrsScramblingId;
531 p_ul_ctrl_chan->nSRPriodAriv = p_pucch_pdu->srFlag;
532 p_ul_ctrl_chan->nBitLenUci = p_pucch_pdu->bitLenHarq;
533 p_ul_ctrl_chan->nNrofRxRU = p_phy_instance->phy_config.n_nr_of_rx_ant;
536 nr5g_get_pucch_resources_group_id(num_groups, initial_cyclic_shift,
537 nr_of_symbols, start_symbol_index, time_domain_occ_idx,
539 if (group_id == 0xFF) {
540 p_pucch_resources[num_groups].group_id = num_groups;
541 p_pucch_resources[num_groups].initial_cyclic_shift =
542 initial_cyclic_shift;
543 p_pucch_resources[num_groups].nr_of_symbols = nr_of_symbols;
544 p_pucch_resources[num_groups].start_symbol_index = start_symbol_index;
545 p_pucch_resources[num_groups].time_domain_occ_idx = time_domain_occ_idx;
546 p_ul_ctrl_chan->nGroupId = num_groups;
549 p_ul_ctrl_chan->nGroupId = group_id;
551 *num_group_ids = num_groups;
552 p_stats->iapi_stats.iapi_ul_tti_pucch_pdus++;
555 /** @ingroup group_source_api_p7_fapi2phy_proc
557 * @param[in] p_srs_pdu Pointer to FAPI SRS PDU structure.
558 * @param[in] p_ul_srs_chan Pointer to IAPI SRS PDU structure.
563 * This function converts FAPI UL_TTI.request's SRS PDU to IAPI UL_Config.request's
567 void nr5g_fapi_srs_to_phy_srs_translation(
568 p_nr5g_fapi_phy_instance_t p_phy_instance,
569 fapi_ul_srs_pdu_t * p_srs_pdu,
570 nr5g_fapi_srs_info_t * p_srs_info,
571 SRSPDUStruct * p_ul_srs_chan)
573 nr5g_fapi_stats_t *p_stats;
575 p_stats = &p_phy_instance->stats;
576 p_stats->fapi_stats.fapi_ul_tti_srs_pdus++;
577 NR5G_FAPI_MEMSET(p_ul_srs_chan, sizeof(SRSPDUStruct), 0,
578 sizeof(SRSPDUStruct));
579 p_ul_srs_chan->sPDUHdr.nPDUType = UL_PDU_TYPE_SRS;
580 p_ul_srs_chan->sPDUHdr.nPDUSize = RUP32B(sizeof(SRSPDUStruct));
582 p_ul_srs_chan->nRNTI = p_srs_pdu->rnti;
583 p_srs_info->handle = p_ul_srs_chan->nUEId = (uint16_t) p_srs_pdu->handle;
585 p_ul_srs_chan->nSubcSpacing = p_srs_pdu->subCarrierSpacing;
586 p_ul_srs_chan->nCpType = p_srs_pdu->cyclicPrefix;
587 p_ul_srs_chan->nNrOfSrsPorts = pow(2, p_srs_pdu->numAntPorts);
588 p_ul_srs_chan->nNrOfSymbols = pow(2, p_srs_pdu->numSymbols);
589 p_ul_srs_chan->nRepetition = pow(2, p_srs_pdu->numRepetitions);
590 if (p_ul_srs_chan->nCpType) { //Extended Cyclic Prefix
591 p_ul_srs_chan->nStartPos = 11 - p_srs_pdu->timeStartPosition;
593 p_ul_srs_chan->nStartPos = 13 - p_srs_pdu->timeStartPosition;
595 p_ul_srs_chan->nCsrs = p_srs_pdu->configIndex;
596 p_ul_srs_chan->nBsrs = p_srs_pdu->bandwidthIndex;
597 p_ul_srs_chan->nSrsId = p_srs_pdu->sequenceId;
599 if (p_srs_pdu->combSize) {
600 p_ul_srs_chan->nComb = 4;
602 p_ul_srs_chan->nComb = 2;
604 p_ul_srs_chan->nCombOffset = p_srs_pdu->combOffset;
605 p_ul_srs_chan->nCyclicShift = p_srs_pdu->cyclicShift;
606 p_ul_srs_chan->nFreqPos = p_srs_pdu->frequencyPosition;
607 p_ul_srs_chan->nFreqShift = p_srs_pdu->frequencyShift;
608 p_ul_srs_chan->nBHop = p_srs_pdu->frequencyHopping;
609 p_ul_srs_chan->nHopping = p_srs_pdu->groupOrSequenceHopping;
610 p_ul_srs_chan->nResourceType = p_srs_pdu->resourceType;
611 p_ul_srs_chan->nTsrs = p_srs_pdu->tSrs;
612 p_ul_srs_chan->nToffset = p_srs_pdu->tOffset;
613 p_ul_srs_chan->nToffset = p_srs_pdu->tOffset;
614 p_ul_srs_chan->nNrofRxRU = p_phy_instance->phy_config.n_nr_of_rx_ant;
616 p_stats->iapi_stats.iapi_ul_tti_srs_pdus++;
619 /** @ingroup group_source_api_p7_fapi2phy_proc
621 * @param[in] p_fapi_req Pointer to FAPI UL_TTI.request structure.
622 * @param[in] p_ia_ul_config_req Pointer to IAPI UL_TTI.request structure.
624 * @return Returns ::SUCCESS and ::FAILURE.
627 * This function converts FAPI UL_TTI.request to IAPI UL_Config.request
631 uint8_t nr5g_fapi_ul_tti_req_to_phy_translation(
632 p_nr5g_fapi_phy_instance_t p_phy_instance,
633 fapi_ul_tti_req_t * p_fapi_req,
634 PULConfigRequestStruct p_ia_ul_config_req)
636 uint8_t i, j, num_group_id = 0;
637 uint8_t num_fapi_pdus, num_groups, num_ue = 0;
641 fapi_ul_tti_req_pdu_t *p_fapi_ul_tti_req_pdu;
642 fapi_ue_info_t *p_fapi_ue_grp_info;
643 ULSCHPDUStruct *p_ul_data_chan;
644 ULCCHUCIPDUStruct *p_ul_ctrl_chan;
645 SRSPDUStruct *p_ul_srs_chan;
646 PUSCHGroupInfoStruct *p_pusch_grp_info;
647 PDUStruct *p_pdu_head;
648 nr5g_fapi_ul_slot_info_t *p_ul_slot_info;
649 nr5g_fapi_stats_t *p_stats;
650 nr5g_fapi_pucch_resources_t pucch_resources[FAPI_MAX_NUM_PUCCH_PDU];
652 p_stats = &p_phy_instance->stats;
654 frame_no = p_ia_ul_config_req->sSFN_Slot.nSFN = p_fapi_req->sfn;
655 slot_no = p_ia_ul_config_req->sSFN_Slot.nSlot = p_fapi_req->slot;
656 p_ia_ul_config_req->sSFN_Slot.nCarrierIdx = p_phy_instance->phy_id;
659 &p_phy_instance->ul_slot_info[(slot_no % MAX_UL_SLOT_INFO_COUNT)];
660 nr5g_fapi_set_ul_slot_info(frame_no, slot_no, p_ul_slot_info);
662 num_fapi_pdus = p_ia_ul_config_req->nPDU = p_fapi_req->nPdus;
663 num_groups = p_ia_ul_config_req->nGroup = p_fapi_req->nGroup;
664 p_ia_ul_config_req->nUlsch = p_fapi_req->nUlsch;
665 p_ia_ul_config_req->nUlcch = p_fapi_req->nUlcch;
666 p_ia_ul_config_req->nRachPresent = p_fapi_req->rachPresent;
667 if (p_fapi_req->rachPresent) {
668 p_ul_slot_info->rach_presence = 1;
669 p_ul_slot_info->rach_info.phy_cell_id =
670 p_phy_instance->phy_config.phy_cell_id;
672 p_ia_ul_config_req->nUlsrs = 0;
673 for (i = 0; i < num_groups; i++) {
674 p_pusch_grp_info = &p_ia_ul_config_req->sPUSCHGroupInfoStruct[i];
675 p_fapi_ue_grp_info = &p_fapi_req->ueGrpInfo[i];
676 num_ue = p_pusch_grp_info->nUE = p_fapi_ue_grp_info->nUe;
677 for (j = 0; j < num_ue; j++) {
678 p_pusch_grp_info->nPduIdx[j] = p_fapi_ue_grp_info->pduIdx[j];
682 (PDUStruct *) ((uint8_t *) p_ia_ul_config_req +
683 sizeof(ULConfigRequestStruct));
685 for (i = 0; i < num_fapi_pdus; i++) {
686 p_stats->fapi_stats.fapi_ul_tti_pdus++;
687 p_fapi_ul_tti_req_pdu = &p_fapi_req->pdus[i];
689 switch (p_fapi_ul_tti_req_pdu->pduType) {
690 case FAPI_PRACH_PDU_TYPE:
692 p_ia_ul_config_req->nPDU--;
693 p_stats->fapi_stats.fapi_ul_tti_prach_pdus++;
697 case FAPI_PUSCH_PDU_TYPE:
699 p_ul_data_chan = (ULSCHPDUStruct *) p_pdu_head;
700 nr5g_fapi_pusch_to_phy_ulsch_translation(p_phy_instance,
701 &p_ul_slot_info->pusch_info[p_ul_slot_info->num_ulsch],
702 &p_fapi_ul_tti_req_pdu->pdu.pusch_pdu, p_ul_data_chan);
703 p_ul_slot_info->num_ulsch++;
707 case FAPI_PUCCH_PDU_TYPE:
709 p_ul_ctrl_chan = (ULCCHUCIPDUStruct *) p_pdu_head;
710 nr5g_fapi_pucch_to_phy_ulcch_uci_translation(p_phy_instance,
711 &p_ul_slot_info->pucch_info[p_ul_slot_info->num_ulcch],
712 &p_fapi_ul_tti_req_pdu->pdu.pucch_pdu, &num_group_id,
713 pucch_resources, p_ul_ctrl_chan);
714 p_ul_slot_info->num_ulcch++;
718 case FAPI_SRS_PDU_TYPE:
720 p_ia_ul_config_req->nUlsrs++;
721 p_ul_srs_chan = (SRSPDUStruct *) p_pdu_head;
722 nr5g_fapi_srs_to_phy_srs_translation(p_phy_instance,
723 &p_fapi_ul_tti_req_pdu->pdu.srs_pdu,
724 &p_ul_slot_info->srs_info[p_ul_slot_info->num_srs],
726 p_ul_slot_info->num_srs++;
732 NR5G_FAPI_LOG(ERROR_LOG,
733 ("[NR5G_FAPI] [UL_TTI.request] Unknown PDU Type :%d",
734 p_fapi_ul_tti_req_pdu->pduType));
740 (PDUStruct *) ((uint8_t *) p_pdu_head + p_pdu_head->nPDUSize);
741 p_stats->iapi_stats.iapi_ul_tti_pdus++;