1 /******************************************************************************
3 * Copyright (c) 2019 Intel.
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
17 *******************************************************************************/
21 * This file consist of implementation of FAPI UL_TTI.request message.
25 #include "nr5g_fapi_framework.h"
26 #include "gnb_l1_l2_api.h"
27 #include "nr5g_fapi_fapi2mac_api.h"
28 #include "nr5g_fapi_fapi2phy_api.h"
29 #include "nr5g_fapi_fapi2phy_p7_proc.h"
30 #include "nr5g_fapi_fapi2phy_p7_pvt_proc.h"
31 #include "nr5g_fapi_memory.h"
34 #define NUM_UL_PTRS_PORT_INDEX (12)
36 /** @ingroup group_source_api_p7_fapi2phy_proc
38 * @param[in] p_phy_instance Pointer to PHY instance.
39 * @param[in] p_fapi_req Pointer to FAPI UL_TTI.request message structure.
41 * @return Returns ::SUCCESS and ::FAILURE.
44 * This message indicates the control information for an uplink slot.
47 uint8_t nr5g_fapi_ul_tti_request(
49 p_nr5g_fapi_phy_instance_t p_phy_instance,
50 fapi_ul_tti_req_t * p_fapi_req,
51 fapi_vendor_msg_t * p_fapi_vendor_msg)
53 PULConfigRequestStruct p_ia_ul_config_req;
54 PMAC2PHY_QUEUE_EL p_list_elem;
55 nr5g_fapi_stats_t *p_stats;
57 if (NULL == p_phy_instance) {
58 NR5G_FAPI_LOG(ERROR_LOG, ("[NR5G_FAPI][UL_TTI.request] Invalid "
62 p_stats = &p_phy_instance->stats;
63 p_stats->fapi_stats.fapi_ul_tti_req++;
65 if (NULL == p_fapi_req) {
66 NR5G_FAPI_LOG(ERROR_LOG, ("[NR5G_FAPI][UL_TTI.request] Invalid fapi "
71 p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem((uint8_t)
72 MSG_TYPE_PHY_UL_CONFIG_REQ, 1,
73 (uint32_t) sizeof(ULConfigRequestStruct));
75 NR5G_FAPI_LOG(ERROR_LOG,
76 ("[NR5G_FAPI][UL_TTI.request] Unable to create "
77 "list element. Out of memory!!!"));
81 p_ia_ul_config_req = (PULConfigRequestStruct) (p_list_elem + 1);
82 NR5G_FAPI_MEMSET(p_ia_ul_config_req, sizeof(ULConfigRequestStruct), 0,
83 sizeof(ULConfigRequestStruct));
84 p_ia_ul_config_req->sMsgHdr.nMessageType = MSG_TYPE_PHY_UL_CONFIG_REQ;
85 p_ia_ul_config_req->sMsgHdr.nMessageLen =
86 (uint16_t) sizeof(ULConfigRequestStruct);
88 if (FAILURE == nr5g_fapi_ul_tti_req_to_phy_translation(is_urllc, p_phy_instance,
89 p_fapi_req, p_fapi_vendor_msg, p_ia_ul_config_req)) {
90 nr5g_fapi_fapi2phy_destroy_api_list_elem(p_list_elem);
91 NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_TTI.request][%d][%d,%d] Not Sent",
92 p_phy_instance->phy_id, p_ia_ul_config_req->sSFN_Slot.nSFN,
93 p_ia_ul_config_req->sSFN_Slot.nSlot));
97 nr5g_fapi_fapi2phy_add_to_api_list(is_urllc, p_list_elem);
99 p_stats->iapi_stats.iapi_ul_config_req++;
100 NR5G_FAPI_LOG(DEBUG_LOG, ("[UL_TTI.request][%u][%u,%u,%u] is_urllc %u",
101 p_phy_instance->phy_id,
102 p_ia_ul_config_req->sSFN_Slot.nSFN, p_ia_ul_config_req->sSFN_Slot.nSlot,
103 p_ia_ul_config_req->sSFN_Slot.nSym, is_urllc));
108 /** @ingroup group_source_api_p7_fapi2phy_proc
110 * @param[in] bwp_size Variable holding the Bandwidth part size.
112 * @return Returns ::RBG Size.
115 * This functions calculates and return RBG Size from Bandwidth part size provided.
118 uint8_t nr5g_fapi_calc_n_rbg_size(
121 uint8_t n_rbg_size = 0;
122 if (bwp_size >= 1 && bwp_size <= 36) {
124 } else if (bwp_size >= 37 && bwp_size <= 72) {
126 } else if (bwp_size >= 73 && bwp_size <= 144) {
128 } else if (bwp_size >= 145 && bwp_size <= 275) {
136 /** @ingroup group_source_api_p7_fapi2phy_proc
138 * @param[in] n_rbg_size Variable holding the RBG Size
139 * @param[in] p_push_pdu Pointer to FAPI PUSCH Pdu
141 * @return Returns ::RBG Bitmap entry
144 * This functions derives the RBG Bitmap entry for PUSCH Type-0 allocation.
147 uint32_t nr5g_fapi_calc_n_rbg_index_entry(
149 fapi_ul_pusch_pdu_t * p_pusch_pdu)
151 uint8_t i, temp, num_bits = 0;
152 uint32_t n_rbg_bitmap = 0;
153 uint8_t rb_bitmap_entries, rb_bitmap;
155 rb_bitmap_entries = ceil(n_rbg_size / 8);
156 for (i = 0; i < rb_bitmap_entries; i++) {
159 rb_bitmap = p_pusch_pdu->rbBitmap[i];
160 while (num_bits < 8) {
161 if (rb_bitmap & (1 << num_bits)) {
162 temp |= (1 << (7 - num_bits));
166 n_rbg_bitmap |= ((n_rbg_bitmap | temp) << (32 - (8 * (i + 1))));
171 /** @ingroup group_source_api_p7_fapi2phy_proc
173 * @param[in] p_pusch_data Pointer to FAPI Optional PUSCH Data structure.
174 * @param[in] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
179 * This function converts FAPI UL_TTI.request's Optional PUSCH Data to IAPI UL_Config.request's
180 * ULSCH PDU structure.
183 void nr5g_fapi_pusch_data_to_phy_ulsch_translation(
184 nr5g_fapi_pusch_info_t * p_pusch_info,
185 fapi_pusch_data_t * p_pusch_data,
186 ULSCHPDUStruct * p_ul_data_chan)
188 p_ul_data_chan->nRV = p_pusch_data->rvIndex;
189 p_pusch_info->harq_process_id = p_ul_data_chan->nHARQID =
190 p_pusch_data->harqProcessId;
191 p_ul_data_chan->nNDI = p_pusch_data->newDataIndicator;
192 p_ul_data_chan->nTBSize = p_pusch_data->tbSize;
193 //numCb and cbPresentAndPoistion[] is ignored as per design
196 /** @ingroup group_source_api_p7_fapi2phy_proc
198 * @param[in] p_pusch_uci Pointer to FAPI Optional PUSCH UCI structure.
199 * @param[in] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
204 * This function converts FAPI UL_TTI.request's Optional PUSCH UCI to IAPI UL_Config.request's
205 * ULSCH PDU structure.
208 void nr5g_fapi_pusch_uci_to_phy_ulsch_translation(
209 fapi_pusch_uci_t * p_pusch_uci,
210 ULSCHPDUStruct * p_ul_data_chan)
212 p_ul_data_chan->nAck = p_pusch_uci->harqAckBitLength;
213 p_ul_data_chan->nAlphaScaling = p_pusch_uci->alphaScaling;
214 p_ul_data_chan->nBetaOffsetACKIndex = p_pusch_uci->betaOffsetHarqAck;
215 p_ul_data_chan->nBetaOffsetCSIP1Index = p_pusch_uci->betaOffsetCsi1;
216 p_ul_data_chan->nBetaOffsetCSIP2Index = p_pusch_uci->betaOffsetCsi2;
217 p_ul_data_chan->nCSIPart1 = p_pusch_uci->csiPart1BitLength;
218 p_ul_data_chan->nCSIPart2 = p_pusch_uci->csiPart2BitLength;
221 /** @ingroup group_source_api_p7_fapi2phy_proc
223 * @param[in] p_pusch_ptrs Pointer to FAPI Optional PUSCH PTRS structure.
224 * @param[in] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
229 * This function converts FAPI UL_TTI.request's Optional PUSCH PTRS to IAPI UL_Config.request's
230 * ULSCH PDU structure.
233 void nr5g_fapi_pusch_ptrs_to_phy_ulsch_translation(
234 fapi_pusch_ptrs_t * p_pusch_ptrs,
235 ULSCHPDUStruct * p_ul_data_chan)
237 uint8_t i, num_ptrs_ports = 0, port_index = 0;
238 fapi_ptrs_info_t *p_ptrs_info;
240 if (p_pusch_ptrs->ptrsTimeDensity <= 2) {
241 p_ul_data_chan->nPTRSTimeDensity =
242 pow(2, p_pusch_ptrs->ptrsTimeDensity);
244 if (p_pusch_ptrs->ptrsFreqDensity == 0 ||
245 p_pusch_ptrs->ptrsFreqDensity == 1) {
246 p_ul_data_chan->nPTRSFreqDensity =
247 pow(2, (p_pusch_ptrs->ptrsFreqDensity + 1));
249 if (p_pusch_ptrs->numPtrsPorts > 0) {
250 num_ptrs_ports = p_ul_data_chan->nNrOfPTRSPorts = 1;
252 for (i = 0; i < num_ptrs_ports && i < FAPI_MAX_PTRS_PORTS; i++) {
253 p_ptrs_info = &p_pusch_ptrs->ptrsInfo[i];
254 for (port_index = 0; port_index < NUM_UL_PTRS_PORT_INDEX; port_index++)
256 if ((p_ptrs_info->ptrsPortIndex >> port_index) & 0x01) {
257 p_ul_data_chan->nPTRSPortIndex[i] = port_index;
260 //PTRSDmrsPort is ignored as per Design
261 p_ul_data_chan->nPTRSReOffset = p_ptrs_info->ptrsReOffset;
265 /** @ingroup group_source_api_p7_fapi2phy_proc
267 * @param[in] p_phy_instance Pointer to PHY instance.
268 * @param[in] p_pusch_pdu Pointer to FAPI PUSCH PDU structure.
269 * @param[out] p_ul_data_chan Pointer to IAPI ULSCH PDU structure.
274 * This function converts FAPI UL_TTI.request's PUSCH PDU to IAPI UL_Config.request's
275 * ULSCH PDU structure.
278 void nr5g_fapi_pusch_to_phy_ulsch_translation(
279 p_nr5g_fapi_phy_instance_t p_phy_instance,
280 nr5g_fapi_pusch_info_t * p_pusch_info,
281 fapi_ul_pusch_pdu_t * p_pusch_pdu,
282 ULSCHPDUStruct * p_ul_data_chan)
284 uint8_t mcs_table, nr_of_layers, n_rbg_size;
285 uint8_t i, port_index = 0;
286 uint16_t dmrs_ports, bwp_size, bwp_start, pdu_bitmap;
287 nr5g_fapi_stats_t *p_stats;
289 p_stats = &p_phy_instance->stats;
290 p_stats->fapi_stats.fapi_ul_tti_pusch_pdus++;
292 NR5G_FAPI_MEMSET(p_ul_data_chan, sizeof(ULSCHPDUStruct), 0,
293 sizeof(ULSCHPDUStruct));
295 p_ul_data_chan->sPDUHdr.nPDUType = UL_PDU_TYPE_ULSCH;
296 p_ul_data_chan->sPDUHdr.nPDUSize = RUP32B(sizeof(ULSCHPDUStruct));
298 p_ul_data_chan->nRNTI = p_pusch_pdu->rnti;
300 p_pusch_info->handle = p_ul_data_chan->nUEId =
301 (uint16_t) p_pusch_pdu->handle;
303 bwp_size = p_ul_data_chan->nBWPSize = p_pusch_pdu->bwpSize;
304 bwp_start = p_ul_data_chan->nBWPStart = p_pusch_pdu->bwpStart;
306 p_ul_data_chan->nSubcSpacing = p_pusch_pdu->subCarrierSpacing;
307 p_ul_data_chan->nCpType = p_pusch_pdu->cyclicPrefix;
308 p_ul_data_chan->nMCS = p_pusch_pdu->mcsIndex;
309 p_ul_data_chan->nTransPrecode = !(p_pusch_pdu->transformPrecoding);
310 mcs_table = p_pusch_pdu->mcsTable;
311 if (mcs_table <= 2) {
312 p_ul_data_chan->nMcsTable = mcs_table;
314 if ((mcs_table > 2) && (mcs_table <= 4)) {
315 p_ul_data_chan->nTransPrecode = 1;
317 if (mcs_table == 3) {
318 p_ul_data_chan->nMcsTable = 0;
320 p_ul_data_chan->nMcsTable = 2;
324 p_ul_data_chan->nNid = p_pusch_pdu->dataScramblingId;
325 p_ul_data_chan->nDMRSConfigType = p_pusch_pdu->dmrsConfigType;
326 p_ul_data_chan->nMappingType = p_pusch_pdu->mappingType;
327 p_ul_data_chan->nNrOfDMRSSymbols = p_pusch_pdu->nrOfDmrsSymbols;
328 p_ul_data_chan->nDMRSAddPos = p_pusch_pdu->dmrsAddPos;
329 p_ul_data_chan->nNIDnSCID = p_pusch_pdu->ulDmrsScramblingId;
330 p_ul_data_chan->nSCID = p_pusch_pdu->scid;
331 p_ul_data_chan->nNrOfCDMs = p_pusch_pdu->numDmrsCdmGrpsNoData;
333 dmrs_ports = p_pusch_pdu->dmrsPorts;
334 nr_of_layers = p_ul_data_chan->nNrOfLayers = p_pusch_pdu->nrOfLayers;
335 for (i = 0; (i < FAPI_MAX_DMRS_PORTS && port_index < nr_of_layers); i++) {
336 if (port_index < FAPI_MAX_UL_LAYERS) {
337 if ((dmrs_ports >> i) & 0x0001) {
338 p_ul_data_chan->nPortIndex[port_index++] = i;
344 p_ul_data_chan->nTPPuschID = p_pusch_pdu->nTpPuschId;
345 p_ul_data_chan->nTpPi2BPSK = p_pusch_pdu->tpPi2Bpsk;
346 //Config-1 alone is supported
347 n_rbg_size = p_ul_data_chan->nRBGSize = nr5g_fapi_calc_n_rbg_size(bwp_size);
348 if (n_rbg_size > 0) {
349 p_ul_data_chan->nNrOfRBGs =
350 ceil((bwp_size + (bwp_start % n_rbg_size)) / n_rbg_size);
352 //First entry would be sufficient as maximum no of RBG's is at max 18.
353 p_ul_data_chan->nRBGIndex[0] =
354 nr5g_fapi_calc_n_rbg_index_entry(n_rbg_size, p_pusch_pdu);
355 p_ul_data_chan->nRBStart = p_pusch_pdu->rbStart;
356 p_ul_data_chan->nRBSize = p_pusch_pdu->rbSize;
357 p_ul_data_chan->nVRBtoPRB = p_pusch_pdu->vrbToPrbMapping;
358 p_ul_data_chan->nResourceAllocType = p_pusch_pdu->resourceAlloc;
359 p_ul_data_chan->nStartSymbolIndex = p_pusch_pdu->startSymbIndex;
360 p_ul_data_chan->nNrOfSymbols = p_pusch_pdu->nrOfSymbols;
362 p_ul_data_chan->nPTRSPresent = 0;
363 pdu_bitmap = p_pusch_pdu->pduBitMap;
364 if (pdu_bitmap & 0x01) {
365 nr5g_fapi_pusch_data_to_phy_ulsch_translation(p_pusch_info,
366 &p_pusch_pdu->puschData, p_ul_data_chan);
368 if (pdu_bitmap & 0x02) {
369 nr5g_fapi_pusch_uci_to_phy_ulsch_translation(&p_pusch_pdu->puschUci,
372 if (pdu_bitmap & 0x04) {
373 nr5g_fapi_pusch_ptrs_to_phy_ulsch_translation(&p_pusch_pdu->puschPtrs,
376 if ((pdu_bitmap & (1 << 15))) {
377 p_ul_data_chan->nPTRSPresent = 1;
379 p_ul_data_chan->nULType = 0;
380 p_ul_data_chan->nRBBundleSize = 0;
381 p_ul_data_chan->nPMI = 0;
382 p_ul_data_chan->nTransmissionScheme = 0;
383 p_ul_data_chan->rsv1 = 0;
385 p_ul_data_chan->nNrOfAntennaPorts = 1;
386 p_ul_data_chan->nNrofRxRU = 1;
388 p_stats->iapi_stats.iapi_ul_tti_pusch_pdus++;
391 /** @ingroup group_source_api_p7_fapi2phy_proc
393 * @param[in] p_phy_instance Pointer to PHY instance.
394 * @param[in] p_pucch_pdu Pointer to FAPI PUSCH PDU structure.
395 * @param[in] p_ul_ctrl_chan Pointer to IAPI ULCCH_UCIPDU structure.
400 * This function converts FAPI UL_TTI.request's PUCCH PDU to IAPI UL_Config.request's
401 * ULCCH_UCI PDU structure.
404 void nr5g_fapi_pucch_to_phy_ulcch_uci_translation(
405 p_nr5g_fapi_phy_instance_t p_phy_instance,
406 nr5g_fapi_pucch_info_t * p_pucch_info,
407 fapi_ul_pucch_pdu_t * p_pucch_pdu,
408 ULCCHUCIPDUStruct * p_ul_ctrl_chan)
410 nr5g_fapi_stats_t *p_stats;
411 p_stats = &p_phy_instance->stats;
412 p_stats->fapi_stats.fapi_ul_tti_pucch_pdus++;
413 NR5G_FAPI_MEMSET(p_ul_ctrl_chan, sizeof(ULCCHUCIPDUStruct), 0,
414 sizeof(ULCCHUCIPDUStruct));
415 p_ul_ctrl_chan->sPDUHdr.nPDUType = UL_PDU_TYPE_ULCCH_UCI;
416 p_ul_ctrl_chan->sPDUHdr.nPDUSize = RUP32B(sizeof(ULCCHUCIPDUStruct));
418 p_ul_ctrl_chan->nRNTI = p_pucch_pdu->rnti;
419 p_pucch_info->handle = p_ul_ctrl_chan->nUEId =
420 (uint16_t) p_pucch_pdu->handle;
422 p_ul_ctrl_chan->nBWPSize = p_pucch_pdu->bwpSize;
423 p_ul_ctrl_chan->nBWPStart = p_pucch_pdu->bwpStart;
424 p_ul_ctrl_chan->nSubcSpacing = p_pucch_pdu->subCarrierSpacing;
425 p_ul_ctrl_chan->nCpType = p_pucch_pdu->cyclicPrefix;
426 p_pucch_info->pucch_format = p_ul_ctrl_chan->nFormat =
427 p_pucch_pdu->formatType;
428 if (p_pucch_pdu->pi2Bpsk) {
429 p_ul_ctrl_chan->modType = 1;
431 p_ul_ctrl_chan->modType = 2;
433 p_ul_ctrl_chan->nStartPRB = p_pucch_pdu->prbStart;
434 p_ul_ctrl_chan->nPRBs = p_pucch_pdu->prbSize;
435 p_ul_ctrl_chan->nStartSymbolx = p_pucch_pdu->startSymbolIndex;
436 p_ul_ctrl_chan->nSymbols = p_pucch_pdu->nrOfSymbols;
437 p_ul_ctrl_chan->nFreqHopFlag = p_pucch_pdu->freqHopFlag;
439 p_ul_ctrl_chan->n2ndHopPRB = p_pucch_pdu->secondHopPrb;
440 p_ul_ctrl_chan->nM0 = p_pucch_pdu->initialCyclicShift;
441 p_ul_ctrl_chan->nID = p_pucch_pdu->dataScramblingId;
442 p_ul_ctrl_chan->nFmt1OrthCCodeIdx = p_pucch_pdu->timeDomainOccIdx;
443 p_ul_ctrl_chan->nFmt4OrthCCodeIdx = p_pucch_pdu->preDftOccIdx;
444 p_ul_ctrl_chan->nFmt4OrthCCodeLength = p_pucch_pdu->preDftOccLen;
445 p_ul_ctrl_chan->nAddDmrsFlag = p_pucch_pdu->addDmrsFlag;
446 p_ul_ctrl_chan->nScramID = p_pucch_pdu->dmrsScramblingId;
447 p_ul_ctrl_chan->nSRPriodAriv = p_pucch_pdu->srFlag;
448 p_ul_ctrl_chan->nBitLenUci = p_pucch_pdu->bitLenHarq;
450 p_ul_ctrl_chan->nNrofRxRU = 1;
452 p_stats->iapi_stats.iapi_ul_tti_pucch_pdus++;
455 /** @ingroup group_source_api_p7_fapi2phy_proc
457 * @param[in] p_srs_pdu Pointer to FAPI SRS PDU structure.
458 * @param[in] p_ul_srs_chan Pointer to IAPI SRS PDU structure.
463 * This function converts FAPI UL_TTI.request's SRS PDU to IAPI UL_Config.request's
467 void nr5g_fapi_srs_to_phy_srs_translation(
468 p_nr5g_fapi_phy_instance_t p_phy_instance,
469 fapi_ul_srs_pdu_t * p_srs_pdu,
470 nr5g_fapi_srs_info_t * p_srs_info,
471 SRSPDUStruct * p_ul_srs_chan)
473 nr5g_fapi_stats_t *p_stats;
475 p_stats = &p_phy_instance->stats;
476 p_stats->fapi_stats.fapi_ul_tti_srs_pdus++;
477 NR5G_FAPI_MEMSET(p_ul_srs_chan, sizeof(SRSPDUStruct), 0,
478 sizeof(SRSPDUStruct));
479 p_ul_srs_chan->sPDUHdr.nPDUType = UL_PDU_TYPE_SRS;
480 p_ul_srs_chan->sPDUHdr.nPDUSize = RUP32B(sizeof(SRSPDUStruct));
482 p_ul_srs_chan->nRNTI = p_srs_pdu->rnti;
483 p_srs_info->handle = p_ul_srs_chan->nUEId = (uint16_t) p_srs_pdu->handle;
485 p_ul_srs_chan->nSubcSpacing = p_srs_pdu->subCarrierSpacing;
486 p_ul_srs_chan->nCpType = p_srs_pdu->cyclicPrefix;
487 p_ul_srs_chan->nNrOfSrsPorts = pow(2, p_srs_pdu->numAntPorts);
488 p_ul_srs_chan->nNrOfSymbols = pow(2, p_srs_pdu->numSymbols);
489 p_ul_srs_chan->nRepetition = pow(2, p_srs_pdu->numRepetitions);
490 if (p_ul_srs_chan->nCpType) { //Extended Cyclic Prefix
491 p_ul_srs_chan->nStartPos = 11 - p_srs_pdu->timeStartPosition;
493 p_ul_srs_chan->nStartPos = 13 - p_srs_pdu->timeStartPosition;
495 p_ul_srs_chan->nCsrs = p_srs_pdu->configIndex;
496 p_ul_srs_chan->nBsrs = p_srs_pdu->bandwidthIndex;
497 p_ul_srs_chan->nSrsId = p_srs_pdu->sequenceId;
499 if (p_srs_pdu->combSize) {
500 p_ul_srs_chan->nComb = 4;
502 p_ul_srs_chan->nComb = 2;
504 p_ul_srs_chan->nCombOffset = p_srs_pdu->combOffset;
505 p_ul_srs_chan->nCyclicShift = p_srs_pdu->cyclicShift;
506 p_ul_srs_chan->nFreqPos = p_srs_pdu->frequencyPosition;
507 p_ul_srs_chan->nFreqShift = p_srs_pdu->frequencyShift;
508 p_ul_srs_chan->nBHop = p_srs_pdu->frequencyHopping;
509 p_ul_srs_chan->nHopping = p_srs_pdu->groupOrSequenceHopping;
510 p_ul_srs_chan->nResourceType = p_srs_pdu->resourceType;
511 p_ul_srs_chan->nTsrs = p_srs_pdu->tSrs;
512 p_ul_srs_chan->nToffset = p_srs_pdu->tOffset;
513 p_ul_srs_chan->nToffset = p_srs_pdu->tOffset;
515 p_ul_srs_chan->nNrofRxRU = 1;
517 p_stats->iapi_stats.iapi_ul_tti_srs_pdus++;
520 /** @ingroup group_source_api_p7_fapi2phy_proc
522 * @param[in] p_fapi_req Pointer to FAPI UL_TTI.request structure.
523 * @param[in] p_ia_ul_config_req Pointer to IAPI UL_TTI.request structure.
525 * @return Returns ::SUCCESS and ::FAILURE.
528 * This function converts FAPI UL_TTI.request to IAPI UL_Config.request
532 uint8_t nr5g_fapi_ul_tti_req_to_phy_translation(
534 p_nr5g_fapi_phy_instance_t p_phy_instance,
535 fapi_ul_tti_req_t * p_fapi_req,
536 fapi_vendor_msg_t * p_fapi_vendor_msg,
537 PULConfigRequestStruct p_ia_ul_config_req)
540 uint8_t num_fapi_pdus, num_groups, num_ue = 0u;
542 uint8_t slot_no, symbol_no;
544 fapi_ul_tti_req_pdu_t *p_fapi_ul_tti_req_pdu;
545 fapi_ue_info_t *p_fapi_ue_grp_info;
546 ULSCHPDUStruct *p_ul_data_chan;
547 ULCCHUCIPDUStruct *p_ul_ctrl_chan;
548 SRSPDUStruct *p_ul_srs_chan;
549 PUSCHGroupInfoStruct *p_pusch_grp_info;
550 PDUStruct *p_pdu_head;
551 nr5g_fapi_ul_slot_info_t *p_ul_slot_info;
552 nr5g_fapi_stats_t *p_stats;
554 p_stats = &p_phy_instance->stats;
556 frame_no = p_ia_ul_config_req->sSFN_Slot.nSFN = p_fapi_req->sfn;
557 slot_no = p_ia_ul_config_req->sSFN_Slot.nSlot = p_fapi_req->slot;
558 p_ia_ul_config_req->sSFN_Slot.nCarrierIdx = p_phy_instance->phy_id;
560 if (FAILURE == nr5g_fapi_ul_tti_req_to_phy_translation_vendor_ext_symbol_no(is_urllc,
561 p_fapi_vendor_msg, p_ia_ul_config_req, &symbol_no))
567 &p_phy_instance->ul_slot_info[is_urllc]
568 [(slot_no % MAX_UL_SLOT_INFO_COUNT)]
569 [symbol_no % MAX_UL_SYMBOL_INFO_COUNT];// TODO: will be split in 2 in a separate MR, as non-urllc does not need symbol info
571 nr5g_fapi_set_ul_slot_info(frame_no, slot_no, symbol_no, p_ul_slot_info);
573 num_fapi_pdus = p_ia_ul_config_req->nPDU = p_fapi_req->nPdus;
574 num_groups = p_ia_ul_config_req->nGroup = p_fapi_req->nGroup;
575 p_ia_ul_config_req->nUlsch = p_fapi_req->nUlsch;
576 p_ia_ul_config_req->nUlcch = p_fapi_req->nUlcch;
577 p_ia_ul_config_req->nRachPresent = p_fapi_req->rachPresent;
578 if (p_fapi_req->rachPresent) {
579 p_ul_slot_info->rach_presence = 1;
580 p_ul_slot_info->rach_info.phy_cell_id =
581 p_phy_instance->phy_config.phy_cell_id;
583 p_ia_ul_config_req->nUlsrs = 0;
584 for (i = 0u; i < num_groups; i++) {
585 p_pusch_grp_info = &p_ia_ul_config_req->sPUSCHGroupInfoStruct[i];
586 p_fapi_ue_grp_info = &p_fapi_req->ueGrpInfo[i];
587 num_ue = p_pusch_grp_info->nUE = p_fapi_ue_grp_info->nUe;
588 for (j = 0u; j < num_ue; j++) {
589 p_pusch_grp_info->nPduIdx[j] = p_fapi_ue_grp_info->pduIdx[j];
593 (PDUStruct *) ((uint8_t *) p_ia_ul_config_req +
594 sizeof(ULConfigRequestStruct));
596 for (i = 0; i < num_fapi_pdus; i++) {
597 p_pdu_head->nPDUSize = 0;
598 p_stats->fapi_stats.fapi_ul_tti_pdus++;
599 p_fapi_ul_tti_req_pdu = &p_fapi_req->pdus[i];
601 switch (p_fapi_ul_tti_req_pdu->pduType) {
602 case FAPI_PRACH_PDU_TYPE:
604 p_ia_ul_config_req->nPDU--;
605 p_stats->fapi_stats.fapi_ul_tti_prach_pdus++;
609 case FAPI_PUSCH_PDU_TYPE:
611 p_ul_data_chan = (ULSCHPDUStruct *) p_pdu_head;
612 nr5g_fapi_pusch_to_phy_ulsch_translation(p_phy_instance,
613 &p_ul_slot_info->pusch_info[p_ul_slot_info->num_ulsch],
614 &p_fapi_ul_tti_req_pdu->pdu.pusch_pdu,
616 p_ul_slot_info->num_ulsch++;
620 case FAPI_PUCCH_PDU_TYPE:
622 p_ul_ctrl_chan = (ULCCHUCIPDUStruct *) p_pdu_head;
623 nr5g_fapi_pucch_to_phy_ulcch_uci_translation(p_phy_instance,
624 &p_ul_slot_info->pucch_info[p_ul_slot_info->num_ulcch],
625 &p_fapi_ul_tti_req_pdu->pdu.pucch_pdu,
627 p_ul_slot_info->num_ulcch++;
631 case FAPI_SRS_PDU_TYPE:
633 p_ia_ul_config_req->nUlsrs++;
634 p_ul_srs_chan = (SRSPDUStruct *) p_pdu_head;
635 nr5g_fapi_srs_to_phy_srs_translation(p_phy_instance,
636 &p_fapi_ul_tti_req_pdu->pdu.srs_pdu,
637 &p_ul_slot_info->srs_info[p_ul_slot_info->num_srs],
639 p_ul_slot_info->num_srs++;
645 NR5G_FAPI_LOG(ERROR_LOG,
646 ("[NR5G_FAPI] [UL_TTI.request] Unknown PDU Type :%d",
647 p_fapi_ul_tti_req_pdu->pduType));
652 (PDUStruct *) ((uint8_t *) p_pdu_head + p_pdu_head->nPDUSize);
653 p_stats->iapi_stats.iapi_ul_tti_pdus++;
656 if (NULL != p_fapi_vendor_msg) {
657 nr5g_fapi_ul_tti_req_to_phy_translation_vendor_ext(p_fapi_vendor_msg,
664 /** @ingroup group_source_api_p7_fapi2phy_proc
666 * @param[in] p_fapi_vendor_msg Pointer to FAPI UL_TTI.request vendor message.
667 * @param[in] p_ia_ul_config_req Pointer to IAPI UL_TTI.request structure.
672 * This function fills fields for UL_TTI.request structure that come from
673 * a vendor extension.
676 void nr5g_fapi_ul_tti_req_to_phy_translation_vendor_ext(
677 fapi_vendor_msg_t * p_fapi_vendor_msg,
678 PULConfigRequestStruct p_ia_ul_config_req)
682 fapi_vendor_ul_tti_req_t *p_vendor_ul_tti_req = NULL;
683 fapi_vendor_ul_tti_req_pdu_t *p_fapi_vendor_ul_tti_req_pdu = NULL;
684 fapi_vendor_ul_pusch_pdu_t *p_vendor_pusch_pdu = NULL;
685 fapi_vendor_ul_pucch_pdu_t *p_vendor_pucch_pdu = NULL;
686 fapi_vendor_ul_srs_pdu_t *p_vendor_srs_pdu = NULL;
688 ULSCHPDUStruct *p_ul_data_chan;
689 ULCCHUCIPDUStruct *p_ul_ctrl_chan;
690 SRSPDUStruct *p_ul_srs_chan;
691 PDUStruct *p_pdu_head;
693 p_vendor_ul_tti_req = &p_fapi_vendor_msg->p7_req_vendor.ul_tti_req;
695 p_pdu_head = p_ia_ul_config_req->sULPDU;
697 for (i = 0u; i < p_ia_ul_config_req->nPDU; i++) {
698 p_fapi_vendor_ul_tti_req_pdu = &p_vendor_ul_tti_req->ul_pdus[i];
700 switch (p_pdu_head->nPDUType) {
701 case UL_PDU_TYPE_PRACH:
705 case UL_PDU_TYPE_ULSCH:
707 p_ul_data_chan = (ULSCHPDUStruct *) p_pdu_head;
708 p_vendor_pusch_pdu = &p_fapi_vendor_ul_tti_req_pdu->pdu.pusch_pdu;
710 p_ul_data_chan->nNrOfAntennaPorts = p_vendor_pusch_pdu->nr_of_antenna_ports;
711 p_ul_data_chan->nNrofRxRU = p_vendor_pusch_pdu->nr_of_rx_ru;
712 NR5G_FAPI_MEMCPY(p_ul_data_chan->nRxRUIdx, sizeof(p_ul_data_chan->nRxRUIdx),
713 p_vendor_pusch_pdu->rx_ru_idx, sizeof(p_vendor_pusch_pdu->rx_ru_idx));
717 case UL_PDU_TYPE_ULCCH_UCI:
719 p_ul_ctrl_chan = (ULCCHUCIPDUStruct *) p_pdu_head;
720 p_vendor_pucch_pdu = &p_fapi_vendor_ul_tti_req_pdu->pdu.pucch_pdu;
722 p_ul_ctrl_chan->nNrofRxRU = p_vendor_pucch_pdu->nr_of_rx_ru;
723 p_ul_ctrl_chan->nGroupId = p_vendor_pucch_pdu->group_id;
724 NR5G_FAPI_MEMCPY(p_ul_ctrl_chan->nRxRUIdx, sizeof(p_ul_ctrl_chan->nRxRUIdx),
725 p_vendor_pucch_pdu->rx_ru_idx, sizeof(p_vendor_pucch_pdu->rx_ru_idx));
729 case UL_PDU_TYPE_SRS:
731 p_ul_srs_chan = (SRSPDUStruct *) p_pdu_head;
732 p_vendor_srs_pdu = &p_fapi_vendor_ul_tti_req_pdu->pdu.srs_pdu;
734 p_ul_srs_chan->nNrofRxRU = p_vendor_srs_pdu->nr_of_rx_ru;
735 NR5G_FAPI_MEMCPY(p_ul_srs_chan->nRxRUIdx, sizeof(p_ul_srs_chan->nRxRUIdx),
736 p_vendor_srs_pdu->rx_ru_idx, sizeof(p_vendor_srs_pdu->rx_ru_idx));
742 NR5G_FAPI_LOG(ERROR_LOG,
743 ("[NR5G_FAPI] [UL_TTI.request] Unknown PDU Type :%d",
744 p_ia_ul_config_req->sMsgHdr.nMessageType));
749 (PDUStruct *) ((uint8_t *) p_pdu_head + p_pdu_head->nPDUSize);
754 /** @ingroup group_source_api_p7_fapi2phy_proc
756 * @param[in] p_fapi_vendor_msg Pointer to FAPI UL_TTI.request vendor message.
757 * @param[in] p_ia_ul_config_req Pointer to IAPI UL_TTI.request structure.
759 * @return Returns ::SUCCESS and ::FAILURE.
762 * This function fills symbol_no field for UL_TTI.request structure and fails if
763 * the mode is urllc and there is no associated vendor_msg.
766 uint8_t nr5g_fapi_ul_tti_req_to_phy_translation_vendor_ext_symbol_no(
768 fapi_vendor_msg_t * p_fapi_vendor_msg,
769 PULConfigRequestStruct p_ia_ul_config_req,
772 // for non-urllc mode symbol_no is a don't care
776 if (NULL == p_fapi_vendor_msg)
778 NR5G_FAPI_LOG(ERROR_LOG, ("[NR5G_FAPI][UL_TTI.request] No vendor ext for URLLC! "
779 "_vendor_ul_tti_req"));
782 *symbol_no = p_ia_ul_config_req->sSFN_Slot.nSym = p_fapi_vendor_msg->p7_req_vendor.ul_tti_req.sym;