1 #******************************************************************************
3 # Copyright (c) 2019 Intel.
5 # Licensed under the Apache License, Version 2.0 (the "License");
6 # you may not use this file except in compliance with the License.
7 # You may obtain a copy of the License at
9 # http://www.apache.org/licenses/LICENSE-2.0
11 # Unless required by applicable law or agreed to in writing, software
12 # distributed under the License is distributed on an "AS IS" BASIS,
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 # See the License for the specific language governing permissions and
15 # limitations under the License.
17 #******************************************************************************/
21 #312 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 16 37% 100 1200 37% 100 1200 Peak: 4 %
23 # This is simple configuration file. Use '#' sign for comments
24 instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
25 appMode=1 # O-DU(0) | O-RU(1)
26 xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
27 ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
28 antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
29 antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
30 antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
33 muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
34 DlLayersPerUe=1 #number of RX anntennas on DL UE side
35 UlLayersPerUe=1 #number of TX anntennas on UL UE side
39 mu=1 #30Khz Sub Carrier Spacing
41 ttiPeriod=500 # in us TTI period (30Khz default 500us)
43 nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
44 nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
45 nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
46 nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
50 nFrameDuplexType=1 # 0 - FDD 1 - TDD
51 nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2
52 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
53 sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
54 sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
55 sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD
56 sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
58 MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
59 #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
60 Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
63 numSlots=20 #number of slots per IQ files
64 antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
65 antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
66 antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
67 antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
68 antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
69 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
70 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
71 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
72 antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
73 antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
74 antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
75 antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
76 antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
77 antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
78 antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
79 antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
81 antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
82 antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
83 antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
84 antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
85 antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
86 antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
87 antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
88 antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
89 antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
90 antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
91 antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
92 antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
93 antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
94 antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
95 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
96 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
98 rachEanble=0 # Enable (1)| disable (0) PRACH configuration
101 srsEanble=1 # Enable (1)| disable (0) SRS
102 srsSym=1 # (1<<13) symbol used for SRS (def: sym 13)
104 antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
105 antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
106 antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
107 antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
108 antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
109 antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
110 antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
111 antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
112 antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
113 antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
114 antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
115 antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
116 antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
117 antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
118 antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
119 antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
120 antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
121 antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
122 antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
123 antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
124 antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
125 antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
126 antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
127 antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
128 antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
129 antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
130 antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
131 antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
132 antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
133 antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
134 antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
135 antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
136 antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
137 antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
138 antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
139 antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
140 antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
141 antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
142 antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
143 antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
144 antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
145 antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
146 antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
147 antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
148 antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
149 antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
150 antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
151 antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
152 antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
153 antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
154 antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
155 antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
156 antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
157 antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
158 antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
159 antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
160 antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
161 antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
162 antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
163 antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
164 antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
165 antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
166 antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
167 antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
168 ###########################################################
170 DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
171 max_sections_per_slot=12
172 max_sections_per_symbol=12
175 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
177 PrbElemDl0=0,18,0,14,0,1,1,9,1
178 PrbElemDl1=18,18,0,14,1,1,1,9,1
179 PrbElemDl2=36,18,0,14,2,1,1,9,1
180 PrbElemDl3=54,18,0,14,3,1,1,9,1
181 PrbElemDl4=72,18,0,14,4,1,1,9,1
182 PrbElemDl5=90,10,0,14,5,1,1,9,1
184 # Extension Parameters for Beamforming weights
185 # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth
186 ExtBfwDl0=2,9,0,0,9,1
187 ExtBfwDl1=2,9,0,0,9,1
188 ExtBfwDl2=2,9,0,0,9,1
189 ExtBfwDl3=2,9,0,0,9,1
190 ExtBfwDl4=2,9,0,0,9,1
191 ExtBfwDl5=2,5,0,0,9,1
195 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
197 PrbElemUl0=0,18,0,14,0,1,1,9,1
198 PrbElemUl1=18,18,0,14,1,1,1,9,1
199 PrbElemUl2=36,18,0,14,2,1,1,9,1
200 PrbElemUl3=54,18,0,14,3,1,1,9,1
201 PrbElemUl4=72,18,0,14,4,1,1,9,1
202 PrbElemUl5=90,10,0,14,5,1,1,9,1
204 # Extension Parameters for Beamforming weights
205 # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth
206 ExtBfwUl0=2,9,0,0,9,1
207 ExtBfwUl1=2,9,0,0,9,1
208 ExtBfwUl2=2,9,0,0,9,1
209 ExtBfwUl3=2,9,0,0,9,1
210 ExtBfwUl4=2,9,0,0,9,1
211 ExtBfwUl5=2,5,0,0,9,1
215 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
216 PrbElemSrs0=0,30,0,1,0,0,1,9,0
217 PrbElemSrs1=30,30,0,1,0,0,1,9,0
218 PrbElemSrs2=60,30,0,1,0,0,1,9,0
219 PrbElemSrs3=90,30,0,1,0,0,1,9,0
220 PrbElemSrs4=120,30,0,1,0,0,1,9,0
221 PrbElemSrs5=150,30,0,1,0,0,1,9,0
222 PrbElemSrs6=180,30,0,1,0,0,1,9,0
223 PrbElemSrs7=210,30,0,1,0,0,1,9,0
224 PrbElemSrs8=240,30,0,1,0,0,1,9,0
225 PrbElemSrs9=270,30,0,1,0,0,1,9,0
226 PrbElemSrs10=270,3,0,1,0,0,1,9,0
229 ###########################################################
231 ## control of IQ byte order
232 iqswap=0 #do swap of IQ before send buffer to eth
233 nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
234 compression=1 # (1) compression enabled (0) compression disabled
235 compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane
237 debugStop=1 #stop app on 1pps boundary (gps_second % 30)
238 debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
239 bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
241 CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
244 totalBFWeights=64 # Total number of Beamforming Weights on RU
246 Tadv_cp_dl=25 # in us
247 # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
248 #Reception Window C-plane DL
249 T2a_min_cp_dl=285 # 285.42us
250 T2a_max_cp_dl=429 # 428.12us
252 #Reception Window C-plane UL
253 T2a_min_cp_ul=285 # 285.42us
254 T2a_max_cp_ul=429 # 428.12us
256 #Reception Window U-plane
257 T2a_min_up=71 # 71.35in us
258 T2a_max_up=428 # 428.12us
264 ###########################################################
267 #Transmission Window Fast C-plane DL
271 ##Transmission Window Fast C-plane UL
276 ##Transmission Window
277 T1a_min_up=96 #71 + 25 us
278 T1a_max_up=196 #71 + 25 us
283 ###########################################################