build/config/odu_config.xml

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <DU_CFG_PARAMS xmlns = "urn:o-ran:odu:configuration">
   4    <THREAD_AFFINITY>
   5       <DU_APP_CORE>16</DU_APP_CORE>
   6       <EGTP_CORE>27</EGTP_CORE>
   7       <RLC_MAC_CORE>18</RLC_MAC_CORE>
   8       <RLC_UL_CORE>22</RLC_UL_CORE>
   9       <SCH_CORE>22</SCH_CORE>
  10       <SCTP_CORE>25</SCTP_CORE>
  11       <LOWER_MAC_CORE>21</LOWER_MAC_CORE>
  12    </THREAD_AFFINITY>
  13    <DU_ID>1</DU_ID>
  14    <DU_NAME>ORAN OAM DU</DU_NAME>
  15    <MAX_NUM_DRB>29</MAX_NUM_DRB>
  16    <MAX_NUM_UE_SUPPORTED>3</MAX_NUM_UE_SUPPORTED>
  17    <MAX_NUM_UE>32</MAX_NUM_UE>
  18    <DU_IP_V4_ADDR>192.168.130.81</DU_IP_V4_ADDR>
  19    <CU_IP_V4_ADDR>192.168.130.82</CU_IP_V4_ADDR>
  20    <RIC_IP_V4_ADDR>192.168.130.80</RIC_IP_V4_ADDR>
  21    <SCTP>
  22       <F1_SCTP_PORT>38472</F1_SCTP_PORT>
  23       <E2_SCTP_PORT>36421</E2_SCTP_PORT>
  24       <MAX_DU_PORT>2</MAX_DU_PORT>
  25    </SCTP>
  26    <EGTP>
  27       <LOCAL_F1_EGTP_PORT>2152</LOCAL_F1_EGTP_PORT>
  28       <DEST_F1_EGTP_PORT>2152</DEST_F1_EGTP_PORT>
  29       <MIN_TEID>1</MIN_TEID>
  30    </EGTP>
  31    <F1_DU_SRVD_CELL_INFO>
  32       <F1_DU_CELL_INFO>
  33          <F1_CELL_INFO>
  34             <NR_CGI>
  35                <CELL_ID>1</CELL_ID>
  36                <PLMN>
  37                   <MCC>
  38                      <PLMN_MCC0>3</PLMN_MCC0>
  39                      <PLMN_MCC1>1</PLMN_MCC1>
  40                      <PLMN_MCC2>1</PLMN_MCC2>
  41                   </MCC>
  42                   <MNC>
  43                      <PLMN_MNC0>4</PLMN_MNC0>
  44                      <PLMN_MNC1>8</PLMN_MNC1>
  45                      <PLMN_MNC2>0</PLMN_MNC2>
  46                  </MNC>
  47                </PLMN>
  48             </NR_CGI>
  49             <NR_PCI>1</NR_PCI>
  50             <F1_SRVD_PLMN>
  51                <PLMN>
  52                   <MCC>
  53                      <PLMN_MCC0>3</PLMN_MCC0>
  54                      <PLMN_MCC1>1</PLMN_MCC1>
  55                      <PLMN_MCC2>1</PLMN_MCC2>
  56                   </MCC>
  57                   <MNC>
  58                      <PLMN_MNC0>4</PLMN_MNC0>
  59                      <PLMN_MNC1>8</PLMN_MNC1>
  60                      <PLMN_MNC2>0</PLMN_MNC2>
  61                   </MNC>
  62                </PLMN>
  63                <EXT_PLMN>
  64                   <MCC>
  65                      <PLMN_MCC0>3</PLMN_MCC0>
  66                      <PLMN_MCC1>1</PLMN_MCC1>
  67                      <PLMN_MCC2>1</PLMN_MCC2>
  68                   </MCC>
  69                   <MNC>
  70                      <PLMN_MNC0>4</PLMN_MNC0>
  71                      <PLMN_MNC1>8</PLMN_MNC1>
  72                      <PLMN_MNC2>0</PLMN_MNC2>
  73                   </MNC>
  74                </EXT_PLMN>
  75                <F1_SLICE_SUPP_LST>
  76                   <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
  77                   <SNSSAI_LIST>
  78                      <NUM_NSSAI>2</NUM_NSSAI>
  79                      <LIST>
  80                      <SNSSAI>
  81                         <SST>1</SST>
  82                         <SD_SIZE>
  83                         <SD>2</SD>
  84                         <SD>3</SD>
  85                         <SD>4</SD>
  86                         </SD_SIZE>
  87                      </SNSSAI>
  88                      <SNSSAI>
  89                         <SST>5</SST>
  90                         <SD_SIZE>
  91                         <SD>6</SD>
  92                         <SD>7</SD>
  93                         <SD>8</SD>
  94                         </SD_SIZE>
  95                      </SNSSAI>
  96                      </LIST>
  97                   </SNSSAI_LIST>
  98                </F1_SLICE_SUPP_LST>
  99             </F1_SRVD_PLMN>
 100          </F1_CELL_INFO>
 101          <TAC>1</TAC>
 102          <EPS_TAC>1</EPS_TAC>
 103          <NR_MODE_INFO>
 104             <NR_MODE>FDD</NR_MODE>
 105             <F1_NR_FDD_INFO>
 106                <F1_NR_FREQ_INFO_UL>
 107                   <NR_ARFCN>390000</NR_ARFCN>
 108                   <F1_SUL_INFO>
 109                      <SUL_ARFCN>100</SUL_ARFCN>
 110                      <F1_TX_BW>
 111                         <F1_NR_SCS>0</F1_NR_SCS>
 112                         <F1_NRB>14</F1_NRB>
 113                      </F1_TX_BW>
 114                   </F1_SUL_INFO>
 115                   <F1_FREQ_BAND_LIST>
 116                      <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
 117                      <LIST>
 118                      <F1_FREQ_BAND>
 119                         <NR_FREQ_BAND>1</NR_FREQ_BAND>
 120                         <SUL_BAND_LIST>
 121                         <LIST>
 122                            <SUL_BAND>2</SUL_BAND>
 123                         </LIST>
 124                         </SUL_BAND_LIST>
 125                      </F1_FREQ_BAND>
 126                      </LIST>
 127                   </F1_FREQ_BAND_LIST>
 128                </F1_NR_FREQ_INFO_UL>
 129                <F1_NR_FREQ_INFO_DL>
 130                   <NR_ARFCN>428000</NR_ARFCN>
 131                   <F1_SUL_INFO>
 132                      <SUL_ARFCN>100</SUL_ARFCN>
 133                      <F1_TX_BW>
 134                         <F1_NR_SCS>0</F1_NR_SCS>
 135                         <F1_NRB>14</F1_NRB>
 136                      </F1_TX_BW>
 137                   </F1_SUL_INFO>
 138                   <F1_FREQ_BAND_LIST>
 139                      <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
 140                      <LIST>
 141                      <F1_FREQ_BAND>
 142                         <NR_FREQ_BAND>1</NR_FREQ_BAND>
 143                         <SUL_BAND_LIST>
 144                         <LIST>
 145                            <SUL_BAND>2</SUL_BAND>
 146                         </LIST>
 147                         </SUL_BAND_LIST>
 148                      </F1_FREQ_BAND>
 149                      </LIST>
 150                   </F1_FREQ_BAND_LIST>
 151                </F1_NR_FREQ_INFO_DL>
 152                <F1_TX_BW_UL>
 153                   <F1_NR_SCS>0</F1_NR_SCS>
 154                   <F1_NRB>14</F1_NRB>
 155                </F1_TX_BW_UL>
 156                <F1_TX_BW_DL>
 157                   <F1_NR_SCS>0</F1_NR_SCS>
 158                   <F1_NRB>14</F1_NRB>
 159                </F1_TX_BW_DL>
 160             </F1_NR_FDD_INFO>
 161             <F1_NR_TDD_INFO>
 162                <F1_NR_FREQ_INFO>
 163                   <NR_ARFCN>623400</NR_ARFCN>
 164                   <F1_SUL_INFO>
 165                      <SUL_ARFCN>100</SUL_ARFCN>
 166                      <F1_TX_BW>
 167                         <F1_NR_SCS>1</F1_NR_SCS>
 168                         <F1_NRB>28</F1_NRB>
 169                      </F1_TX_BW>
 170                   </F1_SUL_INFO>
 171                   <F1_FREQ_BAND_LIST>
 172                      <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
 173                      <LIST>
 174                      <F1_FREQ_BAND>
 175                         <NR_FREQ_BAND>78</NR_FREQ_BAND>
 176                         <SUL_BAND_LIST>
 177                         <LIST>
 178                               <SUL_BAND>2</SUL_BAND>
 179                         </LIST>
 180                         </SUL_BAND_LIST>
 181                      </F1_FREQ_BAND>
 182                      </LIST>
 183                   </F1_FREQ_BAND_LIST>
 184                </F1_NR_FREQ_INFO>
 185                <F1_TX_BW>
 186                   <F1_NR_SCS>1</F1_NR_SCS>
 187                   <F1_NRB>28</F1_NRB>
 188                </F1_TX_BW>
 189             </F1_NR_TDD_INFO>
 190          </NR_MODE_INFO>
 191          <TIME_CFG>4</TIME_CFG>
 192          <F1_CELL_DIR>2</F1_CELL_DIR>
 193          <F1_CELL_TYPE>1</F1_CELL_TYPE>
 194          <F1_BRDCST_PLMN_INFO>
 195             <PLMN>
 196                <MCC>
 197                   <PLMN_MCC0>3</PLMN_MCC0>
 198                   <PLMN_MCC1>1</PLMN_MCC1>
 199                   <PLMN_MCC2>1</PLMN_MCC2>
 200                </MCC>
 201                <MNC>
 202                   <PLMN_MNC0>4</PLMN_MNC0>
 203                   <PLMN_MNC1>8</PLMN_MNC1>
 204                   <PLMN_MNC2>0</PLMN_MNC2>
 205                </MNC>
 206             </PLMN>
 207             <EXT_PLMN>
 208                <MCC>
 209                   <PLMN_MCC0>3</PLMN_MCC0>
 210                   <PLMN_MCC1>1</PLMN_MCC1>
 211                   <PLMN_MCC2>1</PLMN_MCC2>
 212                </MCC>
 213                <MNC>
 214                   <PLMN_MNC0>4</PLMN_MNC0>
 215                   <PLMN_MNC1>8</PLMN_MNC1>
 216                   <PLMN_MNC2>0</PLMN_MNC2>
 217                </MNC>
 218             </EXT_PLMN>
 219             <TAC>1</TAC>
 220             <NR_CELL_ID>1</NR_CELL_ID>
 221             <NR_RANAC>150</NR_RANAC>
 222          </F1_BRDCST_PLMN_INFO>
 223       </F1_DU_CELL_INFO>
 224    </F1_DU_SRVD_CELL_INFO>
 225    <F1_RRC_VERSION>
 226       <RRC_VER>0</RRC_VER>
 227       <EXT_RRC_VER>5</EXT_RRC_VER>
 228    </F1_RRC_VERSION>
 229    <MAC_CELL_CFG>
 230       <CELL_ID>1</CELL_ID>
 231       <CARRIER_CFG>
 232          <DL_BW>20</DL_BW>
 233          <NR_DL_ARFCN>428000</NR_DL_ARFCN>
 234          <UL_BW>20</UL_BW>
 235          <NR_UL_ARFCN>390000</NR_UL_ARFCN>
 236          <NUM_TX_ANT>2</NUM_TX_ANT>
 237          <NUM_RX_ANT>2</NUM_RX_ANT>
 238       </CARRIER_CFG>
 239       <CELL_CFG>
 240          <MAC_OP_STATE>0</MAC_OP_STATE><!--OP_DISABLED-->
 241          <MAC_ADMIN_STATE>1</MAC_ADMIN_STATE><!--ADMIN_UNLOCKED-->
 242          <MAC_CELL_STATE>1</MAC_CELL_STATE><!--CELL_INACTIVE-->
 243          <PLMN_INFO>
 244             <PLMN>
 245                <MCC>
 246                   <PLMN_MCC0>3</PLMN_MCC0>
 247                   <PLMN_MCC1>1</PLMN_MCC1>
 248                   <PLMN_MCC2>1</PLMN_MCC2>
 249                </MCC>
 250                <MNC>
 251                   <PLMN_MNC0>4</PLMN_MNC0>
 252                   <PLMN_MNC1>8</PLMN_MNC1>
 253                   <PLMN_MNC2>0</PLMN_MNC2>
 254                </MNC>
 255             </PLMN>
 256             <F1_SLICE_SUPP_LST>
 257                <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
 258                <SNSSAI_LIST>
 259                      <NUM_NSSAI>2</NUM_NSSAI>
 260                      <LIST>
 261                      <SNSSAI>
 262                         <SST>1</SST>
 263                         <SD_SIZE>
 264                         <SD>2</SD>
 265                         <SD>3</SD>
 266                         <SD>4</SD>
 267                         </SD_SIZE>
 268                      </SNSSAI>
 269                      <SNSSAI>
 270                         <SST>5</SST>
 271                         <SD_SIZE>
 272                         <SD>6</SD>
 273                         <SD>7</SD>
 274                         <SD>8</SD>
 275                         </SD_SIZE>
 276                      </SNSSAI>
 277                      </LIST>
 278                   </SNSSAI_LIST>
 279             </F1_SLICE_SUPP_LST>
 280          </PLMN_INFO>
 281          <NR_PCI>1</NR_PCI>
 282          <TAC>1</TAC>
 283          <SSB_FREQUENCY>3000000</SSB_FREQUENCY>
 284          <NR_SCS>0</NR_SCS>
 285          <DUPLEX_MODE>0</DUPLEX_MODE>
 286          <SIB1_CELL_CFG>
 287             <SCH_PAGE_CFG>
 288                <NUM_PO>1</NUM_PO>
 289                <PO_PRESENT>TRUE</PO_PRESENT>
 290                <PAGING_OCC>44</PAGING_OCC>
 291             </SCH_PAGE_CFG>
 292             <PDCCH_CONFIG_SIB1>
 293                <CORESET_ZERO_INDEX>0</CORESET_ZERO_INDEX>
 294                <SEARCH_SPACE_ZERO_INDEX>0</SEARCH_SPACE_ZERO_INDEX>
 295             </PDCCH_CONFIG_SIB1>
 296          </SIB1_CELL_CFG>
 297          <BWP_DL_CFG>
 298             <BWP_PARAMS>
 299                <FIRST_PRB>0</FIRST_PRB>
 300                <NUM_PRB>106</NUM_PRB>
 301                <NR_SCS>0</NR_SCS>
 302                <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
 303             </BWP_PARAMS>
 304             <PDCCH_CFG_COMMON>
 305                <SEARCH_SPACE_CFG>
 306                   <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
 307                   <CORESET_0_INDEX>0</CORESET_0_INDEX>
 308                   <SS_MONITORING_SLOT_SL1>0</SS_MONITORING_SLOT_SL1>
 309                   <DURATION>0</DURATION>
 310                   <SS_MONITORING_SYMBOL>8192</SS_MONITORING_SYMBOL>
 311                   <CANDIDATE_INFO>
 312                      <AGG_LEVEL1>8</AGG_LEVEL1>
 313                      <AGG_LEVEL2>4</AGG_LEVEL2>
 314                      <AGG_LEVEL4>2</AGG_LEVEL4>
 315                      <AGG_LEVEL8>1</AGG_LEVEL8>
 316                      <AGG_LEVEL16>0</AGG_LEVEL16>
 317                   </CANDIDATE_INFO>
 318                </SEARCH_SPACE_CFG>
 319                <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
 320             </PDCCH_CFG_COMMON>
 321             <PDSCH_CFG_COMMON>
 322                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
 323                <PDSCH_COMM_TIME_ALLOC_LIST>
 324                   <LIST>
 325                   <PDSCH_COMM_TIME_ALLOC>
 326                      <PDSCH_K0_CFG>0</PDSCH_K0_CFG>
 327                      <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
 328                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
 329                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
 330                   </PDSCH_COMM_TIME_ALLOC>
 331                   <PDSCH_COMM_TIME_ALLOC>
 332                      <PDSCH_K0_CFG>1</PDSCH_K0_CFG>
 333                      <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
 334                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
 335                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
 336                   </PDSCH_COMM_TIME_ALLOC>
 337                   </LIST>
 338                </PDSCH_COMM_TIME_ALLOC_LIST>
 339             </PDSCH_CFG_COMMON>
 340          </BWP_DL_CFG>
 341          <BWP_UL_CFG>
 342             <BWP_PARAMS>
 343                <FIRST_PRB>0</FIRST_PRB>
 344                <TOTAL_PRB_20MHZ_MU0>106</TOTAL_PRB_20MHZ_MU0>
 345                <NR_SCS>0</NR_SCS>
 346                <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
 347             </BWP_PARAMS>
 348             <PUCCH_CFG_COMMON>
 349                <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
 350                <PUCCH_GROUP_HOPPING>0</PUCCH_GROUP_HOPPING>
 351             </PUCCH_CFG_COMMON>
 352             <PUSCH_CFG_COMMON>
 353                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
 354                <PUSCH_COMM_TIME_ALLOC_LIST>
 355                   <LIST>
 356                   <PUSCH_COMM_TIME_ALLOC>
 357                      <PUSCH_K2_CFG>0</PUSCH_K2_CFG>
 358                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
 359                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
 360                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
 361                   </PUSCH_COMM_TIME_ALLOC>
 362                   <PUSCH_COMM_TIME_ALLOC>
 363                      <PUSCH_K2_CFG>1</PUSCH_K2_CFG>
 364                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
 365                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
 366                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
 367                   </PUSCH_COMM_TIME_ALLOC>
 368                   </LIST>
 369                </PUSCH_COMM_TIME_ALLOC_LIST>
 370             </PUSCH_CFG_COMMON>
 371          </BWP_UL_CFG>
 372       </CELL_CFG>
 373       <SSB_CFG>
 374          <SSB_PBSC_PWR>0</SSB_PBSC_PWR>
 375          <SCS_CMN>0</SCS_CMN>  <!--SCS_15-->
 376          <SSB_OFF_PT_A>24</SSB_OFF_PT_A>
 377          <SSB_PERIOD>2</SSB_PERIOD>
 378          <SSB_SC_OFF>0</SSB_SC_OFF>
 379          <SSB_LIST>
 380             <SSB_MASK>1</SSB_MASK>
 381          </SSB_LIST>
 382          <NUM_SSB>1</NUM_SSB>
 383          <BEAM_LIST>
 384             <BEAM_ID>0</BEAM_ID>
 385          </BEAM_LIST>
 386          <BETA_PSS>0</BETA_PSS>
 387          <BCH_PAY_FLAG>1</BCH_PAY_FLAG>
 388          <DMRS_TYPE_A_PROS>2</DMRS_TYPE_A_PROS>
 389       </SSB_CFG>
 390       <CSIRS_CFG>
 391          <CSIRS_FREQ>0</CSIRS_FREQ>
 392          <CSIRS_PORTS>0</CSIRS_PORTS>
 393          <CSIRS_OFDM_PORT>0</CSIRS_OFDM_PORT>
 394          <CSIRS_OFDM_PORT_2>0</CSIRS_OFDM_PORT_2>
 395          <CSIRS_DM_TYPE>0</CSIRS_DM_TYPE>
 396          <CSIRS_DENSITY>0</CSIRS_DENSITY>
 397          <CSIRS_DENSITY_DOT_5>0</CSIRS_DENSITY_DOT_5>
 398          <POWER_CONTROL_OFFSET>0</POWER_CONTROL_OFFSET>
 399          <POWER_CONTROL_OFFSET_SS>0</POWER_CONTROL_OFFSET_SS>
 400          <PERIODICITY_OFFSET>0</PERIODICITY_OFFSET>
 401       </CSIRS_CFG>
 402       <PRACH_CFG>
 403          <PRACH_SEQ_LEN>0</PRACH_SEQ_LEN>
 404          <NR_SCS>0</NR_SCS>
 405          <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
 406          <NUM_PRACH_FDM>1</NUM_PRACH_FDM>
 407          <FDM_LIST>
 408             <FDM_INFO>
 409                <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
 410                <NUM_ROOT_SEQ>1</NUM_ROOT_SEQ>
 411                <K1>0</K1>
 412                <ZERO_CORR_ZONE_CFG>4</ZERO_CORR_ZONE_CFG>
 413             </FDM_INFO>
 414          </FDM_LIST>
 415          <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
 416          <SSB_PER_RACH>1</SSB_PER_RACH>
 417          <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
 418          <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
 419          <MAX_NUM_RB>106</MAX_NUM_RB>
 420          <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
 421          <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
 422          <RA_RSP_WINDOW>10</RA_RSP_WINDOW>
 423       </PRACH_CFG>
 424       <TDD_CFG>
 425          <TDD_PERIODICITY>0</TDD_PERIODICITY>
 426          <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
 427          <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
 428          <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
 429          <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
 430       </TDD_CFG>
 431       <PRE_CODE_CFG>
 432          <NUM_LAYERS>1</NUM_LAYERS>
 433          <NUM_ANT_PORTS>0</NUM_ANT_PORTS>
 434       </PRE_CODE_CFG>
 435       <BEAM_FORM_CFG>
 436          <NUM_OF_BEAMS>0</NUM_OF_BEAMS>
 437          <NUM_TX_RUS>0</NUM_TX_RUS>
 438          <BEAM_IDX>0</BEAM_IDX>
 439          <BEAM_TYPE>0</BEAM_TYPE>
 440          <BEAM_AZIMUTH>0</BEAM_AZIMUTH>
 441          <BEAM_TILT>0</BEAM_TILT>
 442          <BEAM_HORIZ_WIDTH>0</BEAM_HORIZ_WIDTH>
 443          <BEAM_VERT_WIDTH>0</BEAM_VERT_WIDTH>
 444          <COVER_SHAPE>0</COVER_SHAPE>
 445          <DIGI_TILT>0</DIGI_TILT>
 446          <DIGI_AZIMUTH>0</DIGI_AZIMUTH>
 447       </BEAM_FORM_CFG>
 448    </MAC_CELL_CFG>
 449    <MIB_PARAMS>
 450       <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
 451       <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
 452       <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
 453       <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
 454       <CORESET_0_INDEX>0</CORESET_0_INDEX>
 455       <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
 456       <CELL_BARRED>1</CELL_BARRED>
 457       <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
 458    </MIB_PARAMS>
 459    <SLICE_CFG>
 460       <NUM_RRM_POLICY>1</NUM_RRM_POLICY>
 461       <MAC_SLICE_RRM_POLICY>
 462          <RESOURCE_TYPE>0</RESOURCE_TYPE>
 463          <NUM_RRM_POLICY_MEMBER>1</NUM_RRM_POLICY_MEMBER>
 464          <RRM_POLICY_MEMBER_LIST>
 465             <PLMN>
 466                <MCC>
 467                   <PLMN_MCC0>3</PLMN_MCC0>
 468                   <PLMN_MCC1>1</PLMN_MCC1>
 469                   <PLMN_MCC2>1</PLMN_MCC2>
 470                </MCC>
 471                <MNC>
 472                   <PLMN_MNC0>4</PLMN_MNC0>
 473                   <PLMN_MNC1>8</PLMN_MNC1>
 474                   <PLMN_MNC2>0</PLMN_MNC2>
 475                </MNC>
 476             </PLMN>
 477             <SNSSAI>
 478                <SST>1</SST>
 479                <SD_SIZE>
 480                <SD>2</SD>
 481                <SD>3</SD>
 482                <SD>4</SD>
 483                </SD_SIZE>
 484             </SNSSAI>
 485          </RRM_POLICY_MEMBER_LIST>
 486          <RRM_POLICY_RATIO>
 487             <MAX_RATIO>90</MAX_RATIO>
 488             <MIN_RATIO>30</MIN_RATIO>
 489             <DEDICATED_RATIO>10</DEDICATED_RATIO>
 490          </RRM_POLICY_RATIO>
 491       </MAC_SLICE_RRM_POLICY>
 492    </SLICE_CFG>
 493    <SIB1_PARAMS>
 494       <PLMN>
 495          <MCC>
 496             <PLMN_MCC0>3</PLMN_MCC0>
 497             <PLMN_MCC1>1</PLMN_MCC1>
 498             <PLMN_MCC2>1</PLMN_MCC2>
 499          </MCC>
 500          <MNC>
 501          <PLMN_MNC0>4</PLMN_MNC0>
 502          <PLMN_MNC1>8</PLMN_MNC1>
 503          <PLMN_MNC2>0</PLMN_MNC2>
 504          </MNC>
 505       </PLMN>
 506       <TAC>1</TAC>
 507       <RANAC>1</RANAC>
 508       <CELL_IDENTITY>1</CELL_IDENTITY>
 509       <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
 510       <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
 511       <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
 512       <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
 513       <SI_SHED_INFO>
 514          <WIN_LEN>0</WIN_LEN>
 515          <BROADCAST_STA>0</BROADCAST_STA>
 516          <PERIODICITY>0</PERIODICITY>
 517          <SIB_TYPE>0</SIB_TYPE>
 518          <SIB1_VAL_TAG>10</SIB1_VAL_TAG>
 519       </SI_SHED_INFO>
 520       <SRV_CELLCFG_COM_SIB>
 521          <NR_SCS>0</NR_SCS>
 522          <SSB_POS_INBURST>192</SSB_POS_INBURST>
 523          <SSB_PERIODICITY>20</SSB_PERIODICITY>
 524          <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
 525          <DL_CFG_COMMON>
 526             <NR_FREQ_BAND>1</NR_FREQ_BAND>
 527             <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
 528             <FREQ_LOC_BW>28875</FREQ_LOC_BW>
 529             <SCS_SPEC_CARRIER>
 530                <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
 531                <NR_SCS>0</NR_SCS>
 532                <SCS_BW>20</SCS_BW>
 533             </SCS_SPEC_CARRIER>
 534             <PDCCH_CFG_COMMON>
 535                <PRESENT>2</PRESENT>
 536                <CORESET_0_INDEX>0</CORESET_0_INDEX>
 537                <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
 538                <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
 539                <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
 540                <MONITOR_SLOT_PRD_OFFPRESENT>0</MONITOR_SLOT_PRD_OFFPRESENT>
 541                <LIST>
 542                   <MONITOR_LIST>
 543                      <MONITOR_SYMBOL_INSLOT>128</MONITOR_SYMBOL_INSLOT>
 544                   </MONITOR_LIST>
 545                   <MONITOR_LIST>
 546                      <MONITOR_SYMBOL_INSLOT>0</MONITOR_SYMBOL_INSLOT>
 547                   </MONITOR_LIST>
 548                </LIST>
 549                <NUMC_AGG_LVL1>7</NUMC_AGG_LVL1>
 550                <NUMC_AGG_LVL2>4</NUMC_AGG_LVL2>
 551                <NUMC_AGG_LVL4>2</NUMC_AGG_LVL4>
 552                <NUMC_AGG_LVL8>1</NUMC_AGG_LVL8>
 553                <NUMC_AGG_LVL16>0</NUMC_AGG_LVL16>
 554                <SEARCH_SPC_TYPE>1</SEARCH_SPC_TYPE>
 555                <PDCCH_SERACH_SPACE_DCI_FORMAT>0</PDCCH_SERACH_SPACE_DCI_FORMAT>
 556                <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
 557                <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
 558                <RA_PDCCH_SEARCH_SPACE_ID_PAGING>1</RA_PDCCH_SEARCH_SPACE_ID_PAGING>
 559             </PDCCH_CFG_COMMON>
 560             <PDSCH_CFG_COMMON>
 561                <PRESENT>2</PRESENT>
 562                <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
 563                <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
 564                   <LIST>
 565                   <PDSCH_TIME_DOM_RSRC_ALLOC>
 566                      <K0>0</K0>
 567                      <MAP_TYPE>0</MAP_TYPE>
 568                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
 569                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
 570                   </PDSCH_TIME_DOM_RSRC_ALLOC>
 571                   <PDSCH_TIME_DOM_RSRC_ALLOC>
 572                      <K0>1</K0>
 573                      <MAP_TYPE>0</MAP_TYPE>
 574                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
 575                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
 576                   </PDSCH_TIME_DOM_RSRC_ALLOC>
 577                   </LIST>
 578                </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
 579             </PDSCH_CFG_COMMON>
 580             <BCCH_CFG>
 581                <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
 582             </BCCH_CFG>
 583             <PCCH_CFG>
 584                <DFLT_PAGING_CYCLE>3</DFLT_PAGING_CYCLE>
 585                <NAND_PAGING_FRM_OFFSET>1</NAND_PAGING_FRM_OFFSET>
 586                <PAGE_FRM_OFFSET>0</PAGE_FRM_OFFSET>
 587                <NS>2</NS>
 588                <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
 589                <LIST>
 590                   <FIRST_PDCCH_LIST>
 591                      <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
 592                   </FIRST_PDCCH_LIST>
 593                </LIST>
 594             </PCCH_CFG>
 595          </DL_CFG_COMMON>
 596          <UL_CFG_COMMON>
 597             <NR_FREQ_BAND>1</NR_FREQ_BAND>
 598             <UL_P_MAX>23</UL_P_MAX>
 599             <FREQ_LOC_BW>28875</FREQ_LOC_BW>
 600             <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
 601             <SCS_SPEC_CARRIER>
 602                <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
 603                <NR_SCS>0</NR_SCS>
 604                <NR_BANDWIDTH>20</NR_BANDWIDTH>
 605             </SCS_SPEC_CARRIER>
 606             <RACH_CFG_COMMON>
 607                <PRESENT>2</PRESENT>
 608                <PRACH_CONFIG_IDX>31</PRACH_CONFIG_IDX>
 609                <MSG_1_FDM>0</MSG_1_FDM>
 610                <MAX_NUM_RB>106</MAX_NUM_RB>
 611                <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
 612                <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
 613                <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
 614                <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
 615                <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
 616                <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
 617                <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
 618                <NUM_SSB_PER_RACH_OCC>1</NUM_SSB_PER_RACH_OCC>
 619                <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
 620                <CONT_RES_TIMER>7</CONT_RES_TIMER>
 621                <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
 622                <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
 623                <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
 624                <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
 625                <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
 626             </RACH_CFG_COMMON>
 627             <PUSCH_CFG_COMMON>
 628                <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
 629                <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
 630                <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
 631                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
 632                <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
 633                   <LIST>
 634                   <PUSCH_TIME_DOM_RSRC_ALLOC>
 635                      <K2>4</K2>
 636                      <MAP_TYPE>0</MAP_TYPE>
 637                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
 638                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
 639                   </PUSCH_TIME_DOM_RSRC_ALLOC>
 640                   <PUSCH_TIME_DOM_RSRC_ALLOC>
 641                      <K2>5</K2>
 642                      <MAP_TYPE>0</MAP_TYPE>
 643                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
 644                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
 645                   </PUSCH_TIME_DOM_RSRC_ALLOC>
 646                   </LIST>
 647                </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
 648             </PUSCH_CFG_COMMON>
 649             <PUCCH_CFG_COMMON>
 650                <PRESENT>2</PRESENT>
 651                <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
 652                <GRP_HOP>0</GRP_HOP>
 653                <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
 654             </PUCCH_CFG_COMMON>
 655          </UL_CFG_COMMON>
 656          <TDD_UL_DL_CFG_COMMON>
 657             <REF_SCS>1</REF_SCS>
 658             <TX_PRD>6</TX_PRD>
 659             <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
 660             <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
 661             <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
 662             <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
 663          </TDD_UL_DL_CFG_COMMON>
 664       </SRV_CELLCFG_COM_SIB>
 665    </SIB1_PARAMS>
 666    <RADIO_FRAME_DURATION>10</RADIO_FRAME_DURATION>
 667    <MAX_NUM_CELL>2</MAX_NUM_CELL>
 668    <MAX_NUM_MU>4</MAX_NUM_MU>
 669    <MAX_NUM_UE_PER_TTI>1</MAX_NUM_UE_PER_TTI>
 670    <MAX_DRB_LCID>32</MAX_DRB_LCID>
 671    <MAX_NUM_SRB>3</MAX_NUM_SRB>
 672    <MAX_NUM_SSB>64</MAX_NUM_SSB>
 673    <MAX_NUM_HARQ_PROC>16</MAX_NUM_HARQ_PROC>
 674    <MAX_NUM_TB_PER_UE>2</MAX_NUM_TB_PER_UE>
 675    <PHY_DELTA_DL>1</PHY_DELTA_DL>
 676    <ODU_START_CRNTI>100</ODU_START_CRNTI>
 677    <ODU_END_CRNTI>500</ODU_END_CRNTI>
 678    <DEFAULT_MCS>4</DEFAULT_MCS>
 679    <BANDWIDTH>20</BANDWIDTH>
 680    <MAX_NUM_RB>106</MAX_NUM_RB>
 681    <ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL>5</ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL>
 682    <ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL>60000</ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL>
 683    <MAX_PO_PER_PF>4</MAX_PO_PER_PF>
 684    <MAX_SLOTS>10</MAX_SLOTS>
 685    <MAX_SFN>1024</MAX_SFN>
 686    <BASE_SCS>15</BASE_SCS>
 687    <MAX_SYMB_PER_SLOT>14</MAX_SYMB_PER_SLOT>
 688 <!--
 689    <GNB_ID>1</GNB_ID>
 690    <DU_TIMER_INFO>
 691       <TIMER_TQ_CP>
 692          <TIMER_LEN>2</TIMER_LEN>
 693       </TIMER_TQ_CP>
 694       <TIMER_RESOLUTION>1</TIMER_RESOLUTION>
 695    </DU_TIMER_INFO>
 696    <E2AP_CFG>
 697       <E2_NODE_ID>1</E2_NODE_ID>
 698       <NUM_OF_TNL_ASSOC>1</NUM_OF_TNL_ASSOC>
 699       <TNL_ASSOC_LIST>
 700          <TNL_ASSOC>
 701             <LOCAL_IP>192.168.130.71</LOCAL_IP>
 702             <LOCAL_PORT>36421<LOCAL_PORT>
 703             <DESTINATION_IP>192.168.130.70</DESTINATION_IP>
 704             <DESTINATION_PORT>36421</DESTINATION_PORT>
 705             <ASSOC_USAGE>2</ASSOC_USAGE>
 706          </TNL_ASSOC>
 707       </TNL_ASSOC_LIST>
 708       <NUM_OF_RAN_FUNCTION>1</NUM_OF_RAN_FUNCTION>
 709       <RAN_FUNCTION_LIST>
 710          <RAN_FUNCTION>
 711             <ID>1</ID>
 712             <RAN_FUNCTION_NAME>
 713                <SHORT_NAME>ORAN-E2SM-KPM</SHORT_NAME>
 714                <SEVICE_MODEL_OID>1.3.6.1.4.1.53148.1.2.2.2</SEVICE_MODEL_OID>
 715                <DESCRIPTION>KPM Monitor</DESCRIPTION>
 716             </RAN_FUNCTION_NAME>
 717             <REVISION_COUNTER>0</REVISION_COUNTER>
 718             <NUM_OF_EVENT_TRIGGER_STYLE_SUPPORTED>1</NUM_OF_EVENT_TRIGGER_STYLE_SUPPORTED>
 719             <EVENT_TRIGGERED_STYLE_LIST>
 720                <EVENT_TRIGGERED_STYLE>
 721                   <STYLE_TYPE>1</STYLE_TYPE>
 722                   <NAME>Periodic Report</NAME>
 723                   <FORMAT_TYPE>1</FORMAT_TYPE>
 724                </EVENT_TRIGGERED_STYLE>
 725             </EVENT_TRIGGERED_STYLE_LIST>
 726             <NUM_OF_REPORT_STYLE_SUPPORTED>1</NUM_OF_REPORT_STYLE_SUPPORTED>
 727             <REPORT_STYLE_SUPPORTED_LIST>
 728                <REPORT_STYLE>
 729                   <RIC_STYLE>
 730                      <STYLE_TYPE>1</STYLE_TYPE>
 731                      <NAME>E2 Node Measurement</NAME>
 732                      <FORMAT_TYPE>1</FORMAT_TYPE>
 733                   </RIC_STYLE>
 734                   <NUM_OF_MEASUREMENT_INFO>2</NUM_OF_MEASUREMENT_INFO>
 735                   <MEASUREMENT_INFO_LIST>
 736                      <MEASUREMENT_INFO>
 737                         <ID>1</ID>
 738                         <NAME>RRU.PrbTotDl</NAME>
 739                      </MEASUREMENT_INFO>
 740                      <MEASUREMENT_INFO>
 741                         <ID>2</ID>
 742                         <NAME>RRU.PrbTotUl</NAME>
 743                      </MEASUREMENT_INFO>
 744                   </MEASUREMENT_INFO_LIST>
 745                </REPORT_STYLE>
 746             </REPORT_STYLE_SUPPORTED_LIST>
 747             <RIC_INDICATION_HEADER_FORMAT>1</RIC_INDICATION_HEADER_FORMAT>
 748             <RIC_INDICATION_MESSAGE_FORMAT>1</RIC_INDICATION_MESSAGE_FORMAT>
 749          </RAN_FUNCTION>
 750       </RAN_FUNCTION_LIST>
 751    </E2AP_CFG>
 752 -->
 753 </DU_CFG_PARAMS>
 754
 755