[Epic-ID: ODUHIGH-538][Issue-ID: ODUHIGH-575] Deallocating the variables allocated...
[o-du/l2.git] / build / config / fdd_odu_config.xml
1 <?xml version="1.0" encoding="UTF-8"?>
2
3 <DU_CFG_PARAMS xmlns = "urn:o-ran:odu:configuration">
4    <THREAD_AFFINITY>
5       <DU_APP_CORE>16</DU_APP_CORE>
6       <EGTP_CORE>27</EGTP_CORE>
7       <RLC_MAC_CORE>18</RLC_MAC_CORE>
8       <RLC_UL_CORE>22</RLC_UL_CORE>
9       <SCH_CORE>22</SCH_CORE>
10       <SCTP_CORE>25</SCTP_CORE>
11       <LOWER_MAC_CORE>21</LOWER_MAC_CORE>
12    </THREAD_AFFINITY>
13    <GNB_ID>1</GNB_ID>
14    <DU_ID>1</DU_ID>
15    <DU_NAME>ORAN OAM DU</DU_NAME>
16    <MAX_NUM_DRB>29</MAX_NUM_DRB>
17    <DU_IP_V4_ADDR>192.168.130.81</DU_IP_V4_ADDR>
18    <CU_IP_V4_ADDR>192.168.130.82</CU_IP_V4_ADDR>
19    <RIC_IP_V4_ADDR>192.168.130.80</RIC_IP_V4_ADDR>
20    <SCTP>
21       <F1_SCTP_PORT>38472</F1_SCTP_PORT>
22       <E2_SCTP_PORT>36421</E2_SCTP_PORT>
23       <MAX_DU_PORT>2</MAX_DU_PORT>
24    </SCTP>
25    <EGTP>
26       <LOCAL_F1_EGTP_PORT>2152</LOCAL_F1_EGTP_PORT>
27       <DEST_F1_EGTP_PORT>2152</DEST_F1_EGTP_PORT>
28       <MIN_TEID>1</MIN_TEID>
29    </EGTP>
30    <SIB1_PARAMS>
31       <PLMN>
32          <MCC>
33             <PLMN_MCC0>3</PLMN_MCC0>
34             <PLMN_MCC1>1</PLMN_MCC1>
35             <PLMN_MCC2>1</PLMN_MCC2>
36          </MCC>
37          <MNC>
38          <PLMN_MNC0>4</PLMN_MNC0>
39          <PLMN_MNC1>8</PLMN_MNC1>
40          <PLMN_MNC2>0</PLMN_MNC2>
41          </MNC>
42       </PLMN>
43       <TAC>1</TAC>
44       <RANAC>1</RANAC>
45       <CELL_IDENTITY>1</CELL_IDENTITY>
46       <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
47       <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
48       <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
49       <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
50       <SI_SHED_INFO>
51          <WIN_LEN>0</WIN_LEN>
52          <BROADCAST_STATUS>0</BROADCAST_STATUS>
53          <PERIODICITY>0</PERIODICITY>
54          <SIB_TYPE>0</SIB_TYPE>
55          <SIB1_VALUE_TAG>10</SIB1_VALUE_TAG>
56       </SI_SHED_INFO>
57       <SRV_CELL_CFG_COM_SIB>
58          <NR_SCS>0</NR_SCS>
59          <SSB_POS_INBURST>192</SSB_POS_INBURST>
60          <SSB_PERIODICITY>20</SSB_PERIODICITY>
61          <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
62          <DL_CFG_COMMON>
63             <NR_FREQ_BAND>1</NR_FREQ_BAND>
64             <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
65             <FREQ_LOC_BW>28875</FREQ_LOC_BW>
66             <SCS_SPEC_CARRIER>
67                <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
68                <NR_SCS>0</NR_SCS>
69                <SCS_BW>20</SCS_BW>
70             </SCS_SPEC_CARRIER>
71             <PDCCH_CFG_COMMON>
72                <PRESENT>2</PRESENT>
73                <CORESET_0_INDEX>0</CORESET_0_INDEX>
74                <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
75                <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
76                <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
77                <MONITOR_SLOT_PERIOD_OFFSET_PRESENT>1</MONITOR_SLOT_PERIOD_OFFSET_PRESENT>
78                <MONITOR_LIST>
79                   <MONITOR_SYMBOL_IN_SLOT>128</MONITOR_SYMBOL_IN_SLOT>
80                   <MONITOR_SYMBOL_IN_SLOT>0</MONITOR_SYMBOL_IN_SLOT>
81                </MONITOR_LIST>
82                <NUM_CANDIDATE_AGG_LVL_1>7</NUM_CANDIDATE_AGG_LVL_1>
83                <NUM_CANDIDATE_AGG_LVL_2>4</NUM_CANDIDATE_AGG_LVL_2>
84                <NUM_CANDIDATE_AGG_LVL_4>2</NUM_CANDIDATE_AGG_LVL_4>
85                <NUM_CANDIDATE_AGG_LVL_8>1</NUM_CANDIDATE_AGG_LVL_8>
86                <NUM_CANDIDATE_AGG_LVL_16>0</NUM_CANDIDATE_AGG_LVL_16>
87                <SEARCH_SPACE_TYPE>1</SEARCH_SPACE_TYPE>
88                <PDCCH_SEARCH_SPACE_DCI_FORMAT>0</PDCCH_SEARCH_SPACE_DCI_FORMAT>
89                <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
90                <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
91                <PDCCH_SEARCH_SPACE_ID_RA>1</PDCCH_SEARCH_SPACE_ID_RA>
92             </PDCCH_CFG_COMMON>
93             <PDSCH_CFG_COMMON>
94                <PRESENT>2</PRESENT>
95                <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
96                <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
97                   <PDSCH_TIME_DOM_RSRC_ALLOC>
98                      <K0>0</K0>
99                      <MAP_TYPE>0</MAP_TYPE>
100                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
101                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
102                   </PDSCH_TIME_DOM_RSRC_ALLOC>
103                   <PDSCH_TIME_DOM_RSRC_ALLOC>
104                      <K0>1</K0>
105                      <MAP_TYPE>0</MAP_TYPE>
106                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
107                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
108                   </PDSCH_TIME_DOM_RSRC_ALLOC>
109                </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
110             </PDSCH_CFG_COMMON>
111             <BCCH_CFG>
112                <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
113             </BCCH_CFG>
114             <PCCH_CFG>
115                <DEFAULT_PAGING_CYCLE>256</DEFAULT_PAGING_CYCLE>
116                <NAND_PAGING_FRAME_OFFSET>1</NAND_PAGING_FRAME_OFFSET>
117                <PAGE_FRAME_OFFSET>0</PAGE_FRAME_OFFSET>
118                <NS>1</NS>
119                <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
120                <FIRST_PDCCH_LIST>
121                   <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
122                </FIRST_PDCCH_LIST>
123             </PCCH_CFG>
124          </DL_CFG_COMMON>
125          <UL_CFG_COMMON>
126             <NR_FREQ_BAND>1</NR_FREQ_BAND>
127             <UL_P_MAX>23</UL_P_MAX>
128             <FREQ_LOC_BW>28875</FREQ_LOC_BW>
129             <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
130             <SCS_SPEC_CARRIER>
131                <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
132                <NR_SCS>0</NR_SCS>
133                <SCS_BW>20</SCS_BW>
134             </SCS_SPEC_CARRIER>
135             <RACH_CFG_COMMON>
136                <PRESENT>2</PRESENT>
137                <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
138                <MSG_1_FDM>0</MSG_1_FDM>
139                <MAX_NUM_RB>106</MAX_NUM_RB>
140                <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
141                <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
142                <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
143                <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
144                <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
145                <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
146                <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
147                <NUM_SSB_PER_RACH_OCC>4</NUM_SSB_PER_RACH_OCC>
148                <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
149                <CONT_RES_TIMER>7</CONT_RES_TIMER>
150                <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
151                <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
152                <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
153                <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
154                <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
155             </RACH_CFG_COMMON>
156             <PUSCH_CFG_COMMON>
157                <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
158                <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
159                <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
160                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
161                <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
162                   <PUSCH_TIME_DOM_RSRC_ALLOC>
163                      <K2>4</K2>
164                      <MAP_TYPE>0</MAP_TYPE>
165                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
166                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
167                   </PUSCH_TIME_DOM_RSRC_ALLOC>
168                   <PUSCH_TIME_DOM_RSRC_ALLOC>
169                      <K2>5</K2>
170                      <MAP_TYPE>0</MAP_TYPE>
171                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
172                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
173                   </PUSCH_TIME_DOM_RSRC_ALLOC>
174                </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
175             </PUSCH_CFG_COMMON>
176             <PUCCH_CFG_COMMON>
177                <PRESENT>2</PRESENT>
178                <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
179                <GRP_HOP>0</GRP_HOP>
180                <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
181             </PUCCH_CFG_COMMON>
182          </UL_CFG_COMMON>
183          <TDD_UL_DL_CFG_COMMON>
184             <REF_SCS>1</REF_SCS>
185             <TX_PRD>6</TX_PRD>
186             <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
187             <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
188             <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
189             <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
190          </TDD_UL_DL_CFG_COMMON>
191       </SRV_CELL_CFG_COM_SIB>
192    </SIB1_PARAMS>
193    <F1_DU_SRVD_CELL_INFO>
194       <F1_DU_CELL_INFO>
195          <F1_CELL_INFO>
196             <NR_CGI>
197                <CELL_ID>1</CELL_ID>
198                <PLMN>
199                   <MCC>
200                      <PLMN_MCC0>3</PLMN_MCC0>
201                      <PLMN_MCC1>1</PLMN_MCC1>
202                      <PLMN_MCC2>1</PLMN_MCC2>
203                   </MCC>
204                   <MNC>
205                      <PLMN_MNC0>4</PLMN_MNC0>
206                      <PLMN_MNC1>8</PLMN_MNC1>
207                      <PLMN_MNC2>0</PLMN_MNC2>
208                  </MNC>
209                </PLMN>
210             </NR_CGI>
211             <NR_PCI>1</NR_PCI>
212             <F1_SRVD_PLMN>
213                <PLMN>
214                   <MCC>
215                      <PLMN_MCC0>3</PLMN_MCC0>
216                      <PLMN_MCC1>1</PLMN_MCC1>
217                      <PLMN_MCC2>1</PLMN_MCC2>
218                   </MCC>
219                   <MNC>
220                      <PLMN_MNC0>4</PLMN_MNC0>
221                      <PLMN_MNC1>8</PLMN_MNC1>
222                      <PLMN_MNC2>0</PLMN_MNC2>
223                   </MNC>
224                </PLMN>
225                <EXT_PLMN>
226                   <MCC>
227                      <PLMN_MCC0>3</PLMN_MCC0>
228                      <PLMN_MCC1>1</PLMN_MCC1>
229                      <PLMN_MCC2>1</PLMN_MCC2>
230                   </MCC>
231                   <MNC>
232                      <PLMN_MNC0>4</PLMN_MNC0>
233                      <PLMN_MNC1>8</PLMN_MNC1>
234                      <PLMN_MNC2>0</PLMN_MNC2>
235                   </MNC>
236                </EXT_PLMN>
237                <F1_SLICE_SUPP_LST>
238                   <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
239                   <SNSSAI_LIST>
240                      <SNSSAI>
241                         <SST>1</SST>
242                         <SD_SIZE>
243                            <SD>2</SD>
244                            <SD>3</SD>
245                            <SD>4</SD>
246                         </SD_SIZE>
247                      </SNSSAI>
248                      <SNSSAI>
249                         <SST>5</SST>
250                         <SD_SIZE>
251                            <SD>6</SD>
252                            <SD>7</SD>
253                            <SD>8</SD>
254                         </SD_SIZE>
255                      </SNSSAI>
256                   </SNSSAI_LIST>
257                </F1_SLICE_SUPP_LST>
258             </F1_SRVD_PLMN>
259          </F1_CELL_INFO>
260          <TAC>1</TAC>
261          <EPS_TAC>1</EPS_TAC>
262          <NR_MODE_INFO>
263             <NR_MODE>FDD</NR_MODE>
264             <F1_NR_FDD_INFO>
265                <F1_NR_FREQ_INFO_UL>
266                   <NR_ARFCN>390000</NR_ARFCN>
267                   <F1_SUL_INFO>
268                      <SUL_ARFCN>100</SUL_ARFCN>
269                      <F1_TX_BW>
270                         <F1_NR_SCS>0</F1_NR_SCS>
271                         <F1_NRB>14</F1_NRB>
272                      </F1_TX_BW>
273                   </F1_SUL_INFO>
274                    <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
275                   <F1_FREQ_BAND_LIST>
276                      <F1_FREQ_BAND>
277                         <NR_FREQ_BAND>1</NR_FREQ_BAND>
278                         <SUL_BAND_LIST>
279                            <SUL_BAND>2</SUL_BAND>
280                         </SUL_BAND_LIST>
281                      </F1_FREQ_BAND>
282                   </F1_FREQ_BAND_LIST>
283                </F1_NR_FREQ_INFO_UL>
284                <F1_NR_FREQ_INFO_DL>
285                   <NR_ARFCN>428000</NR_ARFCN>
286                   <F1_SUL_INFO>
287                      <SUL_ARFCN>100</SUL_ARFCN>
288                      <F1_TX_BW>
289                         <F1_NR_SCS>0</F1_NR_SCS>
290                         <F1_NRB>14</F1_NRB>
291                      </F1_TX_BW>
292                   </F1_SUL_INFO>
293                   <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
294                   <F1_FREQ_BAND_LIST>
295                      <F1_FREQ_BAND>
296                         <NR_FREQ_BAND>1</NR_FREQ_BAND>
297                         <SUL_BAND_LIST>
298                            <SUL_BAND>2</SUL_BAND>
299                         </SUL_BAND_LIST>
300                      </F1_FREQ_BAND>
301                   </F1_FREQ_BAND_LIST>
302                </F1_NR_FREQ_INFO_DL>
303                <F1_TX_BW_UL>
304                   <F1_NR_SCS>0</F1_NR_SCS>
305                   <F1_NRB>14</F1_NRB>
306                </F1_TX_BW_UL>
307                <F1_TX_BW_DL>
308                   <F1_NR_SCS>0</F1_NR_SCS>
309                   <F1_NRB>14</F1_NRB>
310                </F1_TX_BW_DL>
311             </F1_NR_FDD_INFO>
312             <F1_NR_TDD_INFO>
313                <F1_NR_FREQ_INFO>
314                   <NR_ARFCN>623400</NR_ARFCN>
315                   <F1_SUL_INFO>
316                      <SUL_ARFCN>100</SUL_ARFCN>
317                      <F1_TX_BW>
318                         <F1_NR_SCS>1</F1_NR_SCS>
319                         <F1_NRB>28</F1_NRB>
320                      </F1_TX_BW>
321                   </F1_SUL_INFO>
322                   <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
323                   <F1_FREQ_BAND_LIST>
324                      <F1_FREQ_BAND>
325                         <NR_FREQ_BAND>78</NR_FREQ_BAND>
326                         <SUL_BAND_LIST>
327                               <SUL_BAND>2</SUL_BAND>
328                         </SUL_BAND_LIST>
329                      </F1_FREQ_BAND>
330                   </F1_FREQ_BAND_LIST>
331                </F1_NR_FREQ_INFO>
332                <F1_TX_BW>
333                   <F1_NR_SCS>1</F1_NR_SCS>
334                   <F1_NRB>28</F1_NRB>
335                </F1_TX_BW>
336             </F1_NR_TDD_INFO>
337          </NR_MODE_INFO>
338          <TIME_CFG>4</TIME_CFG>
339          <F1_CELL_DIR>2</F1_CELL_DIR>
340          <F1_CELL_TYPE>1</F1_CELL_TYPE>
341          <F1_BRDCST_PLMN_INFO>
342             <PLMN>
343                <MCC>
344                   <PLMN_MCC0>3</PLMN_MCC0>
345                   <PLMN_MCC1>1</PLMN_MCC1>
346                   <PLMN_MCC2>1</PLMN_MCC2>
347                </MCC>
348                <MNC>
349                   <PLMN_MNC0>4</PLMN_MNC0>
350                   <PLMN_MNC1>8</PLMN_MNC1>
351                   <PLMN_MNC2>0</PLMN_MNC2>
352                </MNC>
353             </PLMN>
354             <EXT_PLMN>
355                <MCC>
356                   <PLMN_MCC0>3</PLMN_MCC0>
357                   <PLMN_MCC1>1</PLMN_MCC1>
358                   <PLMN_MCC2>1</PLMN_MCC2>
359                </MCC>
360                <MNC>
361                   <PLMN_MNC0>4</PLMN_MNC0>
362                   <PLMN_MNC1>8</PLMN_MNC1>
363                   <PLMN_MNC2>0</PLMN_MNC2>
364                </MNC>
365             </EXT_PLMN>
366             <TAC>1</TAC>
367             <NR_CELL_ID>1</NR_CELL_ID>
368             <NR_RANAC>150</NR_RANAC>
369          </F1_BRDCST_PLMN_INFO>
370       </F1_DU_CELL_INFO>
371    </F1_DU_SRVD_CELL_INFO>
372    <MIB_PARAMS>
373       <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
374       <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
375       <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
376       <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
377       <CORESET_0_INDEX>0</CORESET_0_INDEX>
378       <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
379       <CELL_BARRED>1</CELL_BARRED>
380       <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
381    </MIB_PARAMS>
382    <MAC_CELL_CFG>
383       <CELL_ID>1</CELL_ID>
384       <CARRIER_CFG>
385          <DL_BW>20</DL_BW>
386          <NR_DL_ARFCN>428000</NR_DL_ARFCN>
387          <UL_BW>20</UL_BW>
388          <NR_UL_ARFCN>390000</NR_UL_ARFCN>
389          <NUM_TX_ANT>2</NUM_TX_ANT>
390          <NUM_RX_ANT>2</NUM_RX_ANT>
391       </CARRIER_CFG>
392       <CELL_CFG>
393          <MAC_OP_STATE>0</MAC_OP_STATE><!--OP_DISABLED-->
394          <MAC_ADMIN_STATE>1</MAC_ADMIN_STATE><!--ADMIN_UNLOCKED-->
395          <MAC_CELL_STATE>1</MAC_CELL_STATE><!--CELL_INACTIVE-->
396          <PLMN_INFO>
397             <PLMN>
398                <MCC>
399                   <PLMN_MCC0>3</PLMN_MCC0>
400                   <PLMN_MCC1>1</PLMN_MCC1>
401                   <PLMN_MCC2>1</PLMN_MCC2>
402                </MCC>
403                <MNC>
404                   <PLMN_MNC0>4</PLMN_MNC0>
405                   <PLMN_MNC1>8</PLMN_MNC1>
406                   <PLMN_MNC2>0</PLMN_MNC2>
407                </MNC>
408             </PLMN>
409             <F1_SLICE_SUPP_LST>
410                <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
411                <SNSSAI_LIST>
412                   <SNSSAI>
413                      <SST>1</SST>
414                      <SD_SIZE>
415                         <SD>2</SD>
416                         <SD>3</SD>
417                         <SD>4</SD>
418                      </SD_SIZE>
419                   </SNSSAI>
420                   <SNSSAI>
421                      <SST>5</SST>
422                      <SD_SIZE>
423                         <SD>6</SD>
424                         <SD>7</SD>
425                         <SD>8</SD>
426                      </SD_SIZE>
427                   </SNSSAI>
428                </SNSSAI_LIST>
429             </F1_SLICE_SUPP_LST>
430          </PLMN_INFO>
431          <NR_PCI>1</NR_PCI>
432          <TAC>1</TAC>
433          <SSB_FREQUENCY>3000000</SSB_FREQUENCY>
434          <NR_SCS>0</NR_SCS>
435          <DUPLEX_MODE>0</DUPLEX_MODE>
436          <SIB1_CELL_CFG>
437             <SCH_PAGE_CFG>
438                <NUM_PO>1</NUM_PO>
439                <PO_PRESENT>TRUE</PO_PRESENT>
440                <PAGING_OCC>44</PAGING_OCC>
441             </SCH_PAGE_CFG>
442             <PDCCH_CONFIG_SIB1>
443                <CORESET_ZERO_INDEX>0</CORESET_ZERO_INDEX>
444                <SEARCH_SPACE_ZERO_INDEX>0</SEARCH_SPACE_ZERO_INDEX>
445             </PDCCH_CONFIG_SIB1>
446          </SIB1_CELL_CFG>
447          <BWP_DL_CFG>
448             <BWP_PARAMS>
449                <FIRST_PRB>0</FIRST_PRB>
450                <NUM_PRB>106</NUM_PRB>
451                <NR_SCS>0</NR_SCS>
452                <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
453             </BWP_PARAMS>
454             <PDCCH_CFG_COMMON>
455                <SEARCH_SPACE_CFG>
456                   <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
457                   <CORESET_0_INDEX>0</CORESET_0_INDEX>
458                   <SS_MONITORING_SLOT_SL1>0</SS_MONITORING_SLOT_SL1>
459                   <DURATION>0</DURATION>
460                   <SS_MONITORING_SYMBOL>8192</SS_MONITORING_SYMBOL>
461                   <CANDIDATE_INFO>
462                      <AGG_LEVEL1>8</AGG_LEVEL1>
463                      <AGG_LEVEL2>4</AGG_LEVEL2>
464                      <AGG_LEVEL4>2</AGG_LEVEL4>
465                      <AGG_LEVEL8>1</AGG_LEVEL8>
466                      <AGG_LEVEL16>0</AGG_LEVEL16>
467                   </CANDIDATE_INFO>
468                </SEARCH_SPACE_CFG>
469                <RA_SEARCH_SPACE_INDEX>1</RA_SEARCH_SPACE_INDEX>
470             </PDCCH_CFG_COMMON>
471             <PDSCH_CFG_COMMON>
472                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
473                <PDSCH_COMM_TIME_ALLOC_LIST>
474                   <PDSCH_COMM_TIME_ALLOC>
475                      <PDSCH_K0_CFG>0</PDSCH_K0_CFG>
476                      <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
477                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
478                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
479                   </PDSCH_COMM_TIME_ALLOC>
480                   <PDSCH_COMM_TIME_ALLOC>
481                      <PDSCH_K0_CFG>1</PDSCH_K0_CFG>
482                      <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
483                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
484                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
485                   </PDSCH_COMM_TIME_ALLOC>
486                </PDSCH_COMM_TIME_ALLOC_LIST>
487             </PDSCH_CFG_COMMON>
488          </BWP_DL_CFG>
489          <BWP_UL_CFG>
490             <BWP_PARAMS>
491                <FIRST_PRB>0</FIRST_PRB>
492                <NUM_PRB>106</NUM_PRB>
493                <NR_SCS>0</NR_SCS>
494                <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
495             </BWP_PARAMS>
496             <PUCCH_CFG_COMMON>
497                <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
498                <PUCCH_GROUP_HOPPING>0</PUCCH_GROUP_HOPPING>
499             </PUCCH_CFG_COMMON>
500             <PUSCH_CFG_COMMON>
501                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
502                <PUSCH_COMM_TIME_ALLOC_LIST>
503                   <PUSCH_COMM_TIME_ALLOC>
504                      <PUSCH_K2_CFG>4</PUSCH_K2_CFG>
505                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
506                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
507                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
508                   </PUSCH_COMM_TIME_ALLOC>
509                   <PUSCH_COMM_TIME_ALLOC>
510                      <PUSCH_K2_CFG>5</PUSCH_K2_CFG>
511                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
512                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
513                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
514                   </PUSCH_COMM_TIME_ALLOC>
515                </PUSCH_COMM_TIME_ALLOC_LIST>
516             </PUSCH_CFG_COMMON>  
517          </BWP_UL_CFG>
518       </CELL_CFG>
519       <SSB_CFG>
520          <SSB_PBSC_PWR>0</SSB_PBSC_PWR>
521          <SCS_CMN>0</SCS_CMN>  <!--SCS_15-->
522          <SSB_OFFSET_PT_A>24</SSB_OFFSET_PT_A>
523          <SSB_PERIOD>2</SSB_PERIOD>
524          <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
525          <SSB_MASK_LIST>
526             <SSB_MASK>1</SSB_MASK>
527          </SSB_MASK_LIST>
528          <BEAM_LIST>
529             <BEAM_ID>0</BEAM_ID>
530          </BEAM_LIST>
531          <BETA_PSS>0</BETA_PSS>
532          <BCH_PAYLOAD_FLAG>1</BCH_PAYLOAD_FLAG>
533          <DMRS_TYPE_A_POS>2</DMRS_TYPE_A_POS>
534       </SSB_CFG>
535       <CSIRS_CFG>
536          <CSIRS_FREQ>0</CSIRS_FREQ>
537          <CSIRS_PORTS>0</CSIRS_PORTS>
538          <CSIRS_OFDM_PORT>0</CSIRS_OFDM_PORT>
539          <CSIRS_OFDM_PORT_2>0</CSIRS_OFDM_PORT_2>
540          <CSIRS_DM_TYPE>0</CSIRS_DM_TYPE>
541          <CSIRS_DENSITY>0</CSIRS_DENSITY>
542          <CSIRS_DENSITY_DOT_5>0</CSIRS_DENSITY_DOT_5>
543          <POWER_CONTROL_OFFSET>0</POWER_CONTROL_OFFSET>
544          <POWER_CONTROL_OFFSET_SS>0</POWER_CONTROL_OFFSET_SS>
545          <PERIODICITY_OFFSET>0</PERIODICITY_OFFSET>
546       </CSIRS_CFG>
547       <PRACH_CFG>
548          <PRACH_SEQ_LEN>1</PRACH_SEQ_LEN>
549          <NR_SCS>15</NR_SCS>
550          <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
551          <NUM_PRACH_FDM>1</NUM_PRACH_FDM>
552          <FDM_LIST>
553             <FDM_INFO>
554                <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
555                <NUM_ROOT_SEQ>1</NUM_ROOT_SEQ>
556                <K1>0</K1>
557                <ZERO_CORR_ZONE_CFG>4</ZERO_CORR_ZONE_CFG>
558             </FDM_INFO>
559          </FDM_LIST>
560          <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
561          <SSB_PER_RACH>1</SSB_PER_RACH>
562          <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
563          <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
564          <MAX_NUM_RB>106</MAX_NUM_RB>
565          <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
566          <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
567          <RA_RSP_WINDOW>10</RA_RSP_WINDOW>
568       </PRACH_CFG>
569       <TDD_CFG>
570          <TDD_PERIODICITY>6</TDD_PERIODICITY>
571          <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
572          <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
573          <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
574          <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
575       </TDD_CFG>
576       <PRE_CODE_CFG>
577          <NUM_LAYERS>1</NUM_LAYERS>
578          <NUM_ANT_PORTS>0</NUM_ANT_PORTS>
579       </PRE_CODE_CFG>
580       <BEAM_FORM_CFG>
581          <NUM_OF_BEAMS>0</NUM_OF_BEAMS>
582          <NUM_TX_RUS>0</NUM_TX_RUS>
583          <BEAM_IDX>0</BEAM_IDX>
584          <BEAM_TYPE>0</BEAM_TYPE>
585          <BEAM_AZIMUTH>0</BEAM_AZIMUTH>
586          <BEAM_TILT>0</BEAM_TILT>
587          <BEAM_HORIZ_WIDTH>0</BEAM_HORIZ_WIDTH>
588          <BEAM_VERT_WIDTH>0</BEAM_VERT_WIDTH>
589          <COVER_SHAPE>0</COVER_SHAPE>
590          <DIGI_TILT>0</DIGI_TILT>
591          <DIGI_AZIMUTH>0</DIGI_AZIMUTH>
592       </BEAM_FORM_CFG>
593    </MAC_CELL_CFG>
594    <SLICE_CFG>
595       <NUM_RRM_POLICY>1</NUM_RRM_POLICY>
596       <MAC_SLICE_RRM_POLICY>
597          <RESOURCE_TYPE>0</RESOURCE_TYPE>
598          <NUM_RRM_POLICY_MEMBER>1</NUM_RRM_POLICY_MEMBER>
599          <RRM_POLICY_MEMBER_LIST>
600             <PLMN>
601                <MCC>
602                   <PLMN_MCC0>3</PLMN_MCC0>
603                   <PLMN_MCC1>1</PLMN_MCC1>
604                   <PLMN_MCC2>1</PLMN_MCC2>
605                </MCC>
606                <MNC>
607                   <PLMN_MNC0>4</PLMN_MNC0>
608                   <PLMN_MNC1>8</PLMN_MNC1>
609                   <PLMN_MNC2>0</PLMN_MNC2>
610                </MNC>
611             </PLMN>
612             <SNSSAI>
613                <SST>1</SST>
614                <SD_SIZE>
615                <SD>2</SD>
616                <SD>3</SD>
617                <SD>4</SD>
618                </SD_SIZE>
619             </SNSSAI>
620          </RRM_POLICY_MEMBER_LIST>
621          <RRM_POLICY_RATIO>
622             <MAX_RATIO>90</MAX_RATIO>
623             <MIN_RATIO>30</MIN_RATIO>
624             <DEDICATED_RATIO>10</DEDICATED_RATIO>
625          </RRM_POLICY_RATIO>
626       </MAC_SLICE_RRM_POLICY>
627    </SLICE_CFG>
628    <DU_TIMER_INFO>
629       <TIMER_TQ_CP>
630          <TIMER_LEN>2</TIMER_LEN>
631       </TIMER_TQ_CP>
632       <TIMER_RESOLUTION>1</TIMER_RESOLUTION>
633    </DU_TIMER_INFO>
634    <E2AP_CFG>
635       <E2_NODE_ID>1</E2_NODE_ID>
636       <NUM_OF_TNL_ASSOC>1</NUM_OF_TNL_ASSOC>
637       <TNL_ASSOC_LIST>
638          <TNL_ASSOC>
639             <LOCAL_IP>192.168.130.81</LOCAL_IP>
640             <LOCAL_PORT>36421</LOCAL_PORT>
641             <DESTINATION_IP>192.168.130.80</DESTINATION_IP>
642             <DESTINATION_PORT>36421</DESTINATION_PORT>
643             <ASSOC_USAGE>2</ASSOC_USAGE> 
644          </TNL_ASSOC>
645       </TNL_ASSOC_LIST>
646       <NUM_OF_RAN_FUNCTION>1</NUM_OF_RAN_FUNCTION>
647       <RAN_FUNCTION_LIST>
648          <RAN_FUNCTION>
649             <ID>1</ID>
650             <RAN_FUNCTION_NAME>
651                <SHORT_NAME>ORAN-E2SM-KPM</SHORT_NAME>
652                <SEVICE_MODEL_OID>1.3.6.1.4.1.53148.1.2.2.2</SEVICE_MODEL_OID>
653                <DESCRIPTION>KPM Monitor</DESCRIPTION>
654             </RAN_FUNCTION_NAME>
655             <REVISION_COUNTER>0</REVISION_COUNTER>
656             <NUM_OF_EVENT_TRIGGER_STYLE_SUPPORTED>1</NUM_OF_EVENT_TRIGGER_STYLE_SUPPORTED>
657             <EVENT_TRIGGERED_STYLE_LIST>
658                <EVENT_TRIGGERED_STYLE>
659                   <STYLE_TYPE>1</STYLE_TYPE>
660                   <NAME>Periodic Report</NAME>
661                   <FORMAT_TYPE>1</FORMAT_TYPE>
662                </EVENT_TRIGGERED_STYLE>
663             </EVENT_TRIGGERED_STYLE_LIST>
664             <NUM_OF_REPORT_STYLE_SUPPORTED>1</NUM_OF_REPORT_STYLE_SUPPORTED>
665             <REPORT_STYLE_SUPPORTED_LIST>
666                <REPORT_STYLE>
667                   <RIC_STYLE>
668                      <STYLE_TYPE>1</STYLE_TYPE>
669                      <NAME>E2 Node Measurement</NAME>
670                      <FORMAT_TYPE>1</FORMAT_TYPE>
671                   </RIC_STYLE>
672                   <MEASUREMENT_INFO_LIST>
673                      <MEASUREMENT_INFO>
674                         <ID>1</ID>
675                         <NAME>RRU.PrbTotDl</NAME>
676                      </MEASUREMENT_INFO>
677                      <MEASUREMENT_INFO>
678                         <ID>2</ID>
679                         <NAME>RRU.PrbTotUl</NAME>
680                      </MEASUREMENT_INFO>
681                   </MEASUREMENT_INFO_LIST>
682                </REPORT_STYLE>
683             </REPORT_STYLE_SUPPORTED_LIST>
684             <RIC_INDICATION_HEADER_FORMAT>1</RIC_INDICATION_HEADER_FORMAT>
685             <RIC_INDICATION_MESSAGE_FORMAT>1</RIC_INDICATION_MESSAGE_FORMAT>
686          </RAN_FUNCTION>
687       </RAN_FUNCTION_LIST>
688    </E2AP_CFG>
689    <GLOBAL_CFG>
690       <RADIO_FRAME_DURATION>10</RADIO_FRAME_DURATION>
691       <PHY_DELTA_DL>1</PHY_DELTA_DL>
692       <PHY_DELTA_UL>0</PHY_DELTA_UL>
693       <ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL>5</ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL>
694       <ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL>60000</ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL>
695 <!--
696       <MAX_NUM_CELL>2</MAX_NUM_CELL>
697       <MAX_NUM_MU>4</MAX_NUM_MU>
698       <MAX_NUM_UE>3</MAX_NUM_UE>
699       <MAX_NUM_UE_PER_TTI>1</MAX_NUM_UE_PER_TTI>
700       <MAX_DRB_LCID>32</MAX_DRB_LCID>
701       <MAX_NUM_SRB>3</MAX_NUM_SRB>
702       <MAX_NUM_DRB>29</MAX_NUM_DRB>
703       <MAX_NUM_SSB>64</MAX_NUM_SSB>
704       <MAX_NUM_HARQ_PROC>16</MAX_NUM_HARQ_PROC>
705       <MAX_NUM_TB_PER_UE>2</MAX_NUM_TB_PER_UE>
706       <ODU_START_CRNTI>100</ODU_START_CRNTI>
707       <ODU_END_CRNTI>500</ODU_END_CRNTI>
708       <BANDWIDTH>20</BANDWIDTH>
709       <MAX_NUM_RB>106</MAX_NUM_RB>
710       <MAX_SLOTS>10</MAX_SLOTS>
711       <MAX_SFN>1024</MAX_SFN>
712       <MAX_SYMB_PER_SLOT>14</MAX_SYMB_PER_SLOT>
713       <MAX_NUM_STATS_GRP>5</MAX_NUM_STATS_GRP>
714       <MAX_NUM_STATS>10</MAX_NUM_STATS>
715       <MAX_TDD_PERIODICITY_SLOTS>100</MAX_TDD_PERIODICITY_SLOTS>
716 -->
717    </GLOBAL_CFG>
718 </DU_CFG_PARAMS>   
719
720