1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define SCH_INST_START 1
21 #define SCH_MAX_INST 1
22 #define SCH_NUM_SLOTS 10 /*forcing this to 10 */
23 #define SCH_MAX_SFN 1024
24 #define MAX_NUM_RB 106 /* value for numerology 0 15Khz */
25 #define SCH_MIB_TRANS 80
26 #define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */
27 #define SCH_MAX_SSB_BEAM 4 /* since we are supporting only SCS=15KHz */
28 #define SCH_SCS_15KHZ 0 /* numerology 0 and 15Khz */
29 #define SCH_SYMBOL_PER_SLOT 14
30 #define SCH_SSB_NUM_SYMB 4
31 #define SCH_SSB_NUM_PRB 20
36 #define PUSCH_START_RB 15
37 #define PUCCH_NUM_PRB_FORMAT_0 1 /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */
38 #define SI_RNTI 0xFFFF
40 #define DMRS_MAP_TYPE_A 1
41 #define NUM_DMRS_SYMBOLS 12
42 #define DMRS_ADDITIONAL_POS 2
47 #define RLC_HDR_SIZE 3 /* 3 bytes of RLC Header size */
48 #define MAC_HDR_SIZE 3 /* 3 bytes of MAC Header */
49 #define UL_GRANT_SIZE 224
51 typedef struct schCellCb SchCellCb;
52 typedef struct schUeCb SchUeCb;
56 SCH_UE_STATE_INACTIVE,
62 SCH_LC_STATE_INACTIVE,
68 * Structure holding LTE MAC's General Configuration information.
70 typedef struct schGenCb
72 uint8_t tmrRes; /*!< Timer resolution */
73 uint8_t startCellId; /*!< Starting Cell Id */
75 bool forceCntrlSrbBoOnPCel; /*!< value 1 means force scheduling
76 of RLC control BO and SRB BO on
77 PCell. val 0 means don't force*/
78 bool isSCellActDeactAlgoEnable; /*!< TRUE will enable activation/deactivation algo at Schd */
84 * scheduler allocationsfor DL per cell.
86 typedef struct schDlSlotInfo
88 uint16_t totalPrb; /*!< Number of RBs in the cell */
89 uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */
90 bool ssbPres; /*!< Flag to determine if SSB is present in this slot */
91 uint8_t ssbIdxSupported; /*!< Max SSB index */
92 SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */
93 bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */
94 RarInfo *rarInfo; /*!< RAR info */
95 DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */
98 typedef struct schRaCb
105 * scheduler allocationsfor UL per cell.
107 typedef struct schUlSlotInfo
109 uint16_t totalPrb; /*!< Number of RBs in the cell */
110 uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */
111 uint8_t puschCurrentPrb; /* Current PRB for PUSCH allocation */
112 bool puschPres; /*!< PUSCH presence field */
113 SchPuschInfo *schPuschInfo; /*!< PUSCH info */
114 bool pucchPres; /*!< PUCCH presence field */
115 SchPucchInfo schPucchInfo; /*!< PUCCH info */
120 * BSR info per slot per UE.
122 typedef struct bsrInfo
124 uint8_t priority; /* CG priority */
125 uint32_t dataVol; /* Data volume requested in bytes */
128 typedef struct schLcCtxt
130 uint8_t lcId; // logical Channel ID
131 uint8_t lcp; // logical Channel Prioritization
136 typedef struct schDlCb
139 SchDlLcCtxt dlLcCtxt[MAX_NUM_LC];
142 typedef struct schUlLcCtxt
149 uint8_t pbr; // prioritisedBitRate
150 uint8_t bsd; // bucketSizeDuration
153 typedef struct schUlCb
156 SchUlLcCtxt ulLcCtxt[MAX_NUM_LC];
163 typedef struct schUeCb
171 BsrInfo bsrInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
178 * Cell Control block per cell.
180 typedef struct schCellCb
182 uint16_t cellId; /*!< Cell ID */
183 Inst instIdx; /*!< Index of the scheduler instance */
184 Inst macInst; /*!< Index of the MAC instance */
185 uint8_t numSlots; /*!< Number of slots in current frame */
186 SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/
187 SchDlSlotInfo *schDlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in DL */
188 SchUlSlotInfo *schUlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in UL */
189 SchCellCfg cellCfg; /*!< Cell ocnfiguration */
190 uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
191 SchRaCb raCb[MAX_NUM_UE]; /*!< Rach Cb */
193 uint32_t actvUeBitMap;
194 uint32_t boIndBitMap;
195 SchUeCb ueCb[MAX_NUM_UE];
200 * Control block for sch
204 TskInit schInit; /*!< Task Init info */
205 SchGenCb genCfg; /*!< General Config info */
206 SchCellCb *cells[MAX_NUM_CELL]; /* Array to store cellCb ptr */
209 /* Declaration for scheduler control blocks */
210 SchCb schCb[SCH_MAX_INST];
212 /* function declarations */
213 uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc,uint16_t slot);
214 uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst inst);
215 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst);
216 uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot);
217 uint16_t schCalcTbSize(uint16_t payLoadSize);
218 uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols);
219 uint16_t schAllocPucchResource(SchCellCb *cell, uint16_t crnti, uint16_t slot);
220 uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst);
221 uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo puschInfo, DciInfo *dciInfo);
222 uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, SchPuschInfo *puschInfo);
223 uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t crnti,
224 uint16_t accumalatedSize, uint16_t slot);
225 uint16_t schAccumalateLcBoSize(SchCellCb *cell, uint16_t ueIdx);
227 /**********************************************************************
229 **********************************************************************/